diff --git a/doc/chips/icspll b/doc/chips/icspll index 095f5208..82a33289 100644 --- a/doc/chips/icspll +++ b/doc/chips/icspll @@ -1,26 +1,69 @@ +ICSPLL Driver +------------- This is a clock chip reader. +It requires an SMBus interface chip and a clock chip +which supports SMBus block reads. -*** ALPHA - It may hang your SMBus or crash your entire system. *** +Stability +--------- +*** ALPHA - It may hang your SMBus or crash your entire system. *** +*** Using this driver with an unsupported chip or configuration *** +*** is even more likely to hang your SMBus or crash your system. *** -It is not clear if it will work at all due to incompatibilities -between the way block reads work on the SMBus and the I2C bus. -(These are systems with a piix4 or an ali15x3 chip). +AUTODETECTION +------------- +None is possible, these chips do not have ID registers. +Read the full part number on your clock chip and read this +documentation before insmod'ing the icspll module. + + +CHIPS SUPPORTED +--------------- +This driver will only work on clock chips that support the SMBus +block read, which includes a length byte. +The clock chip must be at address 0x69. + +According to ICS, this includes the following chips: + ICS9148-xx (xx > 20) with a serial interface + ICS9248-xx (all xx) with a serial interface + +Other ICS chips DO NOT support SMBus block reads. +Not all 9148/9248 ICS chips have a serial interface. +See http://www.icst.com to get the data sheet for your clock +chip. + +You must have a piix4 or a ali15x3 chip to have this work. +Other bridge chips like the via support I2C +but not SMBus-style block reads. + +Writes are not supported. + + Partial list of supported chips: + ICS: + 9148-32, 9248-81 + PLL: + none? + + +CHIPS NOT SUPPORTED +------------------- +Other ICS chips and PhaseLink Labs (PLL) chips ( http://www.phaselink.com ) +have an I2C serial interface that is not compatible +with SMBus block reads because they do not output a length byte. However because of a lack of block read support in the I2C package, -it won't work with native I2C systems either. +this driver won't work with native I2C systems (like the via) +at the moment. -If you try this, please report your clock chip, your SMBus chip -(piix4 or ali15x3), and the results of -'cat /proc/sys/dev/sensors/icspll-i2c-*-69/reg0-6' to -lm78@stimpy.netroedge.com. +There may be some PLL chips that support the SMBus length byte, +who knows. --------------------- +These chips are compatible with SMBus writes which is why +motherboard designers put them on the SMBus, so that the BIOS +can configure them. +But this driver will not support write-only chips. -Supports Integrated Circuit Systems (ICS) -and PhaseLink Labs (PLL) I2C clock generators -at address 0x69. - - Supported chips (preliminary): + Partial list of unsupported chips: ICS: 9148-02, 9148B-04, 9148-08, 9150-01, 9150-04, 9150-11 PLL: @@ -29,6 +72,32 @@ at address 0x69. 52C68-02, 52C68-04, 52C69-13, 52C69-15 -These chips have 7 registers. -They will appear as 7 values when you cat + +/PROC ENTRY +----------- +These chips have up to 7 registers. +They will appear as 7 decimal values when you cat /proc/sys/dev/sensors/icspll-i2c-*-69/reg0-6. + + +RESULTS +------- +If you try this on a supported configuration, +please report your clock chip, your SMBus chip +(piix4 or ali15x3), and the results of +'cat /proc/sys/dev/sensors/icspll-i2c-*-69/reg0-6' to +lm78@stimpy.netroedge.com. + + +TO DO +----- +Add a chip= parameter so that you know what chip it is. +Put more entries in /proc for the individual fields in the registers. +Native I2C support. +Writes? + + +Author/Maintainer +----------------- +Mark D. Studebaker (mds@eng.paradyne.com) + diff --git a/doc/chips/w83781d b/doc/chips/w83781d index d50e2f6c..7ceee95e 100644 --- a/doc/chips/w83781d +++ b/doc/chips/w83781d @@ -1,31 +1,41 @@ - - +Winbond 83781D driver +--------------------- Supports the following Winbond chips: Chip #vin #fanin #pwm #temp wchipid i2c ISA +------------------------------------------------------------ w83781d 7 3 0 3 0x10 yes yes w83782d 9 3 2-4 3 0x30 yes yes w83783s 5-6 3 2 1-2 0x40 yes no +Stability +--------- +w83781d: tested, stable +w83782d: beta tested +w83783s: untested + + +/PROC ENTRIES +------------- +Varies depending on chip type. + The driver only updates its values each 1.5 seconds; reading it more often will do no harm, but will return 'old' values. - - -To do: +TO DO: ----- - 782d/783s clock speed select 782d beep 3 register 782d programmable pins 783s temp2 (labeled as temp1 in data sheet) at different location than 781d/782d, not implemented yet. 781d R-T table - 782d/783s undocumented thermistor/PII/3904 select bits + 782d/783s undocumented thermistor/PII/3904 select bits for pins 38-40 + 782d/783s clock speed select -Notes: +NOTES: ----- 783s has no in1 for compatibility with the 781d/782d. @@ -41,3 +51,58 @@ Notes: 782d has pwm1-2 for isa, pwm1-4 for i2c. (pwm3-4 share pins with the isa pins) + + + +Data sheet updates: +------------------ + - Mask off lower bit of all ID registers. + + - PWM clock registers: + + 000: master / 512 + 001: master / 1024 + 010: master / 2048 + 011: master / 4096 + 100: master / 8192 + + +Answers from Winbond tech support +--------------------------------- +> +> 1) In the W83781D data sheet section 7.2 last paragraph, it talks about +> reprogramming the R-T table if the Beta of the thermistor is not +> 3435K. The R-T table is described briefly in section 8.20. +> What formulas do I use to program a new R-T table for a given Beta? +> + We are sorry that the calculation for R-T table value is +confidential. If you have another Beta value of thermistor, we can help +to calculate the R-T table for you. But you should give us real R-T +Table which can be gotten by thermistor vendor. Therefore we will calculate +them and obtain 32-byte data, and you can fill the 32-byte data to the +register in Bank0.CR51 of W83781D. + + +> 2) In the W83782D data sheet, it mentions that pins 38, 39, and 40 are +> programmable to be either thermistor or Pentium II diode inputs. +> How do I program them for diode inputs? I can't find any register +> to program these to be diode inputs. + --> You may program Bank0 CR[5Dh] and CR[59h] registers. + + CR[5Dh] bit 1(VTIN1) bit 2(VTIN2) bit 3(VTIN3) + + thermistor 0 0 0 + diode 1 1 1 + + + CR[59h] bit 4(VTIN1) bit 2(VTIN2) bit 3(VTIN3) + + PII thermal diode 1 1 1 + 2N3904 diode 0 0 0 + + +Author/Maintainer +----------------- +Original 781D support: Frodo and Phil (lm78@stimpy.netroedge.com) +782D/783S support added by: Mark D. Studebaker (mds@eng.paradyne.com) +Send requests to the lm78@stimpy.netroedge.com mailing list. diff --git a/kernel/chips/icspll.c b/kernel/chips/icspll.c index b184a6aa..a7f0d373 100644 --- a/kernel/chips/icspll.c +++ b/kernel/chips/icspll.c @@ -21,17 +21,10 @@ */ /* - Supports Integrated Circuit Systems (ICS) - and PhaseLink Labs (PLL) I2C clock generators - at address 0x69. - - Supported chips (preliminary): - ICS: - 9148-02, 9148B-04, 9148-08, 9150-01, 9150-04, 9150-11 - PLL: - 52C64-05, 52C64-25, 52C65-02, 52C66-01, 52C66-03, 52C66-10, - 52C66-11, 52C66-28, 52C66-29, 52C66-31, 52C66-38, 52C66-39, - 52C68-02, 52C68-04, 52C69-13, 52C69-15 + ** WARNING ** + Supports limited combinations of clock chips and busses. + Use on unsupported chips may crash your system. + See doc/chips/icspll for details. */