diff --git a/kernel/busses/i2c-hydra.c b/kernel/busses/i2c-hydra.c index 0d1bd0ec..db81d4ef 100644 --- a/kernel/busses/i2c-hydra.c +++ b/kernel/busses/i2c-hydra.c @@ -78,6 +78,7 @@ static void bit_hydra_setscl(void *data, int state) val |= HYDRA_SCLK_OE; } pdregw(val); + pdregr(); /* flush posted write */ } static void bit_hydra_setsda(void *data, int state) @@ -90,6 +91,7 @@ static void bit_hydra_setsda(void *data, int state) val |= HYDRA_SDAT_OE; } pdregw(val); + pdregr(); /* flush posted write */ } static int bit_hydra_getscl(void *data) diff --git a/kernel/busses/i2c-i810.c b/kernel/busses/i2c-i810.c index 6834077f..2e660d3c 100644 --- a/kernel/busses/i2c-i810.c +++ b/kernel/busses/i2c-i810.c @@ -129,12 +129,14 @@ static void bit_i810i2c_setscl(void *data, int val) { outlong((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK, I810_GPIOB); + readlong(I810_GPIOB); /* flush posted write */ } static void bit_i810i2c_setsda(void *data, int val) { outlong((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK, I810_GPIOB); + readlong(I810_GPIOB); /* flush posted write */ } /* The GPIO pins are open drain, so the pins always remain outputs. @@ -161,12 +163,14 @@ static void bit_i810ddc_setscl(void *data, int val) { outlong((val ? SCL_VAL_OUT : 0) | SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK, I810_GPIOA); + readlong(I810_GPIOA); /* flush posted write */ } static void bit_i810ddc_setsda(void *data, int val) { outlong((val ? SDA_VAL_OUT : 0) | SDA_DIR | SDA_DIR_MASK | SDA_VAL_MASK, I810_GPIOA); + readlong(I810_GPIOA); /* flush posted write */ } static int bit_i810ddc_getscl(void *data) @@ -236,10 +240,12 @@ void config_i810(struct pci_dev *dev) cadr += I810_IOCONTROL_OFFSET; cadr &= PCI_BASE_ADDRESS_MEM_MASK; mem = ioremap_nocache(cadr, 0x1000); - bit_i810i2c_setscl(NULL, 1); - bit_i810i2c_setsda(NULL, 1); - bit_i810ddc_setscl(NULL, 1); - bit_i810ddc_setsda(NULL, 1); + if(mem) { + bit_i810i2c_setscl(NULL, 1); + bit_i810i2c_setsda(NULL, 1); + bit_i810ddc_setscl(NULL, 1); + bit_i810ddc_setsda(NULL, 1); + } } /* Detect whether a supported device can be found, @@ -253,6 +259,8 @@ static int i810i2c_setup(void) if ((dev = pci_find_device(PCI_VENDOR_ID_INTEL, *num++, dev))) { config_i810(dev); + if(!mem) + return -ENOMEM; printk("i2c-i810.o: i810/i815 found.\n"); return 0; } diff --git a/kernel/busses/i2c-savage4.c b/kernel/busses/i2c-savage4.c index 9ebd23a5..8fb2e28c 100644 --- a/kernel/busses/i2c-savage4.c +++ b/kernel/busses/i2c-savage4.c @@ -122,6 +122,7 @@ static void bit_savi2c_setscl(void *data, int val) else r &= ~I2C_SCL_OUT; outlong(r); + readlong(); /* flush posted write */ } static void bit_savi2c_setsda(void *data, int val) @@ -133,6 +134,7 @@ static void bit_savi2c_setsda(void *data, int val) else r &= ~I2C_SDA_OUT; outlong(r); + readlong(); /* flush posted write */ } /* The GPIO pins are open drain, so the pins always remain outputs. @@ -235,10 +237,11 @@ void config_s4(struct pci_dev *dev) #endif cadr &= PCI_BASE_ADDRESS_MEM_MASK; mem = ioremap_nocache(cadr, 0x0080000); - -// *((unsigned int *) (mem + REG2)) = 0x8160; - *((unsigned int *) (mem + REG)) = 0x00000020; - printk("i2c-savage4: Using Savage4 at 0x%p\n", mem); + if(mem) { +// *((unsigned int *) (mem + REG2)) = 0x8160; + *((unsigned int *) (mem + REG)) = 0x00000020; + printk("i2c-savage4: Using Savage4 at 0x%p\n", mem); + } } /* Detect chip and initialize it. */ @@ -272,6 +275,8 @@ static int savage4_setup(void) } while (dev); if (s4_num > 0) { + if(!mem) + return -ENOMEM; printk("i2c-savage4: %d Savage4 found.\n", s4_num); if (s4_num > 1) printk("i2c-savage4: warning: only 1 supported.\n"); diff --git a/kernel/busses/i2c-voodoo3.c b/kernel/busses/i2c-voodoo3.c index 59375567..a226641a 100644 --- a/kernel/busses/i2c-voodoo3.c +++ b/kernel/busses/i2c-voodoo3.c @@ -115,6 +115,7 @@ static void bit_vooi2c_setscl(void *data, int val) else r &= ~I2C_SCL_OUT; outlong(r); + readlong(); /* flush posted write */ } static void bit_vooi2c_setsda(void *data, int val) @@ -126,6 +127,7 @@ static void bit_vooi2c_setsda(void *data, int val) else r &= ~I2C_SDA_OUT; outlong(r); + readlong(); /* flush posted write */ } /* The GPIO pins are open drain, so the pins always remain outputs. @@ -151,6 +153,7 @@ static void bit_vooddc_setscl(void *data, int val) else r &= ~DDC_SCL_OUT; outlong(r); + readlong(); /* flush posted write */ } static void bit_vooddc_setsda(void *data, int val) @@ -162,6 +165,7 @@ static void bit_vooddc_setsda(void *data, int val) else r &= ~DDC_SDA_OUT; outlong(r); + readlong(); /* flush posted write */ } static int bit_vooddc_getscl(void *data) @@ -228,10 +232,11 @@ void config_v3(struct pci_dev *dev) #endif cadr &= PCI_BASE_ADDRESS_MEM_MASK; mem = ioremap_nocache(cadr, 0x1000); - - *((unsigned int *) (mem + REG2)) = 0x8160; - *((unsigned int *) (mem + REG)) = 0xcffc0020; - printk("i2c-voodoo3: Using Banshee/Voodoo3 at 0x%p\n", mem); + if(mem) { + *((unsigned int *) (mem + REG2)) = 0x8160; + *((unsigned int *) (mem + REG)) = 0xcffc0020; + printk("i2c-voodoo3: Using Banshee/Voodoo3 at 0x%p\n", mem); + } } /* Detect whether a Voodoo3 or a Banshee can be found, @@ -266,6 +271,8 @@ static int voodoo3_setup(void) } while (dev); if (v3_num > 0) { + if(!mem) + return -ENOMEM; printk("i2c-voodoo3: %d Banshee/Voodoo3 found.\n", v3_num); if (v3_num > 1) printk("i2c-voodoo3: warning: only 1 supported.\n");