diff --git a/CHANGES b/CHANGES
index 6c5067b0..2c5f8d9d 100644
--- a/CHANGES
+++ b/CHANGES
@@ -17,6 +17,7 @@ lm_sensors CHANGES file
                    Add ICH8 support (2.6 backport)
   Module i2c-piix4: Add ServerWorks HT-1000 support (2.6 backport)
                     Add ATI IXP200, IXP300, IXP400 support (2.6 backport)
+                    Drop the fix_hstcfg parameter (2.6 backport)
   Module i2c-viapro: Fix compilation with kernels < 2.4.21
   Module lm83: Add LM82 support (2.6 backport)
   Module w83781d: Use real-time alarm registers when possible (2.6 backport)
diff --git a/doc/busses/i2c-piix4 b/doc/busses/i2c-piix4
index 9e426ce4..f36bc3a7 100644
--- a/doc/busses/i2c-piix4
+++ b/doc/busses/i2c-piix4
@@ -25,8 +25,6 @@ Module Parameters
   Forcibly enable the PIIX4. DANGEROUS!
 * force_addr: int
   Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
-* fix_hstcfg: int
-  Fix config register. Needed on some boards (Force CPCI735).
 
 
 Description
@@ -71,7 +69,19 @@ driver on those mainboards.
 The ServerWorks Southbridges, the Intel 440MX,
 and the Victory766 are identical to the PIIX4 in I2C/SMBus support.
 
-A few OSB4 southbridges are known to be misconfigured by the BIOS. In this
-case, you have you use the fix_hstcfg module parameter. Do not use it
-unless you know you have to, because in some cases it also breaks
-configuration on southbridges that don't need it.
+If you own Force CPCI735 motherboard or other OSB4 based systems you may need
+to change the SMBus Interrupt Select register so the SMBus controller uses
+the SMI mode.
+
+1) Use lspci command and locate the PCI device with the SMBus controller:
+   00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
+   The line may vary for different chipsets. Please consult the driver source
+   for all possible PCI ids (and lspci -n to match them). Lets assume the
+   device is located at 00:0f.0.
+2) Now you just need to change the value in 0xD2 register. Get it first with
+   command: lspci -xxx -s 00:0f.0
+   If the value is 0x3 then you need to change it to 0x1
+   setpci  -s 00:0f.0 d2.b=1
+
+Please note that you don't need to do that in all cases, just when the SMBus is
+not working properly.
diff --git a/kernel/busses/i2c-piix4.c b/kernel/busses/i2c-piix4.c
index 5383de40..c128c612 100644
--- a/kernel/busses/i2c-piix4.c
+++ b/kernel/busses/i2c-piix4.c
@@ -103,11 +103,6 @@ MODULE_PARM_DESC(force_addr,
 		 "Forcibly enable the PIIX4 at the given address. "
 		 "EXTREMELY DANGEROUS!");
 
-static int fix_hstcfg = 0;
-MODULE_PARM(fix_hstcfg, "i");
-MODULE_PARM_DESC(fix_hstcfg,
-		 "Fix config register. Needed on some boards (Force CPCI735).");
-
 static int piix4_transaction(void);
 
 static unsigned short piix4_smba = 0;
@@ -172,22 +167,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
 
 	pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 
-	/* Some BIOS will set up the chipset incorrectly and leave a register
-	   in an undefined state (causing I2C to act very strangely). */
-	if (temp & 0x02) {
-		if (fix_hstcfg) {
-			printk(KERN_INFO "i2c-piix4.o: Working around buggy "
-				"BIOS (I2C)\n");
-			temp &= 0xfd;
-			pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
-		} else {
-			printk(KERN_INFO "i2c-piix4.o: Unusual config register "
-				"value\n");
-			printk(KERN_INFO "i2c-piix4.o: Try using fix_hstcfg=1 "
-				"if you experience problems\n");
-		}
-	}
-
 	/* If force_addr is set, we program the new address here. Just to make
 	   sure, we disable the PIIX4 first. */
 	if (force_addr) {
@@ -220,7 +199,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
 	}
 
 #ifdef DEBUG
-	if ((temp & 0x0E) == 8)
+	if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
 		printk(KERN_DEBUG "i2c-piix4.o: Using Interrupt 9 for "
 			"SMBus.\n");
 	else if ((temp & 0x0E) == 0)