diff --git a/doc/busses/i2c-piix4 b/doc/busses/i2c-piix4 index 86675132..2643798d 100644 --- a/doc/busses/i2c-piix4 +++ b/doc/busses/i2c-piix4 @@ -7,7 +7,7 @@ Supported adapters: * Intel 82371AB PIIX4 and PIIX4E * Intel 82443MX (440MX) Datasheet: Publicly available at the Intel website - * ServerWorks OSB4 and CSB5 southbridges + * ServerWorks OSB4, CSB5 and CSB6 southbridges Datasheet: Only available via NDA from ServerWorks * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge Datasheet: Publicly available at the SMSC website http://www.smsc.com @@ -23,6 +23,8 @@ Module Parameters Forcibly enable the PIIX4. DANGEROUS! * force_addr: int Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! +* fix_hstcfg: int + Fix config register. Needed on some boards (Force CPCI735). Description @@ -66,3 +68,8 @@ driver on those mainboards. The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are identical to the PIIX4 in I2C/SMBus support. + +A few OSB4 southbridges are known to be misconfigured by the BIOS. In this +case, you have you use the fix_hstcfg module parameter. Do not use it +unless you know you have to, because in some cases it also breaks +configuration on southbridges that don't need it. diff --git a/kernel/busses/i2c-piix4.c b/kernel/busses/i2c-piix4.c index 3a59c913..da7c4920 100644 --- a/kernel/busses/i2c-piix4.c +++ b/kernel/busses/i2c-piix4.c @@ -100,6 +100,11 @@ MODULE_PARM_DESC(force_addr, "Forcibly enable the PIIX4 at the given address. " "EXTREMELY DANGEROUS!"); +static int fix_hstcfg = 0; +MODULE_PARM(fix_hstcfg, "i"); +MODULE_PARM_DESC(fix_hstcfg, + "Fix config register. Needed on some boards (Force CPCI735)."); + static int piix4_transaction(void); @@ -182,7 +187,7 @@ static int piix4_setup(struct pci_dev *PIIX4_dev, const struct pci_device_id *id /* Some BIOS will set up the chipset incorrectly and leave a register in an undefined state (causing I2C to act very strangely). */ - if (temp & 0x02) { + if (fix_hstcfg && (temp & 0x02)) { printk("Worked around buggy BIOS (I2C)\n"); temp &= 0xfd; pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);