diff --git a/CHANGES b/CHANGES
index 8071b113..0972c474 100644
--- a/CHANGES
+++ b/CHANGES
@@ -27,6 +27,7 @@ ask CVS about it:
   Module ddcmon: allow force and force_ddcmon parameters
   Module ds1621: new
   Module i2c-ali1535: Enhance error checking and recovery; add mutex
+  Module i2c-i810: Add "dummy write" before reads per Intel prog. ref.
   Module lm87: update voltage calculations
   Module mtp008: new
   Module pcf8574: change update time to 5 seconds
diff --git a/kernel/busses/i2c-i810.c b/kernel/busses/i2c-i810.c
index e9ff8645..bf6b3c1d 100644
--- a/kernel/busses/i2c-i810.c
+++ b/kernel/busses/i2c-i810.c
@@ -133,15 +133,21 @@ static void bit_i810i2c_setsda(void *data, int val)
 
 /* The GPIO pins are open drain, so the pins always remain outputs.
    We rely on the i2c-algo-bit routines to set the pins high before
-   reading the input from other chips. */
+   reading the input from other chips. Following guidance in the 815
+   prog. ref. guide, we do a "dummy write" of 0 to the register before
+   reading which forces the input value to be latched. We presume this
+   applies to the 810 as well. This is necessary to get
+   i2c_algo_bit bit_test=1 to pass. */
 
 static int bit_i810i2c_getscl(void *data)
 {
+	outlong(0, I810_GPIOB);
 	return (0 != (readlong(I810_GPIOB) & SCL_VAL_IN));
 }
 
 static int bit_i810i2c_getsda(void *data)
 {
+	outlong(0, I810_GPIOB);
 	return (0 != (readlong(I810_GPIOB) & SDA_VAL_IN));
 }
 
@@ -159,11 +165,13 @@ static void bit_i810ddc_setsda(void *data, int val)
 
 static int bit_i810ddc_getscl(void *data)
 {
+	outlong(0, I810_GPIOA);
 	return (0 != (readlong(I810_GPIOA) & SCL_VAL_IN));
 }
 
 static int bit_i810ddc_getsda(void *data)
 {
+	outlong(0, I810_GPIOA);
 	return (0 != (readlong(I810_GPIOA) & SDA_VAL_IN));
 }