wt/lm-sensors
1
0 Fork 0
mirror of https://github.com/lm-sensors/lm-sensors.git synced 2026-10-16 10:49:31 +00:00
Code Issues Packages Projects Releases Wiki Activity
Files
77dd1086a881434fabf01e7cd84df4e2afede12e
lm-sensors/doc/chips/ddcmon
T
Jean Delvare 24e6a6352d Major update of the ddcmon driver. 
Add half a dozen new features.
        Add checksum parameter (same as for the eeprom module)
        Fix monitor limits


git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@1934 7894878c-1315-0410-8ee3-d5d059ff63e0
2003-08-01 17:42:08 +00:00

273 lines
12 KiB
Plaintext
Raw Blame History

Kernel driver `ddcmon.o'
========================
Status: As complete as we want it to be, lightly tested
Supported chips:
* Any DDC Monitor EDID EEPROM chip at 0x50
Prefix `ddcmon'
Addresses scanned: I2C 0x50
Standards: available for purchase from VESA http://www.vesa.org
Datasheets: Publicly available from Atmel (www.atmel.com),
Fairchild (www.fairchildsemi.com), and
Microchip (www.microchip.com)
Chip Size (bits) Address
24C01 1K 0x50 (shadows at 0x51 - 0x57)
(Typical device in monitors)
24C01A 1K 0x50 - 0x57 (Typical device in monitors)
24C02 2K 0x50 - 0x57
24C04 4K 0x50, 0x52, 0x54, 0x56
(additional data at 0x51, 0x53, 0x55, 0x57)
24C08 8K 0x50, 0x54 (additional data at 0x51, 0x52,
0x53, 0x55, 0x56, 0x57)
24C16 16K 0x50 (additional data at 0x51 - 0x57)
Author: Frodo Looijaard <frodol@dds.nl>, Philip Edelbrock
<phil@netroedge.com>, Mark Studebaker <mdsxyz123@yahoo.com> and
Jean Delvare <khali@linux-fr.org>
Special assistance on DDC provided by Petr Vandrovec <vandrove@vc.cvut.cz>
License: GPL
Module Parameters
-----------------
* force: short array (min = 1, max = 48)
List of adapter,address pairs to boldly assume to be present
* force_ddcmon: short array (min = 1, max = 48)
Same as 'force'
* ignore: short array (min = 1, max = 48)
List of adapter,address pairs not to scan
* ignore_range: short array (min = 1, max = 48)
List of adapter,start-addr,end-addr triples not to scan
* probe: short array (min = 1, max = 48)
List of adapter,address pairs to scan additionally
* probe_range: short array (min = 1, max = 48)
List of adapter,start-addr,end-addr triples to scan additionally
* checksum: int
Only accept eeproms whose checksum is correct
Description
-----------
This is a simple module for reading the EEPROM on a DDC-compliant monitor.
DDC (Display Data Channel) is the I2C-based communication channel
to the monitor. The EEPROM contains a 128-byte data structure defined
by the EDID (Extended Display Identification Data) standard.
Use:
After inserting the module (and any other required smbus/i2c modules), you
should have a directory in /proc/sys/dev/sensors/ with a name such
as "ddcmon-i2c-3-50". Inside each of these is a series of files which
represent interesting data from the DDC monitor.
/proc entries:
dpms: bitmask
DPMS support flags
0x20 Active Off
0x40 Suspend
0x80 Standby
edid: 2 integers
EDID version and revision
gamma: 1 float
gamma factor
id: 2 integers
manufacturer ID and product ID
Manufacturer ID is encoded, see 'sensors'
source ../../prog/sensors/chips.c.
maxclock: 1 integer
max pixel clock (also known as video bandwidth) (MHz)
0 if not available.
serial: 1 integer
serial number
Encoding depends on the manufacturer, don't expect the
real serial number here. 0 probably means "not available".
size: 2 integers
vertical monitor size (cm)
horizontal monitor size (cm)
sync: 4 integers
minimum vertical sync frequency (Hz)
maximum vertical sync frequency (Hz)
minimum horizontal sync frequency (KHz)
maximum horizontal sync frequency (KHz)
0 0 0 0 if not available.
time: 2 integers
Manufacture year and week
timing[1-8]: 3 integers
supported standard timing
horizontal resolution
vertical resolution
(vertical) refresh rate
0 0 0 if not used.
timings: bitmask
supported established timings
0x000001 720x400@70Hz (VGA 640x400, IBM)
0x000002 720x400@88Hz (XGA2)
0x000004 640x480@60Hz (VGA)
0x000008 640x480@67Hz (Mac II, Apple)
0x000010 640x480@72Hz (VESA)
0x000020 640x480@75Hz (VESA)
0x000040 800x600@56Hz (VESA)
0x000080 800x600@60Hz (VESA)
0x000100 800x600@72Hz (VESA)
0x000200 800x600@75Hz (VESA)
0x000400 832x624@75Hz (Mac II)
0x000800 1024x768@87Hz interlaced (8514A)
0x001000 1024x768@60Hz (VESA)
0x002000 1024x768@70Hz (VESA)
0x004000 1024x768@75Hz (VESA)
0x008000 1280x1024@75Hz (VESA)
0x010000 - 0x800000 Manufacturer reserved
0x800000 1152x870 @ 75 Hz (Mac II, Apple)?
Chip Features
-------------
Chip 'ddcmon'
LABEL LABEL CLASS COMPUTE CLASS MODE MAGN
Manufacturer ID - - R- 0
Model Number - - R- 0
Monitor Size (cm) - - R- 0
hsize Monitor Size (cm) - R- 0
Vertical Sync (Hz) - - R- 0
v_sync_max Vertical Sync (Hz) - R- 0
Horizontal Sync (KHz) - - R- 0
h_sync_max Horizontal Sync (KHz) - R- 0
Established Timings - - R- 0
Serial Number - - R- 0
Manufacture Time - - R- 0
week Manufacture Time - R- 0
EDID Version - - R- 0
revision EDID Version - R- 0
Gamma Factor - - R- 2
DPMS Modes - - R- 0
Standard Timing 1 - - R- 0
vertical Standard Timing 1 - R- 0
refresh Standard Timing 1 - R- 0
Standard Timing 2 - - R- 0
vertical Standard Timing 2 - R- 0
refresh Standard Timing 2 - R- 0
Standard Timing 3 - - R- 0
vertical Standard Timing 3 - R- 0
refresh Standard Timing 3 - R- 0
Standard Timing 4 - - R- 0
vertical Standard Timing 4 - R- 0
refresh Standard Timing 4 - R- 0
Standard Timing 5 - - R- 0
vertical Standard Timing 5 - R- 0
refresh Standard Timing 5 - R- 0
Standard Timing 6 - - R- 0
vertical Standard Timing 6 - R- 0
refresh Standard Timing 6 - R- 0
Standard Timing 7 - - R- 0
vertical Standard Timing 7 - R- 0
refresh Standard Timing 7 - R- 0
Standard Timing 8 - - R- 0
vertical Standard Timing 8 - R- 0
refresh Standard Timing 8 - R- 0
Max Pixel Clock (MHz) - - R- 0
LABEL FEATURE SYMBOL SYSCTL FILE:N
Manufacturer ID SENSORS_DDCMON_MAN_ID id:1
Model Number SENSORS_DDCMON_PROD_ID id:2
Monitor Size (cm) SENSORS_DDCMON_VERSIZE size:1
hsize SENSORS_DDCMON_HORSIZE size:2
Vertical Sync (Hz) SENSORS_DDCMON_VERSYNCMIN sync:1
v_sync_max SENSORS_DDCMON_VERSYNCMAX sync:2
Horizontal Sync (KHz) SENSORS_DDCMON_HORSYNCMIN sync:3
h_sync_max SENSORS_DDCMON_HORSYNCMAX sync:4
Established Timings SENSORS_DDCMON_TIMINGS timings:1
Serial Number SENSORS_DDCMON_SERIAL serial:1
Manufacture Time SENSORS_DDCMON_YEAR time:1
week SENSORS_DDCMON_WEEK time:2
EDID Version SENSORS_DDCMON_EDID_VER edid:1
revision SENSORS_DDCMON_EDID_REV edid:2
Gamma Factor SENSORS_DDCMON_GAMMA gamma:1
DPMS Modes SENSORS_DDCMON_DPMS dpms:1
Standard Timing 1 SENSORS_DDCMON_TIMING1_HOR timing1:1
vertical SENSORS_DDCMON_TIMING1_VER timing1:2
refresh SENSORS_DDCMON_TIMING1_REF timing1:3
Standard Timing 2 SENSORS_DDCMON_TIMING2_HOR timing2:1
vertical SENSORS_DDCMON_TIMING2_VER timing2:2
refresh SENSORS_DDCMON_TIMING2_REF timing2:3
Standard Timing 3 SENSORS_DDCMON_TIMING3_HOR timing3:1
vertical SENSORS_DDCMON_TIMING3_VER timing3:2
refresh SENSORS_DDCMON_TIMING3_REF timing3:3
Standard Timing 4 SENSORS_DDCMON_TIMING4_HOR timing4:1
vertical SENSORS_DDCMON_TIMING4_VER timing4:2
refresh SENSORS_DDCMON_TIMING4_REF timing4:3
Standard Timing 5 SENSORS_DDCMON_TIMING5_HOR timing5:1
vertical SENSORS_DDCMON_TIMING5_VER timing5:2
refresh SENSORS_DDCMON_TIMING5_REF timing5:3
Standard Timing 6 SENSORS_DDCMON_TIMING6_HOR timing6:1
vertical SENSORS_DDCMON_TIMING6_VER timing6:2
refresh SENSORS_DDCMON_TIMING6_REF timing6:3
Standard Timing 7 SENSORS_DDCMON_TIMING7_HOR timing7:1
vertical SENSORS_DDCMON_TIMING7_VER timing7:2
refresh SENSORS_DDCMON_TIMING7_REF timing7:3
Standard Timing 8 SENSORS_DDCMON_TIMING8_HOR timing8:1
vertical SENSORS_DDCMON_TIMING8_VER timing8:2
refresh SENSORS_DDCMON_TIMING8_REF timing8:3
Max Pixel Clock (MHz) SENSORS_DDCMON_MAXCLOCK maxclock:1
Notes
-----
- The eeprom.o module will also attach to a DDC monitor. Install the
ddcmon.o module before the eeprom.o module to prevent this.
Alternatively, give the eeprom.o module an ignore= parameter or
a checksum= parameter. The ddcmon.o module will not attach to non-DDC
eeproms because it checks for a DDC 'signature' at the beginning
of the DDC Monitor's eeprom. Additionally, you can give it a checksum=
parameter.
- If a DDC monitor eeprom lacks the 'signature', you may use the
'force' parameter (modprobe ddcmon force=x,0x50 where 'x' is the
i2c bus number).
- This module requires a bus driver for your video chip to access the
DDC bus. In this package, drivers exist for Voodoo3/Banshee chips.
See documentation for those drivers in ../busses. Other drivers
(Matrox and NVidia, for example) are available in the kernel or
elsewhere. See our 'Supported Devices' web page for details.
- There is a checksum over the 128 bytes in the eeprom. The driver
used not to check it, now it does (providing you give it a
checksum= parameter).
- More information is available in the eeprom which could be made
available by enhancing the driver.
To see the entire eeprom, use the eeprom.o module instead of ddcmon.o.
However, then you lose the DDC-specific formatting.
Also see ../../prog/eeprom/decode-edid.pl.
- This driver does not support the DDC/CI (DDC2Bi) bidirectional
communications channel to the monitor for controlling the monitor.
- The driver caches the data from the monitor and only rereads it
from the eeprom if the cache is more than 5 minutes old.
- X 4.0 also accesses the DDC monitor EEPROM to auto-configure itself.
There could possibly be conflicts from these multiple accesses, but
none were ever reported so far.
Reference in new issue View Git Blame Copy Permalink