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Merge pull request #3734 from cesanta/esp32

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Add TLS and health backtrace to esp32
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Sergey Lyubka authored and GitHub committed 2026-10-15 21:05:47 +01:00
2 parents aa21ed443a 2f2a5f2f02
commit 10e67fdf2b
8 files changed
+167 -263
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src/arch_esp32.h
+4 -53
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@@ -22,10 +22,8 @@
#include <esp_system.h>
#include <esp_mac.h>
#include <esp_idf_version.h>
#include <esp_ota_ops.h>
#include <esp_task_wdt.h>
#include <soc/soc.h>
#include <soc/rtc_cntl_reg.h>
// #include <esp_memory_utils.h> // For health record coredumps
// #include <esp_core_dump.h> // For health record coredumps
#define MG_PATH_MAX 128
@@ -33,55 +31,8 @@
#define MG_ENABLE_POSIX_FS 1
#endif
#ifndef MG_OTA_ESP32_WDT_TIMEOUT_MS
#define MG_OTA_ESP32_WDT_TIMEOUT_MS 10000U
#endif
static inline void mg_ota_esp32_timer_start(void) {
#if ESP_IDF_VERSION_MAJOR >= 5
esp_task_wdt_config_t cfg = {0};
esp_err_t err;
cfg.timeout_ms = MG_OTA_ESP32_WDT_TIMEOUT_MS;
cfg.idle_core_mask = 0;
cfg.trigger_panic = true;
err = esp_task_wdt_init(&cfg);
if (err == ESP_ERR_INVALID_STATE) esp_task_wdt_reconfigure(&cfg);
#else
esp_task_wdt_init(MG_OTA_ESP32_WDT_TIMEOUT_MS / 1000U, true);
#endif
esp_task_wdt_add(NULL);
esp_task_wdt_reset();
}
static inline uint32_t mg_ota_esp32_state_set(uint32_t state) {
if (state == 0) esp_ota_mark_app_valid_cancel_rollback();
REG_WRITE(RTC_CNTL_STORE0_REG, state);
return REG_READ(RTC_CNTL_STORE0_REG);
}
#define MG_OTA_STATE_GET() \
REG_READ(RTC_CNTL_STORE0_REG)
#define MG_OTA_STATE_SET(v) mg_ota_esp32_state_set((uint32_t) (v))
#ifndef MG_OTA_ROLLBACK_TIMER_START
#define MG_OTA_ROLLBACK_TIMER_START() mg_ota_esp32_timer_start()
#endif
#ifndef MG_OTA_ROLLBACK_TIMER_FEED
#define MG_OTA_ROLLBACK_TIMER_FEED() \
do { \
(void) esp_task_wdt_reset(); \
} while (0)
#endif
#ifndef MG_OTA_ROLLBACK
#define MG_OTA_ROLLBACK() \
do { \
(void) esp_ota_mark_app_invalid_rollback_and_reboot(); \
} while (0)
#ifndef MG_HEALTH_DATA_SIZE
#define MG_HEALTH_DATA_SIZE 20
#endif
#endif
src/health.c
+50 -2
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@@ -13,12 +13,12 @@ struct mg_health mg_health_record MG_HEALTH_RAM;
// "used" keeps the linker from garbage-collecting this section: the only
// reference is the "b fault_c" branch in the naked handler below
__attribute__((used, noinline)) static void fault_c(uint32_t *frame,
uint32_t exc_return) {
uint32_t exc_return) {
extern uint32_t _estack;
uint32_t *stack = frame + 8 + ((exc_return & (1U << 4)) ? 0 : 18);
uint32_t *r = mg_health_record.data;
if (frame[7] & (1U << 9)) stack++; // Eight-byte stack alignment padding
if (frame[7] & (1U << 9)) stack++; // Eight-byte stack alignment padding
r[0] = (uint32_t) (uintptr_t) stack; // SP
r[1] = frame[5]; // LR
r[2] = frame[6]; // PC
@@ -48,6 +48,54 @@ void BusFault_Handler(void) __attribute__((alias("HardFault_Handler")));
void UsageFault_Handler(void) __attribute__((alias("HardFault_Handler")));
#endif
// Start a new boot: validate the record, count the boot, store the reset
// reason. The current boot moves to prev_* slots first, so the previous
// boot's uptime and reason stay readable. Called by MG_HEALTH_INIT()
void mg_health_init(void) {
char magic[] = MG_HEALTH_MAGIC;
// struct mg_health *h = mg_health_get();
if (!mg_health_valid()) { // First boot, or RAM lost its contents
memset(&mg_health_record, 0, sizeof(mg_health_record));
memcpy(mg_health_record.magic, magic, sizeof(mg_health_record.magic));
}
#if 0 && MG_ARCH == MG_ARCH_ESP32 && CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH
{
// After a crash, copy the backtrace from the core dump in flash: the same
// addresses the panic handler prints as "Backtrace: PC:SP PC:SP ...".
// The core dump stays in flash, so check the reset reason, otherwise an
// old crash is reported on every boot
static esp_core_dump_summary_t s; // Big on RISC-V, keep it off the stack
esp_reset_reason_t rr = esp_reset_reason();
uint32_t *out = mg_health_record.data;
size_t n = 0, max = MG_HEALTH_DATA_SIZE;
if (rr != ESP_RST_PANIC && rr != ESP_RST_INT_WDT && rr != ESP_RST_TASK_WDT)
return; // Not a crash that went through the panic handler
if (max == 0 || esp_core_dump_get_summary(&s) != ESP_OK) return;
mg_health_record.cpuid = 42; // ESP32
mg_health_record.reset_reason = MG_HEALTH_RESET_FAULT;
memset(out, 0, sizeof(mg_health_record.data));
out[n++] = s.exc_pc;
#if CONFIG_IDF_TARGET_ARCH_XTENSA
for (uint32_t i = 0; i < s.exc_bt_info.depth && n < max; i++) {
if (s.exc_bt_info.bt[i] != s.exc_pc) out[n++] = s.exc_bt_info.bt[i];
}
#elif CONFIG_IDF_TARGET_ARCH_RISCV
// No unwinder: take the return address, then words on the stack that
// point into executable memory (a heuristic, may include stale values)
if (n < max) out[n++] = s.ex_info.ra;
for (uint32_t i = 0; i + 4 <= s.exc_bt_info.dump_size && n < max; i += 4) {
uint32_t w;
memcpy(&w, &s.exc_bt_info.stackdump[i], sizeof(w)); // Byte array
if (esp_ptr_executable((void *) (uintptr_t) w)) out[n++] = w;
}
#endif
}
#endif
}
static size_t print_uint32(void (*fn)(char, void *), void *arg, va_list *ap) {
size_t n = va_arg(*ap, size_t);
uint32_t *p = va_arg(*ap, uint32_t *);
src/health.h
+1 -12
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@@ -76,17 +76,6 @@ static inline const char *mg_health_reason_str(int reason) {
}
}
// Start a new boot: validate the record, count the boot, store the reset
// reason. The current boot moves to prev_* slots first, so the previous
// boot's uptime and reason stay readable. Called by MG_HEALTH_INIT()
static inline void mg_health_init(void) {
char magic[] = MG_HEALTH_MAGIC;
// struct mg_health *h = mg_health_get();
if (!mg_health_valid()) { // First boot, or RAM lost its contents
memset(&mg_health_record, 0, sizeof(mg_health_record));
memcpy(mg_health_record.magic, magic, sizeof(mg_health_record.magic));
}
}
#define MG_HEALTH_INIT() mg_health_init()
extern size_t mg_print_crash_record(mg_pfn_t, void *, va_list *);
extern void mg_health_init(void);