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refactor the rest of the drivers
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@@ -174,11 +174,7 @@ static bool mg_tcpip_driver_ra_init(struct mg_tcpip_if *ifp) {
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EDMAC->FDR = 0x070f; // (27.2.11)
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EDMAC->RMCR = MG_BIT(0); // (27.2.12)
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ETHERC->ECMR |= MG_BIT(6) | MG_BIT(5); // TE RE
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#if MG_TCPIP_MCAST
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EDMAC->EESIPR = MG_BIT(18) | MG_BIT(7); // FR, RMAF: Frame and mcast IRQ
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#else
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EDMAC->EESIPR = MG_BIT(18); // FR: Enable Rx (frame) IRQ
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#endif
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EDMAC->EDRRR = MG_BIT(0); // Receive Descriptors have changed
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EDMAC->EDTRR = MG_BIT(0); // Transmit Descriptors have changed
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return true;
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@@ -206,6 +202,10 @@ static size_t mg_tcpip_driver_ra_tx(const void *buf, size_t len,
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}
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static bool mg_tcpip_driver_ra_poll(struct mg_tcpip_if *ifp, bool s1) {
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if (ifp->update_mac_hash_table) {
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EDMAC->EESIPR = MG_BIT(18) | MG_BIT(7); // FR, RMAF: Frame and mcast IRQ
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ifp->update_mac_hash_table = false;
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}
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if (!s1) return false;
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struct mg_tcpip_driver_ra_data *d =
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(struct mg_tcpip_driver_ra_data *) ifp->driver_data;
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@@ -232,11 +232,7 @@ static uint32_t s_rxno;
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void EDMAC_IRQHandler(void) {
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struct mg_tcpip_driver_ra_data *d =
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(struct mg_tcpip_driver_ra_data *) s_ifp->driver_data;
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#if MG_TCPIP_MCAST
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EDMAC->EESR = MG_BIT(18) | MG_BIT(7); // Ack IRQ in EDMAC 1st
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#else
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EDMAC->EESR = MG_BIT(18); // Ack IRQ in EDMAC 1st
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#endif
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ICU_IELSR[d->irqno] &= ~MG_BIT(16); // Ack IRQ in ICU last
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// Frame received, loop
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for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever
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