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MG_ARCH_CUBE nitpicks
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@@ -59,7 +59,7 @@
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// use HAL-defined execute-in-ram section
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#define MG_IRAM __attribute__((section(".RamFunc")))
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#ifndef STM32H5
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#ifndef HAL_ICACHE_MODULE_ENABLED
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#define HAL_ICACHE_IsEnabled() 0
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#define HAL_ICACHE_Enable() (void) 0
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#define HAL_ICACHE_Disable() (void) 0
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@@ -29,9 +29,9 @@ struct mg_tcpip_driver_stm32f_data {
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#endif
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#if MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#define MG_ENABLE_ETH_IRQ() NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_ENABLE_ETH_IRQ()
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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@@ -46,7 +46,7 @@ struct mg_tcpip_driver_stm32f_data {
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mif_.driver = &mg_tcpip_driver_stm32f; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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MG_NEIRQ; \
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MG_ENABLE_ETH_IRQ(); \
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mg_tcpip_init(mgr, &mif_); \
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MG_INFO(("Driver: stm32f, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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@@ -41,9 +41,9 @@ struct mg_tcpip_driver_stm32h_data {
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#endif
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#if MG_ENABLE_DRIVER_STM32H && MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#define MG_ENABLE_ETH_IRQ() NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_ENABLE_ETH_IRQ()
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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@@ -60,7 +60,7 @@ struct mg_tcpip_driver_stm32h_data {
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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mg_tcpip_init(mgr, &mif_); \
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MG_NEIRQ; \
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MG_ENABLE_ETH_IRQ(); \
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MG_INFO(("Driver: stm32h, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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