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RS14100: Flash and FS support, increase CPU and flash clock

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Run CPU at 180 MHz, flash at up to 100.

CL: RS14100: FS support, increase CPU and flash clock

PUBLISHED_FROM=e9f995bf03e4e36dc66e19a2a2d60ae1675ecaae
This commit is contained in:
Deomid Ryabkov authored and Cesanta Bot committed 2019-03-28 23:18:36 +00:00
1 parent e5910da300
commit 4493d65ec9
2 files changed
+8 -7
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src/common/platforms/arm/arm_exc.c
+7 -6
View File
@@ -40,7 +40,7 @@ struct arm_exc_frame {
uint32_t lr; uint32_t lr;
uint32_t pc; uint32_t pc;
uint32_t xpsr; uint32_t xpsr;
#ifdef ARM_HAVE_FPU #if __FPU_PRESENT
uint32_t s[16]; uint32_t s[16];
uint32_t fpscr; uint32_t fpscr;
uint32_t reserved; uint32_t reserved;
@@ -57,7 +57,7 @@ struct arm_gdb_reg_file {
uint32_t fpscr; uint32_t fpscr;
} __attribute__((packed)); } __attribute__((packed));
#if ARM_HAVE_FPU && !defined(MGOS_BOOT_BUILD) #if __FPU_PRESENT && !defined(MGOS_BOOT_BUILD)
static void save_s16_s31(uint32_t *dst) { static void save_s16_s31(uint32_t *dst) {
__asm volatile( __asm volatile(
"\ "\
@@ -95,13 +95,14 @@ void arm_exc_handler_bottom(uint8_t isr_no, struct arm_exc_frame *ef,
struct arm_gdb_reg_file *rf) { struct arm_gdb_reg_file *rf) {
char buf[8]; char buf[8];
const char *name; const char *name;
(void) ef; #if __MPU_PRESENT
MPU->CTRL = 0; // Disable MPU.
#endif
portDISABLE_INTERRUPTS(); portDISABLE_INTERRUPTS();
switch (isr_no) { switch (isr_no) {
case 0: case 0:
name = "ThreadMode"; name = "ThreadMode";
break; break;
case 1: case 1:
case 7: case 7:
case 8: case 8:
@@ -110,7 +111,6 @@ void arm_exc_handler_bottom(uint8_t isr_no, struct arm_exc_frame *ef,
case 13: case 13:
name = "Reserved"; name = "Reserved";
break; break;
case 2: case 2:
name = "NMI"; name = "NMI";
break; break;
@@ -160,7 +160,7 @@ void arm_exc_handler_bottom(uint8_t isr_no, struct arm_exc_frame *ef,
mgos_cd_printf(" PSR: 0x%08lx\n", rf->cpsr); mgos_cd_printf(" PSR: 0x%08lx\n", rf->cpsr);
} }
memset(rf->d, 0, sizeof(rf->d)); memset(rf->d, 0, sizeof(rf->d));
#if ARM_HAVE_FPU && !defined(MGOS_BOOT_BUILD) #if __FPU_PRESENT && !defined(MGOS_BOOT_BUILD)
rf->fpscr = ef->fpscr; rf->fpscr = ef->fpscr;
memcpy((uint8_t *) rf->d, ef->s, sizeof(ef->s)); memcpy((uint8_t *) rf->d, ef->s, sizeof(ef->s));
print_fpu_regs((uint32_t *) rf->d, 0, ARRAY_SIZE(ef->s)); print_fpu_regs((uint32_t *) rf->d, 0, ARRAY_SIZE(ef->s));
@@ -188,4 +188,5 @@ void arm_exc_handler_bottom(uint8_t isr_no, struct arm_exc_frame *ef,
mgos_cd_printf("Rebooting\n"); mgos_cd_printf("Rebooting\n");
mgos_dev_system_restart(); mgos_dev_system_restart();
#endif #endif
(void) ef;
} }
src/common/platforms/arm/arm_exc_top.S
+1 -1
View File
@@ -28,7 +28,7 @@ arm_exc_handler_top:
mrseq r1, msp mrseq r1, msp
mrsne r1, psp mrsne r1, psp
// r1 -> arm_exc_frame prepared for us by the CPU // r1 -> arm_exc_frame prepared for us by the CPU
#if ARM_HAVE_FPU #if __FPU_PRESENT
add r0, r1, #104 // sizeof(arm_exc_frame) add r0, r1, #104 // sizeof(arm_exc_frame)
sub sp, #328 // sizeof(arm_gdb_reg_file) sub sp, #328 // sizeof(arm_gdb_reg_file)
#else #else