Merge pull request #3350 from cesanta/portenta

fix Portenta Cube after cyw.h updates

tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Inc/mongoose_config.h

@@ -3,34 +3,11 @@
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_ARMGCC
 #define MG_TLS MG_TLS_BUILTIN
-#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
+//#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
 #define MG_IRAM __attribute__((section(".RamFunc")))
 
 #define MG_ENABLE_TCPIP 1
 #define MG_ENABLE_CUSTOM_MILLIS 1
 #define MG_ENABLE_CUSTOM_RANDOM 1
 #define MG_ENABLE_DRIVER_CYW_SDIO 1
-#define MG_ENABLE_PACKED_FS 1
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0
-
-// #define MG_DRIVER_MDC_CR 4   // RMII MDC clock divider, from 0 to 5
-// #define MG_TCPIP_PHY_ADDR 0  // PHY address
-
-// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
-// By default, those are set to zero, meaning that DHCP is used
-//
-// #define MG_TCPIP_IP MG_IPV4(192, 168, 0, 10)     // IP
-// #define MG_TCPIP_GW MG_IPV4(192, 168, 0, 1)      // Gateway
-// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)  // Netmask
-
-// Construct MAC address from the MCU unique ID. It is defined in the
-// ST CMSIS header as UID_BASE
-#define MGUID ((uint32_t *) 0x1ff1e800)  // Unique 96-bit chip ID
-#define MG_SET_MAC_ADDRESS(mac)      \
-  do {                               \
-    mac[0] = 2;                      \
-    mac[1] = MGUID[0] & 255;         \
-    mac[2] = (MGUID[0] >> 10) & 255; \
-    mac[3] = (MGUID[0] >> 19) & 255; \
-    mac[4] = MGUID[1] & 255;         \
-    mac[5] = MGUID[2] & 255;         \
-  } while (0)

tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Src/main.c

@@ -294,21 +294,24 @@ int main(void)
 
   /* USER CODE END 1 */
 /* USER CODE BEGIN Boot_Mode_Sequence_0 */
-  int32_t timeout;
+//  int32_t timeout;
 /* USER CODE END Boot_Mode_Sequence_0 */
 
 /* USER CODE BEGIN Boot_Mode_Sequence_1 */
   /* Wait until CPU2 boots and enters in stop mode or timeout*/
+#if 0
+	// leave CM4 alone
   timeout = 0xFFFF;
   while((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) != RESET) && (timeout-- > 0));
   if ( timeout < 0 )
   {
-  Error_Handler();
+	Error_Handler();
   }
+#endif
 /* USER CODE END Boot_Mode_Sequence_1 */
   /* MCU Configuration--------------------------------------------------------*/
 
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+  /* Reset of all peripherals, Initializes the Flash interface and the SysTick. */
   HAL_Init();
 
   /* USER CODE BEGIN Init */
@@ -318,6 +321,8 @@ int main(void)
   /* Configure the system clock */
   SystemClock_Config();
 /* USER CODE BEGIN Boot_Mode_Sequence_2 */
+#if 0
+	// leave CM4 alone
 /* When system initialization is finished, Cortex-M7 will release Cortex-M4 by means of
 HSEM notification */
 /*HW semaphore Clock enable*/
@@ -333,6 +338,7 @@ if ( timeout < 0 )
 {
 Error_Handler();
 }
+#endif
 /* USER CODE END Boot_Mode_Sequence_2 */
 
   /* USER CODE BEGIN SysInit */

tutorials/stm32/portenta-h7-make-baremetal-builtin/Makefile

@@ -26,7 +26,8 @@ firmware.elf: cmsis_core cmsis_mcu mbed $(SOURCES) $(wildcard *.h) link.ld Makef
 	arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
 
 flash: firmware.bin
-	STM32_Programmer_CLI -c port=swd -w $< 0x8040000 -hardRst
+	dfu-util -a 0 -s 0x8040000:leave -D $<
+	# connecting SWD: STM32_Programmer_CLI -c port=swd -w $< 0x8040000 -hardRst
 
 cmsis_core:     # ARM CMSIS core headers
 	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@

tutorials/stm32/portenta-h7-make-baremetal-builtin/mongoose_config.h

@@ -3,7 +3,7 @@
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_ARMGCC
 #define MG_TLS MG_TLS_BUILTIN
-#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
+//#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
 
 #define MG_ENABLE_TCPIP 1
 #define MG_ENABLE_CUSTOM_MILLIS 1