From 6f697db49d1564f5aaf400343db43a0b5ec71715 Mon Sep 17 00:00:00 2001 From: robert Date: Wed, 2 Apr 2025 10:58:46 -0400 Subject: [PATCH] Added MDNS and driver support for multicast --- mongoose.c | 380 ++++++++++++++---- mongoose.h | 68 ++++ src/arch_win32.h | 14 + src/config.h | 13 + src/dns.c | 82 ++++ src/dns.h | 2 + src/drivers/cmsis.c | 4 + src/drivers/cyw.c | 4 + src/drivers/imxrt.c | 12 + src/drivers/pico-w.c | 6 + src/drivers/ra.c | 31 +- src/drivers/rw612.c | 11 +- src/drivers/same54.c | 9 + src/drivers/stm32f.c | 10 +- src/drivers/stm32h.c | 18 +- src/drivers/tm4c.c | 12 +- src/drivers/tms570.c | 17 +- src/drivers/w5100.c | 3 +- src/drivers/xmc.c | 112 +++--- src/drivers/xmc7.c | 16 +- src/net_builtin.c | 10 + src/net_builtin.h | 4 + src/sock.c | 22 +- test/unit_test.c | 20 + .../main.c | 1 + .../mongoose_config.h | 2 + tutorials/udp/mdns-server/Makefile | 25 ++ tutorials/udp/mdns-server/README.md | 0 tutorials/udp/mdns-server/main.c | 24 ++ tutorials/udp/mdns-server/mongoose.c | 1 + tutorials/udp/mdns-server/mongoose.h | 1 + 31 files changed, 766 insertions(+), 168 deletions(-) create mode 100644 tutorials/udp/mdns-server/Makefile create mode 100644 tutorials/udp/mdns-server/README.md create mode 100644 tutorials/udp/mdns-server/main.c create mode 120000 tutorials/udp/mdns-server/mongoose.c create mode 120000 tutorials/udp/mdns-server/mongoose.h diff --git a/mongoose.c b/mongoose.c index 595c5faf..d05fee0e 100644 --- a/mongoose.c +++ b/mongoose.c @@ -221,6 +221,7 @@ bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *dm) { const struct mg_dns_header *h = (struct mg_dns_header *) buf; struct mg_dns_rr rr; size_t i, n, num_answers, ofs = sizeof(*h); + bool is_response; memset(dm, 0, sizeof(*dm)); if (len < sizeof(*h)) return 0; // Too small, headers dont fit @@ -231,12 +232,22 @@ bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *dm) { num_answers = 10; // Sanity cap } dm->txnid = mg_ntohs(h->txnid); + is_response = mg_ntohs(h->flags) & 0x8000; for (i = 0; i < mg_ntohs(h->num_questions); i++) { if ((n = mg_dns_parse_rr(buf, len, ofs, true, &rr)) == 0) return false; // MG_INFO(("Q %lu %lu %hu/%hu", ofs, n, rr.atype, rr.aclass)); + mg_dns_parse_name(buf, len, ofs, dm->name, sizeof(dm->name)); ofs += n; } + + if (!is_response) { + // For queries, there is no need to parse the answers. In this way, + // we also ensure the domain name (dm->name) is parsed from + // the question field. + return true; + } + for (i = 0; i < num_answers; i++) { if ((n = mg_dns_parse_rr(buf, len, ofs, false, &rr)) == 0) return false; // MG_INFO(("A -- %lu %lu %hu/%hu %s", ofs, n, rr.atype, rr.aclass, @@ -387,6 +398,77 @@ void mg_resolve(struct mg_connection *c, const char *url) { } } +#if MG_ENABLE_MDNS +static const uint8_t mdns_answer[] = { + 0, 1, // 2 bytes - record type, A + 0, 1, // 2 bytes - address class, INET + 0, 0, 0, 120, // 4 bytes - TTL + 0, 4 // 2 bytes - address length +}; + +static void mdns_cb(struct mg_connection *c, int ev, void *ev_data) { + if (ev == MG_EV_READ) { + struct mg_dns_header *qh = (struct mg_dns_header *) c->recv.buf; + if (c->recv.len > 12 && (qh->flags & mg_htons(0xF800)) == 0) { + // flags -> !resp, opcode=0 => query; ignore other opcodes and responses + struct mg_dns_rr rr; // Parse first question, offset 12 is header size + size_t n = mg_dns_parse_rr(c->recv.buf, c->recv.len, 12, true, &rr); + MG_VERBOSE(("mDNS request parsed, result=%d", (int) n)); + if (n > 0) { + // RFC-6762 Appendix C, RFC2181 11: m(n + 1-63), max 255 + 0x0 + // buf and h declared here to ease future expansion to DNS-SD + char buf[sizeof(struct mg_dns_header) + 256 + sizeof(mdns_answer) + 4]; + struct mg_dns_header *h = (struct mg_dns_header *) buf; + char local_name[63 + 7]; // name label + '.' + local label + '\0' + uint8_t name_len = (uint8_t) strlen(c->fn_data); + struct mg_dns_message dm; + bool unicast = (rr.aclass & MG_BIT(15)) != 0; // QU + // uint16_t q = mg_ntohs(qh->num_questions); + rr.aclass &= (uint16_t) ~MG_BIT(15); // remove "QU" (unicast response) + qh->num_questions = mg_htons(1); // parser sanity + mg_dns_parse(c->recv.buf, c->recv.len, &dm); + if (name_len > (sizeof(local_name) - 7)) // leave room for .local\0 + name_len = sizeof(local_name) - 7; + memcpy(local_name, c->fn_data, name_len); + strcpy(local_name + name_len, ".local"); // ensure proper name.local\0 + if (strcmp(local_name, dm.name) == 0) { + char *p = &buf[sizeof(*h)]; + memset(h, 0, sizeof(*h)); // clear header + h->txnid = unicast ? qh->txnid : 0; // RFC-6762 18.1 + // RFC-6762 6: 0 questions, 1 Answer, 0 Auth, 0 Additional RRs + h->num_answers = mg_htons(1); // only one answer + h->flags = mg_htons(0x8400); // Authoritative response + *p++ = name_len; // label 1 + memcpy(p, c->fn_data, name_len), p += name_len; + *p++ = 5; // label 2 + memcpy(p, "local", 5), p += 5; + *p++ = 0; // no more labels + memcpy(p, mdns_answer, sizeof(mdns_answer)), p += sizeof(mdns_answer); +#if MG_ENABLE_TCPIP + memcpy(p, &c->mgr->ifp->ip, 4), p += 4; +#else + memcpy(p, c->data, 4), p += 4; +#endif + if (!unicast) memcpy(&c->rem, &c->loc, sizeof(c->rem)); + mg_send(c, buf, p - buf); // And send it! + MG_DEBUG(("mDNS %c response sent", unicast ? 'U' : 'M')); + } + } + } + mg_iobuf_del(&c->recv, 0, c->recv.len); + } + (void) ev_data; +} + +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd); +struct mg_connection *mg_mdns_listen(struct mg_mgr *mgr, char *name) { + struct mg_connection *c = + mg_listen(mgr, "udp://224.0.0.251:5353", mdns_cb, name); + if (c != NULL) mg_mcast_add("224.0.0.251", (MG_SOCKET_TYPE) (size_t) c->fd); + return c; +} +#endif + #ifdef MG_ENABLE_LINES #line 1 "src/event.c" #endif @@ -5210,6 +5292,10 @@ void mg_connect_resolved(struct mg_connection *c) { bool mg_open_listener(struct mg_connection *c, const char *url) { c->loc.port = mg_htons(mg_url_port(url)); + if (!mg_aton(mg_url_host(url), &c->loc)) { + MG_ERROR(("invalid listening URL: %s", url)); + return false; + } return true; } @@ -5297,6 +5383,13 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) { } return res; } + +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd) { (void) ip; (void) fd; } + +#if MG_TCPIP_MCAST +const uint8_t mcast_addr[6] = {0x01, 0x00, 0x5e, 0x00, 0x00, 0xfb}; +#endif + #endif // MG_ENABLE_TCPIP #ifdef MG_ENABLE_LINES @@ -8241,7 +8334,7 @@ long mg_io_send(struct mg_connection *c, const void *buf, size_t len) { } MG_VERBOSE(("%lu %ld %d", c->id, n, MG_SOCK_ERR(n))); if (MG_SOCK_PENDING(n)) return MG_IO_WAIT; - if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 + if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 if (n <= 0) return MG_IO_ERR; return n; } @@ -8289,6 +8382,22 @@ static void mg_set_non_blocking_mode(MG_SOCKET_TYPE fd) { #endif } +#if MG_ENABLE_MDNS +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd) { +#if MG_ENABLE_RL +#error UNSUPPORTED +#elif MG_ENABLE_FREERTOS_TCP + // TODO(): prvAllowIPPacketIPv4() +#else + // lwIP, Unix, Windows, Zephyr(, AzureRTOS ?) + struct ip_mreq mreq; + mreq.imr_multiaddr.s_addr = inet_addr(ip); + mreq.imr_interface.s_addr = mg_htonl(INADDR_ANY); + setsockopt(fd, IPPROTO_IP, IP_ADD_MEMBERSHIP, (char *) &mreq, sizeof(mreq)); +#endif +} +#endif + bool mg_open_listener(struct mg_connection *c, const char *url) { MG_SOCKET_TYPE fd = MG_INVALID_SOCKET; bool success = false; @@ -8363,7 +8472,7 @@ static long recv_raw(struct mg_connection *c, void *buf, size_t len) { } MG_VERBOSE(("%lu %ld %d", c->id, n, MG_SOCK_ERR(n))); if (MG_SOCK_PENDING(n)) return MG_IO_WAIT; - if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 + if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 if (n <= 0) return MG_IO_ERR; return n; } @@ -8400,7 +8509,7 @@ static void read_conn(struct mg_connection *c) { } // there can still be > 16K from last iteration, always mg_tls_recv() m = c->is_tls_hs ? (long) MG_IO_WAIT : mg_tls_recv(c, buf, len); - if (n == MG_IO_ERR || n == MG_IO_RESET) { // Windows, see #3031 + if (n == MG_IO_ERR || n == MG_IO_RESET) { // Windows, see #3031 if (c->rtls.len == 0 || m < 0) { // Close only when we have fully drained both rtls and TLS buffers c->is_closing = 1; // or there's nothing we can do about it. @@ -19724,6 +19833,10 @@ static bool cmsis_init(struct mg_tcpip_if *ifp) { memcpy(&addr, ifp->mac, sizeof(addr)); mac->SetMacAddress(&addr); } +#if MG_TCPIP_MCAST + memcpy(&addr, mcast_addr, sizeof(addr)); + mac->SetAddressFilter(&addr, 1); +#endif phy->PowerControl(ARM_POWER_FULL); phy->SetInterface(cap.media_interface); phy->SetMode(ARM_ETH_PHY_AUTO_NEGOTIATE); @@ -20587,6 +20700,10 @@ static bool cyw_init(uint8_t *mac) { MG_ERROR(("read MAC failed")); } } +#if MG_TCPIP_MCAST + val = 1; if (!cyw_ioctl_iovar_set2_(0, "mcast_list", (uint8_t *)&val, sizeof(val), (uint8_t *)mcast_addr, sizeof(mcast_addr))) return false; + mg_delayms(50); +#endif return true; } // clang-format on @@ -21109,9 +21226,21 @@ static bool mg_tcpip_driver_imxrt_init(struct mg_tcpip_if *ifp) { ENET->RDAR = MG_BIT(24); // Receive Descriptors have changed ENET->TDAR = MG_BIT(24); // Transmit Descriptors have changed // ENET->OPD = 0x10014; + uint32_t hash_table[2] = {0, 0}; + ENET->IAUR = hash_table[1]; + ENET->IALR = hash_table[0]; +#if MG_TCPIP_MCAST + // RM 37.3.4.3.2 + // uint8_t hash64 = ((~mg_crc32(0, mcast_addr, 6)) >> 26) & 0x3f; + // hash_table[((uint8_t)hash64) >> 5] |= (1 << (hash64 & 0x1f)); + hash_table[1] = MG_BIT(1); // above reduces to this for mDNS addr +#endif + ENET->GAUR = hash_table[1]; + ENET->GALR = hash_table[0]; return true; } + // Transmit frame static size_t mg_tcpip_driver_imxrt_tx(const void *buf, size_t len, struct mg_tcpip_if *ifp) { @@ -21353,9 +21482,15 @@ static bool mg_tcpip_driver_pico_w_init(struct mg_tcpip_if *ifp) { MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel)); if (!mg_wifi_ap_start(d->apssid, d->appass, d->apchannel)) return false; cyw43_wifi_get_mac(&cyw43_state, CYW43_ITF_STA, ifp->mac); // same MAC +#if MG_TCPIP_MCAST + cyw43_wifi_update_multicast_filter(&cyw43_state, (uint8_t *)mcast_addr, true); +#endif } else { cyw43_arch_enable_sta_mode(); cyw43_wifi_get_mac(&cyw43_state, CYW43_ITF_STA, ifp->mac); +#if MG_TCPIP_MCAST + cyw43_wifi_update_multicast_filter(&cyw43_state, (uint8_t *)mcast_addr, true); +#endif if (d->ssid != NULL) { MG_DEBUG(("Connecting to '%s'", d->ssid)); return mg_wifi_connect(d->ssid, d->pass); @@ -21930,9 +22065,9 @@ static uint16_t smi_rd(uint16_t header) { pir = 0; // read, mdc = 0 ETHERC->PIR = pir; raspin(s_smispin / 2); // 1/4 clock period, 300ns max access time - data |= (uint16_t)(ETHERC->PIR & MG_BIT(3) ? 1 : 0); // read mdio - raspin(s_smispin / 2); // 1/4 clock period - pir |= MG_BIT(0); // mdc = 1 + data |= (uint16_t) (ETHERC->PIR & MG_BIT(3) ? 1 : 0); // read mdio + raspin(s_smispin / 2); // 1/4 clock period + pir |= MG_BIT(0); // mdc = 1 ETHERC->PIR = pir; raspin(s_smispin); } @@ -21940,11 +22075,14 @@ static uint16_t smi_rd(uint16_t header) { } static uint16_t raeth_read_phy(uint8_t addr, uint8_t reg) { - return smi_rd((uint16_t)((1 << 14) | (2 << 12) | (addr << 7) | (reg << 2) | (2 << 0))); + return smi_rd( + (uint16_t) ((1 << 14) | (2 << 12) | (addr << 7) | (reg << 2) | (2 << 0))); } static void raeth_write_phy(uint8_t addr, uint8_t reg, uint16_t val) { - smi_wr((uint16_t)((1 << 14) | (1 << 12) | (addr << 7) | (reg << 2) | (2 << 0)), val); + smi_wr( + (uint16_t) ((1 << 14) | (1 << 12) | (addr << 7) | (reg << 2) | (2 << 0)), + val); } // MDC clock is generated manually; as per 802.3, it must not exceed 2.5MHz @@ -21981,7 +22119,7 @@ static bool mg_tcpip_driver_ra_init(struct mg_tcpip_if *ifp) { MG_DEBUG(("PHY addr: %d, smispin: %d", d->phy_addr, s_smispin)); struct mg_phy phy = {raeth_read_phy, raeth_write_phy}; - mg_phy_init(&phy, d->phy_addr, 0); // MAC clocks PHY + mg_phy_init(&phy, d->phy_addr, 0); // MAC clocks PHY // Select RMII mode, ETHERC->ECMR = MG_BIT(2) | MG_BIT(1); // 100M, Full-duplex, CRC @@ -22000,9 +22138,13 @@ static bool mg_tcpip_driver_ra_init(struct mg_tcpip_if *ifp) { EDMAC->FDR = 0x070f; // (27.2.11) EDMAC->RMCR = MG_BIT(0); // (27.2.12) ETHERC->ECMR |= MG_BIT(6) | MG_BIT(5); // TE RE - EDMAC->EESIPR = MG_BIT(18); // Enable Rx IRQ - EDMAC->EDRRR = MG_BIT(0); // Receive Descriptors have changed - EDMAC->EDTRR = MG_BIT(0); // Transmit Descriptors have changed +#if MG_TCPIP_MCAST + EDMAC->EESIPR = MG_BIT(18) | MG_BIT(7); // FR, RMAF: Frame and mcast IRQ +#else + EDMAC->EESIPR = MG_BIT(18); // FR: Enable Rx (frame) IRQ +#endif + EDMAC->EDRRR = MG_BIT(0); // Receive Descriptors have changed + EDMAC->EDTRR = MG_BIT(0); // Transmit Descriptors have changed return true; } @@ -22054,7 +22196,11 @@ static uint32_t s_rxno; void EDMAC_IRQHandler(void) { struct mg_tcpip_driver_ra_data *d = (struct mg_tcpip_driver_ra_data *) s_ifp->driver_data; - EDMAC->EESR = MG_BIT(18); // Ack IRQ in EDMAC 1st +#if MG_TCPIP_MCAST + EDMAC->EESR = MG_BIT(18) | MG_BIT(7); // Ack IRQ in EDMAC 1st +#else + EDMAC->EESR = MG_BIT(18); // Ack IRQ in EDMAC 1st +#endif ICU_IELSR[d->irqno] &= ~MG_BIT(16); // Ack IRQ in ICU last // Frame received, loop for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever @@ -22173,6 +22319,15 @@ static bool mg_tcpip_driver_rw612_init(struct mg_tcpip_if *ifp) { ENET->PALR = ifp->mac[0] << 24 | ifp->mac[1] << 16 | ifp->mac[2] << 8 | ifp->mac[3]; ENET->PAUR |= (ifp->mac[4] << 24 | ifp->mac[5] << 16); + ENET->IALR = 0; + ENET->IAUR = 0; + ENET->GALR = 0; +#if MG_TCPIP_MCAST + ENET->GAUR = MG_BIT(1); // see imxrt, it reduces to this for mDNS +#else + ENET->GAUR = 0; +#endif + ENET->MSCR = ((d->mdc_cr & 0x3f) << 1) | ((d->mdc_holdtime & 7) << 8); ENET->EIMR = MG_BIT(25); // Enable RX interrupt ENET->ECR |= MG_BIT(8) | MG_BIT(1); // DBSWP, Enable @@ -22241,7 +22396,7 @@ static bool mg_tcpip_driver_rw612_up(struct mg_tcpip_if *ifp) { void ENET_IRQHandler(void) { if (ENET->EIR & MG_BIT(25)) { - ENET->EIR = MG_BIT(25); // Ack RX + ENET->EIR = MG_BIT(25); // Ack RX for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever if ((s_rxdesc[s_rxno][0] & MG_BIT(31)) != 0) break; // exit when done // skip partial/errored frames @@ -22393,6 +22548,15 @@ static bool mg_tcpip_driver_same54_init(struct mg_tcpip_if *ifp) { MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); GMAC_REGS->SA[0].GMAC_SAT = MG_U32(0, 0, ifp->mac[5], ifp->mac[4]); +#if MG_TCPIP_MCAST + // Setting Hash Index for 01:00:5e:00:00:fb (multicast) + // 24.6.9 Hash addressing + // computed hash is 55, which means bit 23 (55 - 32) in + // HRT register must be set + GMAC_REGS->GMAC_HRT = MG_BIT(23); + GMAC_REGS->GMAC_NCFGR |= MG_BIT(6); // enable multicast hash filtering +#endif + GMAC_REGS->GMAC_UR &= ~GMAC_UR_MII_Msk; // Disable MII, use RMII GMAC_REGS->GMAC_NCFGR |= GMAC_NCFGR_MAXFS_Msk | GMAC_NCFGR_MTIHEN_Msk | GMAC_NCFGR_EFRHD_Msk | GMAC_NCFGR_CAF_Msk; @@ -22626,7 +22790,7 @@ static bool mg_tcpip_driver_stm32f_init(struct mg_tcpip_if *ifp) { // MG_BIT(25); ETH->MACIMR = MG_BIT(3) | MG_BIT(9); // Mask timestamp & PMT IT ETH->MACFCR = MG_BIT(7); // Disable zero quarta pause - // ETH->MACFFR = MG_BIT(31); // Receive all + ETH->MACFFR = MG_BIT(10); // Perfect filtering struct mg_phy phy = {eth_read_phy, eth_write_phy}; mg_phy_init(&phy, phy_addr, MG_PHY_CLOCKS_MAC); ETH->DMARDLAR = (uint32_t) (uintptr_t) s_rxdesc; // RX descriptors @@ -22642,6 +22806,14 @@ static bool mg_tcpip_driver_stm32f_init(struct mg_tcpip_if *ifp) { ETH->MACA0LR = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; +#if MG_TCPIP_MCAST + // enable multicast + ETH->MACA1LR = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + ETH->MACA1HR = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + ETH->MACA1HR |= MG_BIT(31); // AE +#endif return true; } @@ -22730,7 +22902,7 @@ struct mg_tcpip_driver mg_tcpip_driver_stm32f = { #if MG_ENABLE_TCPIP && (MG_ENABLE_DRIVER_STM32H || MG_ENABLE_DRIVER_MCXN) // STM32H: vendor modded single-queue Synopsys v4.2 -// MCXNx4x: dual-queue Synopsys v5.2 +// MCXNx4x: dual-queue Synopsys v5.2 with no hash table option // RT1170 ENET_QOS: quad-queue Synopsys v5.1 struct synopsys_enet_qos { volatile uint32_t MACCR, MACECR, MACPFR, MACWTR, MACHT0R, MACHT1R, @@ -22830,7 +23002,9 @@ static bool mg_tcpip_driver_stm32h_init(struct mg_tcpip_if *ifp) { ETH->DMASBMR |= MG_BIT(12); // AAL NOTE(scaprile): is this actually needed ETH->MACIER = 0; // Do not enable additional irq sources (reset value) ETH->MACTFCR = MG_BIT(7); // Disable zero-quanta pause - // ETH->MACPFR = MG_BIT(31); // Receive all +#if !MG_ENABLE_DRIVER_MCXN + ETH->MACPFR = MG_BIT(10); // Perfect filtering +#endif struct mg_phy phy = {eth_read_phy, eth_write_phy}; mg_phy_init(&phy, phy_addr, phy_conf); ETH->DMACRDLAR = @@ -22868,6 +23042,18 @@ static bool mg_tcpip_driver_stm32h_init(struct mg_tcpip_if *ifp) { ETH->MACA0LR = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; +#if MG_TCPIP_MCAST +#if MG_ENABLE_DRIVER_MCXN + ETH->MACPFR = MG_BIT(4); // Pass Multicast (pass all multicast frames) +#else + // add mDNS / DNS-SD multicast address + ETH->MACA1LR = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + ETH->MACA1HR = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + ETH->MACA1HR |= MG_BIT(31); // AE +#endif +#endif return true; } @@ -23120,7 +23306,7 @@ static bool mg_tcpip_driver_tm4c_init(struct mg_tcpip_if *ifp) { // EMAC->EMACDMABUSMOD = MG_BIT(13) | MG_BIT(16) | MG_BIT(22) | MG_BIT(23) | MG_BIT(25); EMAC->EMACIM = MG_BIT(3) | MG_BIT(9); // Mask timestamp & PMT IT EMAC->EMACFLOWCTL = MG_BIT(7); // Disable zero-quanta pause - // EMAC->EMACFRAMEFLTR = MG_BIT(31); // Receive all + EMAC->EMACFRAMEFLTR = MG_BIT(10); // Perfect filtering // EMAC->EMACPC defaults to internal PHY (EPHY) in MMI mode emac_write_phy(EPHY_ADDR, EPHYBMCR, MG_BIT(15)); // Reset internal PHY (EPHY) emac_write_phy(EPHY_ADDR, EPHYBMCR, MG_BIT(12)); // Set autonegotiation @@ -23134,8 +23320,14 @@ static bool mg_tcpip_driver_tm4c_init(struct mg_tcpip_if *ifp) { EMAC->EMACADDR0L = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; - // NOTE(scaprile) There are 3 additional slots for filtering, disabled by - // default. This also applies to the STM32 driver (at least for F7) +#if MG_TCPIP_MCAST + // add mDNS / DNS-SD multicast address + EMAC->EMACADDR1L = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + EMAC->EMACADDR1H = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + EMAC->EMACADDR1H |= MG_BIT(31); // AE +#endif return true; } @@ -23321,10 +23513,6 @@ static bool mg_tcpip_driver_tms570_init(struct mg_tcpip_if *ifp) { while (delay-- != 0) (void) 0; struct mg_phy phy = {emac_read_phy, emac_write_phy}; mg_phy_init(&phy, d->phy_addr, MG_PHY_CLOCKS_MAC); - // set the mac address - EMAC->MACSRCADDRHI = ifp->mac[0] | (ifp->mac[1] << 8) | (ifp->mac[2] << 16) | - (ifp->mac[3] << 24); - EMAC->MACSRCADDRLO = ifp->mac[4] | (ifp->mac[5] << 8); uint32_t channel; for (channel = 0; channel < 8; channel++) { EMAC->MACINDEX = channel; @@ -23334,8 +23522,17 @@ static bool mg_tcpip_driver_tms570_init(struct mg_tcpip_if *ifp) { MG_BIT(19) | (channel << 16); } EMAC->RXUNICASTSET = 1; // accept unicast frames; - EMAC->RXMBPENABLE = MG_BIT(30) | MG_BIT(13); // CRC, broadcast; - + +#if MG_TCPIP_MCAST + // Setting Hash Index for 01:00:5e:00:00:fb (multicast) + // using TMS570 XOR method (32.5.37). + // computed hash is 55, which means bit 23 (55 - 32) in + // HASH2 register must be set + EMAC->MACHASH2 = MG_BIT(23); + EMAC->RXMBPENABLE = MG_BIT(5); // enable hash filtering +#endif + EMAC->RXMBPENABLE |= MG_BIT(30) | MG_BIT(13); // CRC, broadcast + // Initialize the descriptors for (i = 0; i < ETH_DESC_CNT; i++) { if (i < ETH_DESC_CNT - 1) { @@ -23541,9 +23738,10 @@ static bool w5100_init(struct mg_tcpip_if *ifp) { w5100_w1(s, 0x46, 0); // CR PHYCR0 -> autonegotiation w5100_w1(s, 0x47, 0); // CR PHYCR1 -> reset w5100_w1(s, 0x72, 0x00); // CR PHYLCKR -> lock PHY + w5100_wn(s, 0x09, ifp->mac, 6); // SHAR w5100_w1(s, 0x1a, 6); // Sock0 RX buf size - 4KB w5100_w1(s, 0x1b, 6); // Sock0 TX buf size - 4KB - w5100_w1(s, 0x400, 4); // Sock0 MR -> MACRAW + w5100_w1(s, 0x400, 0x44); // Sock0 MR -> MACRAW, MAC filter w5100_w1(s, 0x401, 1); // Sock0 CR -> OPEN return w5100_r1(s, 0x403) == 0x42; // Sock0 SR == MACRAW } @@ -23663,34 +23861,34 @@ struct mg_tcpip_driver mg_tcpip_driver_w5500 = {w5500_init, w5500_tx, w5500_rx, struct ETH_GLOBAL_TypeDef { volatile uint32_t MAC_CONFIGURATION, MAC_FRAME_FILTER, HASH_TABLE_HIGH, - HASH_TABLE_LOW, GMII_ADDRESS, GMII_DATA, FLOW_CONTROL, VLAN_TAG, VERSION, - DEBUG, REMOTE_WAKE_UP_FRAME_FILTER, PMT_CONTROL_STATUS, RESERVED[2], - INTERRUPT_STATUS, INTERRUPT_MASK, MAC_ADDRESS0_HIGH, MAC_ADDRESS0_LOW, - MAC_ADDRESS1_HIGH, MAC_ADDRESS1_LOW, MAC_ADDRESS2_HIGH, MAC_ADDRESS2_LOW, - MAC_ADDRESS3_HIGH, MAC_ADDRESS3_LOW, RESERVED1[40], MMC_CONTROL, - MMC_RECEIVE_INTERRUPT, MMC_TRANSMIT_INTERRUPT, MMC_RECEIVE_INTERRUPT_MASK, - MMC_TRANSMIT_INTERRUPT_MASK, TX_STATISTICS[26], RESERVED2, - RX_STATISTICS_1[26], RESERVED3[6], MMC_IPC_RECEIVE_INTERRUPT_MASK, - RESERVED4, MMC_IPC_RECEIVE_INTERRUPT, RESERVED5, RX_STATISTICS_2[30], - RESERVED7[286], TIMESTAMP_CONTROL, SUB_SECOND_INCREMENT, - SYSTEM_TIME_SECONDS, SYSTEM_TIME_NANOSECONDS, - SYSTEM_TIME_SECONDS_UPDATE, SYSTEM_TIME_NANOSECONDS_UPDATE, - TIMESTAMP_ADDEND, TARGET_TIME_SECONDS, TARGET_TIME_NANOSECONDS, - SYSTEM_TIME_HIGHER_WORD_SECONDS, TIMESTAMP_STATUS, - PPS_CONTROL, RESERVED8[564], BUS_MODE, TRANSMIT_POLL_DEMAND, - RECEIVE_POLL_DEMAND, RECEIVE_DESCRIPTOR_LIST_ADDRESS, - TRANSMIT_DESCRIPTOR_LIST_ADDRESS, STATUS, OPERATION_MODE, - INTERRUPT_ENABLE, MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, - RECEIVE_INTERRUPT_WATCHDOG_TIMER, RESERVED9, AHB_STATUS, - RESERVED10[6], CURRENT_HOST_TRANSMIT_DESCRIPTOR, - CURRENT_HOST_RECEIVE_DESCRIPTOR, CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, - CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, HW_FEATURE; + HASH_TABLE_LOW, GMII_ADDRESS, GMII_DATA, FLOW_CONTROL, VLAN_TAG, VERSION, + DEBUG, REMOTE_WAKE_UP_FRAME_FILTER, PMT_CONTROL_STATUS, RESERVED[2], + INTERRUPT_STATUS, INTERRUPT_MASK, MAC_ADDRESS0_HIGH, MAC_ADDRESS0_LOW, + MAC_ADDRESS1_HIGH, MAC_ADDRESS1_LOW, MAC_ADDRESS2_HIGH, MAC_ADDRESS2_LOW, + MAC_ADDRESS3_HIGH, MAC_ADDRESS3_LOW, RESERVED1[40], MMC_CONTROL, + MMC_RECEIVE_INTERRUPT, MMC_TRANSMIT_INTERRUPT, MMC_RECEIVE_INTERRUPT_MASK, + MMC_TRANSMIT_INTERRUPT_MASK, TX_STATISTICS[26], RESERVED2, + RX_STATISTICS_1[26], RESERVED3[6], MMC_IPC_RECEIVE_INTERRUPT_MASK, + RESERVED4, MMC_IPC_RECEIVE_INTERRUPT, RESERVED5, RX_STATISTICS_2[30], + RESERVED7[286], TIMESTAMP_CONTROL, SUB_SECOND_INCREMENT, + SYSTEM_TIME_SECONDS, SYSTEM_TIME_NANOSECONDS, SYSTEM_TIME_SECONDS_UPDATE, + SYSTEM_TIME_NANOSECONDS_UPDATE, TIMESTAMP_ADDEND, TARGET_TIME_SECONDS, + TARGET_TIME_NANOSECONDS, SYSTEM_TIME_HIGHER_WORD_SECONDS, + TIMESTAMP_STATUS, PPS_CONTROL, RESERVED8[564], BUS_MODE, + TRANSMIT_POLL_DEMAND, RECEIVE_POLL_DEMAND, + RECEIVE_DESCRIPTOR_LIST_ADDRESS, TRANSMIT_DESCRIPTOR_LIST_ADDRESS, STATUS, + OPERATION_MODE, INTERRUPT_ENABLE, + MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, + RECEIVE_INTERRUPT_WATCHDOG_TIMER, RESERVED9, AHB_STATUS, RESERVED10[6], + CURRENT_HOST_TRANSMIT_DESCRIPTOR, CURRENT_HOST_RECEIVE_DESCRIPTOR, + CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, + HW_FEATURE; }; #undef ETH0 -#define ETH0 ((struct ETH_GLOBAL_TypeDef*) 0x5000C000UL) +#define ETH0 ((struct ETH_GLOBAL_TypeDef *) 0x5000C000UL) -#define ETH_PKT_SIZE 1536 // Max frame size +#define ETH_PKT_SIZE 1536 // Max frame size #define ETH_DESC_CNT 4 // Descriptors count #define ETH_DS 4 // Descriptor size (words) @@ -23702,27 +23900,27 @@ struct ETH_GLOBAL_TypeDef { static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE] ETH_RAM_SECTION; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE] ETH_RAM_SECTION; -static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] ETH_RAM_SECTION; // RX descriptors -static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] ETH_RAM_SECTION; // TX descriptors -static uint8_t s_txno; // Current TX descriptor -static uint8_t s_rxno; // Current RX descriptor +static uint32_t s_rxdesc[ETH_DESC_CNT] + [ETH_DS] ETH_RAM_SECTION; // RX descriptors +static uint32_t s_txdesc[ETH_DESC_CNT] + [ETH_DS] ETH_RAM_SECTION; // TX descriptors +static uint8_t s_txno; // Current TX descriptor +static uint8_t s_rxno; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; static uint16_t eth_read_phy(uint8_t addr, uint8_t reg) { - ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | - ((uint32_t)addr << 11) | - ((uint32_t)reg << 6) | 1; + ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | ((uint32_t) addr << 11) | + ((uint32_t) reg << 6) | 1; while ((ETH0->GMII_ADDRESS & 1) != 0) (void) 0; - return (uint16_t)(ETH0->GMII_DATA & 0xffff); + return (uint16_t) (ETH0->GMII_DATA & 0xffff); } static void eth_write_phy(uint8_t addr, uint8_t reg, uint16_t val) { - ETH0->GMII_DATA = val; - ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | - ((uint32_t)addr << 11) | - ((uint32_t)reg << 6) | 3; + ETH0->GMII_DATA = val; + ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | ((uint32_t) addr << 11) | + ((uint32_t) reg << 6) | 3; while ((ETH0->GMII_ADDRESS & 1) != 0) (void) 0; } @@ -23757,22 +23955,30 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { // set the MAC address ETH0->MAC_ADDRESS0_HIGH = MG_U32(0, 0, ifp->mac[5], ifp->mac[4]); - ETH0->MAC_ADDRESS0_LOW = - MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); + ETH0->MAC_ADDRESS0_LOW = + MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); + +#if MG_TCPIP_MCAST + // set the multicast address filter + ETH0->MAC_ADDRESS1_HIGH = + MG_U32(0, 0, mcast_addr[5], mcast_addr[4]) | MG_BIT(31); + ETH0->MAC_ADDRESS1_LOW = + MG_U32(mcast_addr[3], mcast_addr[2], mcast_addr[1], mcast_addr[0]); +#endif // Configure the receive filter - ETH0->MAC_FRAME_FILTER = MG_BIT(10) | MG_BIT(2); // HFP, HMC + ETH0->MAC_FRAME_FILTER = MG_BIT(10); // Perfect filter // Disable flow control ETH0->FLOW_CONTROL = 0; // Enable store and forward mode - ETH0->OPERATION_MODE = MG_BIT(25) | MG_BIT(21); // RSF, TSF + ETH0->OPERATION_MODE = MG_BIT(25) | MG_BIT(21); // RSF, TSF // Configure DMA bus mode (AAL, USP, RPBL, PBL) - ETH0->BUS_MODE = MG_BIT(25) | MG_BIT(23) | (32 << 17) | (32 << 8); + ETH0->BUS_MODE = MG_BIT(25) | MG_BIT(23) | (32 << 17) | (32 << 8); // init RX descriptors for (int i = 0; i < ETH_DESC_CNT; i++) { - s_rxdesc[i][0] = MG_BIT(31); // OWN descriptor + s_rxdesc[i][0] = MG_BIT(31); // OWN descriptor s_rxdesc[i][1] = MG_BIT(14) | ETH_PKT_SIZE; s_rxdesc[i][2] = (uint32_t) s_rxbuf[i]; if (i == ETH_DESC_CNT - 1) { @@ -23802,9 +24008,9 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { ETH0->MMC_TRANSMIT_INTERRUPT_MASK = 0xFFFFFFFF; ETH0->MMC_RECEIVE_INTERRUPT_MASK = 0xFFFFFFFF; ETH0->MMC_IPC_RECEIVE_INTERRUPT_MASK = 0xFFFFFFFF; - ETH0->INTERRUPT_MASK = MG_BIT(9) | MG_BIT(3); // TSIM, PMTIM + ETH0->INTERRUPT_MASK = MG_BIT(9) | MG_BIT(3); // TSIM, PMTIM - //Enable interrupts (NIE, RIE, TIE) + // Enable interrupts (NIE, RIE, TIE) ETH0->INTERRUPT_ENABLE = MG_BIT(16) | MG_BIT(6) | MG_BIT(0); // Enable MAC transmission and reception (TE, RE) @@ -23815,7 +24021,7 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { } static size_t mg_tcpip_driver_xmc_tx(const void *buf, size_t len, - struct mg_tcpip_if *ifp) { + struct mg_tcpip_if *ifp) { if (len > sizeof(s_txbuf[s_txno])) { MG_ERROR(("Frame too big, %ld", (long) len)); len = 0; // Frame is too big @@ -23833,7 +24039,7 @@ static size_t mg_tcpip_driver_xmc_tx(const void *buf, size_t len, } // Resume processing - ETH0->STATUS = MG_BIT(2); // clear Transmit unavailable + ETH0->STATUS = MG_BIT(2); // clear Transmit unavailable ETH0->TRANSMIT_POLL_DEMAND = 0; return len; } @@ -23859,13 +24065,13 @@ void ETH0_0_IRQHandler(void) { // check if a frame was received if (irq_status & MG_BIT(6)) { - for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever + for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever if (s_rxdesc[s_rxno][0] & MG_BIT(31)) break; size_t len = (s_rxdesc[s_rxno][0] & 0x3fff0000) >> 16; mg_tcpip_qwrite(s_rxbuf[s_rxno], len, s_ifp); - s_rxdesc[s_rxno][0] = MG_BIT(31); // OWN bit: handle control to DMA + s_rxdesc[s_rxno][0] = MG_BIT(31); // OWN bit: handle control to DMA // Resume processing - ETH0->STATUS = MG_BIT(7) | MG_BIT(6); // clear RU and RI + ETH0->STATUS = MG_BIT(7) | MG_BIT(6); // clear RU and RI ETH0->RECEIVE_POLL_DEMAND = 0; if (++s_rxno >= ETH_DESC_CNT) s_rxno = 0; } @@ -23883,9 +24089,9 @@ void ETH0_0_IRQHandler(void) { } } -struct mg_tcpip_driver mg_tcpip_driver_xmc = { - mg_tcpip_driver_xmc_init, mg_tcpip_driver_xmc_tx, NULL, - mg_tcpip_driver_xmc_poll}; +struct mg_tcpip_driver mg_tcpip_driver_xmc = {mg_tcpip_driver_xmc_init, + mg_tcpip_driver_xmc_tx, NULL, + mg_tcpip_driver_xmc_poll}; #endif #ifdef MG_ENABLE_LINES @@ -23959,8 +24165,8 @@ static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; -static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor -static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor +static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor +static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; @@ -23997,8 +24203,7 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { // set NSP change, ignore RX FCS, data bus width, clock rate // frame length 1536, full duplex, speed ETH0->NETWORK_CONFIG = MG_BIT(29) | MG_BIT(26) | MG_BIT(21) | - ((cr & 7) << 18) | MG_BIT(8) | MG_BIT(4) | MG_BIT(1) | - MG_BIT(0); + ((cr & 7) << 18) | MG_BIT(8) | MG_BIT(1) | MG_BIT(0); // config DMA settings: Force TX burst, Discard on Error, set RX buffer size // to 1536, TX_PBUF_SIZE, RX_PBUF_SIZE, AMBA_BURST_LENGTH @@ -24035,6 +24240,13 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { ifp->mac[3] << 24 | ifp->mac[2] << 16 | ifp->mac[1] << 8 | ifp->mac[0]; ETH0->SPEC_ADD1_TOP = ifp->mac[5] << 8 | ifp->mac[4]; +#if MG_TCPIP_MCAST + // set multicast MAC address + ETH0->SPEC_ADD2_BOTTOM = mcast_addr[3] << 24 | mcast_addr[2] << 16 | + mcast_addr[1] << 8 | mcast_addr[0]; + ETH0->SPEC_ADD2_TOP = mcast_addr[5] << 8 | mcast_addr[4]; +#endif + // enable MDIO, TX, RX ETH0->NETWORK_CONTROL = MG_BIT(4) | MG_BIT(3) | MG_BIT(2); @@ -24113,7 +24325,7 @@ static bool mg_tcpip_driver_xmc7_poll(struct mg_tcpip_if *ifp, bool s1) { void ETH_IRQHandler(void) { uint32_t irq_status = ETH0->INT_STATUS; if (irq_status & MG_BIT(1)) { - for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever + for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever if ((s_rxdesc[s_rxno][0] & MG_BIT(0)) == 0) break; size_t len = s_rxdesc[s_rxno][1] & (MG_BIT(13) - 1); mg_tcpip_qwrite(s_rxbuf[s_rxno], len, s_ifp); diff --git a/mongoose.h b/mongoose.h index 9c82c38e..cddd9aaa 100644 --- a/mongoose.h +++ b/mongoose.h @@ -499,6 +499,20 @@ typedef enum { false = 0, true = 1 } bool; #pragma comment(lib, "advapi32.lib") #endif +#if defined(_MSC_VER) && _MSC_VER <= 1200 + #ifndef IPPROTO_IP + #define IPPROTO_IP 0 + #endif + + #ifndef IP_ADD_MEMBERSHIP + struct ip_mreq { + struct in_addr imr_multiaddr; + struct in_addr imr_interface; + }; + #define IP_ADD_MEMBERSHIP 12 + #endif +#endif + // Protect from calls like std::snprintf in app code // See https://github.com/cesanta/mongoose/issues/1047 #ifndef __cplusplus @@ -922,6 +936,19 @@ struct timeval { #define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 0 #endif +#ifndef MG_ENABLE_MDNS +#define MG_ENABLE_MDNS 0 +#endif + +#if MG_ENABLE_TCPIP +#if MG_ENABLE_MDNS +#undef MG_TCPIP_MCAST +#define MG_TCPIP_MCAST 1 +#elif !defined(MG_TCPIP_MCAST) +#define MG_TCPIP_MCAST 0 +#endif +#endif + @@ -2655,6 +2682,8 @@ void mg_resolve_cancel(struct mg_connection *); bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *); size_t mg_dns_parse_rr(const uint8_t *buf, size_t len, size_t ofs, bool is_question, struct mg_dns_rr *); + +struct mg_connection *mg_mdns_listen(struct mg_mgr *mgr, char *name); @@ -2803,6 +2832,8 @@ bool mg_wifi_ap_start(char *ssid, char *pass, unsigned int channel); bool mg_wifi_ap_stop(void); +#if MG_ENABLE_TCPIP + @@ -2903,6 +2934,8 @@ struct mg_tcpip_spi { uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply }; +#endif + // Macros to record timestamped events that happens with a connection. @@ -3405,6 +3438,41 @@ struct mg_tcpip_driver_tms570_data { +#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC7) && MG_ENABLE_DRIVER_XMC7 + +struct mg_tcpip_driver_xmc7_data { + int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4, 5 + uint8_t phy_addr; +}; + +#ifndef MG_TCPIP_PHY_ADDR +#define MG_TCPIP_PHY_ADDR 0 +#endif + +#ifndef MG_DRIVER_MDC_CR +#define MG_DRIVER_MDC_CR 3 +#endif + +#define MG_TCPIP_DRIVER_INIT(mgr) \ + do { \ + static struct mg_tcpip_driver_xmc7_data driver_data_; \ + static struct mg_tcpip_if mif_; \ + driver_data_.mdc_cr = MG_DRIVER_MDC_CR; \ + driver_data_.phy_addr = MG_TCPIP_PHY_ADDR; \ + mif_.ip = MG_TCPIP_IP; \ + mif_.mask = MG_TCPIP_MASK; \ + mif_.gw = MG_TCPIP_GW; \ + mif_.driver = &mg_tcpip_driver_xmc7; \ + mif_.driver_data = &driver_data_; \ + MG_SET_MAC_ADDRESS(mif_.mac); \ + mg_tcpip_init(mgr, &mif_); \ + MG_INFO(("Driver: xmc7, MAC: %M", mg_print_mac, mif_.mac)); \ + } while (0) + +#endif + + + #if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_XMC) && MG_ENABLE_DRIVER_XMC struct mg_tcpip_driver_xmc_data { diff --git a/src/arch_win32.h b/src/arch_win32.h index 97d272e7..7ac8b763 100644 --- a/src/arch_win32.h +++ b/src/arch_win32.h @@ -77,6 +77,20 @@ typedef enum { false = 0, true = 1 } bool; #pragma comment(lib, "advapi32.lib") #endif +#if defined(_MSC_VER) && _MSC_VER <= 1200 + #ifndef IPPROTO_IP + #define IPPROTO_IP 0 + #endif + + #ifndef IP_ADD_MEMBERSHIP + struct ip_mreq { + struct in_addr imr_multiaddr; + struct in_addr imr_interface; + }; + #define IP_ADD_MEMBERSHIP 12 + #endif +#endif + // Protect from calls like std::snprintf in app code // See https://github.com/cesanta/mongoose/issues/1047 #ifndef __cplusplus diff --git a/src/config.h b/src/config.h index 2043ca44..2bbd1689 100644 --- a/src/config.h +++ b/src/config.h @@ -182,3 +182,16 @@ #ifndef MG_ENABLE_TCPIP_PRINT_DEBUG_STATS #define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 0 #endif + +#ifndef MG_ENABLE_MDNS +#define MG_ENABLE_MDNS 0 +#endif + +#if MG_ENABLE_TCPIP +#if MG_ENABLE_MDNS +#undef MG_TCPIP_MCAST +#define MG_TCPIP_MCAST 1 +#elif !defined(MG_TCPIP_MCAST) +#define MG_TCPIP_MCAST 0 +#endif +#endif diff --git a/src/dns.c b/src/dns.c index 47c8bfdd..78341bbd 100644 --- a/src/dns.c +++ b/src/dns.c @@ -100,6 +100,7 @@ bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *dm) { const struct mg_dns_header *h = (struct mg_dns_header *) buf; struct mg_dns_rr rr; size_t i, n, num_answers, ofs = sizeof(*h); + bool is_response; memset(dm, 0, sizeof(*dm)); if (len < sizeof(*h)) return 0; // Too small, headers dont fit @@ -110,12 +111,22 @@ bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *dm) { num_answers = 10; // Sanity cap } dm->txnid = mg_ntohs(h->txnid); + is_response = mg_ntohs(h->flags) & 0x8000; for (i = 0; i < mg_ntohs(h->num_questions); i++) { if ((n = mg_dns_parse_rr(buf, len, ofs, true, &rr)) == 0) return false; // MG_INFO(("Q %lu %lu %hu/%hu", ofs, n, rr.atype, rr.aclass)); + mg_dns_parse_name(buf, len, ofs, dm->name, sizeof(dm->name)); ofs += n; } + + if (!is_response) { + // For queries, there is no need to parse the answers. In this way, + // we also ensure the domain name (dm->name) is parsed from + // the question field. + return true; + } + for (i = 0; i < num_answers; i++) { if ((n = mg_dns_parse_rr(buf, len, ofs, false, &rr)) == 0) return false; // MG_INFO(("A -- %lu %lu %hu/%hu %s", ofs, n, rr.atype, rr.aclass, @@ -265,3 +276,74 @@ void mg_resolve(struct mg_connection *c, const char *url) { mg_sendnsreq(c, &host, c->mgr->dnstimeout, dns, c->mgr->use_dns6); } } + +#if MG_ENABLE_MDNS +static const uint8_t mdns_answer[] = { + 0, 1, // 2 bytes - record type, A + 0, 1, // 2 bytes - address class, INET + 0, 0, 0, 120, // 4 bytes - TTL + 0, 4 // 2 bytes - address length +}; + +static void mdns_cb(struct mg_connection *c, int ev, void *ev_data) { + if (ev == MG_EV_READ) { + struct mg_dns_header *qh = (struct mg_dns_header *) c->recv.buf; + if (c->recv.len > 12 && (qh->flags & mg_htons(0xF800)) == 0) { + // flags -> !resp, opcode=0 => query; ignore other opcodes and responses + struct mg_dns_rr rr; // Parse first question, offset 12 is header size + size_t n = mg_dns_parse_rr(c->recv.buf, c->recv.len, 12, true, &rr); + MG_VERBOSE(("mDNS request parsed, result=%d", (int) n)); + if (n > 0) { + // RFC-6762 Appendix C, RFC2181 11: m(n + 1-63), max 255 + 0x0 + // buf and h declared here to ease future expansion to DNS-SD + char buf[sizeof(struct mg_dns_header) + 256 + sizeof(mdns_answer) + 4]; + struct mg_dns_header *h = (struct mg_dns_header *) buf; + char local_name[63 + 7]; // name label + '.' + local label + '\0' + uint8_t name_len = (uint8_t) strlen(c->fn_data); + struct mg_dns_message dm; + bool unicast = (rr.aclass & MG_BIT(15)) != 0; // QU + // uint16_t q = mg_ntohs(qh->num_questions); + rr.aclass &= (uint16_t) ~MG_BIT(15); // remove "QU" (unicast response) + qh->num_questions = mg_htons(1); // parser sanity + mg_dns_parse(c->recv.buf, c->recv.len, &dm); + if (name_len > (sizeof(local_name) - 7)) // leave room for .local\0 + name_len = sizeof(local_name) - 7; + memcpy(local_name, c->fn_data, name_len); + strcpy(local_name + name_len, ".local"); // ensure proper name.local\0 + if (strcmp(local_name, dm.name) == 0) { + char *p = &buf[sizeof(*h)]; + memset(h, 0, sizeof(*h)); // clear header + h->txnid = unicast ? qh->txnid : 0; // RFC-6762 18.1 + // RFC-6762 6: 0 questions, 1 Answer, 0 Auth, 0 Additional RRs + h->num_answers = mg_htons(1); // only one answer + h->flags = mg_htons(0x8400); // Authoritative response + *p++ = name_len; // label 1 + memcpy(p, c->fn_data, name_len), p += name_len; + *p++ = 5; // label 2 + memcpy(p, "local", 5), p += 5; + *p++ = 0; // no more labels + memcpy(p, mdns_answer, sizeof(mdns_answer)), p += sizeof(mdns_answer); +#if MG_ENABLE_TCPIP + memcpy(p, &c->mgr->ifp->ip, 4), p += 4; +#else + memcpy(p, c->data, 4), p += 4; +#endif + if (!unicast) memcpy(&c->rem, &c->loc, sizeof(c->rem)); + mg_send(c, buf, p - buf); // And send it! + MG_DEBUG(("mDNS %c response sent", unicast ? 'U' : 'M')); + } + } + } + mg_iobuf_del(&c->recv, 0, c->recv.len); + } + (void) ev_data; +} + +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd); +struct mg_connection *mg_mdns_listen(struct mg_mgr *mgr, char *name) { + struct mg_connection *c = + mg_listen(mgr, "udp://224.0.0.251:5353", mdns_cb, name); + if (c != NULL) mg_mcast_add("224.0.0.251", (MG_SOCKET_TYPE) (size_t) c->fd); + return c; +} +#endif diff --git a/src/dns.h b/src/dns.h index a186f4d2..fd266a48 100644 --- a/src/dns.h +++ b/src/dns.h @@ -36,3 +36,5 @@ void mg_resolve_cancel(struct mg_connection *); bool mg_dns_parse(const uint8_t *buf, size_t len, struct mg_dns_message *); size_t mg_dns_parse_rr(const uint8_t *buf, size_t len, size_t ofs, bool is_question, struct mg_dns_rr *); + +struct mg_connection *mg_mdns_listen(struct mg_mgr *mgr, char *name); diff --git a/src/drivers/cmsis.c b/src/drivers/cmsis.c index 8c936c1c..da44f7cd 100644 --- a/src/drivers/cmsis.c +++ b/src/drivers/cmsis.c @@ -40,6 +40,10 @@ static bool cmsis_init(struct mg_tcpip_if *ifp) { memcpy(&addr, ifp->mac, sizeof(addr)); mac->SetMacAddress(&addr); } +#if MG_TCPIP_MCAST + memcpy(&addr, mcast_addr, sizeof(addr)); + mac->SetAddressFilter(&addr, 1); +#endif phy->PowerControl(ARM_POWER_FULL); phy->SetInterface(cap.media_interface); phy->SetMode(ARM_ETH_PHY_AUTO_NEGOTIATE); diff --git a/src/drivers/cyw.c b/src/drivers/cyw.c index 099c23ec..7ae1af11 100644 --- a/src/drivers/cyw.c +++ b/src/drivers/cyw.c @@ -784,6 +784,10 @@ static bool cyw_init(uint8_t *mac) { MG_ERROR(("read MAC failed")); } } +#if MG_TCPIP_MCAST + val = 1; if (!cyw_ioctl_iovar_set2_(0, "mcast_list", (uint8_t *)&val, sizeof(val), (uint8_t *)mcast_addr, sizeof(mcast_addr))) return false; + mg_delayms(50); +#endif return true; } // clang-format on diff --git a/src/drivers/imxrt.c b/src/drivers/imxrt.c index b8ba6f4e..35faf960 100644 --- a/src/drivers/imxrt.c +++ b/src/drivers/imxrt.c @@ -115,9 +115,21 @@ static bool mg_tcpip_driver_imxrt_init(struct mg_tcpip_if *ifp) { ENET->RDAR = MG_BIT(24); // Receive Descriptors have changed ENET->TDAR = MG_BIT(24); // Transmit Descriptors have changed // ENET->OPD = 0x10014; + uint32_t hash_table[2] = {0, 0}; + ENET->IAUR = hash_table[1]; + ENET->IALR = hash_table[0]; +#if MG_TCPIP_MCAST + // RM 37.3.4.3.2 + // uint8_t hash64 = ((~mg_crc32(0, mcast_addr, 6)) >> 26) & 0x3f; + // hash_table[((uint8_t)hash64) >> 5] |= (1 << (hash64 & 0x1f)); + hash_table[1] = MG_BIT(1); // above reduces to this for mDNS addr +#endif + ENET->GAUR = hash_table[1]; + ENET->GALR = hash_table[0]; return true; } + // Transmit frame static size_t mg_tcpip_driver_imxrt_tx(const void *buf, size_t len, struct mg_tcpip_if *ifp) { diff --git a/src/drivers/pico-w.c b/src/drivers/pico-w.c index aa94621a..071da480 100644 --- a/src/drivers/pico-w.c +++ b/src/drivers/pico-w.c @@ -17,9 +17,15 @@ static bool mg_tcpip_driver_pico_w_init(struct mg_tcpip_if *ifp) { MG_DEBUG(("Starting AP '%s' (%u)", d->apssid, d->apchannel)); if (!mg_wifi_ap_start(d->apssid, d->appass, d->apchannel)) return false; cyw43_wifi_get_mac(&cyw43_state, CYW43_ITF_STA, ifp->mac); // same MAC +#if MG_TCPIP_MCAST + cyw43_wifi_update_multicast_filter(&cyw43_state, (uint8_t *)mcast_addr, true); +#endif } else { cyw43_arch_enable_sta_mode(); cyw43_wifi_get_mac(&cyw43_state, CYW43_ITF_STA, ifp->mac); +#if MG_TCPIP_MCAST + cyw43_wifi_update_multicast_filter(&cyw43_state, (uint8_t *)mcast_addr, true); +#endif if (d->ssid != NULL) { MG_DEBUG(("Connecting to '%s'", d->ssid)); return mg_wifi_connect(d->ssid, d->pass); diff --git a/src/drivers/ra.c b/src/drivers/ra.c index c6a4605e..3738e7ca 100644 --- a/src/drivers/ra.c +++ b/src/drivers/ra.c @@ -101,9 +101,9 @@ static uint16_t smi_rd(uint16_t header) { pir = 0; // read, mdc = 0 ETHERC->PIR = pir; raspin(s_smispin / 2); // 1/4 clock period, 300ns max access time - data |= (uint16_t)(ETHERC->PIR & MG_BIT(3) ? 1 : 0); // read mdio - raspin(s_smispin / 2); // 1/4 clock period - pir |= MG_BIT(0); // mdc = 1 + data |= (uint16_t) (ETHERC->PIR & MG_BIT(3) ? 1 : 0); // read mdio + raspin(s_smispin / 2); // 1/4 clock period + pir |= MG_BIT(0); // mdc = 1 ETHERC->PIR = pir; raspin(s_smispin); } @@ -111,11 +111,14 @@ static uint16_t smi_rd(uint16_t header) { } static uint16_t raeth_read_phy(uint8_t addr, uint8_t reg) { - return smi_rd((uint16_t)((1 << 14) | (2 << 12) | (addr << 7) | (reg << 2) | (2 << 0))); + return smi_rd( + (uint16_t) ((1 << 14) | (2 << 12) | (addr << 7) | (reg << 2) | (2 << 0))); } static void raeth_write_phy(uint8_t addr, uint8_t reg, uint16_t val) { - smi_wr((uint16_t)((1 << 14) | (1 << 12) | (addr << 7) | (reg << 2) | (2 << 0)), val); + smi_wr( + (uint16_t) ((1 << 14) | (1 << 12) | (addr << 7) | (reg << 2) | (2 << 0)), + val); } // MDC clock is generated manually; as per 802.3, it must not exceed 2.5MHz @@ -152,7 +155,7 @@ static bool mg_tcpip_driver_ra_init(struct mg_tcpip_if *ifp) { MG_DEBUG(("PHY addr: %d, smispin: %d", d->phy_addr, s_smispin)); struct mg_phy phy = {raeth_read_phy, raeth_write_phy}; - mg_phy_init(&phy, d->phy_addr, 0); // MAC clocks PHY + mg_phy_init(&phy, d->phy_addr, 0); // MAC clocks PHY // Select RMII mode, ETHERC->ECMR = MG_BIT(2) | MG_BIT(1); // 100M, Full-duplex, CRC @@ -171,9 +174,13 @@ static bool mg_tcpip_driver_ra_init(struct mg_tcpip_if *ifp) { EDMAC->FDR = 0x070f; // (27.2.11) EDMAC->RMCR = MG_BIT(0); // (27.2.12) ETHERC->ECMR |= MG_BIT(6) | MG_BIT(5); // TE RE - EDMAC->EESIPR = MG_BIT(18); // Enable Rx IRQ - EDMAC->EDRRR = MG_BIT(0); // Receive Descriptors have changed - EDMAC->EDTRR = MG_BIT(0); // Transmit Descriptors have changed +#if MG_TCPIP_MCAST + EDMAC->EESIPR = MG_BIT(18) | MG_BIT(7); // FR, RMAF: Frame and mcast IRQ +#else + EDMAC->EESIPR = MG_BIT(18); // FR: Enable Rx (frame) IRQ +#endif + EDMAC->EDRRR = MG_BIT(0); // Receive Descriptors have changed + EDMAC->EDTRR = MG_BIT(0); // Transmit Descriptors have changed return true; } @@ -225,7 +232,11 @@ static uint32_t s_rxno; void EDMAC_IRQHandler(void) { struct mg_tcpip_driver_ra_data *d = (struct mg_tcpip_driver_ra_data *) s_ifp->driver_data; - EDMAC->EESR = MG_BIT(18); // Ack IRQ in EDMAC 1st +#if MG_TCPIP_MCAST + EDMAC->EESR = MG_BIT(18) | MG_BIT(7); // Ack IRQ in EDMAC 1st +#else + EDMAC->EESR = MG_BIT(18); // Ack IRQ in EDMAC 1st +#endif ICU_IELSR[d->irqno] &= ~MG_BIT(16); // Ack IRQ in ICU last // Frame received, loop for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever diff --git a/src/drivers/rw612.c b/src/drivers/rw612.c index 8f0e6e20..19a313cc 100644 --- a/src/drivers/rw612.c +++ b/src/drivers/rw612.c @@ -89,6 +89,15 @@ static bool mg_tcpip_driver_rw612_init(struct mg_tcpip_if *ifp) { ENET->PALR = ifp->mac[0] << 24 | ifp->mac[1] << 16 | ifp->mac[2] << 8 | ifp->mac[3]; ENET->PAUR |= (ifp->mac[4] << 24 | ifp->mac[5] << 16); + ENET->IALR = 0; + ENET->IAUR = 0; + ENET->GALR = 0; +#if MG_TCPIP_MCAST + ENET->GAUR = MG_BIT(1); // see imxrt, it reduces to this for mDNS +#else + ENET->GAUR = 0; +#endif + ENET->MSCR = ((d->mdc_cr & 0x3f) << 1) | ((d->mdc_holdtime & 7) << 8); ENET->EIMR = MG_BIT(25); // Enable RX interrupt ENET->ECR |= MG_BIT(8) | MG_BIT(1); // DBSWP, Enable @@ -157,7 +166,7 @@ static bool mg_tcpip_driver_rw612_up(struct mg_tcpip_if *ifp) { void ENET_IRQHandler(void) { if (ENET->EIR & MG_BIT(25)) { - ENET->EIR = MG_BIT(25); // Ack RX + ENET->EIR = MG_BIT(25); // Ack RX for (uint32_t i = 0; i < 10; i++) { // read as they arrive but not forever if ((s_rxdesc[s_rxno][0] & MG_BIT(31)) != 0) break; // exit when done // skip partial/errored frames diff --git a/src/drivers/same54.c b/src/drivers/same54.c index 2f411909..f6ebbbcf 100644 --- a/src/drivers/same54.c +++ b/src/drivers/same54.c @@ -124,6 +124,15 @@ static bool mg_tcpip_driver_same54_init(struct mg_tcpip_if *ifp) { MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); GMAC_REGS->SA[0].GMAC_SAT = MG_U32(0, 0, ifp->mac[5], ifp->mac[4]); +#if MG_TCPIP_MCAST + // Setting Hash Index for 01:00:5e:00:00:fb (multicast) + // 24.6.9 Hash addressing + // computed hash is 55, which means bit 23 (55 - 32) in + // HRT register must be set + GMAC_REGS->GMAC_HRT = MG_BIT(23); + GMAC_REGS->GMAC_NCFGR |= MG_BIT(6); // enable multicast hash filtering +#endif + GMAC_REGS->GMAC_UR &= ~GMAC_UR_MII_Msk; // Disable MII, use RMII GMAC_REGS->GMAC_NCFGR |= GMAC_NCFGR_MAXFS_Msk | GMAC_NCFGR_MTIHEN_Msk | GMAC_NCFGR_EFRHD_Msk | GMAC_NCFGR_CAF_Msk; diff --git a/src/drivers/stm32f.c b/src/drivers/stm32f.c index 8fe46ed2..75dbcf71 100644 --- a/src/drivers/stm32f.c +++ b/src/drivers/stm32f.c @@ -136,7 +136,7 @@ static bool mg_tcpip_driver_stm32f_init(struct mg_tcpip_if *ifp) { // MG_BIT(25); ETH->MACIMR = MG_BIT(3) | MG_BIT(9); // Mask timestamp & PMT IT ETH->MACFCR = MG_BIT(7); // Disable zero quarta pause - // ETH->MACFFR = MG_BIT(31); // Receive all + ETH->MACFFR = MG_BIT(10); // Perfect filtering struct mg_phy phy = {eth_read_phy, eth_write_phy}; mg_phy_init(&phy, phy_addr, MG_PHY_CLOCKS_MAC); ETH->DMARDLAR = (uint32_t) (uintptr_t) s_rxdesc; // RX descriptors @@ -152,6 +152,14 @@ static bool mg_tcpip_driver_stm32f_init(struct mg_tcpip_if *ifp) { ETH->MACA0LR = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; +#if MG_TCPIP_MCAST + // enable multicast + ETH->MACA1LR = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + ETH->MACA1HR = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + ETH->MACA1HR |= MG_BIT(31); // AE +#endif return true; } diff --git a/src/drivers/stm32h.c b/src/drivers/stm32h.c index 137d4b2d..ae21e698 100644 --- a/src/drivers/stm32h.c +++ b/src/drivers/stm32h.c @@ -2,7 +2,7 @@ #if MG_ENABLE_TCPIP && (MG_ENABLE_DRIVER_STM32H || MG_ENABLE_DRIVER_MCXN) // STM32H: vendor modded single-queue Synopsys v4.2 -// MCXNx4x: dual-queue Synopsys v5.2 +// MCXNx4x: dual-queue Synopsys v5.2 with no hash table option // RT1170 ENET_QOS: quad-queue Synopsys v5.1 struct synopsys_enet_qos { volatile uint32_t MACCR, MACECR, MACPFR, MACWTR, MACHT0R, MACHT1R, @@ -102,7 +102,9 @@ static bool mg_tcpip_driver_stm32h_init(struct mg_tcpip_if *ifp) { ETH->DMASBMR |= MG_BIT(12); // AAL NOTE(scaprile): is this actually needed ETH->MACIER = 0; // Do not enable additional irq sources (reset value) ETH->MACTFCR = MG_BIT(7); // Disable zero-quanta pause - // ETH->MACPFR = MG_BIT(31); // Receive all +#if !MG_ENABLE_DRIVER_MCXN + ETH->MACPFR = MG_BIT(10); // Perfect filtering +#endif struct mg_phy phy = {eth_read_phy, eth_write_phy}; mg_phy_init(&phy, phy_addr, phy_conf); ETH->DMACRDLAR = @@ -140,6 +142,18 @@ static bool mg_tcpip_driver_stm32h_init(struct mg_tcpip_if *ifp) { ETH->MACA0LR = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; +#if MG_TCPIP_MCAST +#if MG_ENABLE_DRIVER_MCXN + ETH->MACPFR = MG_BIT(4); // Pass Multicast (pass all multicast frames) +#else + // add mDNS / DNS-SD multicast address + ETH->MACA1LR = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + ETH->MACA1HR = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + ETH->MACA1HR |= MG_BIT(31); // AE +#endif +#endif return true; } diff --git a/src/drivers/tm4c.c b/src/drivers/tm4c.c index 7dde103a..50cb6a74 100644 --- a/src/drivers/tm4c.c +++ b/src/drivers/tm4c.c @@ -160,7 +160,7 @@ static bool mg_tcpip_driver_tm4c_init(struct mg_tcpip_if *ifp) { // EMAC->EMACDMABUSMOD = MG_BIT(13) | MG_BIT(16) | MG_BIT(22) | MG_BIT(23) | MG_BIT(25); EMAC->EMACIM = MG_BIT(3) | MG_BIT(9); // Mask timestamp & PMT IT EMAC->EMACFLOWCTL = MG_BIT(7); // Disable zero-quanta pause - // EMAC->EMACFRAMEFLTR = MG_BIT(31); // Receive all + EMAC->EMACFRAMEFLTR = MG_BIT(10); // Perfect filtering // EMAC->EMACPC defaults to internal PHY (EPHY) in MMI mode emac_write_phy(EPHY_ADDR, EPHYBMCR, MG_BIT(15)); // Reset internal PHY (EPHY) emac_write_phy(EPHY_ADDR, EPHYBMCR, MG_BIT(12)); // Set autonegotiation @@ -174,8 +174,14 @@ static bool mg_tcpip_driver_tm4c_init(struct mg_tcpip_if *ifp) { EMAC->EMACADDR0L = (uint32_t) (ifp->mac[3] << 24) | ((uint32_t) ifp->mac[2] << 16) | ((uint32_t) ifp->mac[1] << 8) | ifp->mac[0]; - // NOTE(scaprile) There are 3 additional slots for filtering, disabled by - // default. This also applies to the STM32 driver (at least for F7) +#if MG_TCPIP_MCAST + // add mDNS / DNS-SD multicast address + EMAC->EMACADDR1L = (uint32_t) mcast_addr[3] << 24 | + (uint32_t) mcast_addr[2] << 16 | + (uint32_t) mcast_addr[1] << 8 | (uint32_t) mcast_addr[0]; + EMAC->EMACADDR1H = (uint32_t) mcast_addr[5] << 8 | (uint32_t) mcast_addr[4]; + EMAC->EMACADDR1H |= MG_BIT(31); // AE +#endif return true; } diff --git a/src/drivers/tms570.c b/src/drivers/tms570.c index 8b8f9c65..bd6ba61a 100644 --- a/src/drivers/tms570.c +++ b/src/drivers/tms570.c @@ -105,10 +105,6 @@ static bool mg_tcpip_driver_tms570_init(struct mg_tcpip_if *ifp) { while (delay-- != 0) (void) 0; struct mg_phy phy = {emac_read_phy, emac_write_phy}; mg_phy_init(&phy, d->phy_addr, MG_PHY_CLOCKS_MAC); - // set the mac address - EMAC->MACSRCADDRHI = ifp->mac[0] | (ifp->mac[1] << 8) | (ifp->mac[2] << 16) | - (ifp->mac[3] << 24); - EMAC->MACSRCADDRLO = ifp->mac[4] | (ifp->mac[5] << 8); uint32_t channel; for (channel = 0; channel < 8; channel++) { EMAC->MACINDEX = channel; @@ -118,8 +114,17 @@ static bool mg_tcpip_driver_tms570_init(struct mg_tcpip_if *ifp) { MG_BIT(19) | (channel << 16); } EMAC->RXUNICASTSET = 1; // accept unicast frames; - EMAC->RXMBPENABLE = MG_BIT(30) | MG_BIT(13); // CRC, broadcast; - + +#if MG_TCPIP_MCAST + // Setting Hash Index for 01:00:5e:00:00:fb (multicast) + // using TMS570 XOR method (32.5.37). + // computed hash is 55, which means bit 23 (55 - 32) in + // HASH2 register must be set + EMAC->MACHASH2 = MG_BIT(23); + EMAC->RXMBPENABLE = MG_BIT(5); // enable hash filtering +#endif + EMAC->RXMBPENABLE |= MG_BIT(30) | MG_BIT(13); // CRC, broadcast + // Initialize the descriptors for (i = 0; i < ETH_DESC_CNT; i++) { if (i < ETH_DESC_CNT - 1) { diff --git a/src/drivers/w5100.c b/src/drivers/w5100.c index c7b619b6..556a3831 100644 --- a/src/drivers/w5100.c +++ b/src/drivers/w5100.c @@ -88,9 +88,10 @@ static bool w5100_init(struct mg_tcpip_if *ifp) { w5100_w1(s, 0x46, 0); // CR PHYCR0 -> autonegotiation w5100_w1(s, 0x47, 0); // CR PHYCR1 -> reset w5100_w1(s, 0x72, 0x00); // CR PHYLCKR -> lock PHY + w5100_wn(s, 0x09, ifp->mac, 6); // SHAR w5100_w1(s, 0x1a, 6); // Sock0 RX buf size - 4KB w5100_w1(s, 0x1b, 6); // Sock0 TX buf size - 4KB - w5100_w1(s, 0x400, 4); // Sock0 MR -> MACRAW + w5100_w1(s, 0x400, 0x44); // Sock0 MR -> MACRAW, MAC filter w5100_w1(s, 0x401, 1); // Sock0 CR -> OPEN return w5100_r1(s, 0x403) == 0x42; // Sock0 SR == MACRAW } diff --git a/src/drivers/xmc.c b/src/drivers/xmc.c index 2a16b895..6ec13e49 100644 --- a/src/drivers/xmc.c +++ b/src/drivers/xmc.c @@ -4,34 +4,34 @@ struct ETH_GLOBAL_TypeDef { volatile uint32_t MAC_CONFIGURATION, MAC_FRAME_FILTER, HASH_TABLE_HIGH, - HASH_TABLE_LOW, GMII_ADDRESS, GMII_DATA, FLOW_CONTROL, VLAN_TAG, VERSION, - DEBUG, REMOTE_WAKE_UP_FRAME_FILTER, PMT_CONTROL_STATUS, RESERVED[2], - INTERRUPT_STATUS, INTERRUPT_MASK, MAC_ADDRESS0_HIGH, MAC_ADDRESS0_LOW, - MAC_ADDRESS1_HIGH, MAC_ADDRESS1_LOW, MAC_ADDRESS2_HIGH, MAC_ADDRESS2_LOW, - MAC_ADDRESS3_HIGH, MAC_ADDRESS3_LOW, RESERVED1[40], MMC_CONTROL, - MMC_RECEIVE_INTERRUPT, MMC_TRANSMIT_INTERRUPT, MMC_RECEIVE_INTERRUPT_MASK, - MMC_TRANSMIT_INTERRUPT_MASK, TX_STATISTICS[26], RESERVED2, - RX_STATISTICS_1[26], RESERVED3[6], MMC_IPC_RECEIVE_INTERRUPT_MASK, - RESERVED4, MMC_IPC_RECEIVE_INTERRUPT, RESERVED5, RX_STATISTICS_2[30], - RESERVED7[286], TIMESTAMP_CONTROL, SUB_SECOND_INCREMENT, - SYSTEM_TIME_SECONDS, SYSTEM_TIME_NANOSECONDS, - SYSTEM_TIME_SECONDS_UPDATE, SYSTEM_TIME_NANOSECONDS_UPDATE, - TIMESTAMP_ADDEND, TARGET_TIME_SECONDS, TARGET_TIME_NANOSECONDS, - SYSTEM_TIME_HIGHER_WORD_SECONDS, TIMESTAMP_STATUS, - PPS_CONTROL, RESERVED8[564], BUS_MODE, TRANSMIT_POLL_DEMAND, - RECEIVE_POLL_DEMAND, RECEIVE_DESCRIPTOR_LIST_ADDRESS, - TRANSMIT_DESCRIPTOR_LIST_ADDRESS, STATUS, OPERATION_MODE, - INTERRUPT_ENABLE, MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, - RECEIVE_INTERRUPT_WATCHDOG_TIMER, RESERVED9, AHB_STATUS, - RESERVED10[6], CURRENT_HOST_TRANSMIT_DESCRIPTOR, - CURRENT_HOST_RECEIVE_DESCRIPTOR, CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, - CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, HW_FEATURE; + HASH_TABLE_LOW, GMII_ADDRESS, GMII_DATA, FLOW_CONTROL, VLAN_TAG, VERSION, + DEBUG, REMOTE_WAKE_UP_FRAME_FILTER, PMT_CONTROL_STATUS, RESERVED[2], + INTERRUPT_STATUS, INTERRUPT_MASK, MAC_ADDRESS0_HIGH, MAC_ADDRESS0_LOW, + MAC_ADDRESS1_HIGH, MAC_ADDRESS1_LOW, MAC_ADDRESS2_HIGH, MAC_ADDRESS2_LOW, + MAC_ADDRESS3_HIGH, MAC_ADDRESS3_LOW, RESERVED1[40], MMC_CONTROL, + MMC_RECEIVE_INTERRUPT, MMC_TRANSMIT_INTERRUPT, MMC_RECEIVE_INTERRUPT_MASK, + MMC_TRANSMIT_INTERRUPT_MASK, TX_STATISTICS[26], RESERVED2, + RX_STATISTICS_1[26], RESERVED3[6], MMC_IPC_RECEIVE_INTERRUPT_MASK, + RESERVED4, MMC_IPC_RECEIVE_INTERRUPT, RESERVED5, RX_STATISTICS_2[30], + RESERVED7[286], TIMESTAMP_CONTROL, SUB_SECOND_INCREMENT, + SYSTEM_TIME_SECONDS, SYSTEM_TIME_NANOSECONDS, SYSTEM_TIME_SECONDS_UPDATE, + SYSTEM_TIME_NANOSECONDS_UPDATE, TIMESTAMP_ADDEND, TARGET_TIME_SECONDS, + TARGET_TIME_NANOSECONDS, SYSTEM_TIME_HIGHER_WORD_SECONDS, + TIMESTAMP_STATUS, PPS_CONTROL, RESERVED8[564], BUS_MODE, + TRANSMIT_POLL_DEMAND, RECEIVE_POLL_DEMAND, + RECEIVE_DESCRIPTOR_LIST_ADDRESS, TRANSMIT_DESCRIPTOR_LIST_ADDRESS, STATUS, + OPERATION_MODE, INTERRUPT_ENABLE, + MISSED_FRAME_AND_BUFFER_OVERFLOW_COUNTER, + RECEIVE_INTERRUPT_WATCHDOG_TIMER, RESERVED9, AHB_STATUS, RESERVED10[6], + CURRENT_HOST_TRANSMIT_DESCRIPTOR, CURRENT_HOST_RECEIVE_DESCRIPTOR, + CURRENT_HOST_TRANSMIT_BUFFER_ADDRESS, CURRENT_HOST_RECEIVE_BUFFER_ADDRESS, + HW_FEATURE; }; #undef ETH0 -#define ETH0 ((struct ETH_GLOBAL_TypeDef*) 0x5000C000UL) +#define ETH0 ((struct ETH_GLOBAL_TypeDef *) 0x5000C000UL) -#define ETH_PKT_SIZE 1536 // Max frame size +#define ETH_PKT_SIZE 1536 // Max frame size #define ETH_DESC_CNT 4 // Descriptors count #define ETH_DS 4 // Descriptor size (words) @@ -43,27 +43,27 @@ struct ETH_GLOBAL_TypeDef { static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE] ETH_RAM_SECTION; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE] ETH_RAM_SECTION; -static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] ETH_RAM_SECTION; // RX descriptors -static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] ETH_RAM_SECTION; // TX descriptors -static uint8_t s_txno; // Current TX descriptor -static uint8_t s_rxno; // Current RX descriptor +static uint32_t s_rxdesc[ETH_DESC_CNT] + [ETH_DS] ETH_RAM_SECTION; // RX descriptors +static uint32_t s_txdesc[ETH_DESC_CNT] + [ETH_DS] ETH_RAM_SECTION; // TX descriptors +static uint8_t s_txno; // Current TX descriptor +static uint8_t s_rxno; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; static uint16_t eth_read_phy(uint8_t addr, uint8_t reg) { - ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | - ((uint32_t)addr << 11) | - ((uint32_t)reg << 6) | 1; + ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | ((uint32_t) addr << 11) | + ((uint32_t) reg << 6) | 1; while ((ETH0->GMII_ADDRESS & 1) != 0) (void) 0; - return (uint16_t)(ETH0->GMII_DATA & 0xffff); + return (uint16_t) (ETH0->GMII_DATA & 0xffff); } static void eth_write_phy(uint8_t addr, uint8_t reg, uint16_t val) { - ETH0->GMII_DATA = val; - ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | - ((uint32_t)addr << 11) | - ((uint32_t)reg << 6) | 3; + ETH0->GMII_DATA = val; + ETH0->GMII_ADDRESS = (ETH0->GMII_ADDRESS & 0x3c) | ((uint32_t) addr << 11) | + ((uint32_t) reg << 6) | 3; while ((ETH0->GMII_ADDRESS & 1) != 0) (void) 0; } @@ -98,22 +98,30 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { // set the MAC address ETH0->MAC_ADDRESS0_HIGH = MG_U32(0, 0, ifp->mac[5], ifp->mac[4]); - ETH0->MAC_ADDRESS0_LOW = - MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); + ETH0->MAC_ADDRESS0_LOW = + MG_U32(ifp->mac[3], ifp->mac[2], ifp->mac[1], ifp->mac[0]); + +#if MG_TCPIP_MCAST + // set the multicast address filter + ETH0->MAC_ADDRESS1_HIGH = + MG_U32(0, 0, mcast_addr[5], mcast_addr[4]) | MG_BIT(31); + ETH0->MAC_ADDRESS1_LOW = + MG_U32(mcast_addr[3], mcast_addr[2], mcast_addr[1], mcast_addr[0]); +#endif // Configure the receive filter - ETH0->MAC_FRAME_FILTER = MG_BIT(10) | MG_BIT(2); // HFP, HMC + ETH0->MAC_FRAME_FILTER = MG_BIT(10); // Perfect filter // Disable flow control ETH0->FLOW_CONTROL = 0; // Enable store and forward mode - ETH0->OPERATION_MODE = MG_BIT(25) | MG_BIT(21); // RSF, TSF + ETH0->OPERATION_MODE = MG_BIT(25) | MG_BIT(21); // RSF, TSF // Configure DMA bus mode (AAL, USP, RPBL, PBL) - ETH0->BUS_MODE = MG_BIT(25) | MG_BIT(23) | (32 << 17) | (32 << 8); + ETH0->BUS_MODE = MG_BIT(25) | MG_BIT(23) | (32 << 17) | (32 << 8); // init RX descriptors for (int i = 0; i < ETH_DESC_CNT; i++) { - s_rxdesc[i][0] = MG_BIT(31); // OWN descriptor + s_rxdesc[i][0] = MG_BIT(31); // OWN descriptor s_rxdesc[i][1] = MG_BIT(14) | ETH_PKT_SIZE; s_rxdesc[i][2] = (uint32_t) s_rxbuf[i]; if (i == ETH_DESC_CNT - 1) { @@ -143,9 +151,9 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { ETH0->MMC_TRANSMIT_INTERRUPT_MASK = 0xFFFFFFFF; ETH0->MMC_RECEIVE_INTERRUPT_MASK = 0xFFFFFFFF; ETH0->MMC_IPC_RECEIVE_INTERRUPT_MASK = 0xFFFFFFFF; - ETH0->INTERRUPT_MASK = MG_BIT(9) | MG_BIT(3); // TSIM, PMTIM + ETH0->INTERRUPT_MASK = MG_BIT(9) | MG_BIT(3); // TSIM, PMTIM - //Enable interrupts (NIE, RIE, TIE) + // Enable interrupts (NIE, RIE, TIE) ETH0->INTERRUPT_ENABLE = MG_BIT(16) | MG_BIT(6) | MG_BIT(0); // Enable MAC transmission and reception (TE, RE) @@ -156,7 +164,7 @@ static bool mg_tcpip_driver_xmc_init(struct mg_tcpip_if *ifp) { } static size_t mg_tcpip_driver_xmc_tx(const void *buf, size_t len, - struct mg_tcpip_if *ifp) { + struct mg_tcpip_if *ifp) { if (len > sizeof(s_txbuf[s_txno])) { MG_ERROR(("Frame too big, %ld", (long) len)); len = 0; // Frame is too big @@ -174,7 +182,7 @@ static size_t mg_tcpip_driver_xmc_tx(const void *buf, size_t len, } // Resume processing - ETH0->STATUS = MG_BIT(2); // clear Transmit unavailable + ETH0->STATUS = MG_BIT(2); // clear Transmit unavailable ETH0->TRANSMIT_POLL_DEMAND = 0; return len; } @@ -200,13 +208,13 @@ void ETH0_0_IRQHandler(void) { // check if a frame was received if (irq_status & MG_BIT(6)) { - for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever + for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever if (s_rxdesc[s_rxno][0] & MG_BIT(31)) break; size_t len = (s_rxdesc[s_rxno][0] & 0x3fff0000) >> 16; mg_tcpip_qwrite(s_rxbuf[s_rxno], len, s_ifp); - s_rxdesc[s_rxno][0] = MG_BIT(31); // OWN bit: handle control to DMA + s_rxdesc[s_rxno][0] = MG_BIT(31); // OWN bit: handle control to DMA // Resume processing - ETH0->STATUS = MG_BIT(7) | MG_BIT(6); // clear RU and RI + ETH0->STATUS = MG_BIT(7) | MG_BIT(6); // clear RU and RI ETH0->RECEIVE_POLL_DEMAND = 0; if (++s_rxno >= ETH_DESC_CNT) s_rxno = 0; } @@ -224,7 +232,7 @@ void ETH0_0_IRQHandler(void) { } } -struct mg_tcpip_driver mg_tcpip_driver_xmc = { - mg_tcpip_driver_xmc_init, mg_tcpip_driver_xmc_tx, NULL, - mg_tcpip_driver_xmc_poll}; +struct mg_tcpip_driver mg_tcpip_driver_xmc = {mg_tcpip_driver_xmc_init, + mg_tcpip_driver_xmc_tx, NULL, + mg_tcpip_driver_xmc_poll}; #endif diff --git a/src/drivers/xmc7.c b/src/drivers/xmc7.c index 138568cb..49d63426 100644 --- a/src/drivers/xmc7.c +++ b/src/drivers/xmc7.c @@ -66,8 +66,8 @@ static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; -static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor -static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor +static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor +static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; @@ -104,8 +104,7 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { // set NSP change, ignore RX FCS, data bus width, clock rate // frame length 1536, full duplex, speed ETH0->NETWORK_CONFIG = MG_BIT(29) | MG_BIT(26) | MG_BIT(21) | - ((cr & 7) << 18) | MG_BIT(8) | MG_BIT(4) | MG_BIT(1) | - MG_BIT(0); + ((cr & 7) << 18) | MG_BIT(8) | MG_BIT(1) | MG_BIT(0); // config DMA settings: Force TX burst, Discard on Error, set RX buffer size // to 1536, TX_PBUF_SIZE, RX_PBUF_SIZE, AMBA_BURST_LENGTH @@ -142,6 +141,13 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { ifp->mac[3] << 24 | ifp->mac[2] << 16 | ifp->mac[1] << 8 | ifp->mac[0]; ETH0->SPEC_ADD1_TOP = ifp->mac[5] << 8 | ifp->mac[4]; +#if MG_TCPIP_MCAST + // set multicast MAC address + ETH0->SPEC_ADD2_BOTTOM = mcast_addr[3] << 24 | mcast_addr[2] << 16 | + mcast_addr[1] << 8 | mcast_addr[0]; + ETH0->SPEC_ADD2_TOP = mcast_addr[5] << 8 | mcast_addr[4]; +#endif + // enable MDIO, TX, RX ETH0->NETWORK_CONTROL = MG_BIT(4) | MG_BIT(3) | MG_BIT(2); @@ -220,7 +226,7 @@ static bool mg_tcpip_driver_xmc7_poll(struct mg_tcpip_if *ifp, bool s1) { void ETH_IRQHandler(void) { uint32_t irq_status = ETH0->INT_STATUS; if (irq_status & MG_BIT(1)) { - for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever + for (uint8_t i = 0; i < 10; i++) { // read as they arrive, but not forever if ((s_rxdesc[s_rxno][0] & MG_BIT(0)) == 0) break; size_t len = s_rxdesc[s_rxno][1] & (MG_BIT(13) - 1); mg_tcpip_qwrite(s_rxbuf[s_rxno], len, s_ifp); diff --git a/src/net_builtin.c b/src/net_builtin.c index e2726b61..ff0f9487 100644 --- a/src/net_builtin.c +++ b/src/net_builtin.c @@ -1129,6 +1129,10 @@ void mg_connect_resolved(struct mg_connection *c) { bool mg_open_listener(struct mg_connection *c, const char *url) { c->loc.port = mg_htons(mg_url_port(url)); + if (!mg_aton(mg_url_host(url), &c->loc)) { + MG_ERROR(("invalid listening URL: %s", url)); + return false; + } return true; } @@ -1216,4 +1220,10 @@ bool mg_send(struct mg_connection *c, const void *buf, size_t len) { } return res; } + +#if MG_TCPIP_MCAST +const uint8_t mcast_addr[6] = {0x01, 0x00, 0x5e, 0x00, 0x00, 0xfb}; +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd) { (void) ip; (void) fd; } +#endif + #endif // MG_ENABLE_TCPIP diff --git a/src/net_builtin.h b/src/net_builtin.h index bb2e232d..4145d0f6 100644 --- a/src/net_builtin.h +++ b/src/net_builtin.h @@ -1,5 +1,7 @@ #pragma once +#if MG_ENABLE_TCPIP + #include "arch.h" #include "net.h" #include "queue.h" @@ -99,3 +101,5 @@ struct mg_tcpip_spi { void (*end)(void *); // SPI end: slave select high uint8_t (*txn)(void *, uint8_t); // SPI transaction: write 1 byte, read reply }; + +#endif diff --git a/src/sock.c b/src/sock.c index 247d96b6..5843c8cc 100644 --- a/src/sock.c +++ b/src/sock.c @@ -128,7 +128,7 @@ long mg_io_send(struct mg_connection *c, const void *buf, size_t len) { } MG_VERBOSE(("%lu %ld %d", c->id, n, MG_SOCK_ERR(n))); if (MG_SOCK_PENDING(n)) return MG_IO_WAIT; - if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 + if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 if (n <= 0) return MG_IO_ERR; return n; } @@ -176,6 +176,22 @@ static void mg_set_non_blocking_mode(MG_SOCKET_TYPE fd) { #endif } +#if MG_ENABLE_MDNS +void mg_mcast_add(char *ip, MG_SOCKET_TYPE fd) { +#if MG_ENABLE_RL +#error UNSUPPORTED +#elif MG_ENABLE_FREERTOS_TCP + // TODO(): prvAllowIPPacketIPv4() +#else + // lwIP, Unix, Windows, Zephyr(, AzureRTOS ?) + struct ip_mreq mreq; + mreq.imr_multiaddr.s_addr = inet_addr(ip); + mreq.imr_interface.s_addr = mg_htonl(INADDR_ANY); + setsockopt(fd, IPPROTO_IP, IP_ADD_MEMBERSHIP, (char *) &mreq, sizeof(mreq)); +#endif +} +#endif + bool mg_open_listener(struct mg_connection *c, const char *url) { MG_SOCKET_TYPE fd = MG_INVALID_SOCKET; bool success = false; @@ -250,7 +266,7 @@ static long recv_raw(struct mg_connection *c, void *buf, size_t len) { } MG_VERBOSE(("%lu %ld %d", c->id, n, MG_SOCK_ERR(n))); if (MG_SOCK_PENDING(n)) return MG_IO_WAIT; - if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 + if (MG_SOCK_RESET(n)) return MG_IO_RESET; // MbedTLS, see #1507 if (n <= 0) return MG_IO_ERR; return n; } @@ -287,7 +303,7 @@ static void read_conn(struct mg_connection *c) { } // there can still be > 16K from last iteration, always mg_tls_recv() m = c->is_tls_hs ? (long) MG_IO_WAIT : mg_tls_recv(c, buf, len); - if (n == MG_IO_ERR || n == MG_IO_RESET) { // Windows, see #3031 + if (n == MG_IO_ERR || n == MG_IO_RESET) { // Windows, see #3031 if (c->rtls.len == 0 || m < 0) { // Close only when we have fully drained both rtls and TLS buffers c->is_closing = 1; // or there's nothing we can do about it. diff --git a/test/unit_test.c b/test/unit_test.c index 1ca16e3d..5a465246 100644 --- a/test/unit_test.c +++ b/test/unit_test.c @@ -2418,6 +2418,26 @@ static void test_dns(void) { ASSERT(strcmp(dm.name, "new-fp-shed.wg1.b.yahoo.com") == 0); } + { + // DNS Query for domain abc.local + // 0000 00 00 00 00 00 01 00 00 00 00 00 00 03 61 62 63 .............abc + // 0010 05 6c 6f 63 61 6c 00 00 01 00 01 .local..... + uint8_t d[] = { + 0x00, 0x00, // txid: 0 + 0x00, 0x00, // flags: 0 (Query flag = 0) + 0x00, 0x01, // numQuestions: 1 + 0x00, 0x00, // numAnswers: 1 + 0x00, 0x00, 0x00, 0x00, // additional RRs + 0x03, 0x61, 0x62, 0x63, // "abc" + 0x05, 0x6c, 0x6f, 0x63, 0x61, 0x6c, // "local" + 0x00, 0x00, 0x01, 0x00, 0x01 // domain end, type, class + }; + memset(&dm, 0, sizeof(dm)); + ASSERT(mg_dns_parse(d, sizeof(d), &dm) == 1); + ASSERT(dm.resolved == false); + ASSERT(strcmp(dm.name, "abc.local") == 0); + } + test_dns_error("udp://127.0.0.1:12345", "DNS timeout"); test_dns_error("", "resolver"); test_dns_error("tcp://0.0.0.0:0", "DNS error"); diff --git a/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/main.c b/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/main.c index 55b65d7c..faa813ea 100644 --- a/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/main.c +++ b/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/main.c @@ -60,6 +60,7 @@ int main(void) { MG_INFO(("Initialising application...")); web_init(&mgr); + mg_mdns_listen(&mgr, "Mongoose"); // Start mDNS server MG_INFO(("Starting event loop")); for (;;) { diff --git a/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/mongoose_config.h b/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/mongoose_config.h index fd9509a6..5d939cee 100644 --- a/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/mongoose_config.h +++ b/tutorials/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/mongoose_config.h @@ -9,3 +9,5 @@ #define MG_ENABLE_PACKED_FS 1 #define MG_ENABLE_DRIVER_CMSIS 1 #define MG_ENABLE_LINES 1 +#define MG_ENABLE_MDNS 1 + diff --git a/tutorials/udp/mdns-server/Makefile b/tutorials/udp/mdns-server/Makefile new file mode 100644 index 00000000..8b63f3c8 --- /dev/null +++ b/tutorials/udp/mdns-server/Makefile @@ -0,0 +1,25 @@ +PROG ?= example # Program we are building +DELETE = rm -rf # Command to remove files +OUT ?= -o $(PROG) # Compiler argument for output file +SOURCES = main.c mongoose.c # Source code files +CFLAGS = -W -Wall -Wextra -g -I. # Build options + +# Mongoose build options. See https://mongoose.ws/documentation/#build-options +CFLAGS_MONGOOSE += -DMG_ENABLE_MDNS=1 -DMG_ENABLE_LINES + +ifeq ($(OS),Windows_NT) # Windows settings. Assume MinGW compiler. To use VC: make CC=cl CFLAGS=/MD OUT=/Feprog.exe + PROG ?= example.exe # Use .exe suffix for the binary + CC = gcc # Use MinGW gcc compiler + CFLAGS += -lws2_32 # Link against Winsock library + DELETE = cmd /C del /Q /F /S # Command prompt command to delete files + OUT ?= -o $(PROG) # Build output +endif + +all: $(PROG) # Default target. Build and run program + $(RUN) ./$(PROG) $(ARGS) + +$(PROG): $(SOURCES) # Build program from sources + $(CC) $(SOURCES) $(CFLAGS) $(CFLAGS_MONGOOSE) $(CFLAGS_EXTRA) $(OUT) + +clean: # Cleanup. Delete built program and all build artifacts + $(DELETE) $(PROG) *.o *.obj *.exe *.dSYM diff --git a/tutorials/udp/mdns-server/README.md b/tutorials/udp/mdns-server/README.md new file mode 100644 index 00000000..e69de29b diff --git a/tutorials/udp/mdns-server/main.c b/tutorials/udp/mdns-server/main.c new file mode 100644 index 00000000..2041a3f8 --- /dev/null +++ b/tutorials/udp/mdns-server/main.c @@ -0,0 +1,24 @@ +// Copyright (c) 2022 Cesanta Software Limited +// All rights reserved + +#include "mongoose.h" + +int main(void) { + uint32_t response_ip = inet_addr("192.168.69.11"); + struct mg_mgr mgr; + static struct mg_connection *c; + mg_log_set(MG_LL_DEBUG); // Set log level + mg_mgr_init(&mgr); // Initialise event manager + + // Desired name must NOT have any dots in it, nor a domain + c = mg_mdns_listen(&mgr, "Mongoose"); // Start mDNS server + // if not using our built-in TCP/IP stack, pass the IP address you want to + // use as a response, this depends on your underlying TCP/IP stack and number + // of interfaces available + memcpy(c->data, &response_ip, sizeof(response_ip)); + + for (;;) mg_mgr_poll(&mgr, 1000); // Event loop + + mg_mgr_free(&mgr); + return 0; +} diff --git a/tutorials/udp/mdns-server/mongoose.c b/tutorials/udp/mdns-server/mongoose.c new file mode 120000 index 00000000..5e522bbc --- /dev/null +++ b/tutorials/udp/mdns-server/mongoose.c @@ -0,0 +1 @@ +../../../mongoose.c \ No newline at end of file diff --git a/tutorials/udp/mdns-server/mongoose.h b/tutorials/udp/mdns-server/mongoose.h new file mode 120000 index 00000000..ee4ac823 --- /dev/null +++ b/tutorials/udp/mdns-server/mongoose.h @@ -0,0 +1 @@ +../../../mongoose.h \ No newline at end of file