From 806ee0f2cb5f16e9ead0e9c9a57afd92f12e1a8f Mon Sep 17 00:00:00 2001 From: "Sergio R. Caprile" Date: Fri, 27 Jun 2025 14:09:28 -0300 Subject: [PATCH] Improve Zephyr support --- mongoose.c | 20 ++++++++++++++++++-- mongoose.h | 12 +++++++++++- src/ota_stm32f.c | 4 ++++ src/ota_stm32h5.c | 4 ++++ src/ota_stm32h7.c | 4 ++++ src/sock.c | 8 ++++++-- src/util.h | 11 ++++++++++- 7 files changed, 57 insertions(+), 6 deletions(-) diff --git a/mongoose.c b/mongoose.c index f34eb139..0d30694f 100644 --- a/mongoose.c +++ b/mongoose.c @@ -7185,6 +7185,10 @@ MG_IRAM void single_bank_swap(char *p1, char *p2, size_t size) { bool mg_ota_begin(size_t new_firmware_size) { s_mg_flash_stm32f.size = flash_size(); +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32f); } @@ -7350,6 +7354,10 @@ static bool mg_stm32h5_write(void *addr, const void *buf, size_t len) { } bool mg_ota_begin(size_t new_firmware_size) { +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32h5); } @@ -7554,6 +7562,10 @@ bool mg_ota_begin(size_t new_firmware_size) { // Using only the 1st bank (mapped to CM7) s_mg_flash_stm32h7.size /= 2; } +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32h7); } @@ -8806,15 +8818,19 @@ void mg_multicast_add(struct mg_connection *c, char *ip) { #elif MG_ENABLE_FREERTOS_TCP // TODO(): prvAllowIPPacketIPv4() #else - // lwIP, Unix, Windows, Zephyr(, AzureRTOS ?) + // lwIP, Unix, Windows, Zephyr 4+(, AzureRTOS ?) #if MG_ENABLE_LWIP && !LWIP_IGMP MG_ERROR(("LWIP_IGMP not defined, no multicast support")); +#else +#if defined(__ZEPHYR__) && ZEPHYR_VERSION_CODE < 0x40000 + MG_ERROR(("struct ip_mreq not defined")); #else struct ip_mreq mreq; mreq.imr_multiaddr.s_addr = inet_addr(ip); mreq.imr_interface.s_addr = mg_htonl(INADDR_ANY); setsockopt(FD(c), IPPROTO_IP, IP_ADD_MEMBERSHIP, (char *) &mreq, sizeof(mreq)); -#endif +#endif // !Zephyr +#endif // !lwIP #endif } diff --git a/mongoose.h b/mongoose.h index bd6da61f..e058905c 100644 --- a/mongoose.h +++ b/mongoose.h @@ -622,6 +622,7 @@ typedef int socklen_t; #if MG_ARCH == MG_ARCH_ZEPHYR +#include #include #include @@ -1306,9 +1307,14 @@ uint32_t mg_ntohl(uint32_t net); #define MG_ROUND_UP(x, a) ((a) == 0 ? (x) : ((((x) + (a) -1) / (a)) * (a))) #define MG_ROUND_DOWN(x, a) ((a) == 0 ? (x) : (((x) / (a)) * (a))) -#if defined(__GNUC__) +#if defined(__GNUC__) && defined(__arm__) +#ifdef __ZEPHYR__ +#define MG_ARM_DISABLE_IRQ() __asm__ __volatile__("cpsid i" : : : "memory") +#define MG_ARM_ENABLE_IRQ() __asm__ __volatile__("cpsie i" : : : "memory") +#else #define MG_ARM_DISABLE_IRQ() asm volatile("cpsid i" : : : "memory") #define MG_ARM_ENABLE_IRQ() asm volatile("cpsie i" : : : "memory") +#endif // !ZEPHYR #elif defined(__CCRH__) #define MG_RH850_DISABLE_IRQ() __DI() #define MG_RH850_ENABLE_IRQ() __EI() @@ -1322,7 +1328,11 @@ uint32_t mg_ntohl(uint32_t net); #elif defined(__ARMCC_VERSION) #define MG_DSB() __builtin_arm_dsb(0xf) #elif defined(__GNUC__) && defined(__arm__) && defined(__thumb__) +#ifdef __ZEPHYR__ +#define MG_DSB() __asm__("DSB 0xf") +#else #define MG_DSB() asm("DSB 0xf") +#endif // !ZEPHYR #elif defined(__ICCARM__) #define MG_DSB() __iar_builtin_DSB() #else diff --git a/src/ota_stm32f.c b/src/ota_stm32f.c index bd91e43a..64025091 100644 --- a/src/ota_stm32f.c +++ b/src/ota_stm32f.c @@ -200,6 +200,10 @@ MG_IRAM void single_bank_swap(char *p1, char *p2, size_t size) { bool mg_ota_begin(size_t new_firmware_size) { s_mg_flash_stm32f.size = flash_size(); +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32f); } diff --git a/src/ota_stm32h5.c b/src/ota_stm32h5.c index 20ee0b85..f03a2e4e 100644 --- a/src/ota_stm32h5.c +++ b/src/ota_stm32h5.c @@ -135,6 +135,10 @@ static bool mg_stm32h5_write(void *addr, const void *buf, size_t len) { } bool mg_ota_begin(size_t new_firmware_size) { +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32h5); } diff --git a/src/ota_stm32h7.c b/src/ota_stm32h7.c index d2becf89..d70428c2 100644 --- a/src/ota_stm32h7.c +++ b/src/ota_stm32h7.c @@ -184,6 +184,10 @@ bool mg_ota_begin(size_t new_firmware_size) { // Using only the 1st bank (mapped to CM7) s_mg_flash_stm32h7.size /= 2; } +#ifdef __ZEPHYR__ + *((uint32_t *)0xE000ED94) = 0; + MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed")); +#endif return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32h7); } diff --git a/src/sock.c b/src/sock.c index e33ac09b..fe0685bf 100644 --- a/src/sock.c +++ b/src/sock.c @@ -185,15 +185,19 @@ void mg_multicast_add(struct mg_connection *c, char *ip) { #elif MG_ENABLE_FREERTOS_TCP // TODO(): prvAllowIPPacketIPv4() #else - // lwIP, Unix, Windows, Zephyr(, AzureRTOS ?) + // lwIP, Unix, Windows, Zephyr 4+(, AzureRTOS ?) #if MG_ENABLE_LWIP && !LWIP_IGMP MG_ERROR(("LWIP_IGMP not defined, no multicast support")); +#else +#if defined(__ZEPHYR__) && ZEPHYR_VERSION_CODE < 0x40000 + MG_ERROR(("struct ip_mreq not defined")); #else struct ip_mreq mreq; mreq.imr_multiaddr.s_addr = inet_addr(ip); mreq.imr_interface.s_addr = mg_htonl(INADDR_ANY); setsockopt(FD(c), IPPROTO_IP, IP_ADD_MEMBERSHIP, (char *) &mreq, sizeof(mreq)); -#endif +#endif // !Zephyr +#endif // !lwIP #endif } diff --git a/src/util.h b/src/util.h index 7e75cddf..b1ffaa34 100644 --- a/src/util.h +++ b/src/util.h @@ -72,9 +72,14 @@ uint32_t mg_ntohl(uint32_t net); #define MG_ROUND_UP(x, a) ((a) == 0 ? (x) : ((((x) + (a) -1) / (a)) * (a))) #define MG_ROUND_DOWN(x, a) ((a) == 0 ? (x) : (((x) / (a)) * (a))) -#if defined(__GNUC__) +#if defined(__GNUC__) && defined(__arm__) +#ifdef __ZEPHYR__ +#define MG_ARM_DISABLE_IRQ() __asm__ __volatile__("cpsid i" : : : "memory") +#define MG_ARM_ENABLE_IRQ() __asm__ __volatile__("cpsie i" : : : "memory") +#else #define MG_ARM_DISABLE_IRQ() asm volatile("cpsid i" : : : "memory") #define MG_ARM_ENABLE_IRQ() asm volatile("cpsie i" : : : "memory") +#endif // !ZEPHYR #elif defined(__CCRH__) #define MG_RH850_DISABLE_IRQ() __DI() #define MG_RH850_ENABLE_IRQ() __EI() @@ -88,7 +93,11 @@ uint32_t mg_ntohl(uint32_t net); #elif defined(__ARMCC_VERSION) #define MG_DSB() __builtin_arm_dsb(0xf) #elif defined(__GNUC__) && defined(__arm__) && defined(__thumb__) +#ifdef __ZEPHYR__ +#define MG_DSB() __asm__("DSB 0xf") +#else #define MG_DSB() asm("DSB 0xf") +#endif // !ZEPHYR #elif defined(__ICCARM__) #define MG_DSB() __iar_builtin_DSB() #else