move embedded tutorials out of protocol tree

This commit is contained in:
Sergio R. Caprile committed 2026-10-07 16:10:28 -03:00
1 parent 338756d0b0
commit 8fc5651044
287 files changed
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+4 -2
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@@ -1,8 +1,10 @@
REPO_ROOT ?= ../../..
PROG ?= ./example # Program we are building
DELETE = rm -rf # Command to remove files
OUT ?= -o $(PROG) # Compiler argument for output file
SOURCES = main.c mongoose.c net.c packed_fs.c # Source code files
CFLAGS = -W -Wall -Wextra -g -I. # Build options
SOURCES = main.c $(REPO_ROOT)/mongoose.c net.c packed_fs.c # Source code files
CFLAGS = -I$(REPO_ROOT) -W -Wall -Wextra -g -I. # Build options
# Mongoose build options. See https://mongoose.ws/documentation/#build-options
# CFLAGS_MONGOOSE +=
@@ -1,6 +0,0 @@
# The following lines of boilerplate have to be in your project's
# CMakeLists in this exact order for cmake to work correctly
cmake_minimum_required(VERSION 3.5)
include($ENV{IDF_PATH}/tools/cmake/project.cmake)
project(mongoose-esp32-example)
@@ -1,38 +0,0 @@
THISDIR = $(realpath $(CURDIR))
ROOTDIR = $(realpath $(CURDIR)/../../../..)
DOCKER ?= docker run --rm $(DA) -v $(ROOTDIR):$(ROOTDIR) -w $(THISDIR) espressif/idf
CMD ?= idf.py build
PORT ?= /dev/ttyUSB0
all: example
example:
true
build: Makefile $(wildcard main/*)
$(DOCKER) $(CMD)
flash:
flash: CMD = idf.py flash
flash: DA = --device $(PORT)
flash: build
.PHONY: build
dashboard.hex: build
esputil mkhex \
0x8000 build/partition_table/partition-table.bin \
0x1000 build/bootloader/bootloader.bin \
0x100000 build/mongoose-esp32-example.bin > $@
flash2: dashboard.hex
esputil -p $(PORT) -b 921600 -fp 0x220 flash dashboard.hex
esputil -p $(PORT) monitor
ESPTOOL ?= esptool.py
flash3:
cd build && $(ESPTOOL) --chip esp32 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 2MB 0x8000 partition_table/partition-table.bin 0x1000 bootloader/bootloader.bin 0x100000 mongoose-esp32-example.bin
clean:
test -d build && $(DOCKER) rm -rf build sdkconfig || true
@@ -1 +0,0 @@
See detailed tutorial at https://mongoose.ws/tutorials/esp32/device-dashboard
@@ -1,7 +0,0 @@
idf_component_register(SRCS "main.c"
"wifi.c"
"net.c"
"packed_fs.c"
"mongoose.c")
component_compile_options(-DHTTP_URL="http://0.0.0.0:80")
component_compile_options(-DHTTPS_URL="https://0.0.0.0:443")
@@ -1,272 +0,0 @@
// Copyright (c) 2020 Cesanta Software Limited
// All rights reserved
#include "mongoose.h"
#include "net.h"
#define WIFI_SSID "YOUR_WIFI_NETWORK_NAME" // SET THIS!
#define WIFI_PASS "YOUR_WIFI_PASSWORD" // SET THIS!
void app_main(void) {
// Setup wifi. This function is implemented in wifi.c
// It blocks until connected to the configured WiFi network
void wifi_init(const char *ssid, const char *pass);
wifi_init(WIFI_SSID, WIFI_PASS);
// Connected to WiFi, now start HTTP server
struct mg_mgr mgr;
mg_log_set(MG_LL_DEBUG); // Set log level
mg_mgr_init(&mgr);
MG_INFO(("Mongoose version : v%s", MG_VERSION));
MG_INFO(("Listening on : %s", HTTP_URL));
#if MG_ENABLE_MBEDTLS
MG_INFO(("Listening on : %s", HTTPS_URL));
#endif
web_init(&mgr);
for (;;) mg_mgr_poll(&mgr, 1000); // Infinite event loop
}
#if MG_OTA == MG_OTA_CUSTOM
enum {
MG_OTA_UNAVAILABLE = 0, // No OTA information is present
MG_OTA_FIRST_BOOT = 1, // Device booting the first time after the OTA
MG_OTA_UNCOMMITTED = 2, // Ditto, but marking us for the rollback
MG_OTA_COMMITTED = 3 // The firmware is good
};
enum { MG_FIRMWARE_CURRENT = 0, MG_FIRMWARE_PREVIOUS = 1 };
void *mg_flash_start(void) {
return NULL;
}
size_t mg_flash_size(void) {
return 0;
}
size_t mg_flash_sector_size(void) {
return 0;
}
size_t mg_flash_write_align(void) {
return 0;
}
int mg_flash_bank(void) {
return 0;
}
bool mg_flash_erase(void *location) {
(void) location;
return false;
}
bool mg_flash_swap_bank(void) {
return true;
}
bool mg_flash_write(void *addr, const void *buf, size_t len) {
(void) addr, (void) buf, (void) len;
return false;
}
void mg_device_reset(void) {
esp_restart();
}
#include "esp_app_format.h"
#include "esp_ota_ops.h"
static size_t s_size = 0; // Firmware size to flash. In-progress indicator
static bool rx_checked = false; // Whether firmware being received has been checked as valid
const esp_partition_t * update_partition = NULL; // The partition the update is being applied to
esp_ota_handle_t update_handle = 0; // Handle of the current update process
const esp_partition_t * get_partition_from_fw(int fw) {
if (MG_FIRMWARE_CURRENT == fw) {
return esp_ota_get_running_partition();
}
const esp_partition_t * p = esp_ota_get_last_invalid_partition();
if (NULL == p) {
p = esp_ota_get_next_update_partition(NULL);
}
return p;
}
// Returns true if the data buffer contains the header of a valid firmware
const size_t fw_size_required = sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t) + sizeof(esp_app_desc_t);
bool check_fw_header(const void* buf, size_t len) {
// Ensure we have received enough data to do the check
if (len < fw_size_required) {
MG_ERROR(("Insufficient data to check firmware header - %d bytes, require %d bytes", len, fw_size_required));
return false;
}
// Check the magic word of the received firmare
esp_app_desc_t* rx_app_info = (esp_app_desc_t*)(((char*)buf) + sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t));
if (ESP_APP_DESC_MAGIC_WORD != rx_app_info->magic_word) {
MG_ERROR(("Invalid app - invalid magic word"));
return false;
}
MG_INFO(("Received firmware: %s %s", rx_app_info->project_name, rx_app_info->version));
// Get the name/version of the running firmware
const esp_partition_t *current = esp_ota_get_running_partition();
esp_app_desc_t curr_app_info;
esp_err_t res = esp_ota_get_partition_description(current, &curr_app_info);
if (ESP_OK != res) {
MG_ERROR(("Unable to get name/version of running firmware"));
return false;
}
MG_INFO(("Running firmware: %s %s", curr_app_info.project_name, curr_app_info.version));
// Check the name of the new firmware is the same as the old firmware
if (memcmp(curr_app_info.project_name, rx_app_info->project_name, sizeof(curr_app_info.project_name)) != 0) {
MG_ERROR(("Firmware name is different. Wrong firmware uploaded! Current %s Uploaded %s", curr_app_info.project_name, rx_app_info->project_name));
return false;
}
// Check the version of the new firmware is different from the old firmware
if (memcmp(curr_app_info.version, rx_app_info->version, sizeof(curr_app_info.version)) == 0) {
MG_ERROR(("Firmware version is the same. Wrong firmware uploaded! Current %s, Uploaded %s", curr_app_info.version, rx_app_info->version));
//return false;
}
return true;
}
size_t mg_ota_size(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
if (NULL == p) {
return 0;
}
return p->size;
}
bool mg_ota_begin(size_t new_firmware_size) {
rx_checked = false;
if (s_size) {
MG_ERROR(("OTA already in progress. Call mg_ota_end()"));
return false;
}
int partition_size = mg_ota_size(MG_FIRMWARE_PREVIOUS);
if (new_firmware_size > partition_size) {
MG_ERROR(("Firmware %lu bytes, max %lu", new_firmware_size, partition_size));
return false;
}
update_partition = esp_ota_get_next_update_partition(NULL);
if (NULL == update_partition) {
MG_ERROR(("esp_ota_get_next_update_partition returned NULL"));
return false;
}
esp_err_t res = esp_ota_begin(update_partition, OTA_WITH_SEQUENTIAL_WRITES, &update_handle);
if (res != ESP_OK) {
esp_ota_abort(update_handle);
MG_ERROR(("esp_ota_begin failed (%s)", esp_err_to_name(res)));
return false;
}
s_size = new_firmware_size;
MG_INFO(("Starting OTA, firmware size %lu", s_size));
return true;
}
bool mg_ota_write(const void *buf, size_t len) {
if (s_size == 0) {
MG_ERROR(("OTA is not started, call mg_ota_begin()"));
return false;
}
if (!rx_checked) {
if (!check_fw_header(buf, len)) {
return false;
}
rx_checked = true;
}
esp_err_t res = esp_ota_write(update_handle, buf, len);
if (res != ESP_OK) {
esp_ota_abort(update_handle);
MG_ERROR(("esp_ota_write FAILED (%s)", esp_err_to_name(res)));
return false;
}
return true;
}
bool mg_ota_end(void) {
if (0 == s_size) {
MG_INFO(("Finishing OTA: fail"));
return false;
}
s_size = 0;
esp_err_t err = esp_ota_end(update_handle);
if (err != ESP_OK) {
MG_ERROR(("esp_ota_end failed (%s)!", esp_err_to_name(err)));
return false;
}
err = esp_ota_set_boot_partition(update_partition);
if (err != ESP_OK) {
MG_ERROR(("esp_ota_set_boot_partition failed (%s)!", esp_err_to_name(err)));
return false;
}
return true;
}
bool mg_ota_commit(void) {
esp_ota_mark_app_valid_cancel_rollback();
return true;
}
bool mg_ota_rollback(void) {
if(esp_ota_check_rollback_is_possible()) {
esp_ota_mark_app_invalid_rollback_and_reboot();
return true;
}
MG_ERROR(("Rollback NOT possible"));
return false;
}
int mg_ota_status(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
if (NULL == p) {
return 0;
}
int status = MG_OTA_UNAVAILABLE;
esp_ota_img_states_t img_state = ESP_OTA_IMG_UNDEFINED;
esp_err_t res = esp_ota_get_state_partition(p, &img_state);
if (ESP_OK == res) {
if (ESP_OTA_IMG_VALID == img_state) {
status = MG_OTA_COMMITTED;
} else if (ESP_OTA_IMG_UNDEFINED == img_state) {
status = MG_OTA_UNCOMMITTED;
} else if (ESP_OTA_IMG_INVALID == img_state) {
status = MG_OTA_UNAVAILABLE;
} else if (ESP_OTA_IMG_ABORTED == img_state) {
status = MG_OTA_UNAVAILABLE;
} else if (ESP_OTA_IMG_NEW == img_state) {
status = MG_OTA_FIRST_BOOT;
} else if (ESP_OTA_IMG_PENDING_VERIFY == img_state) {
status = MG_OTA_UNCOMMITTED;
}
}
return status;
}
uint32_t mg_ota_crc32(int fw) {
(void) fw;
return 0;
}
uint32_t mg_ota_timestamp(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
esp_app_desc_t app;
esp_err_t res = esp_ota_get_partition_description(p, &app);
if (ESP_OK != res)
{
return 0;
}
struct tm datetime = {};
if (NULL == strptime(app.date, "%b %d %Y", &datetime))
{
return 0;
}
if (NULL == strptime(app.time, "%H:%M:%S", &datetime))
{
return 0;
}
return mktime(&datetime);
}
#endif
@@ -1 +0,0 @@
../../../../../mongoose.c
@@ -1 +0,0 @@
../../../../../mongoose.h
@@ -1,4 +0,0 @@
#define MG_ARCH MG_ARCH_ESP32
#define MG_TLS MG_TLS_NONE // change to 'MG_TLS_MBED' to enable TLS
#define MG_OTA MG_OTA_CUSTOM
@@ -1 +0,0 @@
../../net.c
@@ -1 +0,0 @@
../../net.h
@@ -1 +0,0 @@
../../packed_fs.c
@@ -1,104 +0,0 @@
// Code taken from the ESP32 IDF WiFi station Example
#include <string.h>
#include "esp_event.h"
#include "esp_log.h"
#include "esp_system.h"
#include "esp_wifi.h"
#include "freertos/FreeRTOS.h"
#include "freertos/event_groups.h"
#include "freertos/task.h"
#include "nvs_flash.h"
#include "lwip/err.h"
#include "lwip/sys.h"
#include "mongoose.h"
static EventGroupHandle_t s_wifi_event_group;
/* The event group allows multiple bits for each event, but we only care about
* two events:
* - we are connected to the AP with an IP
* - we failed to connect after the maximum amount of retries */
#define WIFI_CONNECTED_BIT BIT0
#define WIFI_FAIL_BIT BIT1
static int s_retry_num = 0;
static void event_handler(void *arg, esp_event_base_t event_base,
int32_t event_id, void *event_data) {
if (event_base == WIFI_EVENT && event_id == WIFI_EVENT_STA_START) {
esp_wifi_connect();
} else if (event_base == WIFI_EVENT &&
event_id == WIFI_EVENT_STA_DISCONNECTED) {
if (s_retry_num < 10) {
esp_wifi_connect();
s_retry_num++;
MG_INFO(("retry to connect to the AP"));
} else {
xEventGroupSetBits(s_wifi_event_group, WIFI_FAIL_BIT);
}
MG_ERROR(("connect to the AP fail"));
} else if (event_base == IP_EVENT && event_id == IP_EVENT_STA_GOT_IP) {
ip_event_got_ip_t *event = (ip_event_got_ip_t *) event_data;
MG_INFO(("IP ADDRESS:" IPSTR, IP2STR(&event->ip_info.ip)));
s_retry_num = 0;
xEventGroupSetBits(s_wifi_event_group, WIFI_CONNECTED_BIT);
}
}
void wifi_init(const char *ssid, const char *pass) {
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES ||
ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
ESP_ERROR_CHECK(nvs_flash_erase());
ret = nvs_flash_init();
}
ESP_ERROR_CHECK(ret);
s_wifi_event_group = xEventGroupCreate();
ESP_ERROR_CHECK(esp_netif_init());
ESP_ERROR_CHECK(esp_event_loop_create_default());
esp_netif_create_default_wifi_sta();
wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
ESP_ERROR_CHECK(esp_wifi_init(&cfg));
esp_event_handler_instance_t instance_any_id;
esp_event_handler_instance_t instance_got_ip;
ESP_ERROR_CHECK(esp_event_handler_instance_register(
WIFI_EVENT, ESP_EVENT_ANY_ID, &event_handler, NULL, &instance_any_id));
ESP_ERROR_CHECK(esp_event_handler_instance_register(
IP_EVENT, IP_EVENT_STA_GOT_IP, &event_handler, NULL, &instance_got_ip));
wifi_config_t c = {.sta = {.threshold = {.authmode = WIFI_AUTH_WPA2_PSK},
.pmf_cfg = {.capable = true, .required = false}}};
snprintf((char *) c.sta.ssid, sizeof(c.sta.ssid), "%s", ssid);
snprintf((char *) c.sta.password, sizeof(c.sta.password), "%s", pass);
ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA));
ESP_ERROR_CHECK(esp_wifi_set_config(WIFI_IF_STA, &c));
ESP_ERROR_CHECK(esp_wifi_start());
MG_DEBUG(("wifi_init_sta finished."));
EventBits_t bits = xEventGroupWaitBits(s_wifi_event_group,
WIFI_CONNECTED_BIT | WIFI_FAIL_BIT,
pdFALSE, pdFALSE, portMAX_DELAY);
if (bits & WIFI_CONNECTED_BIT) {
MG_INFO(("connected to ap SSID:%s password:%s", ssid, pass));
} else if (bits & WIFI_FAIL_BIT) {
MG_ERROR(("Failed to connect to SSID:%s, password:%s", ssid, pass));
} else {
MG_ERROR(("UNEXPECTED EVENT"));
}
/* The event will not be processed after unregister */
ESP_ERROR_CHECK(esp_event_handler_instance_unregister(
IP_EVENT, IP_EVENT_STA_GOT_IP, instance_got_ip));
ESP_ERROR_CHECK(esp_event_handler_instance_unregister(
WIFI_EVENT, ESP_EVENT_ANY_ID, instance_any_id));
vEventGroupDelete(s_wifi_event_group);
}
@@ -1,6 +0,0 @@
# Name, Type, SubType, Offset, Size, Flags
nvs, data, nvs, , 0x6000
otadata, data, ota, , 0x2000,
phy_init, data, phy, , 0x1000,
ota_0, app, ota_0, , 948K,
ota_1, app, ota_1, , 948K,
1 # Name, Type, SubType, Offset, Size, Flags
2 nvs, data, nvs, , 0x6000
3 otadata, data, ota, , 0x2000,
4 phy_init, data, phy, , 0x1000,
5 ota_0, app, ota_0, , 948K,
6 ota_1, app, ota_1, , 948K,
@@ -1,5 +0,0 @@
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv"
CONFIG_PARTITION_TABLE_FILENAME="partitions.csv"
CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
#CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192
-1
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@@ -1 +0,0 @@
../../infineon/
@@ -1,53 +0,0 @@
CFLAGS = -W -Wall -Wextra -Wundef -Wshadow -Wdouble-promotion
CFLAGS += -Wformat-truncation -fno-common -Wconversion
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include
CFLAGS += -D__SAME54P20A__ -Icmsis_sam/include
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=softfp
LDFLAGS ?= -Tlink.ld -nostartfiles -nostdlib --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
SOURCES = main.c syscalls.c startup.c
# Mongoose-specific source code files and build options. See https://mongoose.ws/documentation/#build-options
SOURCES += mongoose.c net.c packed_fs.c
CFLAGS += -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_ARMGCC -DMG_ENABLE_CUSTOM_MILLIS=1 -DMG_ENABLE_LINES=1
CFLAGS += -DMG_ENABLE_DRIVER_SAME54=1 -DMG_ENABLE_CUSTOM_RANDOM=1 $(CFLAGS_EXTRA)
# Example specific build options. See README.md
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
ifeq ($(OS),Windows_NT)
RM = cmd /C del /Q /F
else
RM = rm -rf
endif
build: firmware.bin
firmware.bin: firmware.elf
arm-none-eabi-objcopy -O binary $< $@
firmware.elf: cmsis_core cmsis_sam hal.h link.ld Makefile $(SOURCES)
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(CFLAGS_EXTRA) $(LDFLAGS) -o $@
flash: firmware.bin
bossac -p /dev/cu.usb* -w -v -b $<
cmsis_core:
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
cmsis_sam:
curl -sL https://packs.download.microchip.com/Microchip.SAME54_DFP.3.9.244.atpack -o $@.zip
mkdir $@ && cd $@ && unzip ../$@.zip
# Automated test via https://vcon.io/automated-firmware-tests/. Set VCON_API_KEY and update DEVICE_URL
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/9
update: firmware.bin
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
test update: CFLAGS += -DUART_DEBUG=USART1
test: update
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
grep 'READY, IP:' /tmp/output.txt # Check for network init
clean:
$(RM) firmware.* cmsis_core cmsis_sam *.zip
@@ -1,219 +0,0 @@
// Copyright (c) 2022 Cesanta Software Limited
// SPDX-License-Identifier: MIT
//
// https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/DataSheets/SAM-D5x-E5x-Family-Data-Sheet-DS60001507.pdf
// https://ww1.microchip.com/downloads/en/DeviceDoc/70005321A.pdf
#ifndef LED_PIN
#define LED_PIN PIN('C', 18)
#endif
#ifndef BUTTON_PIN
#define BUTTON_PIN PIN('B', 31)
#endif
#ifndef UART_DEBUG
#define UART_DEBUG USART1
#endif
#pragma once
#include <sam.h>
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#define BIT(x) (1UL << (x))
#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
#define PINNO(pin) (pin & 255)
#define PINBANK(pin) (pin >> 8)
static inline void spin(volatile uint32_t count) {
while (count--) (void) 0;
}
static inline uint32_t clock_sys_freq(void) {
return 48000000U;
}
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
#define GPIO(N) ((port_group_registers_t *) (PORT_BASE_ADDRESS + 0x80 * (N)))
typedef port_group_registers_t GPIO_TypeDef;
static inline GPIO_TypeDef *gpio_bank(uint16_t pin) {
return GPIO(PINBANK(pin));
}
static inline void gpio_toggle(uint16_t pin) {
gpio_bank(pin)->PORT_OUTTGL = BIT(PINNO(pin));
}
static inline bool gpio_read(uint16_t pin) {
return gpio_bank(pin)->PORT_IN & BIT(PINNO(pin));
}
static inline void gpio_write(uint16_t pin, bool val) {
GPIO_TypeDef *gpio = gpio_bank(pin);
if (val) {
gpio->PORT_OUTSET = BIT(PINNO(pin));
} else {
gpio->PORT_OUTCLR = BIT(PINNO(pin));
}
}
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
uint8_t speed, uint8_t pull, uint8_t af) {
(void) type, (void) speed, (void) pull, (void) af;
GPIO_TypeDef *gpio = gpio_bank(pin);
uint32_t mask = BIT(PINNO(pin));
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
if (mode == GPIO_MODE_INPUT) {
gpio->PORT_DIRCLR = mask;
} else {
gpio->PORT_DIRSET = mask;
}
}
static inline void gpio_input(uint16_t pin) {
gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 0);
}
static inline void gpio_output(uint16_t pin) {
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 0);
}
typedef sercom_usart_int_registers_t USART_TypeDef;
#define USART1 ((USART_TypeDef *) SERCOM0_BASE_ADDRESS)
#define USART2 ((USART_TypeDef *) SERCOM1_BASE_ADDRESS)
#define USART3 ((USART_TypeDef *) SERCOM2_BASE_ADDRESS)
static inline bool uart_init(USART_TypeDef *uart, unsigned long baud) {
uint16_t rx = 0, tx = 0; // Pins
uint8_t rx_mux = 0, tx_mux = 0;
if (uart == USART1) {
MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM0_Msk;
GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_CORE] =
GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN_Msk;
GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_SLOW] =
GCLK_PCHCTRL_GEN_GCLK3 | GCLK_PCHCTRL_CHEN_Msk;
tx = PIN('A', 4), rx = PIN('A', 5);
rx_mux = MUX_PA05D_SERCOM0_PAD1, tx_mux = MUX_PA04D_SERCOM0_PAD0;
} else if (uart == USART2) {
MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM1_Msk;
tx = PIN('C', 27), rx = PIN('C', 28);
} else if (uart == USART3) {
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_SERCOM2_Msk;
tx = PIN('A', 9), rx = PIN('A', 8);
} else {
return false;
}
gpio_bank(rx)->PORT_WRCONFIG =
PORT_WRCONFIG_PMUX(rx_mux) | PORT_WRCONFIG_WRPMUX(1) |
PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(rx));
gpio_bank(tx)->PORT_WRCONFIG =
PORT_WRCONFIG_PMUX(tx_mux) | PORT_WRCONFIG_WRPMUX(1) |
PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(tx));
uart->SERCOM_CTRLA = SERCOM_USART_INT_CTRLA_DORD(1) |
SERCOM_USART_INT_CTRLA_MODE(1 /* INT_CLK */) |
SERCOM_USART_INT_CTRLA_RXPO(1 /* PAD1 */) |
SERCOM_USART_INT_CTRLA_TXPO(0 /* PAD0 */) |
SERCOM_USART_INT_CTRLA_SAMPR(1);
uart->SERCOM_BAUD = (uint16_t) (clock_sys_freq() / (16 * baud));
uart->SERCOM_CTRLB = SERCOM_USART_INT_CTRLB_RXEN(1) |
SERCOM_USART_INT_CTRLB_TXEN(1) |
SERCOM_USART_INT_CTRLB_CHSIZE(0);
while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_CTRLB_Msk) spin(1);
uart->SERCOM_CTRLA |= SERCOM_USART_INT_CTRLA_ENABLE(1);
while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_ENABLE_Msk) spin(1);
return true;
}
static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
while (!(uart->SERCOM_INTFLAG & SERCOM_USART_INT_INTFLAG_DRE_Msk)) spin(1);
uart->SERCOM_DATA = byte;
}
static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
}
static inline bool uart_read_ready(USART_TypeDef *uart) {
return (uart->SERCOM_INTFLAG & SERCOM_USART_EXT_INTFLAG_RXC_Msk);
}
static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
return (uint8_t) (uart->SERCOM_DATA & 255U);
}
static inline void rng_init(void) {
MCLK_REGS->MCLK_APBCMASK |= MCLK_APBCMASK_TRNG_Msk;
TRNG_REGS->TRNG_CTRLA = TRNG_CTRLA_ENABLE_Msk;
}
static inline uint32_t rng_read(void) {
while ((TRNG_REGS->TRNG_INTFLAG & TRNG_INTFLAG_DATARDY_Msk) == 0) spin(1);
return TRNG_REGS->TRNG_DATA;
}
#define UID_BASE_W0 0x008061FC // Word 0 location of the 128-bit chip ID
#define UID_BASE_W1_3 0x00806010 // Words 1-3 location of the 128-bit chip ID
#define UUID(n) ((n >= 0 && n <= 3) ? \
(((uint8_t *) UID_BASE_W0)[n]) : \
(((uint8_t *) UID_BASE_W1_3)[n - 4]))
#define GENERATE_LOCALLY_ADMINISTERED_MAC() \
{ \
2, UUID(0) ^ UUID(1) ^ UUID(2), UUID(3) ^ UUID(4) ^ UUID(5), \
UUID(6) ^ UUID(7) ^ UUID(8), UUID(9) ^ UUID(10) ^ UUID(11), \
UUID(12) ^ UUID(13) ^ UUID(14) ^ UUID(15) \
}
static inline bool timer_expired(volatile uint64_t *t, uint64_t prd,
uint64_t now) {
if (now + prd < *t) *t = 0; // Time wrapped? Reset timer
if (*t == 0) *t = now + prd; // Firt poll? Set expiration
if (*t > now) return false; // Not expired yet, return
*t = (now - *t) > prd ? now + prd : *t + prd; // Next expiration time
return true; // Expired, return true
}
static inline void clock_init(void) {
SCB->CPACR |= (15U << 20); // Enable FPU
SysTick_Config(clock_sys_freq() / 1000); // Sys tick every 1ms
}
static inline void gpio_set_irq_handler(uint16_t pin, void (*fn)(void *),
void *arg) {
(void) pin, (void) fn, (void) arg;
}
static inline void ethernet_init(void) {
uint16_t pins[] = {PIN('A', 12), PIN('A', 13), PIN('A', 14), PIN('A', 15),
PIN('A', 17), PIN('A', 18), PIN('A', 19), PIN('C', 11),
PIN('C', 12), PIN('C', 20)};
uint32_t af[] = {MUX_PA12L_GMAC_GRX1, MUX_PA13L_GMAC_GRX0,
MUX_PA14L_GMAC_GTXCK, MUX_PA15L_GMAC_GRXER,
MUX_PA17L_GMAC_GTXEN, MUX_PA18L_GMAC_GTX0,
MUX_PA19L_GMAC_GTX1, MUX_PC11L_GMAC_GMDC,
MUX_PC12L_GMAC_GMDIO, MUX_PC20L_GMAC_GRXDV};
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
int bank = PINBANK(pins[i]), no = PINNO(pins[i]);
PORT_REGS->GROUP[bank].PORT_PINCFG[no] |= PORT_PINCFG_PMUXEN_Msk;
volatile uint8_t *m = &PORT_REGS->GROUP[bank].PORT_PMUX[no / 2], v = m[0];
if (no & 1) {
m[0] = (uint8_t) ((v & ~0xf0) | PORT_PMUX_PMUXO(af[i]));
} else {
m[0] = (uint8_t) ((v & ~0x0f) | PORT_PMUX_PMUXE(af[i]));
}
}
PORT_REGS->GROUP[0].PORT_PINCFG[17] |= PORT_PINCFG_DRVSTR_Msk;
PORT_REGS->GROUP[0].PORT_PINCFG[18] |= PORT_PINCFG_DRVSTR_Msk;
PORT_REGS->GROUP[0].PORT_PINCFG[19] |= PORT_PINCFG_DRVSTR_Msk;
// Reset PHY
uint16_t phy_pin = PIN('C', 21);
gpio_output(phy_pin);
gpio_write(phy_pin, false);
spin(999);
gpio_write(phy_pin, true);
spin(999);
}
@@ -1,25 +0,0 @@
ENTRY(Reset_Handler);
MEMORY {
flash(rx) : ORIGIN = 0x00000000, LENGTH = 1024k
sram(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
}
_estack = ORIGIN(sram) + LENGTH(sram);
SECTIONS {
.vectors : { FILL(256) KEEP(*(.vectors)) } > flash
.text : { *(.text*) } > flash
.rodata : { *(.rodata*) } > flash
.data : {
_sdata = .;
*(.first_data)
*(.data SORT(.data.*))
_edata = .;
} > sram AT > flash
_sidata = LOADADDR(.data);
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
. = ALIGN(8);
_end = .;
}
@@ -1,79 +0,0 @@
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
// SPDX-License-Identifier: MIT
#include "hal.h"
#include "mongoose.h"
#include "net.h"
#define BLINK_PERIOD_MS 500 // LED blinking period in millis
#define LOG_PERIOD_MS 1000 // Info log period in millis
void SystemInit(void) { // Called automatically by startup code
clock_init();
rng_init();
}
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
bool mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
return true;
}
static void timer_fn(void *arg) {
struct mg_tcpip_if *ifp = arg; // show network stats
const char *names[] = {"down", "up", "req", "ready"};
MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
ifp->ndrop, ifp->nerr));
}
int main(void) {
gpio_input(BUTTON_PIN);
gpio_output(LED_PIN);
uart_init(UART_DEBUG, 115200);
ethernet_init();
MG_INFO(("Starting, CPU freq %g MHz", (double) clock_sys_freq() / 1000000));
struct mg_mgr mgr; // Initialise
mg_mgr_init(&mgr); // Mongoose event manager
mg_log_set(MG_LL_DEBUG); // Set log level
// Initialise Mongoose network stack
struct mg_tcpip_driver_same54_data driver_data = {.mdc_cr = 5};
struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC()/*{2, 3, 4, 5, 6, 7}*/,
// Uncomment below for static configuration:
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
.driver = &mg_tcpip_driver_same54,
.driver_data = &driver_data};
mg_tcpip_init(&mgr, &mif);
mg_timer_add(&mgr, LOG_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
while (mif.state != MG_TCPIP_STATE_READY) {
mg_mgr_poll(&mgr, 0);
}
MG_INFO(("Initialising application..."));
web_init(&mgr);
MG_INFO(("Starting event loop"));
for (;;) {
mg_mgr_poll(&mgr, 0);
}
return 0;
}
@@ -1 +0,0 @@
../../../../../mongoose.c
@@ -1 +0,0 @@
../../../../../mongoose.h
@@ -1 +0,0 @@
../../net.c
@@ -1 +0,0 @@
../../net.h
@@ -1 +0,0 @@
../../packed_fs.c
@@ -1,332 +0,0 @@
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
// SPDX-License-Identifier: MIT
#include "hal.h"
void Reset_Handler(void); // Defined below
void Dummy_Handler(void); // Defined below
void SysTick_Handler(void); // Defined in main.c
void SystemInit(void); // Defined in main.c, called by reset handler
void _estack(void); // Defined in link.ld
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
WEAK_ALIAS void NMI_Handler(void);
WEAK_ALIAS void HardFault_Handler(void);
WEAK_ALIAS void MemoryManagement_Handler(void);
WEAK_ALIAS void BusFault_Handler(void);
WEAK_ALIAS void UsageFault_Handler(void);
WEAK_ALIAS void SVCall_Handler(void);
WEAK_ALIAS void DebugMonitor_Handler(void);
WEAK_ALIAS void PendSV_Handler(void);
WEAK_ALIAS void SysTick_Handler(void);
WEAK_ALIAS void PM_Handler(void);
WEAK_ALIAS void MCLK_Handler(void);
WEAK_ALIAS void OSCCTRL_XOSC0_Handler(void);
WEAK_ALIAS void OSCCTRL_XOSC1_Handler(void);
WEAK_ALIAS void OSCCTRL_DFLL_Handler(void);
WEAK_ALIAS void OSCCTRL_DPLL0_Handler(void);
WEAK_ALIAS void OSCCTRL_DPLL1_Handler(void);
WEAK_ALIAS void OSC32KCTRL_Handler(void);
WEAK_ALIAS void SUPC_OTHER_Handler(void);
WEAK_ALIAS void SUPC_BODDET_Handler(void);
WEAK_ALIAS void WDT_Handler(void);
WEAK_ALIAS void RTC_Handler(void);
WEAK_ALIAS void EIC_EXTINT_0_Handler(void);
WEAK_ALIAS void EIC_EXTINT_1_Handler(void);
WEAK_ALIAS void EIC_EXTINT_2_Handler(void);
WEAK_ALIAS void EIC_EXTINT_3_Handler(void);
WEAK_ALIAS void EIC_EXTINT_4_Handler(void);
WEAK_ALIAS void EIC_EXTINT_5_Handler(void);
WEAK_ALIAS void EIC_EXTINT_6_Handler(void);
WEAK_ALIAS void EIC_EXTINT_7_Handler(void);
WEAK_ALIAS void EIC_EXTINT_8_Handler(void);
WEAK_ALIAS void EIC_EXTINT_9_Handler(void);
WEAK_ALIAS void EIC_EXTINT_10_Handler(void);
WEAK_ALIAS void EIC_EXTINT_11_Handler(void);
WEAK_ALIAS void EIC_EXTINT_12_Handler(void);
WEAK_ALIAS void EIC_EXTINT_13_Handler(void);
WEAK_ALIAS void EIC_EXTINT_14_Handler(void);
WEAK_ALIAS void EIC_EXTINT_15_Handler(void);
WEAK_ALIAS void FREQM_Handler(void);
WEAK_ALIAS void NVMCTRL_0_Handler(void);
WEAK_ALIAS void NVMCTRL_1_Handler(void);
WEAK_ALIAS void DMAC_0_Handler(void);
WEAK_ALIAS void DMAC_1_Handler(void);
WEAK_ALIAS void DMAC_2_Handler(void);
WEAK_ALIAS void DMAC_3_Handler(void);
WEAK_ALIAS void DMAC_OTHER_Handler(void);
WEAK_ALIAS void EVSYS_0_Handler(void);
WEAK_ALIAS void EVSYS_1_Handler(void);
WEAK_ALIAS void EVSYS_2_Handler(void);
WEAK_ALIAS void EVSYS_3_Handler(void);
WEAK_ALIAS void EVSYS_OTHER_Handler(void);
WEAK_ALIAS void PAC_Handler(void);
WEAK_ALIAS void RAMECC_Handler(void);
WEAK_ALIAS void SERCOM0_0_Handler(void);
WEAK_ALIAS void SERCOM0_1_Handler(void);
WEAK_ALIAS void SERCOM0_2_Handler(void);
WEAK_ALIAS void SERCOM0_OTHER_Handler(void);
WEAK_ALIAS void SERCOM1_0_Handler(void);
WEAK_ALIAS void SERCOM1_1_Handler(void);
WEAK_ALIAS void SERCOM1_2_Handler(void);
WEAK_ALIAS void SERCOM1_OTHER_Handler(void);
WEAK_ALIAS void SERCOM2_0_Handler(void);
WEAK_ALIAS void SERCOM2_1_Handler(void);
WEAK_ALIAS void SERCOM2_2_Handler(void);
WEAK_ALIAS void SERCOM2_OTHER_Handler(void);
WEAK_ALIAS void SERCOM3_0_Handler(void);
WEAK_ALIAS void SERCOM3_1_Handler(void);
WEAK_ALIAS void SERCOM3_2_Handler(void);
WEAK_ALIAS void SERCOM3_OTHER_Handler(void);
WEAK_ALIAS void SERCOM4_0_Handler(void);
WEAK_ALIAS void SERCOM4_1_Handler(void);
WEAK_ALIAS void SERCOM4_2_Handler(void);
WEAK_ALIAS void SERCOM4_OTHER_Handler(void);
WEAK_ALIAS void SERCOM5_0_Handler(void);
WEAK_ALIAS void SERCOM5_1_Handler(void);
WEAK_ALIAS void SERCOM5_2_Handler(void);
WEAK_ALIAS void SERCOM5_OTHER_Handler(void);
WEAK_ALIAS void SERCOM6_0_Handler(void);
WEAK_ALIAS void SERCOM6_1_Handler(void);
WEAK_ALIAS void SERCOM6_2_Handler(void);
WEAK_ALIAS void SERCOM6_OTHER_Handler(void);
WEAK_ALIAS void SERCOM7_0_Handler(void);
WEAK_ALIAS void SERCOM7_1_Handler(void);
WEAK_ALIAS void SERCOM7_2_Handler(void);
WEAK_ALIAS void SERCOM7_OTHER_Handler(void);
WEAK_ALIAS void CAN0_Handler(void);
WEAK_ALIAS void CAN1_Handler(void);
WEAK_ALIAS void USB_OTHER_Handler(void);
WEAK_ALIAS void USB_SOF_HSOF_Handler(void);
WEAK_ALIAS void USB_TRCPT0_Handler(void);
WEAK_ALIAS void USB_TRCPT1_Handler(void);
WEAK_ALIAS void GMAC_Handler(void);
WEAK_ALIAS void TCC0_OTHER_Handler(void);
WEAK_ALIAS void TCC0_MC0_Handler(void);
WEAK_ALIAS void TCC0_MC1_Handler(void);
WEAK_ALIAS void TCC0_MC2_Handler(void);
WEAK_ALIAS void TCC0_MC3_Handler(void);
WEAK_ALIAS void TCC0_MC4_Handler(void);
WEAK_ALIAS void TCC0_MC5_Handler(void);
WEAK_ALIAS void TCC1_OTHER_Handler(void);
WEAK_ALIAS void TCC1_MC0_Handler(void);
WEAK_ALIAS void TCC1_MC1_Handler(void);
WEAK_ALIAS void TCC1_MC2_Handler(void);
WEAK_ALIAS void TCC1_MC3_Handler(void);
WEAK_ALIAS void TCC2_OTHER_Handler(void);
WEAK_ALIAS void TCC2_MC0_Handler(void);
WEAK_ALIAS void TCC2_MC1_Handler(void);
WEAK_ALIAS void TCC2_MC2_Handler(void);
WEAK_ALIAS void TCC3_OTHER_Handler(void);
WEAK_ALIAS void TCC3_MC0_Handler(void);
WEAK_ALIAS void TCC3_MC1_Handler(void);
WEAK_ALIAS void TCC4_OTHER_Handler(void);
WEAK_ALIAS void TCC4_MC0_Handler(void);
WEAK_ALIAS void TCC4_MC1_Handler(void);
WEAK_ALIAS void TC0_Handler(void);
WEAK_ALIAS void TC1_Handler(void);
WEAK_ALIAS void TC2_Handler(void);
WEAK_ALIAS void TC3_Handler(void);
WEAK_ALIAS void TC4_Handler(void);
WEAK_ALIAS void TC5_Handler(void);
WEAK_ALIAS void TC6_Handler(void);
WEAK_ALIAS void TC7_Handler(void);
WEAK_ALIAS void PDEC_OTHER_Handler(void);
WEAK_ALIAS void PDEC_MC0_Handler(void);
WEAK_ALIAS void PDEC_MC1_Handler(void);
WEAK_ALIAS void ADC0_OTHER_Handler(void);
WEAK_ALIAS void ADC0_RESRDY_Handler(void);
WEAK_ALIAS void ADC1_OTHER_Handler(void);
WEAK_ALIAS void ADC1_RESRDY_Handler(void);
WEAK_ALIAS void AC_Handler(void);
WEAK_ALIAS void DAC_OTHER_Handler(void);
WEAK_ALIAS void DAC_EMPTY_0_Handler(void);
WEAK_ALIAS void DAC_EMPTY_1_Handler(void);
WEAK_ALIAS void DAC_RESRDY_0_Handler(void);
WEAK_ALIAS void DAC_RESRDY_1_Handler(void);
WEAK_ALIAS void I2S_Handler(void);
WEAK_ALIAS void PCC_Handler(void);
WEAK_ALIAS void AES_Handler(void);
WEAK_ALIAS void TRNG_Handler(void);
WEAK_ALIAS void ICM_Handler(void);
WEAK_ALIAS void PUKCC_Handler(void);
WEAK_ALIAS void QSPI_Handler(void);
WEAK_ALIAS void SDHC0_Handler(void);
WEAK_ALIAS void SDHC1_Handler(void);
__attribute__((section(".vectors"))) void (*const tab[16 + 138])(void) = {
_estack,
Reset_Handler,
NMI_Handler,
HardFault_Handler,
MemoryManagement_Handler,
BusFault_Handler,
UsageFault_Handler,
NULL,
NULL,
NULL,
NULL,
SVCall_Handler,
DebugMonitor_Handler,
NULL,
PendSV_Handler,
SysTick_Handler,
PM_Handler, // 0 Power
MCLK_Handler, // 1 Main
OSCCTRL_XOSC0_Handler, // 2 Oscillators
OSCCTRL_XOSC1_Handler, // 3 Oscillators
OSCCTRL_DFLL_Handler, // 4 Oscillators
OSCCTRL_DPLL0_Handler, // 5 Oscillators
OSCCTRL_DPLL1_Handler, // 6 Oscillators
OSC32KCTRL_Handler, // 7 32kHz
SUPC_OTHER_Handler, // 8 Supply
SUPC_BODDET_Handler, // 9 Supply
WDT_Handler, // 10 Watchdog
RTC_Handler, // 11 Real-Time
EIC_EXTINT_0_Handler, // 12 External
EIC_EXTINT_1_Handler, // 13 External
EIC_EXTINT_2_Handler, // 14 External
EIC_EXTINT_3_Handler, // 15 External
EIC_EXTINT_4_Handler, // 16 External
EIC_EXTINT_5_Handler, // 17 External
EIC_EXTINT_6_Handler, // 18 External
EIC_EXTINT_7_Handler, // 19 External
EIC_EXTINT_8_Handler, // 20 External
EIC_EXTINT_9_Handler, // 21 External
EIC_EXTINT_10_Handler, // 22 External
EIC_EXTINT_11_Handler, // 23 External
EIC_EXTINT_12_Handler, // 24 External
EIC_EXTINT_13_Handler, // 25 External
EIC_EXTINT_14_Handler, // 26 External
EIC_EXTINT_15_Handler, // 27 External
FREQM_Handler, // 28 Frequency
NVMCTRL_0_Handler, // 29 Non-Volatile
NVMCTRL_1_Handler, // 30 Non-Volatile
DMAC_0_Handler, // 31 Direct
DMAC_1_Handler, // 32 Direct
DMAC_2_Handler, // 33 Direct
DMAC_3_Handler, // 34 Direct
DMAC_OTHER_Handler, // 35 Direct
EVSYS_0_Handler, // 36 Event
EVSYS_1_Handler, // 37 Event
EVSYS_2_Handler, // 38 Event
EVSYS_3_Handler, // 39 Event
EVSYS_OTHER_Handler, // 40 Event
PAC_Handler, // 41 Peripheral
0, // 42 Reserved
0, // 43 Reserved
0, // 44 Reserved
RAMECC_Handler, // 45 RAM
SERCOM0_0_Handler, // 46 Serial
SERCOM0_1_Handler, // 47 Serial
SERCOM0_2_Handler, // 48 Serial
SERCOM0_OTHER_Handler, // 49 Serial
SERCOM1_0_Handler, // 50 Serial
SERCOM1_1_Handler, // 51 Serial
SERCOM1_2_Handler, // 52 Serial
SERCOM1_OTHER_Handler, // 53 Serial
SERCOM2_0_Handler, // 54 Serial
SERCOM2_1_Handler, // 55 Serial
SERCOM2_2_Handler, // 56 Serial
SERCOM2_OTHER_Handler, // 57 Serial
SERCOM3_0_Handler, // 58 Serial
SERCOM3_1_Handler, // 59 Serial
SERCOM3_2_Handler, // 60 Serial
SERCOM3_OTHER_Handler, // 61 Serial
SERCOM4_0_Handler, // 62 Serial
SERCOM4_1_Handler, // 63 Serial
SERCOM4_2_Handler, // 64 Serial
SERCOM4_OTHER_Handler, // 65 Serial
SERCOM5_0_Handler, // 66 Serial
SERCOM5_1_Handler, // 67 Serial
SERCOM5_2_Handler, // 68 Serial
SERCOM5_OTHER_Handler, // 69 Serial
SERCOM6_0_Handler, // 70 Serial
SERCOM6_1_Handler, // 71 Serial
SERCOM6_2_Handler, // 72 Serial
SERCOM6_OTHER_Handler, // 73 Serial
SERCOM7_0_Handler, // 74 Serial
SERCOM7_1_Handler, // 75 Serial
SERCOM7_2_Handler, // 76 Serial
SERCOM7_OTHER_Handler, // 77 Serial
CAN0_Handler, // 78 Control
CAN1_Handler, // 79 Control
USB_OTHER_Handler, // 80 Universal
USB_SOF_HSOF_Handler, // 81 Universal
USB_TRCPT0_Handler, // 82 Universal
USB_TRCPT1_Handler, // 83 Universal
GMAC_Handler, // 84 Ethernet
TCC0_OTHER_Handler, // 85 Timer
TCC0_MC0_Handler, // 86 Timer
TCC0_MC1_Handler, // 87 Timer
TCC0_MC2_Handler, // 88 Timer
TCC0_MC3_Handler, // 89 Timer
TCC0_MC4_Handler, // 90 Timer
TCC0_MC5_Handler, // 91 Timer
TCC1_OTHER_Handler, // 92 Timer
TCC1_MC0_Handler, // 93 Timer
TCC1_MC1_Handler, // 94 Timer
TCC1_MC2_Handler, // 95 Timer
TCC1_MC3_Handler, // 96 Timer
TCC2_OTHER_Handler, // 97 Timer
TCC2_MC0_Handler, // 98 Timer
TCC2_MC1_Handler, // 99 Timer
TCC2_MC2_Handler, // 100 Timer
TCC3_OTHER_Handler, // 101 Timer
TCC3_MC0_Handler, // 102 Timer
TCC3_MC1_Handler, // 103 Timer
TCC4_OTHER_Handler, // 104 Timer
TCC4_MC0_Handler, // 105 Timer
TCC4_MC1_Handler, // 106 Timer
TC0_Handler, // 107 Basic
TC1_Handler, // 108 Basic
TC2_Handler, // 109 Basic
TC3_Handler, // 110 Basic
TC4_Handler, // 111 Basic
TC5_Handler, // 112 Basic
TC6_Handler, // 113 Basic
TC7_Handler, // 114 Basic
PDEC_OTHER_Handler, // 115 Quadrature
PDEC_MC0_Handler, // 116 Quadrature
PDEC_MC1_Handler, // 117 Quadrature
ADC0_OTHER_Handler, // 118 Analog
ADC0_RESRDY_Handler, // 119 Analog
ADC1_OTHER_Handler, // 120 Analog
ADC1_RESRDY_Handler, // 121 Analog
AC_Handler, // 122 Analog
DAC_OTHER_Handler, // 123 Digital-to-Analog
DAC_EMPTY_0_Handler, // 124 Digital-to-Analog
DAC_EMPTY_1_Handler, // 125 Digital-to-Analog
DAC_RESRDY_0_Handler, // 126 Digital-to-Analog
DAC_RESRDY_1_Handler, // 127 Digital-to-Analog
I2S_Handler, // 128 Inter-IC
PCC_Handler, // 129 Parallel
AES_Handler, // 130 Advanced
TRNG_Handler, // 131 True
ICM_Handler, // 132 Integrity
PUKCC_Handler, // 133 PUblic-Key
QSPI_Handler, // 134 Quad
SDHC0_Handler, // 135 SD/MMC
SDHC1_Handler // 136 SD/MMC
};
__attribute__((naked, noreturn)) void Reset_Handler(void) {
// Clear BSS section, and copy data section from flash to RAM
extern long _sbss, _ebss, _sdata, _edata, _sidata;
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
SCB->VTOR = (uint32_t) &tab;
SystemInit();
// Call main()
extern void main(void);
main();
for (;;) (void) 0; // Infinite loop
}
void Default_Handler(void) {
for (;;) (void) 0;
}
@@ -1,89 +0,0 @@
// Copyright (c) 2022 Cesanta Software Limited
// All rights reserved
#include <sys/stat.h>
#include "hal.h"
int _fstat(int fd, struct stat *st) {
if (fd < 0) return -1;
st->st_mode = S_IFCHR;
return 0;
}
void *_sbrk(int incr) {
extern char _end;
static unsigned char *heap = NULL;
unsigned char *prev_heap;
if (heap == NULL) heap = (unsigned char *) &_end;
prev_heap = heap;
heap += incr;
return prev_heap;
}
int _open(const char *path) {
(void) path;
return -1;
}
int _close(int fd) {
(void) fd;
return -1;
}
int _isatty(int fd) {
(void) fd;
return 1;
}
int _lseek(int fd, int ptr, int dir) {
(void) fd, (void) ptr, (void) dir;
return 0;
}
void _exit(int status) {
(void) status;
for (;;) asm volatile("BKPT #0");
}
void _kill(int pid, int sig) {
(void) pid, (void) sig;
}
int _getpid(void) {
return -1;
}
int _write(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
return -1;
}
int _read(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
return -1;
}
int _link(const char *a, const char *b) {
(void) a, (void) b;
return -1;
}
int _unlink(const char *a) {
(void) a;
return -1;
}
int _stat(const char *path, struct stat *st) {
(void) path, (void) st;
return -1;
}
int mkdir(const char *path, mode_t mode) {
(void) path, (void) mode;
return -1;
}
void _init(void) {
}
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../../../mongoose.c
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../../../mongoose.h
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../../nxp
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../../pico-sdk/
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../../renesas
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../../ti
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../../wch
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../../zephyr/device-dashboard