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move vendors -> tutorials
This commit is contained in:
Sergio R. Caprile committed
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@@ -0,0 +1 @@
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../../infineon/
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@@ -0,0 +1,53 @@
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CFLAGS = -W -Wall -Wextra -Wundef -Wshadow -Wdouble-promotion
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||||
CFLAGS += -Wformat-truncation -fno-common -Wconversion
|
||||
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
|
||||
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include
|
||||
CFLAGS += -D__SAME54P20A__ -Icmsis_sam/include
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||||
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=softfp
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LDFLAGS ?= -Tlink.ld -nostartfiles -nostdlib --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
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SOURCES = main.c syscalls.c startup.c
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# Mongoose-specific source code files and build options. See https://mongoose.ws/documentation/#build-options
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SOURCES += mongoose.c net.c packed_fs.c
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CFLAGS += -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_NEWLIB -DMG_ENABLE_CUSTOM_MILLIS=1 -DMG_ENABLE_LINES=1
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CFLAGS += -DMG_ENABLE_DRIVER_SAME54=1 -DMG_ENABLE_CUSTOM_RANDOM=1 -DMG_ENABLE_PACKED_FS=1 $(CFLAGS_EXTRA)
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|
||||
# Example specific build options. See README.md
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CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
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||||
|
||||
ifeq ($(OS),Windows_NT)
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||||
RM = cmd /C del /Q /F
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else
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RM = rm -rf
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endif
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||||
|
||||
build: firmware.bin
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|
||||
firmware.bin: firmware.elf
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arm-none-eabi-objcopy -O binary $< $@
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|
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firmware.elf: cmsis_core cmsis_sam hal.h link.ld Makefile $(SOURCES)
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arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(CFLAGS_EXTRA) $(LDFLAGS) -o $@
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flash: firmware.bin
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bossac -p /dev/cu.usb* -w -v -b $<
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|
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cmsis_core:
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git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
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||||
cmsis_sam:
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curl -sL https://packs.download.microchip.com/Microchip.SAME54_DFP.3.9.244.atpack -o $@.zip
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mkdir $@ && cd $@ && unzip ../$@.zip
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||||
|
||||
# Automated test via https://vcon.io/automated-firmware-tests/. Set VCON_API_KEY and update DEVICE_URL
|
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DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/9
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update: firmware.bin
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curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
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||||
|
||||
test update: CFLAGS += -DUART_DEBUG=USART1
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||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
|
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grep 'READY, IP:' /tmp/output.txt # Check for network init
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||||
|
||||
clean:
|
||||
$(RM) firmware.* cmsis_core cmsis_sam *.zip
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@@ -0,0 +1,219 @@
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// Copyright (c) 2022 Cesanta Software Limited
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// SPDX-License-Identifier: MIT
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||||
//
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// https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/DataSheets/SAM-D5x-E5x-Family-Data-Sheet-DS60001507.pdf
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// https://ww1.microchip.com/downloads/en/DeviceDoc/70005321A.pdf
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|
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#ifndef LED_PIN
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#define LED_PIN PIN('C', 18)
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#endif
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|
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#ifndef BUTTON_PIN
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#define BUTTON_PIN PIN('B', 31)
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#endif
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|
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#ifndef UART_DEBUG
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#define UART_DEBUG USART1
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#endif
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|
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#pragma once
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#include <sam.h>
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|
||||
#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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|
||||
#define BIT(x) (1UL << (x))
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#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
|
||||
#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
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||||
#define PINNO(pin) (pin & 255)
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||||
#define PINBANK(pin) (pin >> 8)
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|
||||
static inline void spin(volatile uint32_t count) {
|
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while (count--) (void) 0;
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}
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||||
static inline uint32_t clock_sys_freq(void) {
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return 48000000U;
|
||||
}
|
||||
|
||||
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
|
||||
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
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||||
enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
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enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
|
||||
#define GPIO(N) ((port_group_registers_t *) (PORT_BASE_ADDRESS + 0x80 * (N)))
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typedef port_group_registers_t GPIO_TypeDef;
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static inline GPIO_TypeDef *gpio_bank(uint16_t pin) {
|
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return GPIO(PINBANK(pin));
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||||
}
|
||||
static inline void gpio_toggle(uint16_t pin) {
|
||||
gpio_bank(pin)->PORT_OUTTGL = BIT(PINNO(pin));
|
||||
}
|
||||
static inline bool gpio_read(uint16_t pin) {
|
||||
return gpio_bank(pin)->PORT_IN & BIT(PINNO(pin));
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||||
}
|
||||
static inline void gpio_write(uint16_t pin, bool val) {
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GPIO_TypeDef *gpio = gpio_bank(pin);
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if (val) {
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gpio->PORT_OUTSET = BIT(PINNO(pin));
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} else {
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gpio->PORT_OUTCLR = BIT(PINNO(pin));
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||||
}
|
||||
}
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static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
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uint8_t speed, uint8_t pull, uint8_t af) {
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(void) type, (void) speed, (void) pull, (void) af;
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GPIO_TypeDef *gpio = gpio_bank(pin);
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uint32_t mask = BIT(PINNO(pin));
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MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
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if (mode == GPIO_MODE_INPUT) {
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gpio->PORT_DIRCLR = mask;
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} else {
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gpio->PORT_DIRSET = mask;
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||||
}
|
||||
}
|
||||
static inline void gpio_input(uint16_t pin) {
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gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
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||||
GPIO_PULL_NONE, 0);
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||||
}
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||||
static inline void gpio_output(uint16_t pin) {
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gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
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GPIO_PULL_NONE, 0);
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}
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typedef sercom_usart_int_registers_t USART_TypeDef;
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#define USART1 ((USART_TypeDef *) SERCOM0_BASE_ADDRESS)
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#define USART2 ((USART_TypeDef *) SERCOM1_BASE_ADDRESS)
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#define USART3 ((USART_TypeDef *) SERCOM2_BASE_ADDRESS)
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static inline bool uart_init(USART_TypeDef *uart, unsigned long baud) {
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uint16_t rx = 0, tx = 0; // Pins
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uint8_t rx_mux = 0, tx_mux = 0;
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if (uart == USART1) {
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MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM0_Msk;
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GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_CORE] =
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GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN_Msk;
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GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_SLOW] =
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GCLK_PCHCTRL_GEN_GCLK3 | GCLK_PCHCTRL_CHEN_Msk;
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tx = PIN('A', 4), rx = PIN('A', 5);
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rx_mux = MUX_PA05D_SERCOM0_PAD1, tx_mux = MUX_PA04D_SERCOM0_PAD0;
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} else if (uart == USART2) {
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MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM1_Msk;
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tx = PIN('C', 27), rx = PIN('C', 28);
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} else if (uart == USART3) {
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MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_SERCOM2_Msk;
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tx = PIN('A', 9), rx = PIN('A', 8);
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} else {
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return false;
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}
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gpio_bank(rx)->PORT_WRCONFIG =
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PORT_WRCONFIG_PMUX(rx_mux) | PORT_WRCONFIG_WRPMUX(1) |
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PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(rx));
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gpio_bank(tx)->PORT_WRCONFIG =
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PORT_WRCONFIG_PMUX(tx_mux) | PORT_WRCONFIG_WRPMUX(1) |
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PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(tx));
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uart->SERCOM_CTRLA = SERCOM_USART_INT_CTRLA_DORD(1) |
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SERCOM_USART_INT_CTRLA_MODE(1 /* INT_CLK */) |
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SERCOM_USART_INT_CTRLA_RXPO(1 /* PAD1 */) |
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SERCOM_USART_INT_CTRLA_TXPO(0 /* PAD0 */) |
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SERCOM_USART_INT_CTRLA_SAMPR(1);
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uart->SERCOM_BAUD = (uint16_t) (clock_sys_freq() / (16 * baud));
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uart->SERCOM_CTRLB = SERCOM_USART_INT_CTRLB_RXEN(1) |
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SERCOM_USART_INT_CTRLB_TXEN(1) |
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SERCOM_USART_INT_CTRLB_CHSIZE(0);
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while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_CTRLB_Msk) spin(1);
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uart->SERCOM_CTRLA |= SERCOM_USART_INT_CTRLA_ENABLE(1);
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while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_ENABLE_Msk) spin(1);
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return true;
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}
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static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
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while (!(uart->SERCOM_INTFLAG & SERCOM_USART_INT_INTFLAG_DRE_Msk)) spin(1);
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uart->SERCOM_DATA = byte;
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}
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static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
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while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
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}
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static inline bool uart_read_ready(USART_TypeDef *uart) {
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return (uart->SERCOM_INTFLAG & SERCOM_USART_EXT_INTFLAG_RXC_Msk);
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}
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static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
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return (uint8_t) (uart->SERCOM_DATA & 255U);
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}
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static inline void rng_init(void) {
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MCLK_REGS->MCLK_APBCMASK |= MCLK_APBCMASK_TRNG_Msk;
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TRNG_REGS->TRNG_CTRLA = TRNG_CTRLA_ENABLE_Msk;
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}
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static inline uint32_t rng_read(void) {
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while ((TRNG_REGS->TRNG_INTFLAG & TRNG_INTFLAG_DATARDY_Msk) == 0) spin(1);
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return TRNG_REGS->TRNG_DATA;
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}
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#define UID_BASE_W0 0x008061FC // Word 0 location of the 128-bit chip ID
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#define UID_BASE_W1_3 0x00806010 // Words 1-3 location of the 128-bit chip ID
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#define UUID(n) ((n >= 0 && n <= 3) ? \
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(((uint8_t *) UID_BASE_W0)[n]) : \
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(((uint8_t *) UID_BASE_W1_3)[n - 4]))
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#define GENERATE_LOCALLY_ADMINISTERED_MAC() \
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{ \
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||||
2, UUID(0) ^ UUID(1) ^ UUID(2), UUID(3) ^ UUID(4) ^ UUID(5), \
|
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UUID(6) ^ UUID(7) ^ UUID(8), UUID(9) ^ UUID(10) ^ UUID(11), \
|
||||
UUID(12) ^ UUID(13) ^ UUID(14) ^ UUID(15) \
|
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}
|
||||
|
||||
static inline bool timer_expired(volatile uint64_t *t, uint64_t prd,
|
||||
uint64_t now) {
|
||||
if (now + prd < *t) *t = 0; // Time wrapped? Reset timer
|
||||
if (*t == 0) *t = now + prd; // Firt poll? Set expiration
|
||||
if (*t > now) return false; // Not expired yet, return
|
||||
*t = (now - *t) > prd ? now + prd : *t + prd; // Next expiration time
|
||||
return true; // Expired, return true
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}
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|
||||
static inline void clock_init(void) {
|
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SCB->CPACR |= (15U << 20); // Enable FPU
|
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SysTick_Config(clock_sys_freq() / 1000); // Sys tick every 1ms
|
||||
}
|
||||
|
||||
static inline void gpio_set_irq_handler(uint16_t pin, void (*fn)(void *),
|
||||
void *arg) {
|
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(void) pin, (void) fn, (void) arg;
|
||||
}
|
||||
|
||||
static inline void ethernet_init(void) {
|
||||
uint16_t pins[] = {PIN('A', 12), PIN('A', 13), PIN('A', 14), PIN('A', 15),
|
||||
PIN('A', 17), PIN('A', 18), PIN('A', 19), PIN('C', 11),
|
||||
PIN('C', 12), PIN('C', 20)};
|
||||
uint32_t af[] = {MUX_PA12L_GMAC_GRX1, MUX_PA13L_GMAC_GRX0,
|
||||
MUX_PA14L_GMAC_GTXCK, MUX_PA15L_GMAC_GRXER,
|
||||
MUX_PA17L_GMAC_GTXEN, MUX_PA18L_GMAC_GTX0,
|
||||
MUX_PA19L_GMAC_GTX1, MUX_PC11L_GMAC_GMDC,
|
||||
MUX_PC12L_GMAC_GMDIO, MUX_PC20L_GMAC_GRXDV};
|
||||
|
||||
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
|
||||
|
||||
for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
|
||||
int bank = PINBANK(pins[i]), no = PINNO(pins[i]);
|
||||
PORT_REGS->GROUP[bank].PORT_PINCFG[no] |= PORT_PINCFG_PMUXEN_Msk;
|
||||
volatile uint8_t *m = &PORT_REGS->GROUP[bank].PORT_PMUX[no / 2], v = m[0];
|
||||
if (no & 1) {
|
||||
m[0] = (uint8_t) ((v & ~0xf0) | PORT_PMUX_PMUXO(af[i]));
|
||||
} else {
|
||||
m[0] = (uint8_t) ((v & ~0x0f) | PORT_PMUX_PMUXE(af[i]));
|
||||
}
|
||||
}
|
||||
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[17] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[18] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[19] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
|
||||
// Reset PHY
|
||||
uint16_t phy_pin = PIN('C', 21);
|
||||
gpio_output(phy_pin);
|
||||
gpio_write(phy_pin, false);
|
||||
spin(999);
|
||||
gpio_write(phy_pin, true);
|
||||
spin(999);
|
||||
}
|
||||
@@ -0,0 +1,25 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
flash(rx) : ORIGIN = 0x00000000, LENGTH = 1024k
|
||||
sram(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
|
||||
}
|
||||
_estack = ORIGIN(sram) + LENGTH(sram);
|
||||
|
||||
SECTIONS {
|
||||
.vectors : { FILL(256) KEEP(*(.vectors)) } > flash
|
||||
.text : { *(.text*) } > flash
|
||||
.rodata : { *(.rodata*) } > flash
|
||||
|
||||
.data : {
|
||||
_sdata = .;
|
||||
*(.first_data)
|
||||
*(.data SORT(.data.*))
|
||||
_edata = .;
|
||||
} > sram AT > flash
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
|
||||
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
}
|
||||
@@ -0,0 +1,79 @@
|
||||
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include "hal.h"
|
||||
#include "mongoose.h"
|
||||
#include "net.h"
|
||||
|
||||
#define BLINK_PERIOD_MS 500 // LED blinking period in millis
|
||||
#define LOG_PERIOD_MS 1000 // Info log period in millis
|
||||
|
||||
void SystemInit(void) { // Called automatically by startup code
|
||||
clock_init();
|
||||
rng_init();
|
||||
}
|
||||
|
||||
static volatile uint64_t s_ticks; // Milliseconds since boot
|
||||
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
|
||||
s_ticks++;
|
||||
}
|
||||
|
||||
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
|
||||
return s_ticks; // Return number of milliseconds since boot
|
||||
}
|
||||
|
||||
bool mg_random(void *buf, size_t len) { // Use on-board RNG
|
||||
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
|
||||
uint32_t r = rng_read();
|
||||
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
static void timer_fn(void *arg) {
|
||||
struct mg_tcpip_if *ifp = arg; // show network stats
|
||||
const char *names[] = {"down", "up", "req", "ready"};
|
||||
MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
|
||||
names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
|
||||
ifp->ndrop, ifp->nerr));
|
||||
}
|
||||
|
||||
int main(void) {
|
||||
gpio_input(BUTTON_PIN);
|
||||
gpio_output(LED_PIN);
|
||||
uart_init(UART_DEBUG, 115200);
|
||||
ethernet_init();
|
||||
|
||||
MG_INFO(("Starting, CPU freq %g MHz", (double) clock_sys_freq() / 1000000));
|
||||
|
||||
struct mg_mgr mgr; // Initialise
|
||||
mg_mgr_init(&mgr); // Mongoose event manager
|
||||
mg_log_set(MG_LL_DEBUG); // Set log level
|
||||
|
||||
// Initialise Mongoose network stack
|
||||
struct mg_tcpip_driver_same54_data driver_data = {.mdc_cr = 5};
|
||||
struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC()/*{2, 3, 4, 5, 6, 7}*/,
|
||||
// Uncomment below for static configuration:
|
||||
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
|
||||
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
|
||||
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
|
||||
.driver = &mg_tcpip_driver_same54,
|
||||
.driver_data = &driver_data};
|
||||
mg_tcpip_init(&mgr, &mif);
|
||||
mg_timer_add(&mgr, LOG_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
|
||||
|
||||
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
|
||||
while (mif.state != MG_TCPIP_STATE_READY) {
|
||||
mg_mgr_poll(&mgr, 0);
|
||||
}
|
||||
|
||||
MG_INFO(("Initialising application..."));
|
||||
web_init(&mgr);
|
||||
|
||||
MG_INFO(("Starting event loop"));
|
||||
for (;;) {
|
||||
mg_mgr_poll(&mgr, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1 @@
|
||||
../../../../../mongoose.c
|
||||
@@ -0,0 +1 @@
|
||||
../../../../../mongoose.h
|
||||
@@ -0,0 +1 @@
|
||||
../../net.c
|
||||
@@ -0,0 +1 @@
|
||||
../../net.h
|
||||
@@ -0,0 +1 @@
|
||||
../../packed_fs.c
|
||||
@@ -0,0 +1,332 @@
|
||||
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
void Reset_Handler(void); // Defined below
|
||||
void Dummy_Handler(void); // Defined below
|
||||
void SysTick_Handler(void); // Defined in main.c
|
||||
void SystemInit(void); // Defined in main.c, called by reset handler
|
||||
void _estack(void); // Defined in link.ld
|
||||
|
||||
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
|
||||
|
||||
WEAK_ALIAS void NMI_Handler(void);
|
||||
WEAK_ALIAS void HardFault_Handler(void);
|
||||
WEAK_ALIAS void MemoryManagement_Handler(void);
|
||||
WEAK_ALIAS void BusFault_Handler(void);
|
||||
WEAK_ALIAS void UsageFault_Handler(void);
|
||||
WEAK_ALIAS void SVCall_Handler(void);
|
||||
WEAK_ALIAS void DebugMonitor_Handler(void);
|
||||
WEAK_ALIAS void PendSV_Handler(void);
|
||||
WEAK_ALIAS void SysTick_Handler(void);
|
||||
|
||||
WEAK_ALIAS void PM_Handler(void);
|
||||
WEAK_ALIAS void MCLK_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_XOSC0_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_XOSC1_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DFLL_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DPLL0_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DPLL1_Handler(void);
|
||||
WEAK_ALIAS void OSC32KCTRL_Handler(void);
|
||||
WEAK_ALIAS void SUPC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SUPC_BODDET_Handler(void);
|
||||
WEAK_ALIAS void WDT_Handler(void);
|
||||
WEAK_ALIAS void RTC_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_0_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_1_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_2_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_3_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_4_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_5_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_6_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_7_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_8_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_9_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_10_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_11_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_12_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_13_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_14_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_15_Handler(void);
|
||||
WEAK_ALIAS void FREQM_Handler(void);
|
||||
WEAK_ALIAS void NVMCTRL_0_Handler(void);
|
||||
WEAK_ALIAS void NVMCTRL_1_Handler(void);
|
||||
WEAK_ALIAS void DMAC_0_Handler(void);
|
||||
WEAK_ALIAS void DMAC_1_Handler(void);
|
||||
WEAK_ALIAS void DMAC_2_Handler(void);
|
||||
WEAK_ALIAS void DMAC_3_Handler(void);
|
||||
WEAK_ALIAS void DMAC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_0_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_1_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_2_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_3_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_OTHER_Handler(void);
|
||||
WEAK_ALIAS void PAC_Handler(void);
|
||||
WEAK_ALIAS void RAMECC_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_OTHER_Handler(void);
|
||||
WEAK_ALIAS void CAN0_Handler(void);
|
||||
WEAK_ALIAS void CAN1_Handler(void);
|
||||
WEAK_ALIAS void USB_OTHER_Handler(void);
|
||||
WEAK_ALIAS void USB_SOF_HSOF_Handler(void);
|
||||
WEAK_ALIAS void USB_TRCPT0_Handler(void);
|
||||
WEAK_ALIAS void USB_TRCPT1_Handler(void);
|
||||
WEAK_ALIAS void GMAC_Handler(void);
|
||||
WEAK_ALIAS void TCC0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC3_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC4_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC5_Handler(void);
|
||||
WEAK_ALIAS void TCC1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC3_Handler(void);
|
||||
WEAK_ALIAS void TCC2_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC3_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC3_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC3_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC4_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC4_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC4_MC1_Handler(void);
|
||||
WEAK_ALIAS void TC0_Handler(void);
|
||||
WEAK_ALIAS void TC1_Handler(void);
|
||||
WEAK_ALIAS void TC2_Handler(void);
|
||||
WEAK_ALIAS void TC3_Handler(void);
|
||||
WEAK_ALIAS void TC4_Handler(void);
|
||||
WEAK_ALIAS void TC5_Handler(void);
|
||||
WEAK_ALIAS void TC6_Handler(void);
|
||||
WEAK_ALIAS void TC7_Handler(void);
|
||||
WEAK_ALIAS void PDEC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void PDEC_MC0_Handler(void);
|
||||
WEAK_ALIAS void PDEC_MC1_Handler(void);
|
||||
WEAK_ALIAS void ADC0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void ADC0_RESRDY_Handler(void);
|
||||
WEAK_ALIAS void ADC1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void ADC1_RESRDY_Handler(void);
|
||||
WEAK_ALIAS void AC_Handler(void);
|
||||
WEAK_ALIAS void DAC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void DAC_EMPTY_0_Handler(void);
|
||||
WEAK_ALIAS void DAC_EMPTY_1_Handler(void);
|
||||
WEAK_ALIAS void DAC_RESRDY_0_Handler(void);
|
||||
WEAK_ALIAS void DAC_RESRDY_1_Handler(void);
|
||||
WEAK_ALIAS void I2S_Handler(void);
|
||||
WEAK_ALIAS void PCC_Handler(void);
|
||||
WEAK_ALIAS void AES_Handler(void);
|
||||
WEAK_ALIAS void TRNG_Handler(void);
|
||||
WEAK_ALIAS void ICM_Handler(void);
|
||||
WEAK_ALIAS void PUKCC_Handler(void);
|
||||
WEAK_ALIAS void QSPI_Handler(void);
|
||||
WEAK_ALIAS void SDHC0_Handler(void);
|
||||
WEAK_ALIAS void SDHC1_Handler(void);
|
||||
|
||||
__attribute__((section(".vectors"))) void (*const tab[16 + 138])(void) = {
|
||||
_estack,
|
||||
Reset_Handler,
|
||||
NMI_Handler,
|
||||
HardFault_Handler,
|
||||
MemoryManagement_Handler,
|
||||
BusFault_Handler,
|
||||
UsageFault_Handler,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
SVCall_Handler,
|
||||
DebugMonitor_Handler,
|
||||
NULL,
|
||||
PendSV_Handler,
|
||||
SysTick_Handler,
|
||||
PM_Handler, // 0 Power
|
||||
MCLK_Handler, // 1 Main
|
||||
OSCCTRL_XOSC0_Handler, // 2 Oscillators
|
||||
OSCCTRL_XOSC1_Handler, // 3 Oscillators
|
||||
OSCCTRL_DFLL_Handler, // 4 Oscillators
|
||||
OSCCTRL_DPLL0_Handler, // 5 Oscillators
|
||||
OSCCTRL_DPLL1_Handler, // 6 Oscillators
|
||||
OSC32KCTRL_Handler, // 7 32kHz
|
||||
SUPC_OTHER_Handler, // 8 Supply
|
||||
SUPC_BODDET_Handler, // 9 Supply
|
||||
WDT_Handler, // 10 Watchdog
|
||||
RTC_Handler, // 11 Real-Time
|
||||
EIC_EXTINT_0_Handler, // 12 External
|
||||
EIC_EXTINT_1_Handler, // 13 External
|
||||
EIC_EXTINT_2_Handler, // 14 External
|
||||
EIC_EXTINT_3_Handler, // 15 External
|
||||
EIC_EXTINT_4_Handler, // 16 External
|
||||
EIC_EXTINT_5_Handler, // 17 External
|
||||
EIC_EXTINT_6_Handler, // 18 External
|
||||
EIC_EXTINT_7_Handler, // 19 External
|
||||
EIC_EXTINT_8_Handler, // 20 External
|
||||
EIC_EXTINT_9_Handler, // 21 External
|
||||
EIC_EXTINT_10_Handler, // 22 External
|
||||
EIC_EXTINT_11_Handler, // 23 External
|
||||
EIC_EXTINT_12_Handler, // 24 External
|
||||
EIC_EXTINT_13_Handler, // 25 External
|
||||
EIC_EXTINT_14_Handler, // 26 External
|
||||
EIC_EXTINT_15_Handler, // 27 External
|
||||
FREQM_Handler, // 28 Frequency
|
||||
NVMCTRL_0_Handler, // 29 Non-Volatile
|
||||
NVMCTRL_1_Handler, // 30 Non-Volatile
|
||||
DMAC_0_Handler, // 31 Direct
|
||||
DMAC_1_Handler, // 32 Direct
|
||||
DMAC_2_Handler, // 33 Direct
|
||||
DMAC_3_Handler, // 34 Direct
|
||||
DMAC_OTHER_Handler, // 35 Direct
|
||||
EVSYS_0_Handler, // 36 Event
|
||||
EVSYS_1_Handler, // 37 Event
|
||||
EVSYS_2_Handler, // 38 Event
|
||||
EVSYS_3_Handler, // 39 Event
|
||||
EVSYS_OTHER_Handler, // 40 Event
|
||||
PAC_Handler, // 41 Peripheral
|
||||
0, // 42 Reserved
|
||||
0, // 43 Reserved
|
||||
0, // 44 Reserved
|
||||
RAMECC_Handler, // 45 RAM
|
||||
SERCOM0_0_Handler, // 46 Serial
|
||||
SERCOM0_1_Handler, // 47 Serial
|
||||
SERCOM0_2_Handler, // 48 Serial
|
||||
SERCOM0_OTHER_Handler, // 49 Serial
|
||||
SERCOM1_0_Handler, // 50 Serial
|
||||
SERCOM1_1_Handler, // 51 Serial
|
||||
SERCOM1_2_Handler, // 52 Serial
|
||||
SERCOM1_OTHER_Handler, // 53 Serial
|
||||
SERCOM2_0_Handler, // 54 Serial
|
||||
SERCOM2_1_Handler, // 55 Serial
|
||||
SERCOM2_2_Handler, // 56 Serial
|
||||
SERCOM2_OTHER_Handler, // 57 Serial
|
||||
SERCOM3_0_Handler, // 58 Serial
|
||||
SERCOM3_1_Handler, // 59 Serial
|
||||
SERCOM3_2_Handler, // 60 Serial
|
||||
SERCOM3_OTHER_Handler, // 61 Serial
|
||||
SERCOM4_0_Handler, // 62 Serial
|
||||
SERCOM4_1_Handler, // 63 Serial
|
||||
SERCOM4_2_Handler, // 64 Serial
|
||||
SERCOM4_OTHER_Handler, // 65 Serial
|
||||
SERCOM5_0_Handler, // 66 Serial
|
||||
SERCOM5_1_Handler, // 67 Serial
|
||||
SERCOM5_2_Handler, // 68 Serial
|
||||
SERCOM5_OTHER_Handler, // 69 Serial
|
||||
SERCOM6_0_Handler, // 70 Serial
|
||||
SERCOM6_1_Handler, // 71 Serial
|
||||
SERCOM6_2_Handler, // 72 Serial
|
||||
SERCOM6_OTHER_Handler, // 73 Serial
|
||||
SERCOM7_0_Handler, // 74 Serial
|
||||
SERCOM7_1_Handler, // 75 Serial
|
||||
SERCOM7_2_Handler, // 76 Serial
|
||||
SERCOM7_OTHER_Handler, // 77 Serial
|
||||
CAN0_Handler, // 78 Control
|
||||
CAN1_Handler, // 79 Control
|
||||
USB_OTHER_Handler, // 80 Universal
|
||||
USB_SOF_HSOF_Handler, // 81 Universal
|
||||
USB_TRCPT0_Handler, // 82 Universal
|
||||
USB_TRCPT1_Handler, // 83 Universal
|
||||
GMAC_Handler, // 84 Ethernet
|
||||
TCC0_OTHER_Handler, // 85 Timer
|
||||
TCC0_MC0_Handler, // 86 Timer
|
||||
TCC0_MC1_Handler, // 87 Timer
|
||||
TCC0_MC2_Handler, // 88 Timer
|
||||
TCC0_MC3_Handler, // 89 Timer
|
||||
TCC0_MC4_Handler, // 90 Timer
|
||||
TCC0_MC5_Handler, // 91 Timer
|
||||
TCC1_OTHER_Handler, // 92 Timer
|
||||
TCC1_MC0_Handler, // 93 Timer
|
||||
TCC1_MC1_Handler, // 94 Timer
|
||||
TCC1_MC2_Handler, // 95 Timer
|
||||
TCC1_MC3_Handler, // 96 Timer
|
||||
TCC2_OTHER_Handler, // 97 Timer
|
||||
TCC2_MC0_Handler, // 98 Timer
|
||||
TCC2_MC1_Handler, // 99 Timer
|
||||
TCC2_MC2_Handler, // 100 Timer
|
||||
TCC3_OTHER_Handler, // 101 Timer
|
||||
TCC3_MC0_Handler, // 102 Timer
|
||||
TCC3_MC1_Handler, // 103 Timer
|
||||
TCC4_OTHER_Handler, // 104 Timer
|
||||
TCC4_MC0_Handler, // 105 Timer
|
||||
TCC4_MC1_Handler, // 106 Timer
|
||||
TC0_Handler, // 107 Basic
|
||||
TC1_Handler, // 108 Basic
|
||||
TC2_Handler, // 109 Basic
|
||||
TC3_Handler, // 110 Basic
|
||||
TC4_Handler, // 111 Basic
|
||||
TC5_Handler, // 112 Basic
|
||||
TC6_Handler, // 113 Basic
|
||||
TC7_Handler, // 114 Basic
|
||||
PDEC_OTHER_Handler, // 115 Quadrature
|
||||
PDEC_MC0_Handler, // 116 Quadrature
|
||||
PDEC_MC1_Handler, // 117 Quadrature
|
||||
ADC0_OTHER_Handler, // 118 Analog
|
||||
ADC0_RESRDY_Handler, // 119 Analog
|
||||
ADC1_OTHER_Handler, // 120 Analog
|
||||
ADC1_RESRDY_Handler, // 121 Analog
|
||||
AC_Handler, // 122 Analog
|
||||
DAC_OTHER_Handler, // 123 Digital-to-Analog
|
||||
DAC_EMPTY_0_Handler, // 124 Digital-to-Analog
|
||||
DAC_EMPTY_1_Handler, // 125 Digital-to-Analog
|
||||
DAC_RESRDY_0_Handler, // 126 Digital-to-Analog
|
||||
DAC_RESRDY_1_Handler, // 127 Digital-to-Analog
|
||||
I2S_Handler, // 128 Inter-IC
|
||||
PCC_Handler, // 129 Parallel
|
||||
AES_Handler, // 130 Advanced
|
||||
TRNG_Handler, // 131 True
|
||||
ICM_Handler, // 132 Integrity
|
||||
PUKCC_Handler, // 133 PUblic-Key
|
||||
QSPI_Handler, // 134 Quad
|
||||
SDHC0_Handler, // 135 SD/MMC
|
||||
SDHC1_Handler // 136 SD/MMC
|
||||
};
|
||||
|
||||
__attribute__((naked, noreturn)) void Reset_Handler(void) {
|
||||
// Clear BSS section, and copy data section from flash to RAM
|
||||
extern long _sbss, _ebss, _sdata, _edata, _sidata;
|
||||
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
|
||||
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
|
||||
|
||||
SCB->VTOR = (uint32_t) &tab;
|
||||
SystemInit();
|
||||
|
||||
// Call main()
|
||||
extern void main(void);
|
||||
main();
|
||||
for (;;) (void) 0; // Infinite loop
|
||||
}
|
||||
|
||||
void Default_Handler(void) {
|
||||
for (;;) (void) 0;
|
||||
}
|
||||
@@ -0,0 +1,89 @@
|
||||
// Copyright (c) 2022 Cesanta Software Limited
|
||||
// All rights reserved
|
||||
|
||||
#include <sys/stat.h>
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
int _fstat(int fd, struct stat *st) {
|
||||
if (fd < 0) return -1;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void *_sbrk(int incr) {
|
||||
extern char _end;
|
||||
static unsigned char *heap = NULL;
|
||||
unsigned char *prev_heap;
|
||||
if (heap == NULL) heap = (unsigned char *) &_end;
|
||||
prev_heap = heap;
|
||||
heap += incr;
|
||||
return prev_heap;
|
||||
}
|
||||
|
||||
int _open(const char *path) {
|
||||
(void) path;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _close(int fd) {
|
||||
(void) fd;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _isatty(int fd) {
|
||||
(void) fd;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int fd, int ptr, int dir) {
|
||||
(void) fd, (void) ptr, (void) dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void _exit(int status) {
|
||||
(void) status;
|
||||
for (;;) asm volatile("BKPT #0");
|
||||
}
|
||||
|
||||
void _kill(int pid, int sig) {
|
||||
(void) pid, (void) sig;
|
||||
}
|
||||
|
||||
int _getpid(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _write(int fd, char *ptr, int len) {
|
||||
(void) fd, (void) ptr, (void) len;
|
||||
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _read(int fd, char *ptr, int len) {
|
||||
(void) fd, (void) ptr, (void) len;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _link(const char *a, const char *b) {
|
||||
(void) a, (void) b;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(const char *a) {
|
||||
(void) a;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(const char *path, struct stat *st) {
|
||||
(void) path, (void) st;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int mkdir(const char *path, mode_t mode) {
|
||||
(void) path, (void) mode;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _init(void) {
|
||||
}
|
||||
+1
@@ -0,0 +1 @@
|
||||
../../nxp
|
||||
@@ -0,0 +1 @@
|
||||
../../pico-sdk/
|
||||
+1
@@ -0,0 +1 @@
|
||||
../../renesas
|
||||
+1
@@ -0,0 +1 @@
|
||||
../../stm32
|
||||
+1
@@ -0,0 +1 @@
|
||||
../../ti
|
||||
+1
@@ -0,0 +1 @@
|
||||
../../wch
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = xmc7200
|
||||
IDE = GCC+make
|
||||
RTOS = baremetal
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/??
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=xmc7200&ide=GCC+make&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,54 @@
|
||||
CFLAGS = -W -Wall -Wextra -Wundef -Wshadow -Wdouble-promotion
|
||||
CFLAGS += -Wformat-truncation -fno-common -Wconversion
|
||||
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
|
||||
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include
|
||||
CFLAGS += -D__SAME54P20A__ -Icmsis_sam/include
|
||||
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=softfp
|
||||
LDFLAGS ?= -Tlink.ld -nostartfiles -nostdlib --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
|
||||
|
||||
SOURCES = main.c syscalls.c startup.c
|
||||
|
||||
# Mongoose-specific source code files and build options. See https://mongoose.ws/documentation/#build-options
|
||||
SOURCES += mongoose.c
|
||||
CFLAGS += -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_NEWLIB -DMG_ENABLE_CUSTOM_MILLIS=1 -DMG_ENABLE_LINES=1
|
||||
CFLAGS += -DMG_ENABLE_DRIVER_SAME54=1 -DMG_ENABLE_CUSTOM_RANDOM=1 -DMG_ENABLE_PACKED_FS=1 $(CFLAGS_EXTRA)
|
||||
|
||||
# Example specific build options. See README.md
|
||||
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
|
||||
|
||||
ifeq ($(OS),Windows_NT)
|
||||
RM = cmd /C del /Q /F
|
||||
else
|
||||
RM = rm -rf
|
||||
endif
|
||||
|
||||
build: firmware.bin
|
||||
|
||||
firmware.bin: firmware.elf
|
||||
arm-none-eabi-objcopy -O binary $< $@
|
||||
|
||||
firmware.elf: cmsis_core cmsis_sam hal.h link.ld Makefile $(SOURCES)
|
||||
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(CFLAGS_EXTRA) $(LDFLAGS) -o $@
|
||||
|
||||
flash: firmware.bin
|
||||
bossac -p /dev/cu.usb* -w -v -b $<
|
||||
|
||||
cmsis_core:
|
||||
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
|
||||
cmsis_sam:
|
||||
curl -sL https://packs.download.microchip.com/Microchip.SAME54_DFP.3.9.244.atpack -o $@.zip
|
||||
mkdir $@ && cd $@ && unzip ../$@.zip
|
||||
|
||||
# Automated test via https://vcon.io/automated-firmware-tests/. Set VCON_API_KEY and update DEVICE_URL
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/9
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS += -DUART_DEBUG=USART1
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
grep 'RECEIVED hello' /tmp/output.txt # Check for MQTT success
|
||||
|
||||
clean:
|
||||
$(RM) firmware.* cmsis_core cmsis_sam *.zip
|
||||
@@ -0,0 +1,219 @@
|
||||
// Copyright (c) 2022 Cesanta Software Limited
|
||||
// SPDX-License-Identifier: MIT
|
||||
//
|
||||
// https://ww1.microchip.com/downloads/aemDocuments/documents/MCU32/ProductDocuments/DataSheets/SAM-D5x-E5x-Family-Data-Sheet-DS60001507.pdf
|
||||
// https://ww1.microchip.com/downloads/en/DeviceDoc/70005321A.pdf
|
||||
|
||||
#ifndef LED_PIN
|
||||
#define LED_PIN PIN('C', 18)
|
||||
#endif
|
||||
|
||||
#ifndef BUTTON_PIN
|
||||
#define BUTTON_PIN PIN('B', 31)
|
||||
#endif
|
||||
|
||||
#ifndef UART_DEBUG
|
||||
#define UART_DEBUG USART1
|
||||
#endif
|
||||
|
||||
#pragma once
|
||||
#include <sam.h>
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
|
||||
#define BIT(x) (1UL << (x))
|
||||
#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
|
||||
#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
|
||||
#define PINNO(pin) (pin & 255)
|
||||
#define PINBANK(pin) (pin >> 8)
|
||||
|
||||
static inline void spin(volatile uint32_t count) {
|
||||
while (count--) (void) 0;
|
||||
}
|
||||
|
||||
static inline uint32_t clock_sys_freq(void) {
|
||||
return 48000000U;
|
||||
}
|
||||
|
||||
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
|
||||
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
|
||||
enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
|
||||
enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
|
||||
#define GPIO(N) ((port_group_registers_t *) (PORT_BASE_ADDRESS + 0x80 * (N)))
|
||||
typedef port_group_registers_t GPIO_TypeDef;
|
||||
static inline GPIO_TypeDef *gpio_bank(uint16_t pin) {
|
||||
return GPIO(PINBANK(pin));
|
||||
}
|
||||
static inline void gpio_toggle(uint16_t pin) {
|
||||
gpio_bank(pin)->PORT_OUTTGL = BIT(PINNO(pin));
|
||||
}
|
||||
static inline bool gpio_read(uint16_t pin) {
|
||||
return gpio_bank(pin)->PORT_IN & BIT(PINNO(pin));
|
||||
}
|
||||
static inline void gpio_write(uint16_t pin, bool val) {
|
||||
GPIO_TypeDef *gpio = gpio_bank(pin);
|
||||
if (val) {
|
||||
gpio->PORT_OUTSET = BIT(PINNO(pin));
|
||||
} else {
|
||||
gpio->PORT_OUTCLR = BIT(PINNO(pin));
|
||||
}
|
||||
}
|
||||
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
|
||||
uint8_t speed, uint8_t pull, uint8_t af) {
|
||||
(void) type, (void) speed, (void) pull, (void) af;
|
||||
GPIO_TypeDef *gpio = gpio_bank(pin);
|
||||
uint32_t mask = BIT(PINNO(pin));
|
||||
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
|
||||
if (mode == GPIO_MODE_INPUT) {
|
||||
gpio->PORT_DIRCLR = mask;
|
||||
} else {
|
||||
gpio->PORT_DIRSET = mask;
|
||||
}
|
||||
}
|
||||
static inline void gpio_input(uint16_t pin) {
|
||||
gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
||||
GPIO_PULL_NONE, 0);
|
||||
}
|
||||
static inline void gpio_output(uint16_t pin) {
|
||||
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
||||
GPIO_PULL_NONE, 0);
|
||||
}
|
||||
|
||||
typedef sercom_usart_int_registers_t USART_TypeDef;
|
||||
#define USART1 ((USART_TypeDef *) SERCOM0_BASE_ADDRESS)
|
||||
#define USART2 ((USART_TypeDef *) SERCOM1_BASE_ADDRESS)
|
||||
#define USART3 ((USART_TypeDef *) SERCOM2_BASE_ADDRESS)
|
||||
static inline bool uart_init(USART_TypeDef *uart, unsigned long baud) {
|
||||
uint16_t rx = 0, tx = 0; // Pins
|
||||
uint8_t rx_mux = 0, tx_mux = 0;
|
||||
if (uart == USART1) {
|
||||
MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM0_Msk;
|
||||
GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_CORE] =
|
||||
GCLK_PCHCTRL_GEN_GCLK0 | GCLK_PCHCTRL_CHEN_Msk;
|
||||
GCLK_REGS->GCLK_PCHCTRL[SERCOM0_GCLK_ID_SLOW] =
|
||||
GCLK_PCHCTRL_GEN_GCLK3 | GCLK_PCHCTRL_CHEN_Msk;
|
||||
tx = PIN('A', 4), rx = PIN('A', 5);
|
||||
rx_mux = MUX_PA05D_SERCOM0_PAD1, tx_mux = MUX_PA04D_SERCOM0_PAD0;
|
||||
} else if (uart == USART2) {
|
||||
MCLK_REGS->MCLK_APBAMASK |= MCLK_APBAMASK_SERCOM1_Msk;
|
||||
tx = PIN('C', 27), rx = PIN('C', 28);
|
||||
} else if (uart == USART3) {
|
||||
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_SERCOM2_Msk;
|
||||
tx = PIN('A', 9), rx = PIN('A', 8);
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
gpio_bank(rx)->PORT_WRCONFIG =
|
||||
PORT_WRCONFIG_PMUX(rx_mux) | PORT_WRCONFIG_WRPMUX(1) |
|
||||
PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(rx));
|
||||
gpio_bank(tx)->PORT_WRCONFIG =
|
||||
PORT_WRCONFIG_PMUX(tx_mux) | PORT_WRCONFIG_WRPMUX(1) |
|
||||
PORT_WRCONFIG_PMUXEN(1) | PORT_WRCONFIG_WRPINCFG(1) | BIT(PINNO(tx));
|
||||
uart->SERCOM_CTRLA = SERCOM_USART_INT_CTRLA_DORD(1) |
|
||||
SERCOM_USART_INT_CTRLA_MODE(1 /* INT_CLK */) |
|
||||
SERCOM_USART_INT_CTRLA_RXPO(1 /* PAD1 */) |
|
||||
SERCOM_USART_INT_CTRLA_TXPO(0 /* PAD0 */) |
|
||||
SERCOM_USART_INT_CTRLA_SAMPR(1);
|
||||
uart->SERCOM_BAUD = (uint16_t) (clock_sys_freq() / (16 * baud));
|
||||
uart->SERCOM_CTRLB = SERCOM_USART_INT_CTRLB_RXEN(1) |
|
||||
SERCOM_USART_INT_CTRLB_TXEN(1) |
|
||||
SERCOM_USART_INT_CTRLB_CHSIZE(0);
|
||||
while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_CTRLB_Msk) spin(1);
|
||||
uart->SERCOM_CTRLA |= SERCOM_USART_INT_CTRLA_ENABLE(1);
|
||||
while (uart->SERCOM_SYNCBUSY & SERCOM_USART_INT_SYNCBUSY_ENABLE_Msk) spin(1);
|
||||
return true;
|
||||
}
|
||||
static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
|
||||
while (!(uart->SERCOM_INTFLAG & SERCOM_USART_INT_INTFLAG_DRE_Msk)) spin(1);
|
||||
uart->SERCOM_DATA = byte;
|
||||
}
|
||||
static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
|
||||
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
|
||||
}
|
||||
static inline bool uart_read_ready(USART_TypeDef *uart) {
|
||||
return (uart->SERCOM_INTFLAG & SERCOM_USART_EXT_INTFLAG_RXC_Msk);
|
||||
}
|
||||
static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
|
||||
return (uint8_t) (uart->SERCOM_DATA & 255U);
|
||||
}
|
||||
|
||||
static inline void rng_init(void) {
|
||||
MCLK_REGS->MCLK_APBCMASK |= MCLK_APBCMASK_TRNG_Msk;
|
||||
TRNG_REGS->TRNG_CTRLA = TRNG_CTRLA_ENABLE_Msk;
|
||||
}
|
||||
static inline uint32_t rng_read(void) {
|
||||
while ((TRNG_REGS->TRNG_INTFLAG & TRNG_INTFLAG_DATARDY_Msk) == 0) spin(1);
|
||||
return TRNG_REGS->TRNG_DATA;
|
||||
}
|
||||
|
||||
#define UID_BASE_W0 0x008061FC // Word 0 location of the 128-bit chip ID
|
||||
#define UID_BASE_W1_3 0x00806010 // Words 1-3 location of the 128-bit chip ID
|
||||
|
||||
#define UUID(n) ((n >= 0 && n <= 3) ? \
|
||||
(((uint8_t *) UID_BASE_W0)[n]) : \
|
||||
(((uint8_t *) UID_BASE_W1_3)[n - 4]))
|
||||
|
||||
#define GENERATE_LOCALLY_ADMINISTERED_MAC() \
|
||||
{ \
|
||||
2, UUID(0) ^ UUID(1) ^ UUID(2), UUID(3) ^ UUID(4) ^ UUID(5), \
|
||||
UUID(6) ^ UUID(7) ^ UUID(8), UUID(9) ^ UUID(10) ^ UUID(11), \
|
||||
UUID(12) ^ UUID(13) ^ UUID(14) ^ UUID(15) \
|
||||
}
|
||||
|
||||
static inline bool timer_expired(volatile uint64_t *t, uint64_t prd,
|
||||
uint64_t now) {
|
||||
if (now + prd < *t) *t = 0; // Time wrapped? Reset timer
|
||||
if (*t == 0) *t = now + prd; // Firt poll? Set expiration
|
||||
if (*t > now) return false; // Not expired yet, return
|
||||
*t = (now - *t) > prd ? now + prd : *t + prd; // Next expiration time
|
||||
return true; // Expired, return true
|
||||
}
|
||||
|
||||
static inline void clock_init(void) {
|
||||
SCB->CPACR |= (15U << 20); // Enable FPU
|
||||
SysTick_Config(clock_sys_freq() / 1000); // Sys tick every 1ms
|
||||
}
|
||||
|
||||
static inline void gpio_set_irq_handler(uint16_t pin, void (*fn)(void *),
|
||||
void *arg) {
|
||||
(void) pin, (void) fn, (void) arg;
|
||||
}
|
||||
|
||||
static inline void ethernet_init(void) {
|
||||
uint16_t pins[] = {PIN('A', 12), PIN('A', 13), PIN('A', 14), PIN('A', 15),
|
||||
PIN('A', 17), PIN('A', 18), PIN('A', 19), PIN('C', 11),
|
||||
PIN('C', 12), PIN('C', 20)};
|
||||
uint32_t af[] = {MUX_PA12L_GMAC_GRX1, MUX_PA13L_GMAC_GRX0,
|
||||
MUX_PA14L_GMAC_GTXCK, MUX_PA15L_GMAC_GRXER,
|
||||
MUX_PA17L_GMAC_GTXEN, MUX_PA18L_GMAC_GTX0,
|
||||
MUX_PA19L_GMAC_GTX1, MUX_PC11L_GMAC_GMDC,
|
||||
MUX_PC12L_GMAC_GMDIO, MUX_PC20L_GMAC_GRXDV};
|
||||
|
||||
MCLK_REGS->MCLK_APBBMASK |= MCLK_APBBMASK_PORT_Msk;
|
||||
|
||||
for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
|
||||
int bank = PINBANK(pins[i]), no = PINNO(pins[i]);
|
||||
PORT_REGS->GROUP[bank].PORT_PINCFG[no] |= PORT_PINCFG_PMUXEN_Msk;
|
||||
volatile uint8_t *m = &PORT_REGS->GROUP[bank].PORT_PMUX[no / 2], v = m[0];
|
||||
if (no & 1) {
|
||||
m[0] = (uint8_t) ((v & ~0xf0) | PORT_PMUX_PMUXO(af[i]));
|
||||
} else {
|
||||
m[0] = (uint8_t) ((v & ~0x0f) | PORT_PMUX_PMUXE(af[i]));
|
||||
}
|
||||
}
|
||||
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[17] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[18] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
PORT_REGS->GROUP[0].PORT_PINCFG[19] |= PORT_PINCFG_DRVSTR_Msk;
|
||||
|
||||
// Reset PHY
|
||||
uint16_t phy_pin = PIN('C', 21);
|
||||
gpio_output(phy_pin);
|
||||
gpio_write(phy_pin, false);
|
||||
spin(999);
|
||||
gpio_write(phy_pin, true);
|
||||
spin(999);
|
||||
}
|
||||
@@ -0,0 +1,25 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
flash(rx) : ORIGIN = 0x00000000, LENGTH = 1024k
|
||||
sram(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
|
||||
}
|
||||
_estack = ORIGIN(sram) + LENGTH(sram);
|
||||
|
||||
SECTIONS {
|
||||
.vectors : { FILL(256) KEEP(*(.vectors)) } > flash
|
||||
.text : { *(.text*) } > flash
|
||||
.rodata : { *(.rodata*) } > flash
|
||||
|
||||
.data : {
|
||||
_sdata = .;
|
||||
*(.first_data)
|
||||
*(.data SORT(.data.*))
|
||||
_edata = .;
|
||||
} > sram AT > flash
|
||||
_sidata = LOADADDR(.data);
|
||||
|
||||
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
|
||||
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
}
|
||||
@@ -0,0 +1,120 @@
|
||||
// Copyright (c) 2023 Cesanta Software Limited
|
||||
// All rights reserved
|
||||
|
||||
#include "hal.h"
|
||||
#include "mongoose.h"
|
||||
|
||||
static const char *s_url = "mqtt://broker.hivemq.com:1883";
|
||||
static const char *s_sub_topic = "mg/+/test"; // Publish topic
|
||||
static const char *s_pub_topic = "mg/clnt/test"; // Subscribe topic
|
||||
static const uint8_t s_qos = 1; // MQTT QoS
|
||||
static struct mg_connection *s_conn; // Client connection
|
||||
|
||||
void SystemInit(void) { // Called automatically by startup code
|
||||
clock_init();
|
||||
rng_init();
|
||||
}
|
||||
|
||||
static volatile uint64_t s_ticks; // Milliseconds since boot
|
||||
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
|
||||
s_ticks++;
|
||||
}
|
||||
|
||||
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
|
||||
return s_ticks; // Return number of milliseconds since boot
|
||||
}
|
||||
|
||||
bool mg_random(void *buf, size_t len) { // Use on-board RNG
|
||||
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
|
||||
uint32_t r = rng_read();
|
||||
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
static void fn(struct mg_connection *c, int ev, void *ev_data) {
|
||||
if (ev == MG_EV_OPEN) {
|
||||
MG_INFO(("%lu CREATED", c->id));
|
||||
// c->is_hexdumping = 1;
|
||||
} else if (ev == MG_EV_ERROR) {
|
||||
// On error, log error message
|
||||
MG_ERROR(("%lu ERROR %s", c->id, (char *) ev_data));
|
||||
} else if (ev == MG_EV_MQTT_OPEN) {
|
||||
// MQTT connect is successful
|
||||
struct mg_str subt = mg_str(s_sub_topic);
|
||||
struct mg_str pubt = mg_str(s_pub_topic), data = mg_str("hello");
|
||||
MG_INFO(("%lu CONNECTED to %s", c->id, s_url));
|
||||
struct mg_mqtt_opts sub_opts;
|
||||
memset(&sub_opts, 0, sizeof(sub_opts));
|
||||
sub_opts.topic = subt;
|
||||
sub_opts.qos = s_qos;
|
||||
mg_mqtt_sub(c, &sub_opts);
|
||||
MG_INFO(("%lu SUBSCRIBED to %.*s", c->id, (int) subt.len, subt.buf));
|
||||
struct mg_mqtt_opts pub_opts;
|
||||
memset(&pub_opts, 0, sizeof(pub_opts));
|
||||
pub_opts.topic = pubt;
|
||||
pub_opts.message = data;
|
||||
pub_opts.qos = s_qos, pub_opts.retain = false;
|
||||
mg_mqtt_pub(c, &pub_opts);
|
||||
MG_INFO(("%lu PUBLISHED %.*s -> %.*s", c->id, (int) data.len, data.buf,
|
||||
(int) pubt.len, pubt.buf));
|
||||
} else if (ev == MG_EV_MQTT_MSG) {
|
||||
// When we get echo response, print it
|
||||
struct mg_mqtt_message *mm = (struct mg_mqtt_message *) ev_data;
|
||||
MG_INFO(("%lu RECEIVED %.*s <- %.*s", c->id, (int) mm->data.len,
|
||||
mm->data.buf, (int) mm->topic.len, mm->topic.buf));
|
||||
} else if (ev == MG_EV_CLOSE) {
|
||||
MG_INFO(("%lu CLOSED", c->id));
|
||||
s_conn = NULL; // Mark that we're closed
|
||||
}
|
||||
}
|
||||
|
||||
// Timer function - recreate client connection if it is closed
|
||||
static void timer_fn(void *arg) {
|
||||
struct mg_mgr *mgr = (struct mg_mgr *) arg;
|
||||
struct mg_mqtt_opts opts = {.clean = true,
|
||||
.qos = s_qos,
|
||||
.topic = mg_str(s_pub_topic),
|
||||
.version = 4,
|
||||
.message = mg_str("bye")};
|
||||
if (s_conn == NULL) s_conn = mg_mqtt_connect(mgr, s_url, &opts, fn, NULL);
|
||||
}
|
||||
|
||||
int main(void) {
|
||||
gpio_input(BUTTON_PIN);
|
||||
gpio_output(LED_PIN);
|
||||
uart_init(UART_DEBUG, 115200);
|
||||
ethernet_init();
|
||||
MG_INFO(("Starting, CPU freq %g MHz", (double) clock_sys_freq() / 1000000));
|
||||
|
||||
struct mg_mgr mgr; // Initialise
|
||||
mg_mgr_init(&mgr); // Mongoose event manager
|
||||
mg_log_set(MG_LL_DEBUG); // Set log level
|
||||
|
||||
// Initialise Mongoose network stack
|
||||
struct mg_tcpip_driver_same54_data driver_data = {.mdc_cr = 5};
|
||||
struct mg_tcpip_if mif = {
|
||||
.mac = GENERATE_LOCALLY_ADMINISTERED_MAC() /*{2, 3, 4, 5, 6, 7}*/,
|
||||
// Uncomment below for static configuration:
|
||||
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
|
||||
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
|
||||
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
|
||||
.driver = &mg_tcpip_driver_same54,
|
||||
.driver_data = &driver_data};
|
||||
mg_tcpip_init(&mgr, &mif);
|
||||
|
||||
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
|
||||
while (mif.state != MG_TCPIP_STATE_READY) {
|
||||
mg_mgr_poll(&mgr, 0);
|
||||
}
|
||||
|
||||
MG_INFO(("Initialising application..."));
|
||||
mg_timer_add(&mgr, 3000, MG_TIMER_REPEAT | MG_TIMER_RUN_NOW, timer_fn, &mgr);
|
||||
|
||||
MG_INFO(("Starting event loop"));
|
||||
for (;;) {
|
||||
mg_mgr_poll(&mgr, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1 @@
|
||||
../../../../../mongoose.c
|
||||
@@ -0,0 +1 @@
|
||||
../../../../../mongoose.h
|
||||
@@ -0,0 +1,332 @@
|
||||
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
|
||||
// SPDX-License-Identifier: MIT
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
void Reset_Handler(void); // Defined below
|
||||
void Dummy_Handler(void); // Defined below
|
||||
void SysTick_Handler(void); // Defined in main.c
|
||||
void SystemInit(void); // Defined in main.c, called by reset handler
|
||||
void _estack(void); // Defined in link.ld
|
||||
|
||||
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
|
||||
|
||||
WEAK_ALIAS void NMI_Handler(void);
|
||||
WEAK_ALIAS void HardFault_Handler(void);
|
||||
WEAK_ALIAS void MemoryManagement_Handler(void);
|
||||
WEAK_ALIAS void BusFault_Handler(void);
|
||||
WEAK_ALIAS void UsageFault_Handler(void);
|
||||
WEAK_ALIAS void SVCall_Handler(void);
|
||||
WEAK_ALIAS void DebugMonitor_Handler(void);
|
||||
WEAK_ALIAS void PendSV_Handler(void);
|
||||
WEAK_ALIAS void SysTick_Handler(void);
|
||||
|
||||
WEAK_ALIAS void PM_Handler(void);
|
||||
WEAK_ALIAS void MCLK_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_XOSC0_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_XOSC1_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DFLL_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DPLL0_Handler(void);
|
||||
WEAK_ALIAS void OSCCTRL_DPLL1_Handler(void);
|
||||
WEAK_ALIAS void OSC32KCTRL_Handler(void);
|
||||
WEAK_ALIAS void SUPC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SUPC_BODDET_Handler(void);
|
||||
WEAK_ALIAS void WDT_Handler(void);
|
||||
WEAK_ALIAS void RTC_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_0_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_1_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_2_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_3_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_4_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_5_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_6_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_7_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_8_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_9_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_10_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_11_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_12_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_13_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_14_Handler(void);
|
||||
WEAK_ALIAS void EIC_EXTINT_15_Handler(void);
|
||||
WEAK_ALIAS void FREQM_Handler(void);
|
||||
WEAK_ALIAS void NVMCTRL_0_Handler(void);
|
||||
WEAK_ALIAS void NVMCTRL_1_Handler(void);
|
||||
WEAK_ALIAS void DMAC_0_Handler(void);
|
||||
WEAK_ALIAS void DMAC_1_Handler(void);
|
||||
WEAK_ALIAS void DMAC_2_Handler(void);
|
||||
WEAK_ALIAS void DMAC_3_Handler(void);
|
||||
WEAK_ALIAS void DMAC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_0_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_1_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_2_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_3_Handler(void);
|
||||
WEAK_ALIAS void EVSYS_OTHER_Handler(void);
|
||||
WEAK_ALIAS void PAC_Handler(void);
|
||||
WEAK_ALIAS void RAMECC_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM2_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM3_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM4_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM5_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM6_OTHER_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_0_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_1_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_2_Handler(void);
|
||||
WEAK_ALIAS void SERCOM7_OTHER_Handler(void);
|
||||
WEAK_ALIAS void CAN0_Handler(void);
|
||||
WEAK_ALIAS void CAN1_Handler(void);
|
||||
WEAK_ALIAS void USB_OTHER_Handler(void);
|
||||
WEAK_ALIAS void USB_SOF_HSOF_Handler(void);
|
||||
WEAK_ALIAS void USB_TRCPT0_Handler(void);
|
||||
WEAK_ALIAS void USB_TRCPT1_Handler(void);
|
||||
WEAK_ALIAS void GMAC_Handler(void);
|
||||
WEAK_ALIAS void TCC0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC3_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC4_Handler(void);
|
||||
WEAK_ALIAS void TCC0_MC5_Handler(void);
|
||||
WEAK_ALIAS void TCC1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC1_MC3_Handler(void);
|
||||
WEAK_ALIAS void TCC2_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC2_MC2_Handler(void);
|
||||
WEAK_ALIAS void TCC3_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC3_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC3_MC1_Handler(void);
|
||||
WEAK_ALIAS void TCC4_OTHER_Handler(void);
|
||||
WEAK_ALIAS void TCC4_MC0_Handler(void);
|
||||
WEAK_ALIAS void TCC4_MC1_Handler(void);
|
||||
WEAK_ALIAS void TC0_Handler(void);
|
||||
WEAK_ALIAS void TC1_Handler(void);
|
||||
WEAK_ALIAS void TC2_Handler(void);
|
||||
WEAK_ALIAS void TC3_Handler(void);
|
||||
WEAK_ALIAS void TC4_Handler(void);
|
||||
WEAK_ALIAS void TC5_Handler(void);
|
||||
WEAK_ALIAS void TC6_Handler(void);
|
||||
WEAK_ALIAS void TC7_Handler(void);
|
||||
WEAK_ALIAS void PDEC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void PDEC_MC0_Handler(void);
|
||||
WEAK_ALIAS void PDEC_MC1_Handler(void);
|
||||
WEAK_ALIAS void ADC0_OTHER_Handler(void);
|
||||
WEAK_ALIAS void ADC0_RESRDY_Handler(void);
|
||||
WEAK_ALIAS void ADC1_OTHER_Handler(void);
|
||||
WEAK_ALIAS void ADC1_RESRDY_Handler(void);
|
||||
WEAK_ALIAS void AC_Handler(void);
|
||||
WEAK_ALIAS void DAC_OTHER_Handler(void);
|
||||
WEAK_ALIAS void DAC_EMPTY_0_Handler(void);
|
||||
WEAK_ALIAS void DAC_EMPTY_1_Handler(void);
|
||||
WEAK_ALIAS void DAC_RESRDY_0_Handler(void);
|
||||
WEAK_ALIAS void DAC_RESRDY_1_Handler(void);
|
||||
WEAK_ALIAS void I2S_Handler(void);
|
||||
WEAK_ALIAS void PCC_Handler(void);
|
||||
WEAK_ALIAS void AES_Handler(void);
|
||||
WEAK_ALIAS void TRNG_Handler(void);
|
||||
WEAK_ALIAS void ICM_Handler(void);
|
||||
WEAK_ALIAS void PUKCC_Handler(void);
|
||||
WEAK_ALIAS void QSPI_Handler(void);
|
||||
WEAK_ALIAS void SDHC0_Handler(void);
|
||||
WEAK_ALIAS void SDHC1_Handler(void);
|
||||
|
||||
__attribute__((section(".vectors"))) void (*const tab[16 + 138])(void) = {
|
||||
_estack,
|
||||
Reset_Handler,
|
||||
NMI_Handler,
|
||||
HardFault_Handler,
|
||||
MemoryManagement_Handler,
|
||||
BusFault_Handler,
|
||||
UsageFault_Handler,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
SVCall_Handler,
|
||||
DebugMonitor_Handler,
|
||||
NULL,
|
||||
PendSV_Handler,
|
||||
SysTick_Handler,
|
||||
PM_Handler, // 0 Power
|
||||
MCLK_Handler, // 1 Main
|
||||
OSCCTRL_XOSC0_Handler, // 2 Oscillators
|
||||
OSCCTRL_XOSC1_Handler, // 3 Oscillators
|
||||
OSCCTRL_DFLL_Handler, // 4 Oscillators
|
||||
OSCCTRL_DPLL0_Handler, // 5 Oscillators
|
||||
OSCCTRL_DPLL1_Handler, // 6 Oscillators
|
||||
OSC32KCTRL_Handler, // 7 32kHz
|
||||
SUPC_OTHER_Handler, // 8 Supply
|
||||
SUPC_BODDET_Handler, // 9 Supply
|
||||
WDT_Handler, // 10 Watchdog
|
||||
RTC_Handler, // 11 Real-Time
|
||||
EIC_EXTINT_0_Handler, // 12 External
|
||||
EIC_EXTINT_1_Handler, // 13 External
|
||||
EIC_EXTINT_2_Handler, // 14 External
|
||||
EIC_EXTINT_3_Handler, // 15 External
|
||||
EIC_EXTINT_4_Handler, // 16 External
|
||||
EIC_EXTINT_5_Handler, // 17 External
|
||||
EIC_EXTINT_6_Handler, // 18 External
|
||||
EIC_EXTINT_7_Handler, // 19 External
|
||||
EIC_EXTINT_8_Handler, // 20 External
|
||||
EIC_EXTINT_9_Handler, // 21 External
|
||||
EIC_EXTINT_10_Handler, // 22 External
|
||||
EIC_EXTINT_11_Handler, // 23 External
|
||||
EIC_EXTINT_12_Handler, // 24 External
|
||||
EIC_EXTINT_13_Handler, // 25 External
|
||||
EIC_EXTINT_14_Handler, // 26 External
|
||||
EIC_EXTINT_15_Handler, // 27 External
|
||||
FREQM_Handler, // 28 Frequency
|
||||
NVMCTRL_0_Handler, // 29 Non-Volatile
|
||||
NVMCTRL_1_Handler, // 30 Non-Volatile
|
||||
DMAC_0_Handler, // 31 Direct
|
||||
DMAC_1_Handler, // 32 Direct
|
||||
DMAC_2_Handler, // 33 Direct
|
||||
DMAC_3_Handler, // 34 Direct
|
||||
DMAC_OTHER_Handler, // 35 Direct
|
||||
EVSYS_0_Handler, // 36 Event
|
||||
EVSYS_1_Handler, // 37 Event
|
||||
EVSYS_2_Handler, // 38 Event
|
||||
EVSYS_3_Handler, // 39 Event
|
||||
EVSYS_OTHER_Handler, // 40 Event
|
||||
PAC_Handler, // 41 Peripheral
|
||||
0, // 42 Reserved
|
||||
0, // 43 Reserved
|
||||
0, // 44 Reserved
|
||||
RAMECC_Handler, // 45 RAM
|
||||
SERCOM0_0_Handler, // 46 Serial
|
||||
SERCOM0_1_Handler, // 47 Serial
|
||||
SERCOM0_2_Handler, // 48 Serial
|
||||
SERCOM0_OTHER_Handler, // 49 Serial
|
||||
SERCOM1_0_Handler, // 50 Serial
|
||||
SERCOM1_1_Handler, // 51 Serial
|
||||
SERCOM1_2_Handler, // 52 Serial
|
||||
SERCOM1_OTHER_Handler, // 53 Serial
|
||||
SERCOM2_0_Handler, // 54 Serial
|
||||
SERCOM2_1_Handler, // 55 Serial
|
||||
SERCOM2_2_Handler, // 56 Serial
|
||||
SERCOM2_OTHER_Handler, // 57 Serial
|
||||
SERCOM3_0_Handler, // 58 Serial
|
||||
SERCOM3_1_Handler, // 59 Serial
|
||||
SERCOM3_2_Handler, // 60 Serial
|
||||
SERCOM3_OTHER_Handler, // 61 Serial
|
||||
SERCOM4_0_Handler, // 62 Serial
|
||||
SERCOM4_1_Handler, // 63 Serial
|
||||
SERCOM4_2_Handler, // 64 Serial
|
||||
SERCOM4_OTHER_Handler, // 65 Serial
|
||||
SERCOM5_0_Handler, // 66 Serial
|
||||
SERCOM5_1_Handler, // 67 Serial
|
||||
SERCOM5_2_Handler, // 68 Serial
|
||||
SERCOM5_OTHER_Handler, // 69 Serial
|
||||
SERCOM6_0_Handler, // 70 Serial
|
||||
SERCOM6_1_Handler, // 71 Serial
|
||||
SERCOM6_2_Handler, // 72 Serial
|
||||
SERCOM6_OTHER_Handler, // 73 Serial
|
||||
SERCOM7_0_Handler, // 74 Serial
|
||||
SERCOM7_1_Handler, // 75 Serial
|
||||
SERCOM7_2_Handler, // 76 Serial
|
||||
SERCOM7_OTHER_Handler, // 77 Serial
|
||||
CAN0_Handler, // 78 Control
|
||||
CAN1_Handler, // 79 Control
|
||||
USB_OTHER_Handler, // 80 Universal
|
||||
USB_SOF_HSOF_Handler, // 81 Universal
|
||||
USB_TRCPT0_Handler, // 82 Universal
|
||||
USB_TRCPT1_Handler, // 83 Universal
|
||||
GMAC_Handler, // 84 Ethernet
|
||||
TCC0_OTHER_Handler, // 85 Timer
|
||||
TCC0_MC0_Handler, // 86 Timer
|
||||
TCC0_MC1_Handler, // 87 Timer
|
||||
TCC0_MC2_Handler, // 88 Timer
|
||||
TCC0_MC3_Handler, // 89 Timer
|
||||
TCC0_MC4_Handler, // 90 Timer
|
||||
TCC0_MC5_Handler, // 91 Timer
|
||||
TCC1_OTHER_Handler, // 92 Timer
|
||||
TCC1_MC0_Handler, // 93 Timer
|
||||
TCC1_MC1_Handler, // 94 Timer
|
||||
TCC1_MC2_Handler, // 95 Timer
|
||||
TCC1_MC3_Handler, // 96 Timer
|
||||
TCC2_OTHER_Handler, // 97 Timer
|
||||
TCC2_MC0_Handler, // 98 Timer
|
||||
TCC2_MC1_Handler, // 99 Timer
|
||||
TCC2_MC2_Handler, // 100 Timer
|
||||
TCC3_OTHER_Handler, // 101 Timer
|
||||
TCC3_MC0_Handler, // 102 Timer
|
||||
TCC3_MC1_Handler, // 103 Timer
|
||||
TCC4_OTHER_Handler, // 104 Timer
|
||||
TCC4_MC0_Handler, // 105 Timer
|
||||
TCC4_MC1_Handler, // 106 Timer
|
||||
TC0_Handler, // 107 Basic
|
||||
TC1_Handler, // 108 Basic
|
||||
TC2_Handler, // 109 Basic
|
||||
TC3_Handler, // 110 Basic
|
||||
TC4_Handler, // 111 Basic
|
||||
TC5_Handler, // 112 Basic
|
||||
TC6_Handler, // 113 Basic
|
||||
TC7_Handler, // 114 Basic
|
||||
PDEC_OTHER_Handler, // 115 Quadrature
|
||||
PDEC_MC0_Handler, // 116 Quadrature
|
||||
PDEC_MC1_Handler, // 117 Quadrature
|
||||
ADC0_OTHER_Handler, // 118 Analog
|
||||
ADC0_RESRDY_Handler, // 119 Analog
|
||||
ADC1_OTHER_Handler, // 120 Analog
|
||||
ADC1_RESRDY_Handler, // 121 Analog
|
||||
AC_Handler, // 122 Analog
|
||||
DAC_OTHER_Handler, // 123 Digital-to-Analog
|
||||
DAC_EMPTY_0_Handler, // 124 Digital-to-Analog
|
||||
DAC_EMPTY_1_Handler, // 125 Digital-to-Analog
|
||||
DAC_RESRDY_0_Handler, // 126 Digital-to-Analog
|
||||
DAC_RESRDY_1_Handler, // 127 Digital-to-Analog
|
||||
I2S_Handler, // 128 Inter-IC
|
||||
PCC_Handler, // 129 Parallel
|
||||
AES_Handler, // 130 Advanced
|
||||
TRNG_Handler, // 131 True
|
||||
ICM_Handler, // 132 Integrity
|
||||
PUKCC_Handler, // 133 PUblic-Key
|
||||
QSPI_Handler, // 134 Quad
|
||||
SDHC0_Handler, // 135 SD/MMC
|
||||
SDHC1_Handler // 136 SD/MMC
|
||||
};
|
||||
|
||||
__attribute__((naked, noreturn)) void Reset_Handler(void) {
|
||||
// Clear BSS section, and copy data section from flash to RAM
|
||||
extern long _sbss, _ebss, _sdata, _edata, _sidata;
|
||||
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
|
||||
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
|
||||
|
||||
SCB->VTOR = (uint32_t) &tab;
|
||||
SystemInit();
|
||||
|
||||
// Call main()
|
||||
extern void main(void);
|
||||
main();
|
||||
for (;;) (void) 0; // Infinite loop
|
||||
}
|
||||
|
||||
void Default_Handler(void) {
|
||||
for (;;) (void) 0;
|
||||
}
|
||||
@@ -0,0 +1,89 @@
|
||||
// Copyright (c) 2022 Cesanta Software Limited
|
||||
// All rights reserved
|
||||
|
||||
#include <sys/stat.h>
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
int _fstat(int fd, struct stat *st) {
|
||||
if (fd < 0) return -1;
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void *_sbrk(int incr) {
|
||||
extern char _end;
|
||||
static unsigned char *heap = NULL;
|
||||
unsigned char *prev_heap;
|
||||
if (heap == NULL) heap = (unsigned char *) &_end;
|
||||
prev_heap = heap;
|
||||
heap += incr;
|
||||
return prev_heap;
|
||||
}
|
||||
|
||||
int _open(const char *path) {
|
||||
(void) path;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _close(int fd) {
|
||||
(void) fd;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _isatty(int fd) {
|
||||
(void) fd;
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int fd, int ptr, int dir) {
|
||||
(void) fd, (void) ptr, (void) dir;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void _exit(int status) {
|
||||
(void) status;
|
||||
for (;;) asm volatile("BKPT #0");
|
||||
}
|
||||
|
||||
void _kill(int pid, int sig) {
|
||||
(void) pid, (void) sig;
|
||||
}
|
||||
|
||||
int _getpid(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _write(int fd, char *ptr, int len) {
|
||||
(void) fd, (void) ptr, (void) len;
|
||||
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _read(int fd, char *ptr, int len) {
|
||||
(void) fd, (void) ptr, (void) len;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _link(const char *a, const char *b) {
|
||||
(void) a, (void) b;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(const char *a) {
|
||||
(void) a;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(const char *path, struct stat *st) {
|
||||
(void) path, (void) st;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int mkdir(const char *path, mode_t mode) {
|
||||
(void) path, (void) mode;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _init(void) {
|
||||
}
|
||||
@@ -0,0 +1 @@
|
||||
../../pico-sdk/pico-rndis-device
|
||||
@@ -0,0 +1 @@
|
||||
../../../pico-sdk/pico-rndis-device
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = mcxn947
|
||||
IDE = GCC+make
|
||||
RTOS = baremetal
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/??
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART?"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=mcxn947&ide=GCC+make&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = mcxn947
|
||||
IDE = GCC+make
|
||||
RTOS = FreeRTOS
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/??
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART?"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=mcxn947&ide=GCC+make&rtos=FreeRTOS&file=README.md)
|
||||
@@ -0,0 +1,27 @@
|
||||
BOARD = mcxn947
|
||||
IDE = MCUXpresso
|
||||
RTOS = baremetal
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
TARGET ?= Debug
|
||||
DOCKER = docker run --rm -v $(CURDIR):/root -w /root
|
||||
IMAGE ?= scaprile/xpresso
|
||||
HEADLESS_BUILD = /usr/local/mcuxpressoide/ide/mcuxpressoide --launcher.suppressErrors -nosplash -application org.eclipse.cdt.managedbuilder.core.headlessbuild
|
||||
|
||||
all build example: firmware.axf
|
||||
|
||||
firmware.axf: wizard
|
||||
mkdir -p workspace
|
||||
PROJNAME=`xq -r .projectDescription.name wizard/.project` && \
|
||||
($(DOCKER) $(IMAGE) $(HEADLESS_BUILD) -data workspace -import wizard -cleanBuild $$PROJNAME/$(TARGET) || true) && \
|
||||
cp wizard/$(TARGET)/$$PROJNAME.axf firmware.axf
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard/source ; rm mongoose.[ch] ; cp -rL ../../../../../mongoose.[ch] .
|
||||
|
||||
|
||||
clean:
|
||||
sudo rm -rf firmware.* wizard* workspace mcuxpresso .cache .eclipse .p2
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=f429&ide=CubeIDE&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,28 @@
|
||||
BOARD = mcxn947
|
||||
IDE = MCUXpresso
|
||||
RTOS = FreeRTOS
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
TARGET ?= Debug
|
||||
DOCKER = docker run --rm -v $(CURDIR):/root -w /root
|
||||
IMAGE ?= scaprile/xpresso
|
||||
HEADLESS_BUILD = /usr/local/mcuxpressoide/ide/mcuxpressoide --launcher.suppressErrors -nosplash -application org.eclipse.cdt.managedbuilder.core.headlessbuild
|
||||
|
||||
all build example: firmware.axf
|
||||
|
||||
firmware.axf: wizard
|
||||
mkdir -p workspace
|
||||
PROJNAME=`xq -r .projectDescription.name wizard/.project` && \
|
||||
($(DOCKER) $(IMAGE) $(HEADLESS_BUILD) -data workspace -import wizard -cleanBuild $$PROJNAME/$(TARGET) || true) && \
|
||||
cp wizard/$(TARGET)/$$PROJNAME.axf firmware.axf
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard/source ; rm mongoose.[ch] ; cp -rL ../../../../../mongoose.[ch] .
|
||||
|
||||
|
||||
clean:
|
||||
sudo rm -rf firmware.* wizard* workspace mcuxpresso .cache .eclipse .p2
|
||||
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=f429&ide=CubeIDE&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/source/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/source/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/source/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/source/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,9 @@
|
||||
NAME ?= $(notdir $(CURDIR))
|
||||
|
||||
build:
|
||||
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
|
||||
cp ./../../../mongoose.[ch] $(NAME)/mongoose/
|
||||
make -C $(NAME) build
|
||||
|
||||
clean:
|
||||
rm -rf $(NAME)
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = rt1020
|
||||
IDE = GCC+make
|
||||
RTOS = baremetal
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/4
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=LPUART2"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=rt1020&ide=GCC+make&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,16 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
itcram(rx) : ORIGIN = 0x00000000, LENGTH = 64k
|
||||
dtcram(rw) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
ocram(rw) : ORIGIN = 0x20200000, LENGTH = 128k /* This is cached */
|
||||
}
|
||||
__StackTop = ORIGIN(dtcram) + LENGTH(dtcram);
|
||||
|
||||
SECTIONS {
|
||||
.irq : { KEEP(*(.isr_vector)) } > itcram
|
||||
.text : { *(.text* .text.*) *(.rodata*) ; } > itcram
|
||||
.data : { __data_start__ = .; *(.data SORT(.data.*)) __data_end__ = .; } > dtcram AT > itcram
|
||||
__etext = LOADADDR(.data);
|
||||
.bss : { __bss_start__ = .; *(.bss SORT(.bss.*) COMMON) __bss_end__ = .; } > dtcram
|
||||
_end = .;
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = rt1020
|
||||
IDE = GCC+make
|
||||
RTOS = FreeRTOS
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/4
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=LPUART2"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=rt1020&ide=GCC+make&rtos=FreeRTOS&file=README.md)
|
||||
@@ -0,0 +1,16 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
itcram(rx) : ORIGIN = 0x00000000, LENGTH = 64k
|
||||
dtcram(rw) : ORIGIN = 0x20000000, LENGTH = 64k
|
||||
ocram(rw) : ORIGIN = 0x20200000, LENGTH = 128k /* This is cached */
|
||||
}
|
||||
__StackTop = ORIGIN(dtcram) + LENGTH(dtcram);
|
||||
|
||||
SECTIONS {
|
||||
.irq : { KEEP(*(.isr_vector)) } > itcram
|
||||
.text : { *(.text* .text.*) *(.rodata*) ; } > itcram
|
||||
.data : { __data_start__ = .; *(.data SORT(.data.*)) __data_end__ = .; } > dtcram AT > itcram
|
||||
__etext = LOADADDR(.data);
|
||||
.bss : { __bss_start__ = .; *(.bss SORT(.bss.*) COMMON) __bss_end__ = .; } > dtcram
|
||||
_end = .;
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = rt1060
|
||||
IDE = GCC+make
|
||||
RTOS = baremetal
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/13
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=LPUART3"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=rt1060&ide=GCC+make&rtos=baremetal&file=README.md)
|
||||
@@ -0,0 +1,16 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
itcram(rx) : ORIGIN = 0x00000000, LENGTH = 128k
|
||||
dtcram(rw) : ORIGIN = 0x20000000, LENGTH = 128k
|
||||
ocram(rw) : ORIGIN = 0x20200000, LENGTH = 256k /* Is this cached ? */
|
||||
}
|
||||
__StackTop = ORIGIN(dtcram) + LENGTH(dtcram);
|
||||
|
||||
SECTIONS {
|
||||
.irq : { KEEP(*(.isr_vector)) } > itcram
|
||||
.text : { *(.text* .text.*) *(.rodata*) ; } > itcram
|
||||
.data : { __data_start__ = .; *(.data SORT(.data.*)) __data_end__ = .; } > dtcram AT > itcram
|
||||
__etext = LOADADDR(.data);
|
||||
.bss : { __bss_start__ = .; *(.bss SORT(.bss.*) COMMON) __bss_end__ = .; } > dtcram
|
||||
_end = .;
|
||||
}
|
||||
@@ -0,0 +1,29 @@
|
||||
BOARD = rt1060
|
||||
IDE = GCC+make
|
||||
RTOS = FreeRTOS
|
||||
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||
|
||||
all build example: firmware.bin
|
||||
|
||||
firmware.bin: wizard
|
||||
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||
|
||||
wizard:
|
||||
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||
unzip wizard.zip
|
||||
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||
|
||||
|
||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/13
|
||||
update: firmware.bin
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||
|
||||
test update: CFLAGS_EXTRA ="-DUART_DEBUG=LPUART3"
|
||||
test: update
|
||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||
|
||||
clean:
|
||||
rm -rf firmware.* wizard*
|
||||
@@ -0,0 +1 @@
|
||||
See [Wizard](https://mongoose.ws/wizard/#/output?board=rt1060&ide=GCC+make&rtos=FreeRTOS&file=README.md)
|
||||
@@ -0,0 +1,16 @@
|
||||
ENTRY(Reset_Handler);
|
||||
MEMORY {
|
||||
itcram(rx) : ORIGIN = 0x00000000, LENGTH = 128k
|
||||
dtcram(rw) : ORIGIN = 0x20000000, LENGTH = 128k
|
||||
ocram(rw) : ORIGIN = 0x20200000, LENGTH = 256k /* Is this cached ? */
|
||||
}
|
||||
__StackTop = ORIGIN(dtcram) + LENGTH(dtcram);
|
||||
|
||||
SECTIONS {
|
||||
.irq : { KEEP(*(.isr_vector)) } > itcram
|
||||
.text : { *(.text* .text.*) *(.rodata*) ; } > itcram
|
||||
.data : { __data_start__ = .; *(.data SORT(.data.*)) __data_end__ = .; } > dtcram AT > itcram
|
||||
__etext = LOADADDR(.data);
|
||||
.bss : { __bss_start__ = .; *(.bss SORT(.bss.*) COMMON) __bss_end__ = .; } > dtcram
|
||||
_end = .;
|
||||
}
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,27 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>rt1060-evk-xpresso-baremetal-builtin</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>com.nxp.mcuxpresso.core.datamodels.sdkNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
@@ -0,0 +1,36 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<project>
|
||||
<configuration id="com.crt.advproject.config.exe.debug.482203061" name="Debug">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="com.crt.advproject.GCCBuildCommandParser" keep-relative-paths="false" name="MCU GCC Build Output Parser" parameter="(arm-none-eabi-gcc)|(arm-none-eabi-[gc]\+\+)|(gcc)|([gc]\+\+)|(clang)" prefer-non-shared="true"/>
|
||||
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="876828778373794635" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.crt.advproject.config.exe.release.1803401606" name="Release">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider copy-of="extension" id="com.crt.advproject.GCCBuildCommandParser"/>
|
||||
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="869082179154482923" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
<configuration id="com.crt.advproject.config.exe.debug.482203061.601227244" name="Test">
|
||||
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
|
||||
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
|
||||
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="com.crt.advproject.GCCBuildCommandParser" keep-relative-paths="false" name="MCU GCC Build Output Parser" parameter="(arm-none-eabi-gcc)|(arm-none-eabi-[gc]\+\+)|(gcc)|([gc]\+\+)|(clang)" prefer-non-shared="true"/>
|
||||
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="876828778373794635" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD "${INPUTS}"" prefer-non-shared="true">
|
||||
<language-scope id="org.eclipse.cdt.core.gcc"/>
|
||||
<language-scope id="org.eclipse.cdt.core.g++"/>
|
||||
</provider>
|
||||
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
|
||||
</extension>
|
||||
</configuration>
|
||||
</project>
|
||||
+2
@@ -0,0 +1,2 @@
|
||||
eclipse.preferences.version=1
|
||||
encoding/<project>=UTF-8
|
||||
@@ -0,0 +1,429 @@
|
||||
/******************************************************************************
|
||||
* @file cachel1_armv7.h
|
||||
* @brief CMSIS Level 1 Cache API for Armv7-M and later
|
||||
* @version V1.0.1
|
||||
* @date 19. April 2021
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2020-2021 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_CACHEL1_ARMV7_H
|
||||
#define ARM_CACHEL1_ARMV7_H
|
||||
|
||||
/**
|
||||
\ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_CacheFunctions Cache Functions
|
||||
\brief Functions that configure Instruction and Data cache.
|
||||
@{
|
||||
*/
|
||||
|
||||
/* Cache Size ID Register Macros */
|
||||
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
|
||||
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
|
||||
|
||||
#ifndef __SCB_DCACHE_LINE_SIZE
|
||||
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
#ifndef __SCB_ICACHE_LINE_SIZE
|
||||
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
|
||||
#endif
|
||||
|
||||
/**
|
||||
\brief Enable I-Cache
|
||||
\details Turns on I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable I-Cache
|
||||
\details Turns off I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
|
||||
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate I-Cache
|
||||
\details Invalidates I-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
__DSB();
|
||||
__ISB();
|
||||
SCB->ICIALLU = 0UL;
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief I-Cache Invalidate by address
|
||||
\details Invalidates I-Cache for the given address.
|
||||
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
I-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] isize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
|
||||
{
|
||||
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
|
||||
if ( isize > 0 ) {
|
||||
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_ICACHE_LINE_SIZE;
|
||||
op_size -= __SCB_ICACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Enable D-Cache
|
||||
\details Turns on D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
__DSB();
|
||||
|
||||
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable D-Cache
|
||||
\details Turns off D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
|
||||
__DSB();
|
||||
|
||||
/*
|
||||
* For the endless loop issue with GCC O0.
|
||||
* More details, see https://github.com/ARM-software/CMSIS_5/issues/620
|
||||
*
|
||||
* The issue only happens when local variables are in stack (GCC O0). If
|
||||
* local variables are saved in general purpose register, then the function
|
||||
* is OK.
|
||||
*
|
||||
* When local variables are in stack, after disabling the cache, flush the
|
||||
* local variables cache line for data consistency.
|
||||
*/
|
||||
/* Clean and invalidate the local variable cache. */
|
||||
SCB->DCCIMVAC = (uint32_t)(&sets);
|
||||
SCB->DCCIMVAC = (uint32_t)(&ways);
|
||||
SCB->DCCIMVAC = (uint32_t)(&ccsidr);
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Invalidate D-Cache
|
||||
\details Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
|
||||
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean D-Cache
|
||||
\details Cleans D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
|
||||
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Clean & Invalidate D-Cache
|
||||
\details Cleans and Invalidates D-Cache
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
uint32_t ccsidr;
|
||||
uint32_t sets;
|
||||
uint32_t ways;
|
||||
|
||||
SCB->CSSELR = 0U; /* select Level 1 data cache */
|
||||
__DSB();
|
||||
|
||||
ccsidr = SCB->CCSIDR;
|
||||
|
||||
/* clean & invalidate D-Cache */
|
||||
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
|
||||
do {
|
||||
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
|
||||
do {
|
||||
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
|
||||
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
|
||||
#if defined ( __CC_ARM )
|
||||
__schedule_barrier();
|
||||
#endif
|
||||
} while (ways-- != 0U);
|
||||
} while(sets-- != 0U);
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Invalidate by address
|
||||
\details Invalidates D-Cache for the given address.
|
||||
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are invalidated.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean by address
|
||||
\details Cleans D-Cache for the given address
|
||||
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned.
|
||||
\param[in] addr address
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief D-Cache Clean and Invalidate by address
|
||||
\details Cleans and invalidates D_Cache for the given address
|
||||
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
|
||||
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
|
||||
\param[in] addr address (aligned to 32-byte boundary)
|
||||
\param[in] dsize size of memory block (in number of bytes)
|
||||
*/
|
||||
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
|
||||
{
|
||||
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
|
||||
if ( dsize > 0 ) {
|
||||
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
|
||||
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
|
||||
|
||||
__DSB();
|
||||
|
||||
do {
|
||||
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
|
||||
op_addr += __SCB_DCACHE_LINE_SIZE;
|
||||
op_size -= __SCB_DCACHE_LINE_SIZE;
|
||||
} while ( op_size > 0 );
|
||||
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@} end of CMSIS_Core_CacheFunctions */
|
||||
|
||||
#endif /* ARM_CACHEL1_ARMV7_H */
|
||||
@@ -0,0 +1,283 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.1.0
|
||||
* @date 09. October 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6.6 LTM (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
|
||||
#include "cmsis_armclang_ltm.h"
|
||||
|
||||
/*
|
||||
* Arm Compiler above 6.10.1 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
#ifndef __COMPILER_BARRIER
|
||||
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
|
||||
#define __COMPILER_BARRIER() (void)0
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.4
|
||||
* @date 23. July 2019
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,275 @@
|
||||
/******************************************************************************
|
||||
* @file mpu_armv7.h
|
||||
* @brief CMSIS MPU API for Armv7-M MPU
|
||||
* @version V5.1.2
|
||||
* @date 25. May 2020
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2017-2020 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef ARM_MPU_ARMV7_H
|
||||
#define ARM_MPU_ARMV7_H
|
||||
|
||||
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
|
||||
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
|
||||
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
|
||||
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
|
||||
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
|
||||
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
|
||||
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
|
||||
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
|
||||
|
||||
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
|
||||
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
|
||||
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
|
||||
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
|
||||
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
|
||||
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
|
||||
|
||||
/** MPU Region Base Address Register Value
|
||||
*
|
||||
* \param Region The region to be configured, number 0 to 15.
|
||||
* \param BaseAddress The base address for the region.
|
||||
*/
|
||||
#define ARM_MPU_RBAR(Region, BaseAddress) \
|
||||
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
|
||||
((Region) & MPU_RBAR_REGION_Msk) | \
|
||||
(MPU_RBAR_VALID_Msk))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attributes
|
||||
*
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
|
||||
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
|
||||
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
|
||||
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
|
||||
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
|
||||
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
|
||||
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
|
||||
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
|
||||
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
|
||||
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
|
||||
(((MPU_RASR_ENABLE_Msk))))
|
||||
|
||||
/**
|
||||
* MPU Region Attribute and Size Register Value
|
||||
*
|
||||
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
|
||||
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
|
||||
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
|
||||
* \param IsShareable Region is shareable between multiple bus masters.
|
||||
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
|
||||
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
|
||||
* \param SubRegionDisable Sub-region disable field.
|
||||
* \param Size Region size of the region to be configured, for example 4K, 8K.
|
||||
*/
|
||||
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
|
||||
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for strongly ordered memory.
|
||||
* - TEX: 000b
|
||||
* - Shareable
|
||||
* - Non-cacheable
|
||||
* - Non-bufferable
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for device memory.
|
||||
* - TEX: 000b (if shareable) or 010b (if non-shareable)
|
||||
* - Shareable or non-shareable
|
||||
* - Non-cacheable
|
||||
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
|
||||
*
|
||||
* \param IsShareable Configures the device memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute for normal memory.
|
||||
* - TEX: 1BBb (reflecting outer cacheability rules)
|
||||
* - Shareable or non-shareable
|
||||
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
|
||||
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
|
||||
*
|
||||
* \param OuterCp Configures the outer cache policy.
|
||||
* \param InnerCp Configures the inner cache policy.
|
||||
* \param IsShareable Configures the memory as shareable or non-shareable.
|
||||
*/
|
||||
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute non-cacheable policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_NOCACHE 0U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, write and read allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_WRA 1U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-through, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WT_NWA 2U
|
||||
|
||||
/**
|
||||
* MPU Memory Access Attribute write-back, no write allocate policy.
|
||||
*/
|
||||
#define ARM_MPU_CACHEP_WB_NWA 3U
|
||||
|
||||
|
||||
/**
|
||||
* Struct for a single MPU Region
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t RBAR; //!< The region base address register value (RBAR)
|
||||
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
|
||||
} ARM_MPU_Region_t;
|
||||
|
||||
/** Enable the MPU.
|
||||
* \param MPU_Control Default access permissions for unconfigured regions.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Disable the MPU.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Disable(void)
|
||||
{
|
||||
__DMB();
|
||||
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
|
||||
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
#endif
|
||||
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
|
||||
__DSB();
|
||||
__ISB();
|
||||
}
|
||||
|
||||
/** Clear and disable the given MPU region.
|
||||
* \param rnr Region number to be cleared.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RASR = 0U;
|
||||
}
|
||||
|
||||
/** Configure an MPU region.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rasr Value for RASR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Configure the given MPU region.
|
||||
* \param rnr Region number to be configured.
|
||||
* \param rbar Value for RBAR register.
|
||||
* \param rasr Value for RASR register.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
|
||||
{
|
||||
MPU->RNR = rnr;
|
||||
MPU->RBAR = rbar;
|
||||
MPU->RASR = rasr;
|
||||
}
|
||||
|
||||
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load().
|
||||
* \param dst Destination data is copied to.
|
||||
* \param src Source data is copied from.
|
||||
* \param len Amount of data words to be copied.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0U; i < len; ++i)
|
||||
{
|
||||
dst[i] = src[i];
|
||||
}
|
||||
}
|
||||
|
||||
/** Load the given number of MPU regions from a table.
|
||||
* \param table Pointer to the MPU configuration table.
|
||||
* \param cnt Amount of regions to be configured.
|
||||
*/
|
||||
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
|
||||
{
|
||||
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
|
||||
while (cnt > MPU_TYPE_RALIASES) {
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
|
||||
table += MPU_TYPE_RALIASES;
|
||||
cnt -= MPU_TYPE_RALIASES;
|
||||
}
|
||||
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,8 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:191:22:ARM_MPU_Enable 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:204:22:ARM_MPU_Disable 4 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1434:24:CLOCK_GetMux 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1485:24:CLOCK_GetDiv 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
|
||||
../board/board.c:24:10:BOARD_DebugConsoleSrcFreq 24 static
|
||||
../board/board.c:43:6:BOARD_InitDebugConsole 16 static
|
||||
../board/board.c:248:6:BOARD_ConfigMPU 48 static
|
||||
@@ -0,0 +1,13 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1408:20:CLOCK_SetMux 24 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1460:20:CLOCK_SetDiv 24 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1663:20:CLOCK_SetXtalFreq 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1673:20:CLOCK_SetRtcXtalFreq 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1730:20:CLOCK_SetPllBypass 24 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1363:20:IOMUXC_SetSaiMClkClockSource 24 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1423:20:IOMUXC_MQSConfig 24 static
|
||||
../board/clock_config.c:40:6:BOARD_InitBootClocks 8 static
|
||||
../board/clock_config.c:178:6:BOARD_BootClockRUN 16 static
|
||||
../board/clock_config.c:625:6:BOARD_BootClockRUN_528M 16 static
|
||||
Whitespace-only changes.
@@ -0,0 +1,3 @@
|
||||
../board/peripherals.c:186:13:TRNG_init 8 static
|
||||
../board/peripherals.c:194:6:BOARD_InitPeripherals 8 static
|
||||
../board/peripherals.c:203:6:BOARD_InitBootPeripherals 8 static
|
||||
@@ -0,0 +1,15 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1288:20:IOMUXC_SetPinMux 24 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1320:20:IOMUXC_SetPinConfig 24 static
|
||||
../board/pin_mux.c:221:6:BOARD_InitBootPins 8 static
|
||||
../board/pin_mux.c:241:6:BOARD_InitPins 4 static
|
||||
../board/pin_mux.c:263:6:BOARD_InitDEBUG_UART 16 static
|
||||
../board/pin_mux.c:326:6:BOARD_InitSDRAM 16 static
|
||||
../board/pin_mux.c:402:6:BOARD_InitCSI 16 static
|
||||
../board/pin_mux.c:464:6:BOARD_InitLCD 16 static
|
||||
../board/pin_mux.c:532:6:BOARD_InitCAN 16 static
|
||||
../board/pin_mux.c:564:6:BOARD_InitENET 16 static
|
||||
../board/pin_mux.c:600:6:BOARD_InitUSDHC 16 static
|
||||
../board/pin_mux.c:638:6:BOARD_InitHyperFlash 16 static
|
||||
@@ -0,0 +1,43 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../board/board.c \
|
||||
../board/clock_config.c \
|
||||
../board/dcd.c \
|
||||
../board/peripherals.c \
|
||||
../board/pin_mux.c
|
||||
|
||||
C_DEPS += \
|
||||
./board/board.d \
|
||||
./board/clock_config.d \
|
||||
./board/dcd.d \
|
||||
./board/peripherals.d \
|
||||
./board/pin_mux.d
|
||||
|
||||
OBJS += \
|
||||
./board/board.o \
|
||||
./board/clock_config.o \
|
||||
./board/dcd.o \
|
||||
./board/peripherals.o \
|
||||
./board/pin_mux.o
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
board/%.o: ../board/%.c board/subdir.mk
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: MCU C Compiler'
|
||||
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
clean: clean-board
|
||||
|
||||
clean-board:
|
||||
-$(RM) ./board/board.d ./board/board.o ./board/clock_config.d ./board/clock_config.o ./board/dcd.d ./board/dcd.o ./board/peripherals.d ./board/peripherals.o ./board/pin_mux.d ./board/pin_mux.o
|
||||
|
||||
.PHONY: clean-board
|
||||
|
||||
+15
@@ -0,0 +1,15 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
|
||||
../component/lists/fsl_component_generic_list.c:32:22:LIST_Error_Check 24 static
|
||||
../component/lists/fsl_component_generic_list.c:80:6:LIST_Init 16 static
|
||||
../component/lists/fsl_component_generic_list.c:103:15:LIST_GetList 16 static
|
||||
../component/lists/fsl_component_generic_list.c:124:15:LIST_AddTail 24 static
|
||||
../component/lists/fsl_component_generic_list.c:170:15:LIST_AddHead 24 static
|
||||
../component/lists/fsl_component_generic_list.c:216:23:LIST_RemoveHead 24 static
|
||||
../component/lists/fsl_component_generic_list.c:264:23:LIST_GetHead 16 static
|
||||
../component/lists/fsl_component_generic_list.c:284:23:LIST_GetNext 16 static
|
||||
../component/lists/fsl_component_generic_list.c:304:23:LIST_GetPrev 16 static
|
||||
../component/lists/fsl_component_generic_list.c:328:15:LIST_RemoveElement 32 static
|
||||
../component/lists/fsl_component_generic_list.c:399:15:LIST_AddPrevElement 32 static
|
||||
../component/lists/fsl_component_generic_list.c:471:10:LIST_GetSize 16 static
|
||||
../component/lists/fsl_component_generic_list.c:490:10:LIST_GetAvailableSize 16 static
|
||||
@@ -0,0 +1,31 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../component/lists/fsl_component_generic_list.c
|
||||
|
||||
C_DEPS += \
|
||||
./component/lists/fsl_component_generic_list.d
|
||||
|
||||
OBJS += \
|
||||
./component/lists/fsl_component_generic_list.o
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
component/lists/%.o: ../component/lists/%.c component/lists/subdir.mk
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: MCU C Compiler'
|
||||
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
clean: clean-component-2f-lists
|
||||
|
||||
clean-component-2f-lists:
|
||||
-$(RM) ./component/lists/fsl_component_generic_list.d ./component/lists/fsl_component_generic_list.o
|
||||
|
||||
.PHONY: clean-component-2f-lists
|
||||
|
||||
+17
@@ -0,0 +1,17 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:422:32:SerialManager_StartWriting 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:484:32:SerialManager_StartReading 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1233:32:SerialManager_Write 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1250:32:SerialManager_Read 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1268:25:SerialManager_Init 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1473:25:SerialManager_Deinit 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1552:25:SerialManager_OpenWriteHandle 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1589:25:SerialManager_CloseWriteHandle 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1620:25:SerialManager_OpenReadHandle 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1660:25:SerialManager_CloseReadHandle 32 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1689:25:SerialManager_WriteBlocking 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1698:25:SerialManager_ReadBlocking 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:1945:25:SerialManager_EnterLowpower 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:2001:25:SerialManager_ExitLowpower 24 static
|
||||
../component/serial_manager/fsl_component_serial_manager.c:2065:6:SerialManager_SetLowpowerCriticalCb 16 static
|
||||
+6
@@ -0,0 +1,6 @@
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:171:25:Serial_UartInit 24 static
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:211:25:Serial_UartDeinit 24 static
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:285:25:Serial_UartWrite 32 static
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:299:25:Serial_UartRead 32 static
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:396:25:Serial_UartEnterLowpower 24 static
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c:412:25:Serial_UartExitLowpower 32 static
|
||||
+34
@@ -0,0 +1,34 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../component/serial_manager/fsl_component_serial_manager.c \
|
||||
../component/serial_manager/fsl_component_serial_port_uart.c
|
||||
|
||||
C_DEPS += \
|
||||
./component/serial_manager/fsl_component_serial_manager.d \
|
||||
./component/serial_manager/fsl_component_serial_port_uart.d
|
||||
|
||||
OBJS += \
|
||||
./component/serial_manager/fsl_component_serial_manager.o \
|
||||
./component/serial_manager/fsl_component_serial_port_uart.o
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
component/serial_manager/%.o: ../component/serial_manager/%.c component/serial_manager/subdir.mk
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: MCU C Compiler'
|
||||
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
clean: clean-component-2f-serial_manager
|
||||
|
||||
clean-component-2f-serial_manager:
|
||||
-$(RM) ./component/serial_manager/fsl_component_serial_manager.d ./component/serial_manager/fsl_component_serial_manager.o ./component/serial_manager/fsl_component_serial_port_uart.d ./component/serial_manager/fsl_component_serial_port_uart.o
|
||||
|
||||
.PHONY: clean-component-2f-serial_manager
|
||||
|
||||
+8
@@ -0,0 +1,8 @@
|
||||
../component/uart/fsl_adapter_lpuart.c:262:26:HAL_UartGetStatus 24 static
|
||||
../component/uart/fsl_adapter_lpuart.c:642:26:HAL_UartInitCommon 48 static
|
||||
../component/uart/fsl_adapter_lpuart.c:694:19:HAL_UartInit 24 static
|
||||
../component/uart/fsl_adapter_lpuart.c:753:19:HAL_UartDeinit 24 static
|
||||
../component/uart/fsl_adapter_lpuart.c:774:19:HAL_UartReceiveBlocking 32 static
|
||||
../component/uart/fsl_adapter_lpuart.c:789:19:HAL_UartSendBlocking 32 static
|
||||
../component/uart/fsl_adapter_lpuart.c:804:19:HAL_UartEnterLowpower 16 static
|
||||
../component/uart/fsl_adapter_lpuart.c:811:19:HAL_UartExitLowpower 16 static
|
||||
@@ -0,0 +1,31 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../component/uart/fsl_adapter_lpuart.c
|
||||
|
||||
C_DEPS += \
|
||||
./component/uart/fsl_adapter_lpuart.d
|
||||
|
||||
OBJS += \
|
||||
./component/uart/fsl_adapter_lpuart.o
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
component/uart/%.o: ../component/uart/%.c component/uart/subdir.mk
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: MCU C Compiler'
|
||||
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
clean: clean-component-2f-uart
|
||||
|
||||
clean-component-2f-uart:
|
||||
-$(RM) ./component/uart/fsl_adapter_lpuart.d ./component/uart/fsl_adapter_lpuart.o
|
||||
|
||||
.PHONY: clean-component-2f-uart
|
||||
|
||||
@@ -0,0 +1,31 @@
|
||||
################################################################################
|
||||
# Automatically-generated file. Do not edit!
|
||||
################################################################################
|
||||
|
||||
# Add inputs and outputs from these tool invocations to the build variables
|
||||
C_SRCS += \
|
||||
../device/system_MIMXRT1062.c
|
||||
|
||||
C_DEPS += \
|
||||
./device/system_MIMXRT1062.d
|
||||
|
||||
OBJS += \
|
||||
./device/system_MIMXRT1062.o
|
||||
|
||||
|
||||
# Each subdirectory must supply rules for building sources it contributes
|
||||
device/%.o: ../device/%.c device/subdir.mk
|
||||
@echo 'Building file: $<'
|
||||
@echo 'Invoking: MCU C Compiler'
|
||||
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
|
||||
@echo 'Finished building: $<'
|
||||
@echo ' '
|
||||
|
||||
|
||||
clean: clean-device
|
||||
|
||||
clean-device:
|
||||
-$(RM) ./device/system_MIMXRT1062.d ./device/system_MIMXRT1062.o
|
||||
|
||||
.PHONY: clean-device
|
||||
|
||||
@@ -0,0 +1,3 @@
|
||||
../device/system_MIMXRT1062.c:81:6:SystemInit 8 static
|
||||
../device/system_MIMXRT1062.c:139:6:SystemCoreClockUpdate 48 static
|
||||
../device/system_MIMXRT1062.c:244:29:SystemInitHook 4 static
|
||||
@@ -0,0 +1,51 @@
|
||||
../drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
|
||||
../drivers/fsl_clock.h:1653:24:CLOCK_GetRtcFreq 4 static
|
||||
../drivers/fsl_clock.h:1751:20:CLOCK_IsPllBypassed 16 static
|
||||
../drivers/fsl_clock.h:1765:20:CLOCK_IsPllEnabled 16 static
|
||||
../drivers/fsl_clock.h:1791:24:CLOCK_GetPllBypassRefClk 16 static
|
||||
../drivers/fsl_clock.c:86:17:CLOCK_GetPeriphClkFreq 16 static
|
||||
../drivers/fsl_clock.c:152:17:CLOCK_GetPllUsb1SWFreq 16 static
|
||||
../drivers/fsl_clock.c:190:6:CLOCK_InitExternalClk 16 static
|
||||
../drivers/fsl_clock.c:214:6:CLOCK_DeinitExternalClk 4 static
|
||||
../drivers/fsl_clock.c:226:6:CLOCK_SwitchOsc 16 static
|
||||
../drivers/fsl_clock.c:241:6:CLOCK_InitRcOsc24M 4 static
|
||||
../drivers/fsl_clock.c:249:6:CLOCK_DeinitRcOsc24M 4 static
|
||||
../drivers/fsl_clock.c:259:10:CLOCK_GetAhbFreq 8 static
|
||||
../drivers/fsl_clock.c:269:10:CLOCK_GetSemcFreq 16 static
|
||||
../drivers/fsl_clock.c:303:10:CLOCK_GetIpgFreq 8 static
|
||||
../drivers/fsl_clock.c:313:10:CLOCK_GetPerClkFreq 16 static
|
||||
../drivers/fsl_clock.c:342:10:CLOCK_GetFreq 24 static
|
||||
../drivers/fsl_clock.c:448:10:CLOCK_GetClockRootFreq 40 static
|
||||
../drivers/fsl_clock.c:492:6:CLOCK_EnableUsbhs0Clock 24 static
|
||||
../drivers/fsl_clock.c:519:6:CLOCK_EnableUsbhs1Clock 24 static
|
||||
../drivers/fsl_clock.c:544:6:CLOCK_EnableUsbhs0PhyPllClock 16 static
|
||||
../drivers/fsl_clock.c:568:6:CLOCK_DisableUsbhs0PhyPllClock 4 static
|
||||
../drivers/fsl_clock.c:581:6:CLOCK_InitArmPll 16 static
|
||||
../drivers/fsl_clock.c:602:6:CLOCK_DeinitArmPll 4 static
|
||||
../drivers/fsl_clock.c:614:6:CLOCK_InitSysPll 16 static
|
||||
../drivers/fsl_clock.c:644:6:CLOCK_DeinitSysPll 4 static
|
||||
../drivers/fsl_clock.c:656:6:CLOCK_InitUsb1Pll 16 static
|
||||
../drivers/fsl_clock.c:677:6:CLOCK_DeinitUsb1Pll 4 static
|
||||
../drivers/fsl_clock.c:689:6:CLOCK_InitUsb2Pll 16 static
|
||||
../drivers/fsl_clock.c:710:6:CLOCK_DeinitUsb2Pll 4 static
|
||||
../drivers/fsl_clock.c:722:6:CLOCK_InitAudioPll 24 static
|
||||
../drivers/fsl_clock.c:797:6:CLOCK_DeinitAudioPll 4 static
|
||||
../drivers/fsl_clock.c:809:6:CLOCK_InitVideoPll 24 static
|
||||
../drivers/fsl_clock.c:883:6:CLOCK_DeinitVideoPll 4 static
|
||||
../drivers/fsl_clock.c:895:6:CLOCK_InitEnetPll 24 static
|
||||
../drivers/fsl_clock.c:937:6:CLOCK_DeinitEnetPll 4 static
|
||||
../drivers/fsl_clock.c:950:10:CLOCK_GetPllFreq 128 static
|
||||
../drivers/fsl_clock.c:1174:6:CLOCK_InitSysPfd 24 static
|
||||
../drivers/fsl_clock.c:1197:6:CLOCK_DeinitSysPfd 16 static
|
||||
../drivers/fsl_clock.c:1210:6:CLOCK_IsSysPfdEnabled 16 static
|
||||
../drivers/fsl_clock.c:1225:6:CLOCK_InitUsb1Pfd 24 static
|
||||
../drivers/fsl_clock.c:1248:6:CLOCK_DeinitUsb1Pfd 16 static
|
||||
../drivers/fsl_clock.c:1261:6:CLOCK_IsUsb1PfdEnabled 16 static
|
||||
../drivers/fsl_clock.c:1274:10:CLOCK_GetSysPfdFreq 24 static
|
||||
../drivers/fsl_clock.c:1313:10:CLOCK_GetUsb1PfdFreq 24 static
|
||||
../drivers/fsl_clock.c:1353:6:CLOCK_EnableUsbhs1PhyPllClock 16 static
|
||||
../drivers/fsl_clock.c:1371:6:CLOCK_DisableUsbhs1PhyPllClock 4 static
|
||||
../drivers/fsl_clock.c:1383:6:CLOCK_SetClockOutput1 24 static
|
||||
../drivers/fsl_clock.c:1407:6:CLOCK_SetClockOutput2 24 static
|
||||
../drivers/fsl_clock.c:1431:10:CLOCK_GetClockOutCLKO1Freq 16 static
|
||||
../drivers/fsl_clock.c:1492:10:CLOCK_GetClockOutClkO2Freq 16 static
|
||||
@@ -0,0 +1,2 @@
|
||||
../drivers/fsl_common.c:25:7:SDK_Malloc 32 static
|
||||
../drivers/fsl_common.c:66:6:SDK_Free 24 static
|
||||
@@ -0,0 +1,4 @@
|
||||
../drivers/fsl_common_arm.c:121:6:MSDK_EnableCpuCycleCounter 8 static
|
||||
../drivers/fsl_common_arm.c:139:10:MSDK_GetCpuCycleCount 4 static
|
||||
../drivers/fsl_common_arm.c:175:13:DelayLoop 16 static
|
||||
../drivers/fsl_common_arm.c:205:6:SDK_DelayAtLeastUs 48 static
|
||||
@@ -0,0 +1,8 @@
|
||||
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
|
||||
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
|
||||
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
|
||||
../drivers/fsl_gpio.h:242:20:GPIO_SetPinInterruptConfig 24 static
|
||||
../drivers/fsl_gpio.c:47:17:GPIO_GetInstance 24 static
|
||||
../drivers/fsl_gpio.c:75:6:GPIO_PinInit 32 static
|
||||
../drivers/fsl_gpio.c:115:6:GPIO_PinWrite 24 static
|
||||
../drivers/fsl_gpio.c:144:6:GPIO_PinSetInterruptConfig 32 static
|
||||
@@ -0,0 +1,50 @@
|
||||
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:1911:22:__NVIC_EnableIRQ 16 static
|
||||
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
|
||||
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
|
||||
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
|
||||
../drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
|
||||
../drivers/fsl_common_arm.h:514:24:EnableIRQ 24 static
|
||||
../drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
|
||||
../drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
|
||||
../drivers/fsl_lpuart.h:355:20:LPUART_SoftwareReset 16 static
|
||||
../drivers/fsl_lpuart.c:159:10:LPUART_GetInstance 24 static
|
||||
../drivers/fsl_lpuart.c:194:8:LPUART_TransferGetRxRingBufferLength 32 static
|
||||
../drivers/fsl_lpuart.c:215:13:LPUART_TransferIsRxRingBufferFull 24 static
|
||||
../drivers/fsl_lpuart.c:232:13:LPUART_WriteNonBlocking 32 static
|
||||
../drivers/fsl_lpuart.c:246:13:LPUART_ReadNonBlocking 40 static
|
||||
../drivers/fsl_lpuart.c:300:10:LPUART_Init 56 static
|
||||
../drivers/fsl_lpuart.c:524:6:LPUART_Deinit 24 static
|
||||
../drivers/fsl_lpuart.c:588:6:LPUART_GetDefaultConfig 16 static
|
||||
../drivers/fsl_lpuart.c:633:10:LPUART_SetBaudRate 56 static
|
||||
../drivers/fsl_lpuart.c:733:6:LPUART_Enable9bitMode 24 static
|
||||
../drivers/fsl_lpuart.c:767:6:LPUART_SendAddress 24 static
|
||||
../drivers/fsl_lpuart.c:789:6:LPUART_EnableInterrupts 24 static
|
||||
../drivers/fsl_lpuart.c:831:6:LPUART_DisableInterrupts 24 static
|
||||
../drivers/fsl_lpuart.c:879:10:LPUART_GetEnabledInterrupts 24 static
|
||||
../drivers/fsl_lpuart.c:917:10:LPUART_GetStatusFlags 24 static
|
||||
../drivers/fsl_lpuart.c:950:10:LPUART_ClearStatusFlags 24 static
|
||||
../drivers/fsl_lpuart.c:1000:10:LPUART_WriteBlocking 32 static
|
||||
../drivers/fsl_lpuart.c:1065:10:LPUART_ReadBlocking 48 static
|
||||
../drivers/fsl_lpuart.c:1200:6:LPUART_TransferCreateHandle 40 static
|
||||
../drivers/fsl_lpuart.c:1265:6:LPUART_TransferStartRingBuffer 32 static
|
||||
../drivers/fsl_lpuart.c:1294:6:LPUART_TransferStopRingBuffer 24 static
|
||||
../drivers/fsl_lpuart.c:1332:10:LPUART_TransferSendNonBlocking 32 static
|
||||
../drivers/fsl_lpuart.c:1375:6:LPUART_TransferAbortSend 24 static
|
||||
../drivers/fsl_lpuart.c:1400:10:LPUART_TransferGetSendCount 32 static
|
||||
../drivers/fsl_lpuart.c:1458:10:LPUART_TransferReceiveNonBlocking 56 static
|
||||
../drivers/fsl_lpuart.c:1597:6:LPUART_TransferAbortReceive 24 static
|
||||
../drivers/fsl_lpuart.c:1628:10:LPUART_TransferGetReceiveCount 32 static
|
||||
../drivers/fsl_lpuart.c:1648:13:LPUART_TransferHandleIDLEReady 32 static
|
||||
../drivers/fsl_lpuart.c:1701:13:LPUART_TransferHandleReceiveDataFull 40 static
|
||||
../drivers/fsl_lpuart.c:1814:13:LPUART_TransferHandleSendDataEmpty 24 static
|
||||
../drivers/fsl_lpuart.c:1854:13:LPUART_TransferHandleTransmissionComplete 32 static
|
||||
../drivers/fsl_lpuart.c:1882:6:LPUART_TransferHandleIRQ 40 static
|
||||
../drivers/fsl_lpuart.c:1940:6:LPUART_TransferHandleErrorIRQ 16 static
|
||||
../drivers/fsl_lpuart.c:2035:6:LPUART1_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2060:6:LPUART2_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2084:6:LPUART3_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2108:6:LPUART4_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2132:6:LPUART5_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2156:6:LPUART6_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2180:6:LPUART7_DriverIRQHandler 8 static
|
||||
../drivers/fsl_lpuart.c:2204:6:LPUART8_DriverIRQHandler 8 static
|
||||
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