diff --git a/.github/workflows/quicktest.yml b/.github/workflows/quicktest.yml
index b38cfa96..f9d53088 100644
--- a/.github/workflows/quicktest.yml
+++ b/.github/workflows/quicktest.yml
@@ -263,6 +263,7 @@ jobs:
           - path: stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver
           - path: stm32/nucleo-h563zi-make-baremetal-builtin
           - path: stm32/nucleo-h563zi-make-freertos-builtin
+          - path: stm32/nucleo-h723zg-make-baremetal-builtin
           - path: stm32/nucleo-h723zg-make-freertos-builtin
           - path: stm32/nucleo-h743zi-make-baremetal-builtin
           - path: stm32/nucleo-h743zi-make-freertos-builtin
@@ -326,64 +327,6 @@ jobs:
       - if: ${{ env.GO == 1 }}
         run: make -C examples/${{ matrix.example.path }} build
       
-#  dual_examples:
-#    runs-on: ubuntu-latest
-#    strategy:
-#      fail-fast: false
-#      matrix:
-#        example:
-#          - path: 
-#    name: ${{ matrix.example.path }}
-#    env:
-#      GO: 0
-#    steps:
-#      - uses: actions/checkout@v4
-#        with: { fetch-depth: 2 }
-#      - run: |
-#          if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
-#            echo GO=1 >> $GITHUB_ENV
-#            # nothing specific to install or do
-#          fi
-#      - if: ${{ env.GO == 1 }}
-#        run: |
-#          if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
-#            make -C examples/${{ matrix.example.path }} device_dashboard
-#          fi
-#      - if: ${{ env.GO == 1 }}
-#        run: |
-#          if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
-#            make -C examples/${{ matrix.example.path }} mqtt_dashboard
-#          fi
-
-  dual_examples_arm:
-    runs-on: ubuntu-latest
-    strategy:
-      fail-fast: false
-      matrix:
-        example:
-          - path: stm32/nucleo-h723zg-make-baremetal-builtin
-    name: ${{ matrix.example.path }}
-    env:
-      GO: 0
-    steps:
-      - uses: actions/checkout@v4
-        with: { fetch-depth: 2 }
-      - run: |
-          if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
-            echo GO=1 >> $GITHUB_ENV
-            sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
-          fi
-      - if: ${{ env.GO == 1 }}
-        run: |
-          if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
-            make -C examples/${{ matrix.example.path }} device_dashboard
-          fi
-      - if: ${{ env.GO == 1 }}
-        run: |
-          if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
-            make -C examples/${{ matrix.example.path }} mqtt_dashboard
-          fi
-
   cube_examples:
     runs-on: ubuntu-latest
     env:
diff --git a/examples/stm32/nucleo-f429zi-make-baremetal-builtin/Makefile b/examples/stm32/nucleo-f429zi-make-baremetal-builtin/Makefile
index e16acb05..95d56bc8 100644
--- a/examples/stm32/nucleo-f429zi-make-baremetal-builtin/Makefile
+++ b/examples/stm32/nucleo-f429zi-make-baremetal-builtin/Makefile
@@ -22,7 +22,7 @@ update: firmware.bin
 
 test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
 
 clean:
diff --git a/examples/stm32/nucleo-f429zi-make-freertos-builtin/Makefile b/examples/stm32/nucleo-f429zi-make-freertos-builtin/Makefile
index bb1b043c..1e6e5b69 100644
--- a/examples/stm32/nucleo-f429zi-make-freertos-builtin/Makefile
+++ b/examples/stm32/nucleo-f429zi-make-freertos-builtin/Makefile
@@ -22,7 +22,7 @@ update: firmware.bin
 
 test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
 
 clean:
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin-autoinit/mongoose_config.h b/examples/stm32/nucleo-f746zg-make-baremetal-builtin-autoinit/mongoose_config.h
deleted file mode 100644
index e0dd04be..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin-autoinit/mongoose_config.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#pragma once
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_NEWLIB
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_CUSTOM_MILLIS 1
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1 
-#define MG_ENABLE_DRIVER_STM32F 1
-#define MG_ENABLE_TCPIP_DRIVER_INIT 1
-#define MG_ENABLE_LINES 1
-#define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 1
-
-#define MG_UUID ((uint8_t *) 0x1FF0F420U)  // Unique 96-bit chip ID. TRM 41.1
-
-#define MG_MAC_ADDRESS                                                 \
-  {                                                                    \
-    2, MG_UUID[0] ^ MG_UUID[1], MG_UUID[2] ^ MG_UUID[3],               \
-        MG_UUID[4] ^ MG_UUID[5], MG_UUID[6] ^ MG_UUID[7] ^ MG_UUID[8], \
-        MG_UUID[9] ^ MG_UUID[10] ^ MG_UUID[11]                         \
-  }
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/Makefile b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/Makefile
index 4976bf9e..812d9a97 100644
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/Makefile
+++ b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/Makefile
@@ -1,59 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_f7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_f7/Source/Templates/gcc/startup_stm32f746xx.s # ST startup file. Compiler-dependent!
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-else
-  RM = rm -rf
-endif
+BOARD = f746
+IDE = GCC+make
+RTOS = baremetal
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-firmware.elf: cmsis_core cmsis_f7 $(SOURCES) hal.h link.ld Makefile
-	arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:     # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_f7:       # ST CMSIS headers for STM32F7 series
-	git clone --depth 1 -b v1.2.8 https://github.com/STMicroelectronics/cmsis_device_f7 $@
-mbedtls:        # mbedTLS library
-	git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@
-
-ifeq ($(TLS), mbedtls)
-CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include
-CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c
-firmware.elf: mbedtls
-endif
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/5
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
-#	grep 'MQTT connected' /tmp/output.txt   # Check for MQTT connection success
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_f7 mbedtls
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/README.md b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/README.md
index 7dc3200f..0cfc8eec 100644
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/README.md
+++ b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/README.md
@@ -1,3 +1 @@
-# Baremetal web device dashboard on NUCLEO-F746ZG
-
-See https://mongoose.ws/tutorials/stm32/all-make-baremetal-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=f746&ide=GCC+make&rtos=baremetal&file=README.md)
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/hal.h b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/hal.h
deleted file mode 100644
index bbd67cde..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/hal.h
+++ /dev/null
@@ -1,165 +0,0 @@
-// Copyright (c) 2022 Cesanta Software Limited
-// All rights reserved
-// https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf
-// https://www.st.com/resource/en/datasheet/stm32f746zg.pdf
-
-#pragma once
-
-#include <stm32f746xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('B', 7)   // On-board LED pin (blue)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-
-#define LED LED2              // Use blue LED for blinking
-
-/* System clock
-5.3.3: APB1 clock <= 54MHz; APB2 clock <= 108MHz
-3.3.2, Table 5: configure flash latency (WS) in accordance to clock freq
-38.4: The AHB clock frequency must be at least 25 MHz when the Ethernet
-controller is used */
-enum { APB1_PRE = 5 /* AHB clock / 4 */, APB2_PRE = 4 /* AHB clock / 2 */ };
-enum { PLL_HSI = 16, PLL_M = 8, PLL_N = 216, PLL_P = 2 };  // Run at 216 Mhz
-#define FLASH_LATENCY 7
-#define SYS_FREQUENCY ((PLL_HSI * PLL_N / PLL_M / PLL_P) * 1000000)
-#define APB2_FREQUENCY (SYS_FREQUENCY / (BIT(APB2_PRE - 3)))
-#define APB1_FREQUENCY (SYS_FREQUENCY / (BIT(APB1_PRE - 3)))
-
-static inline void spin(volatile uint32_t count) {
-  while (count--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-#define GPIO(N) ((GPIO_TypeDef *) (0x40020000 + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); }
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB1ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-static inline void irq_exti_attach(uint16_t pin) {
-  uint8_t bank = (uint8_t) (PINBANK(pin)), n = (uint8_t) (PINNO(pin));
-  SYSCFG->EXTICR[n / 4] &= ~(15UL << ((n % 4) * 4));
-  SYSCFG->EXTICR[n / 4] |= (uint32_t) (bank << ((n % 4) * 4));
-  EXTI->IMR |= BIT(n);
-  EXTI->RTSR |= BIT(n);
-  EXTI->FTSR |= BIT(n);
-  int irqvec = n < 5 ? 6 + n : n < 10 ? 23 : 40;  // IRQ vector index, 10.1.2
-  NVIC_SetPriority(irqvec, 3);
-  NVIC_EnableIRQ(irqvec);
-}
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                          // Disable this UART
-  uart->BRR = freq / baud;                // Set baud rate
-  uart->CR1 |= BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-static inline void rng_init(void) {
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;
-  RNG->CR |= RNG_CR_RNGEN;
-}
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.farnell.com/datasheets/2014265.pdf section 6.10
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  NVIC_EnableIRQ(ETH_IRQn);                // Setup Ethernet IRQ handler
-  SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;  // Use RMII. Goes first!
-  RCC->AHB1ENR |=
-      RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | RCC_AHB1ENR_ETHMACRXEN;
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 41.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/link.ld b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/link.ld
deleted file mode 100644
index 330baddd..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/link.ld
+++ /dev/null
@@ -1,29 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k
-  sram(rwx) : ORIGIN = 0x20000000, LENGTH = 320k
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;   /* for init_ram() */
-    *(.first_data)
-    *(.data SORT(.data.*))
-    _edata = .;  /* for init_ram() */
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : {
-    _sbss = .;              /* for init_ram() */
-    *(.bss SORT(.bss.*) COMMON)
-    _ebss = .;              /* for init_ram() */
-  } > sram
-
-  . = ALIGN(8);
-  _end = .;     /* for cmsis_gcc.h and init_ram() */
-}
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/main.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/main.c
deleted file mode 100644
index dc4fa7a4..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/main.c
+++ /dev/null
@@ -1,52 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-static volatile uint64_t s_ticks;  // Milliseconds since boot
-void SysTick_Handler(void) {       // SyStick IRQ handler, triggered every 1ms
-  s_ticks++;
-}
-
-uint64_t mg_millis(void) {  // Let Mongoose use our uptime function
-  return s_ticks;           // Return number of milliseconds since boot
-}
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-static void timer_fn(void *arg) {
-  gpio_toggle(LED);  // Blink LED
-  (void) arg;
-}
-
-int main(void) {
-  gpio_output(LED);               // Setup blue LED
-  uart_init(UART_DEBUG, 115200);  // Initialise debug printf
-  ethernet_init();                // Initialise ethernet pins
-  MG_INFO(("Starting, CPU freq %g MHz", (double) SystemCoreClock / 1000000));
-
-  struct mg_mgr mgr;        // Initialise
-  mg_mgr_init(&mgr);        // Mongoose event manager
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, NULL);
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  return 0;
-}
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.h b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose_config.h b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose_config.h
deleted file mode 100644
index 415a6107..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/mongoose_config.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#pragma once
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_NEWLIB
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_CUSTOM_MILLIS 1
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1 
-#define MG_ENABLE_DRIVER_STM32F 1
-#define MG_ENABLE_LINES 1
-#define MG_ENABLE_TCPIP_PRINT_DEBUG_STATS 1
-
-// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
-// By default, those are set to zero, meaning that DHCP is used
-//
-// #define MG_TCPIP_IP MG_IPV4(192, 168, 0, 10)
-// #define MG_TCPIP_GW MG_IPV4(192, 168, 0, 1)
-// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
-
-// Set custom MAC address. By default, it is randomly generated
-// Using a build-time constant:
-// #define MG_SET_MAC_ADDRESS(mac) do { uint8_t buf_[6] = {2,3,4,5,6,7}; memmove(mac, buf_, sizeof(buf_)); } while (0)
-//
-// Using custom function:
-// extern void my_function(unsigned char *mac);
-// #define MG_SET_MAC_ADDRESS(mac) my_function(mac)
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.c
deleted file mode 120000
index fe0e6f06..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.h b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.h
deleted file mode 120000
index 9de896ef..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/packed_fs.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/syscalls.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/syscalls.c
deleted file mode 100644
index 6fef1007..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/syscalls.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  unsigned char x = 0, *heap_end = (unsigned char *)((size_t) &x - 512);
-  (void) x;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  if (heap + incr > heap_end) return (void *) -1;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
-
-extern uint64_t mg_now(void);
-
-int _gettimeofday(struct timeval *tv, void *tz) {
-  uint64_t now = mg_now();
-  (void) tz;
-  tv->tv_sec = (time_t) (now / 1000);
-  tv->tv_usec = (unsigned long) ((now % 1000) * 1000);
-  return 0;
-}
diff --git a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/sysinit.c b/examples/stm32/nucleo-f746zg-make-baremetal-builtin/sysinit.c
deleted file mode 100644
index 5e65284e..00000000
--- a/examples/stm32/nucleo-f746zg-make-baremetal-builtin/sysinit.c
+++ /dev/null
@@ -1,29 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-
-#include "hal.h"
-
-uint32_t SystemCoreClock = SYS_FREQUENCY;
-
-void SystemInit(void) {  // Called automatically by startup code
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  asm("DSB");
-  asm("ISB");
-  FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9);    // Flash latency, prefetch
-  RCC->PLLCFGR &= ~((BIT(17) - 1));                 // Clear PLL multipliers
-  RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16;    // Set PLL_P
-  RCC->PLLCFGR |= PLL_M | (PLL_N << 6);             // Set PLL_M and PLL_N
-  RCC->CR |= BIT(24);                               // Enable PLL
-  while ((RCC->CR & BIT(25)) == 0) spin(1);         // Wait until done
-  RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13);  // Set prescalers
-  RCC->CFGR |= 2;                                   // Set clock source to PLL
-  while ((RCC->CFGR & 12) == 0) spin(1);            // Wait until done
-
-  RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;    // Enable SYSCFG
-  rng_init();                              // Initialise random number generator
-  SysTick_Config(SystemCoreClock / 1000);  // Sys tick every 1ms
-}
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/FreeRTOSConfig.h b/examples/stm32/nucleo-f746zg-make-freertos-builtin/FreeRTOSConfig.h
deleted file mode 100644
index 8ae184bb..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/FreeRTOSConfig.h
+++ /dev/null
@@ -1,37 +0,0 @@
-#pragma once
-
-#include "hal.h"
-
-#define configUSE_PREEMPTION 1
-#define configCPU_CLOCK_HZ SYS_FREQUENCY
-#define configTICK_RATE_HZ 1000
-#define configMAX_PRIORITIES 5
-#define configUSE_16_BIT_TICKS 0
-#define configUSE_TICK_HOOK 0
-#define configUSE_IDLE_HOOK 0
-#define configUSE_TIMERS 0
-#define configUSE_CO_ROUTINES 0
-#define configUSE_MALLOC_FAILED_HOOK 0
-#define configMINIMAL_STACK_SIZE 128
-#define configTOTAL_HEAP_SIZE (1024 * 128)
-#define INCLUDE_vTaskDelay 1
-
-#ifdef __NVIC_PRIO_BITS
-#define configPRIO_BITS __NVIC_PRIO_BITS
-#else
-#define configPRIO_BITS 4
-#endif
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
-#define configKERNEL_INTERRUPT_PRIORITY \
-  (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
-  (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configASSERT(expr) \
-  if (!(expr)) printf("FAILURE %s:%d: %s\n", __FILE__, __LINE__, #expr)
-
-#define vPortSVCHandler SVC_Handler
-#define xPortPendSVHandler PendSV_Handler
-#define xPortSysTickHandler SysTick_Handler
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/Makefile b/examples/stm32/nucleo-f746zg-make-freertos-builtin/Makefile
index 73e4009a..fb68e8b6 100644
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/Makefile
+++ b/examples/stm32/nucleo-f746zg-make-freertos-builtin/Makefile
@@ -1,59 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_f7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_f7/Source/Templates/gcc/startup_stm32f746xx.s # ST startup file. Compiler-dependent!
-
-# FreeRTOS
-SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c
-SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1/port.c
-CFLAGS += -IFreeRTOS-Kernel/include 
-CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM7/r0p1 -Wno-conversion
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-else
-  RM = rm -rf
-endif
+BOARD = f746
+IDE = GCC+make
+RTOS = FreeRTOS
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_f7 $(SOURCES) hal.h link.ld 
-	arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:  # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_f7:       # ST CMSIS headers for STM32F7 series
-	git clone --depth 1 -b v1.2.8 https://github.com/STMicroelectronics/cmsis_device_f7 $@
-FreeRTOS-Kernel:  # FreeRTOS sources
-	git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/5
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
-#	grep 'MQTT connected' /tmp/output.txt   # Check for MQTT connection success
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_f7 FreeRTOS-Kernel
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/README.md b/examples/stm32/nucleo-f746zg-make-freertos-builtin/README.md
index a4173782..6e2c31e7 100644
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/README.md
+++ b/examples/stm32/nucleo-f746zg-make-freertos-builtin/README.md
@@ -1,3 +1 @@
-# FreeRTOS Web device dashboard on NUCLEO-F746ZG
-
-See https://mongoose.ws/tutorials/stm32/all-make-freertos-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=f746&ide=GCC+make&rtos=FreeRTOS&file=README.md)
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/hal.h b/examples/stm32/nucleo-f746zg-make-freertos-builtin/hal.h
deleted file mode 100644
index bbd67cde..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/hal.h
+++ /dev/null
@@ -1,165 +0,0 @@
-// Copyright (c) 2022 Cesanta Software Limited
-// All rights reserved
-// https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf
-// https://www.st.com/resource/en/datasheet/stm32f746zg.pdf
-
-#pragma once
-
-#include <stm32f746xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('B', 7)   // On-board LED pin (blue)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-
-#define LED LED2              // Use blue LED for blinking
-
-/* System clock
-5.3.3: APB1 clock <= 54MHz; APB2 clock <= 108MHz
-3.3.2, Table 5: configure flash latency (WS) in accordance to clock freq
-38.4: The AHB clock frequency must be at least 25 MHz when the Ethernet
-controller is used */
-enum { APB1_PRE = 5 /* AHB clock / 4 */, APB2_PRE = 4 /* AHB clock / 2 */ };
-enum { PLL_HSI = 16, PLL_M = 8, PLL_N = 216, PLL_P = 2 };  // Run at 216 Mhz
-#define FLASH_LATENCY 7
-#define SYS_FREQUENCY ((PLL_HSI * PLL_N / PLL_M / PLL_P) * 1000000)
-#define APB2_FREQUENCY (SYS_FREQUENCY / (BIT(APB2_PRE - 3)))
-#define APB1_FREQUENCY (SYS_FREQUENCY / (BIT(APB1_PRE - 3)))
-
-static inline void spin(volatile uint32_t count) {
-  while (count--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-#define GPIO(N) ((GPIO_TypeDef *) (0x40020000 + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); }
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB1ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-static inline void irq_exti_attach(uint16_t pin) {
-  uint8_t bank = (uint8_t) (PINBANK(pin)), n = (uint8_t) (PINNO(pin));
-  SYSCFG->EXTICR[n / 4] &= ~(15UL << ((n % 4) * 4));
-  SYSCFG->EXTICR[n / 4] |= (uint32_t) (bank << ((n % 4) * 4));
-  EXTI->IMR |= BIT(n);
-  EXTI->RTSR |= BIT(n);
-  EXTI->FTSR |= BIT(n);
-  int irqvec = n < 5 ? 6 + n : n < 10 ? 23 : 40;  // IRQ vector index, 10.1.2
-  NVIC_SetPriority(irqvec, 3);
-  NVIC_EnableIRQ(irqvec);
-}
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                          // Disable this UART
-  uart->BRR = freq / baud;                // Set baud rate
-  uart->CR1 |= BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-static inline void rng_init(void) {
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;
-  RNG->CR |= RNG_CR_RNGEN;
-}
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.farnell.com/datasheets/2014265.pdf section 6.10
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  NVIC_EnableIRQ(ETH_IRQn);                // Setup Ethernet IRQ handler
-  SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;  // Use RMII. Goes first!
-  RCC->AHB1ENR |=
-      RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | RCC_AHB1ENR_ETHMACRXEN;
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 41.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/link.ld b/examples/stm32/nucleo-f746zg-make-freertos-builtin/link.ld
deleted file mode 100644
index 330baddd..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/link.ld
+++ /dev/null
@@ -1,29 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k
-  sram(rwx) : ORIGIN = 0x20000000, LENGTH = 320k
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;   /* for init_ram() */
-    *(.first_data)
-    *(.data SORT(.data.*))
-    _edata = .;  /* for init_ram() */
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : {
-    _sbss = .;              /* for init_ram() */
-    *(.bss SORT(.bss.*) COMMON)
-    _ebss = .;              /* for init_ram() */
-  } > sram
-
-  . = ALIGN(8);
-  _end = .;     /* for cmsis_gcc.h and init_ram() */
-}
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/main.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/main.c
deleted file mode 100644
index 58382cba..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/main.c
+++ /dev/null
@@ -1,76 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-static void timer_fn(void *arg) {
-  struct mg_tcpip_if *ifp = arg;                         // And show
-  const char *names[] = {"down", "up", "req", "ready"};  // network stats
-  MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
-           names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
-           ifp->ndrop, ifp->nerr));
-}
-
-static void server(void *args) {
-  struct mg_mgr mgr;        // Initialise Mongoose event manager
-  mg_mgr_init(&mgr);        // and attach it to the interface
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-
-  // Initialise Mongoose network stack
-  ethernet_init();
-  struct mg_tcpip_driver_stm32f_data driver_data = {.mdc_cr = 4};
-  struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC(),
-                            // Uncomment below for static configuration:
-                            // .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
-                            // .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
-                            // .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
-                            .driver = &mg_tcpip_driver_stm32f,
-                            .driver_data = &driver_data};
-  mg_tcpip_init(&mgr, &mif);
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
-
-  MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
-  while (mif.state != MG_TCPIP_STATE_READY) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) mg_mgr_poll(&mgr, 1);  // Infinite event loop
-  (void) args;
-}
-
-static void blinker(void *args) {
-  gpio_init(LED, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_MEDIUM,
-            GPIO_PULL_NONE, 0);
-  for (;;) {
-    gpio_toggle(LED);
-    vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS));
-  }
-  (void) args;
-}
-
-int main(void) {
-  uart_init(UART_DEBUG, 115200);  // Initialise UART
-
-  // Start tasks. NOTE: stack sizes are in 32-bit words
-  xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL);
-  xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL);
-
-  vTaskStartScheduler();  // This blocks
-  return 0;
-}
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.h b/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose_config.h b/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose_config.h
deleted file mode 100644
index 89f25b76..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/mongoose_config.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#pragma once
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_FREERTOS
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_DRIVER_STM32F 1
-#define MG_IO_SIZE 256
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1
-
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.c
deleted file mode 120000
index fe0e6f06..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.h b/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.h
deleted file mode 120000
index 9de896ef..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/packed_fs.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/syscalls.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/syscalls.c
deleted file mode 100644
index be3210aa..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/syscalls.c
+++ /dev/null
@@ -1,85 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
diff --git a/examples/stm32/nucleo-f746zg-make-freertos-builtin/sysinit.c b/examples/stm32/nucleo-f746zg-make-freertos-builtin/sysinit.c
deleted file mode 100644
index 5e65284e..00000000
--- a/examples/stm32/nucleo-f746zg-make-freertos-builtin/sysinit.c
+++ /dev/null
@@ -1,29 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-
-#include "hal.h"
-
-uint32_t SystemCoreClock = SYS_FREQUENCY;
-
-void SystemInit(void) {  // Called automatically by startup code
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  asm("DSB");
-  asm("ISB");
-  FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9);    // Flash latency, prefetch
-  RCC->PLLCFGR &= ~((BIT(17) - 1));                 // Clear PLL multipliers
-  RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16;    // Set PLL_P
-  RCC->PLLCFGR |= PLL_M | (PLL_N << 6);             // Set PLL_M and PLL_N
-  RCC->CR |= BIT(24);                               // Enable PLL
-  while ((RCC->CR & BIT(25)) == 0) spin(1);         // Wait until done
-  RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13);  // Set prescalers
-  RCC->CFGR |= 2;                                   // Set clock source to PLL
-  while ((RCC->CFGR & 12) == 0) spin(1);            // Wait until done
-
-  RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN;    // Enable SYSCFG
-  rng_init();                              // Initialise random number generator
-  SysTick_Config(SystemCoreClock / 1000);  // Sys tick every 1ms
-}
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/Makefile b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/Makefile
index 62adf0c8..18d7402b 100644
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/Makefile
+++ b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/Makefile
@@ -1,76 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_h7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_h7/Source/Templates/gcc/startup_stm32h723xx.s # ST startup file. Compiler-dependent!
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-  SYMLINK = cmd /C mklink /H
-else
-  RM = rm -rf
-  SYMLINK = ln -sf
-endif
+BOARD = h723
+IDE = GCC+make
+RTOS = baremetal
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-device_dashboard: clean_bin device_dashboard_net firmware.bin
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-mqtt_dashboard: clean_bin mqtt_dashboard_net firmware.bin
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
-
-firmware.elf: cmsis_core cmsis_h7 $(SOURCES) hal.h link.ld Makefile
-	arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
-	arm-none-eabi-size $@
-
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:     # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_h7:       # ST CMSIS headers for STM32H7 series
-	git clone --depth 1 -b v1.10.3 https://github.com/STMicroelectronics/cmsis_device_h7 $@
-mbedtls:        # mbedTLS library
-	git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@
-
-ifeq ($(TLS), mbedtls)
-CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include
-CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c
-firmware.elf: mbedtls
-endif
-
-device_dashboard_net:
-	$(SYMLINK) ../../device-dashboard/net.c net.c
-	$(SYMLINK) ../../device-dashboard/net.h net.h
-
-mqtt_dashboard_net:
-	$(SYMLINK) ../../mqtt-dashboard/device/net.c net.c
-	$(SYMLINK) ../../mqtt-dashboard/device/net.h net.h
-
-clean_bin:
-	$(RM) firmware.elf firmware.bin
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/10
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_h7 mbedtls
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/README.md b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/README.md
index c8101539..8ac8d7a5 100644
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/README.md
+++ b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/README.md
@@ -1,3 +1 @@
-# Baremetal web device dashboard on NUCLEO-H723ZG
-
-See https://mongoose.ws/tutorials/stm32/all-make-baremetal-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=h723&ide=GCC+make&rtos=baremetal&file=README.md)
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/hal.h b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/hal.h
deleted file mode 100644
index c3259506..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/hal.h
+++ /dev/null
@@ -1,187 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-//
-// Datasheet: RM0468, devboard manual: UM2407
-// https://www.st.com/resource/en/reference_manual/rm0468-stm32h723733-stm32h725735-and-stm32h730-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-// https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-// Alternate functions: https://www.st.com/resource/en/datasheet/stm32h723.pdf
-
-#pragma once
-
-#define BTN PIN('C', 13)   // User push button
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('E', 1)   // On-board LED pin (yellow)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-#define LED LED2           // Use yellow LED for blinking
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-#include <stm32h723xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-// System clock (2.1, Figure 1; 8.5, Figure 45; 8.5.5, Figure 47; 8.5.6, Figure
-// 49; 8.5.8 Table 56; datasheet) CPU_FREQUENCY <= 550 MHz; hclk = CPU_FREQUENCY
-// / HPRE ; hclk <= 275 MHz; APB clocks <= 137.5 MHz. D1 domain bus matrix (and
-// so flash) runs at hclk frequency. Configure flash latency (WS) in accordance
-// to hclk freq (4.3.8, Table 16) The Ethernet controller is in D2 domain and
-// runs at hclk frequency
-enum {
-  D1CPRE = 1,  // actual divisor value
-  HPRE = 2,    // actual divisor value
-  D1PPRE = 4,  // register values, divisor value = BIT(value - 3) = / 2
-  D2PPRE1 = 4,
-  D2PPRE2 = 4,
-  D3PPRE = 4
-};
-// PLL1_P: odd division factors are not allowed (8.7.12) (except for '1')
-enum { PLL1_HSI = 64, PLL1_M = 32, PLL1_N = 225, PLL1_P = 1 };
-#define FLASH_LATENCY 0x33  // WRHIGHFREQ LATENCY
-#define CPU_FREQUENCY ((PLL1_HSI * PLL1_N / PLL1_M / PLL1_P / D1CPRE) * 1000000)
-#define AHB_FREQUENCY (CPU_FREQUENCY / HPRE)
-#define APB2_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE2 - 3)))
-#define APB1_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE1 - 3)))
-
-static inline void spin(volatile uint32_t n) {
-  while (n--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-
-#define GPIO(N) ((GPIO_TypeDef *) (0x40000000 + 0x18020000UL + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) {
-  return GPIO(PINBANK(pin));
-}
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB4ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-// D2 Kernel clock (8.7.21) USART1 defaults to pclk2 (APB2), while USART2,3
-// default to pclk1 (APB1). Even if using other kernel clocks, the APBx clocks
-// must be enabled for CPU access, as the kernel clock drives the BRR, not the
-// APB bus interface
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-#if 0  // CONSTANT BAUD RATE FOR REMOTE DEBUGGING WHILE SETTING THE PLL
-  SETBITS(RCC->D2CCIP2R, 7 << 3, 3 << 3);  // use HSI for UART1
-  freq = 64000000;
-#endif
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                         // Disable this UART
-  uart->BRR = freq / baud;               // Set baud rate
-  uart->CR1 = BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-// RNG clock (rng_clk) defaults to HSI48 and is characterized at this frequency.
-// Enable at SystemInit. (STM32CubeMX) It won't work with a 275MHz (AHB)
-static inline void rng_init(void) {
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;  // Enable RNG AHB clock (rng_hclk)
-  // 39.6.2 Table 320 init
-  RNG->CR = RNG_CR_CONDRST | (0x0F << RNG_CR_RNG_CONFIG1_Pos) |
-            (0 << RNG_CR_RNG_CONFIG2_Pos) | (0xD << RNG_CR_RNG_CONFIG3_Pos);
-  RNG->HTCR = 0x17590abc;
-  RNG->HTCR = 0xaa74;
-  RNG->CR &= ~RNG_CR_CONDRST ;
-  while(RNG->CR & RNG_CR_CONDRST) spin(1); // 39.7.1
-  RNG->CR |= RNG_CR_RNGEN;  // Enable RNG
-}
-
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  NVIC_EnableIRQ(ETH_IRQn);                     // Setup Ethernet IRQ handler
-  SETBITS(SYSCFG->PMCR, 7 << 21, 4 << 21);      // Use RMII (12.3.1)
-  RCC->AHB1ENR |= BIT(15) | BIT(16) | BIT(17);  // Enable Ethernet clocks
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 61.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/link.ld b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/link.ld
deleted file mode 100644
index 9256c024..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/link.ld
+++ /dev/null
@@ -1,30 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k
-  sram(rwx) : ORIGIN = 0x24000000, LENGTH = 128k  /* AXI SRAM in domain D1 */
-  /* 2.3.2: remaining SRAM is in other (non-contiguous) banks,
-     DTCM @0x20000000 is in domain D1 and not accessible by the ETH DMA controller in domain D2
-          @0x24020000 can be either AXI or ITCM (2.4 Table 8)
-     SRAM @0x30000000 is in domain D2 and not directly available at startup to be used as stack (8.5.9 page 366)
-     SRAM @0x38000000 is in domain D3 and not directly available at startup to be used as stack (8.5.9 page 366) */
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;
-    *(.first_data)
-    *(.data SORT(.data.*))
-    *(.iram .iram* .iram.*)
-    _edata = .;
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
-  . = ALIGN(8);
-  _end = .;
-}
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/main.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/main.c
deleted file mode 100644
index 8ce71edc..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/main.c
+++ /dev/null
@@ -1,111 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-static volatile uint64_t s_ticks;  // Milliseconds since boot
-void SysTick_Handler(void) {       // SyStick IRQ handler, triggered every 1ms
-  s_ticks++;
-}
-
-uint64_t mg_millis(void) {  // Let Mongoose use our uptime function
-  return s_ticks;           // Return number of milliseconds since boot
-}
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-#ifdef MQTT_DASHBOARD
-bool hal_gpio_write(int pin, bool status) {  // For MQTT dashboard HAL
-  gpio_write((uint16_t) pin, status);
-  return true;
-}
-
-bool hal_gpio_read(int pin) {  // For MQTT dashboard HAL
-  return gpio_read((uint16_t) pin);
-}
-
-int hal_led_pin(void) {
-  return (int) LED1;
-}
-
-#endif
-
-static void timer_fn(void *arg) {
-  gpio_toggle(LED);                                      // Blink LED
-  struct mg_tcpip_if *ifp = arg;                         // And show
-  const char *names[] = {"down", "up", "req", "ready"};  // network stats
-  MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
-           names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
-           ifp->ndrop, ifp->nerr));
-}
-
-int main(void) {
-  gpio_output(LED);               // Setup green LED
-  uart_init(UART_DEBUG, 115200);  // Initialise debug printf
-  ethernet_init();                // Initialise ethernet pins
-
-  // User can customise the MQTT url, device ID or the root topic below
-#ifdef MQTT_DASHBOARD
-  g_device_id = "H723ZG";
-#endif
-
-  MG_INFO(("Starting, CPU freq %g MHz", (double) SystemCoreClock / 1000000));
-
-  struct mg_mgr mgr;        // Initialise
-  mg_mgr_init(&mgr);        // Mongoose event manager
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-
-  mg_ota_boot();  // Call bootloader: continue to load, or boot another FW
-
-#if MG_OTA == MG_OTA_FLASH
-  // Demonstrate the use of mg_flash_{load/save} functions for keeping device
-  // configuration data on flash. Increment boot count on every boot.
-  struct deviceconfig {
-    uint32_t boot_count;
-    char some_other_data[40];
-  };
-  uint32_t key = 0x12345678;    // A unique key, one per data type
-  struct deviceconfig dc = {};  // Initialise to some default values
-  mg_flash_load(NULL, key, &dc, sizeof(dc));  // Load from flash
-  dc.boot_count++;                            // Increment boot count
-  mg_flash_save(NULL, key, &dc, sizeof(dc));  // And save back
-  MG_INFO(("Boot count: %u", dc.boot_count));
-#endif
-
-  // Initialise Mongoose network stack
-  struct mg_tcpip_driver_stm32h_data driver_data = {.mdc_cr = 4};
-  struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC(),
-                            // Uncomment below for static configuration:
-                            // .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
-                            // .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
-                            // .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
-                            .driver = &mg_tcpip_driver_stm32h,
-                            .driver_data = &driver_data};
-  mg_tcpip_init(&mgr, &mif);
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
-
-  MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
-  while (mif.state != MG_TCPIP_STATE_READY) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.h b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose_config.h b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose_config.h
deleted file mode 100644
index 338d6b43..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/mongoose_config.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#pragma once
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_NEWLIB
-#define MG_OTA MG_OTA_FLASH
-#define MG_DEVICE MG_DEVICE_STM32H7
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_CUSTOM_MILLIS 1
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1 
-#define MG_ENABLE_DRIVER_STM32H 1
-#define MG_ENABLE_LINES 1
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.c
deleted file mode 120000
index 39be7659..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../mqtt-dashboard/device/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.h b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.h
deleted file mode 120000
index cb6bd99f..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../mqtt-dashboard/device/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/packed_fs.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/syscalls.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/syscalls.c
deleted file mode 100644
index 6fef1007..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/syscalls.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  unsigned char x = 0, *heap_end = (unsigned char *)((size_t) &x - 512);
-  (void) x;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  if (heap + incr > heap_end) return (void *) -1;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
-
-extern uint64_t mg_now(void);
-
-int _gettimeofday(struct timeval *tv, void *tz) {
-  uint64_t now = mg_now();
-  (void) tz;
-  tv->tv_sec = (time_t) (now / 1000);
-  tv->tv_usec = (unsigned long) ((now % 1000) * 1000);
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/sysinit.c b/examples/stm32/nucleo-h723zg-make-baremetal-builtin/sysinit.c
deleted file mode 100644
index f3d39446..00000000
--- a/examples/stm32/nucleo-h723zg-make-baremetal-builtin/sysinit.c
+++ /dev/null
@@ -1,61 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-
-#include "hal.h"
-
-uint32_t SystemCoreClock = CPU_FREQUENCY;
-
-static inline unsigned int div2prescval(unsigned int div) {
-  // 0 --> /1; 8 --> /2 ... 11 --> /16;  12 --> /64 ... 15 --> /512
-  if (div == 1) return 0;
-  if (div > 16) div /= 2;
-  unsigned int val = 7;
-  while (div >>= 1) ++val;
-  return val;
-}
-
-static inline unsigned int pllrge(unsigned int f) {
-  unsigned int val = 0;
-  while (f >>= 1) ++val;
-  return val - 1;
-}
-
-void SystemInit(void) {  // Called automatically by startup code
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  asm("DSB");
-  asm("ISB");
-  PWR->CR3 |= BIT(1);                          // select LDO (reset value)
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  PWR->D3CR &= ~(BIT(15) | BIT(14));           // Select VOS0
-  while ((PWR->D3CR & BIT(13)) == 0) spin(1);  // VOSRDY
-  SETBITS(
-      RCC->D1CFGR, (0x0F << 8) | (7 << 4) | (0x0F << 0),
-      (div2prescval(D1CPRE) << 8) | (D1PPRE << 4) | (div2prescval(HPRE) << 0));
-  RCC->D2CFGR = (D2PPRE2 << 8) | (D2PPRE1 << 4);
-  RCC->D3CFGR = (D3PPRE << 4);
-  SETBITS(RCC->PLLCFGR, 3 << 2,
-          pllrge(PLL1_HSI / PLL1_M)
-              << 2);  // keep reset config (DIVP1EN, !PLL1VCOSEL), PLL1RGE
-  SETBITS(RCC->PLL1DIVR, (0x7F << 9) | (0x1FF << 0),
-          ((PLL1_P - 1) << 9) | ((PLL1_N - 1) << 0));  // Set PLL1_P PLL1_N
-  SETBITS(RCC->PLLCKSELR, 0x3F << 4,
-          PLL1_M << 4);          // Set PLL1_M (source defaults to HSI)
-  RCC->CR |= BIT(24) | BIT(12);  // Enable PLL1 and HSI48 (for RNG)
-  while ((RCC->CR & BIT(25)) == 0) spin(1);  // Wait until done
-  RCC->CFGR |= (3 << 0);                     // Set clock source to PLL1
-  while ((RCC->CFGR & (7 << 3)) != (3 << 3)) spin(1);  // Wait until done
-  FLASH->ACR = FLASH_LATENCY;                          // default is larger
-#if 0
-  // Enable SRAM block if you want to use it for ETH buffer (needs proper attributes in driver code)
-  // RCC->AHB2ENR |= BIT(29) | BIT(30);
-#endif
-
-  RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;      // Enable SYSCFG
-  while ((RCC->CR & BIT(13)) == 0) spin(1);  // Make sure HSI48 is ready
-  rng_init();                            // Initialise random number generator
-  SysTick_Config(CPU_FREQUENCY / 1000);  // Sys tick every 1ms
-}
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/FreeRTOSConfig.h b/examples/stm32/nucleo-h723zg-make-freertos-builtin/FreeRTOSConfig.h
deleted file mode 100644
index 7d616492..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/FreeRTOSConfig.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#pragma once
-
-#include "hal.h"
-
-#define configUSE_PREEMPTION 1
-#define configCPU_CLOCK_HZ CPU_FREQUENCY
-#define configTICK_RATE_HZ 1000
-#define configMAX_PRIORITIES 5
-#define configUSE_16_BIT_TICKS 0
-#define configUSE_TICK_HOOK 0
-#define configUSE_IDLE_HOOK 0
-#define configUSE_TIMERS 0
-#define configUSE_CO_ROUTINES 0
-#define configUSE_MALLOC_FAILED_HOOK 0
-#define configMINIMAL_STACK_SIZE 128
-#define configTOTAL_HEAP_SIZE (1024 * 64)
-#define INCLUDE_vTaskDelay 1
-#define INCLUDE_xTaskGetSchedulerState 1  // trying
-
-#ifdef __NVIC_PRIO_BITS
-#define configPRIO_BITS __NVIC_PRIO_BITS
-#else
-#define configPRIO_BITS 4
-#endif
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
-#define configKERNEL_INTERRUPT_PRIORITY \
-  (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
-  (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configASSERT(expr) \
-  if (!(expr)) printf("FAILURE %s:%d: %s\n", __FILE__, __LINE__, #expr)
-
-#define vPortSVCHandler SVC_Handler
-#define xPortPendSVHandler PendSV_Handler
-//#define xPortSysTickHandler SysTick_Handler
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/Makefile b/examples/stm32/nucleo-h723zg-make-freertos-builtin/Makefile
index 17450e5a..ed7b46ff 100644
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/Makefile
+++ b/examples/stm32/nucleo-h723zg-make-freertos-builtin/Makefile
@@ -1,59 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_h7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_h7/Source/Templates/gcc/startup_stm32h723xx.s # ST startup file. Compiler-dependent!
-
-# FreeRTOS. H7 has a Cortex-M7 r1p0 core, FreeRTOS recommends using CM4F port for non-r0p1 CM7 micros
-SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c
-SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c
-CFLAGS += -IFreeRTOS-Kernel/include 
-CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM4F -Wno-conversion
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-else
-  RM = rm -rf
-endif
+BOARD = h723
+IDE = GCC+make
+RTOS = FreeRTOS
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_h7 $(SOURCES) hal.h link.ld mongoose_config.h
-	arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:  # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_h7:       # ST CMSIS headers for STM32H7 series
-	git clone --depth 1 -b v1.10.3 https://github.com/STMicroelectronics/cmsis_device_h7 $@
-FreeRTOS-Kernel:  # FreeRTOS sources
-	git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/10
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
-#	grep 'MQTT connected' /tmp/output.txt   # Check for MQTT connection success
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_h7 FreeRTOS-Kernel
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/README.md b/examples/stm32/nucleo-h723zg-make-freertos-builtin/README.md
index bbdfa4cb..3c40339d 100644
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/README.md
+++ b/examples/stm32/nucleo-h723zg-make-freertos-builtin/README.md
@@ -1,3 +1 @@
-# FreeRTOS Web device dashboard on NUCLEO-H723ZG
-
-See https://mongoose.ws/tutorials/stm32/all-make-freertos-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=h723&ide=GCC+make&rtos=FreeRTOS&file=README.md)
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/hal.h b/examples/stm32/nucleo-h723zg-make-freertos-builtin/hal.h
deleted file mode 100644
index 4be32e79..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/hal.h
+++ /dev/null
@@ -1,187 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-//
-// Datasheet: RM0468, devboard manual: UM2407
-// https://www.st.com/resource/en/reference_manual/rm0468-stm32h723733-stm32h725735-and-stm32h730-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-// https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-// Alternate functions: https://www.st.com/resource/en/datasheet/stm32h723.pdf
-
-#pragma once
-
-#include <stm32h723xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('E', 1)   // On-board LED pin (yellow)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-
-#define LED LED2  // Use yellow LED for blinking
-
-// System clock (2.1, Figure 1; 8.5, Figure 45; 8.5.5, Figure 47; 8.5.6, Figure
-// 49; 8.5.8 Table 56; datasheet) CPU_FREQUENCY <= 550 MHz; hclk = CPU_FREQUENCY
-// / HPRE ; hclk <= 275 MHz; APB clocks <= 137.5 MHz. D1 domain bus matrix (and
-// so flash) runs at hclk frequency. Configure flash latency (WS) in accordance
-// to hclk freq (4.3.8, Table 16) The Ethernet controller is in D2 domain and
-// runs at hclk frequency
-enum {
-  D1CPRE = 1,  // actual divisor value
-  HPRE = 2,    // actual divisor value
-  D1PPRE = 4,  // register values, divisor value = BIT(value - 3) = / 2
-  D2PPRE1 = 4,
-  D2PPRE2 = 4,
-  D3PPRE = 4
-};
-// PLL1_P: odd division factors are not allowed (8.7.12) (except for '1')
-enum { PLL1_HSI = 64, PLL1_M = 32, PLL1_N = 225, PLL1_P = 1 };
-#define FLASH_LATENCY 0x33  // WRHIGHFREQ LATENCY
-#define CPU_FREQUENCY ((PLL1_HSI * PLL1_N / PLL1_M / PLL1_P / D1CPRE) * 1000000)
-#define AHB_FREQUENCY (CPU_FREQUENCY / HPRE)
-#define APB2_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE2 - 3)))
-#define APB1_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE1 - 3)))
-
-static inline void spin(volatile uint32_t n) {
-  while (n--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-
-#define GPIO(N) ((GPIO_TypeDef *) (0x40000000 + 0x18020000UL + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) {
-  return GPIO(PINBANK(pin));
-}
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB4ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-// D2 Kernel clock (8.7.21) USART1 defaults to pclk2 (APB2), while USART2,3
-// default to pclk1 (APB1). Even if using other kernel clocks, the APBx clocks
-// must be enabled for CPU access, as the kernel clock drives the BRR, not the
-// APB bus interface
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-#if 0  // CONSTANT BAUD RATE FOR REMOTE DEBUGGING WHILE SETTING THE PLL
-  SETBITS(RCC->D2CCIP2R, 7 << 3, 3 << 3);  // use HSI for UART1
-  freq = 64000000;
-#endif
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                         // Disable this UART
-  uart->BRR = freq / baud;               // Set baud rate
-  uart->CR1 = BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-// RNG clock (rng_clk) defaults to HSI48 and is characterized at this frequency.
-// Enable at SystemInit. (STM32CubeMX) It won't work with a 275MHz (AHB)
-static inline void rng_init(void) {
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;  // Enable RNG AHB clock (rng_hclk)
-  // 39.6.2 Table 320 init
-  RNG->CR = RNG_CR_CONDRST | (0x0F << RNG_CR_RNG_CONFIG1_Pos) |
-            (0 << RNG_CR_RNG_CONFIG2_Pos) | (0xD << RNG_CR_RNG_CONFIG3_Pos);
-  RNG->HTCR = 0x17590abc;
-  RNG->HTCR = 0xaa74;
-  RNG->CR &= ~RNG_CR_CONDRST ;
-  while(RNG->CR & RNG_CR_CONDRST) spin(1); // 39.7.1
-  RNG->CR |= RNG_CR_RNGEN;  // Enable RNG
-}
-
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  NVIC_EnableIRQ(ETH_IRQn);                     // Setup Ethernet IRQ handler
-  SETBITS(SYSCFG->PMCR, 7 << 21, 4 << 21);      // Use RMII (12.3.1)
-  RCC->AHB1ENR |= BIT(15) | BIT(16) | BIT(17);  // Enable Ethernet clocks
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 61.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/link.ld b/examples/stm32/nucleo-h723zg-make-freertos-builtin/link.ld
deleted file mode 100644
index 5494c6b8..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/link.ld
+++ /dev/null
@@ -1,34 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 1024k
-  sram(rwx) : ORIGIN = 0x24000000, LENGTH = 128k  /* AXI SRAM in domain D1 */
-  /* 2.3.2: remaining SRAM is in other (non-contiguous) banks,
-     DTCM @0x20000000 is in domain D1 and not accessible by the ETH DMA controller in domain D2
-          @0x24020000 can be either AXI or ITCM (2.4 Table 8)
-     SRAM @0x30000000 is in domain D2 and not directly available at startup to be used as stack (8.5.9 page 366)
-     SRAM @0x38000000 is in domain D3 and not directly available at startup to be used as stack (8.5.9 page 366) */
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;   /* for init_ram() */
-    *(.first_data)
-    *(.data SORT(.data.*))
-    _edata = .;  /* for init_ram() */
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : {
-    _sbss = .;              /* for init_ram() */
-    *(.bss SORT(.bss.*) COMMON)
-    _ebss = .;              /* for init_ram() */
-  } > sram
-
-  . = ALIGN(8);
-  _end = .;     /* for cmsis_gcc.h and init_ram() */
-}
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/main.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/main.c
deleted file mode 100644
index e363229f..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/main.c
+++ /dev/null
@@ -1,84 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-// workaround optimizer somehow causing SysTick to fire before FreeRTOS has
-// fully initialized
-extern void xPortSysTickHandler(void);
-void SysTick_Handler(void) {
-  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
-    xPortSysTickHandler();
-}
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-static void timer_fn(void *arg) {
-  struct mg_tcpip_if *ifp = arg;                         // And show
-  const char *names[] = {"down", "up", "req", "ready"};  // network stats
-  MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
-           names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
-           ifp->ndrop, ifp->nerr));
-}
-
-static void server(void *args) {
-  struct mg_mgr mgr;        // Initialise Mongoose event manager
-  mg_mgr_init(&mgr);        // and attach it to the interface
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-
-  // Initialise Mongoose network stack
-  ethernet_init();
-  struct mg_tcpip_driver_stm32h_data driver_data = {.mdc_cr = 4};
-  struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC(),
-                            // Uncomment below for static configuration:
-                            // .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
-                            // .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
-                            // .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
-                            .driver = &mg_tcpip_driver_stm32h,
-                            .driver_data = &driver_data};
-  mg_tcpip_init(&mgr, &mif);
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
-
-  MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
-  while (mif.state != MG_TCPIP_STATE_READY) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) mg_mgr_poll(&mgr, 1);  // Infinite event loop
-  (void) args;
-}
-
-static void blinker(void *args) {
-  gpio_init(LED, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_MEDIUM,
-            GPIO_PULL_NONE, 0);
-  for (;;) {
-    gpio_toggle(LED);
-    vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS));
-  }
-  (void) args;
-}
-
-int main(void) {
-  uart_init(UART_DEBUG, 115200);  // Initialise UART
-
-  // Start tasks. NOTE: stack sizes are in 32-bit words
-  xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 2, NULL);
-  xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL);
-
-  vTaskStartScheduler();  // This blocks
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.h b/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose_config.h b/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose_config.h
deleted file mode 100644
index 954efdd4..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/mongoose_config.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#pragma once
-
-#include <errno.h>	// we are not using lwIP
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_FREERTOS
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_DRIVER_STM32H 1
-#define MG_IO_SIZE 256
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1
-
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.c
deleted file mode 120000
index fe0e6f06..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.h b/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.h
deleted file mode 120000
index 9de896ef..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/packed_fs.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/syscalls.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/syscalls.c
deleted file mode 100644
index be3210aa..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/syscalls.c
+++ /dev/null
@@ -1,85 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
diff --git a/examples/stm32/nucleo-h723zg-make-freertos-builtin/sysinit.c b/examples/stm32/nucleo-h723zg-make-freertos-builtin/sysinit.c
deleted file mode 100644
index f3d39446..00000000
--- a/examples/stm32/nucleo-h723zg-make-freertos-builtin/sysinit.c
+++ /dev/null
@@ -1,61 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-
-#include "hal.h"
-
-uint32_t SystemCoreClock = CPU_FREQUENCY;
-
-static inline unsigned int div2prescval(unsigned int div) {
-  // 0 --> /1; 8 --> /2 ... 11 --> /16;  12 --> /64 ... 15 --> /512
-  if (div == 1) return 0;
-  if (div > 16) div /= 2;
-  unsigned int val = 7;
-  while (div >>= 1) ++val;
-  return val;
-}
-
-static inline unsigned int pllrge(unsigned int f) {
-  unsigned int val = 0;
-  while (f >>= 1) ++val;
-  return val - 1;
-}
-
-void SystemInit(void) {  // Called automatically by startup code
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  asm("DSB");
-  asm("ISB");
-  PWR->CR3 |= BIT(1);                          // select LDO (reset value)
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  PWR->D3CR &= ~(BIT(15) | BIT(14));           // Select VOS0
-  while ((PWR->D3CR & BIT(13)) == 0) spin(1);  // VOSRDY
-  SETBITS(
-      RCC->D1CFGR, (0x0F << 8) | (7 << 4) | (0x0F << 0),
-      (div2prescval(D1CPRE) << 8) | (D1PPRE << 4) | (div2prescval(HPRE) << 0));
-  RCC->D2CFGR = (D2PPRE2 << 8) | (D2PPRE1 << 4);
-  RCC->D3CFGR = (D3PPRE << 4);
-  SETBITS(RCC->PLLCFGR, 3 << 2,
-          pllrge(PLL1_HSI / PLL1_M)
-              << 2);  // keep reset config (DIVP1EN, !PLL1VCOSEL), PLL1RGE
-  SETBITS(RCC->PLL1DIVR, (0x7F << 9) | (0x1FF << 0),
-          ((PLL1_P - 1) << 9) | ((PLL1_N - 1) << 0));  // Set PLL1_P PLL1_N
-  SETBITS(RCC->PLLCKSELR, 0x3F << 4,
-          PLL1_M << 4);          // Set PLL1_M (source defaults to HSI)
-  RCC->CR |= BIT(24) | BIT(12);  // Enable PLL1 and HSI48 (for RNG)
-  while ((RCC->CR & BIT(25)) == 0) spin(1);  // Wait until done
-  RCC->CFGR |= (3 << 0);                     // Set clock source to PLL1
-  while ((RCC->CFGR & (7 << 3)) != (3 << 3)) spin(1);  // Wait until done
-  FLASH->ACR = FLASH_LATENCY;                          // default is larger
-#if 0
-  // Enable SRAM block if you want to use it for ETH buffer (needs proper attributes in driver code)
-  // RCC->AHB2ENR |= BIT(29) | BIT(30);
-#endif
-
-  RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;      // Enable SYSCFG
-  while ((RCC->CR & BIT(13)) == 0) spin(1);  // Make sure HSI48 is ready
-  rng_init();                            // Initialise random number generator
-  SysTick_Config(CPU_FREQUENCY / 1000);  // Sys tick every 1ms
-}
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/Makefile b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/Makefile
index 39f08478..ac1303bd 100644
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/Makefile
+++ b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/Makefile
@@ -1,58 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_h7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_h7/Source/Templates/gcc/startup_stm32h743xx.s # ST startup file. Compiler-dependent!
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-else
-  RM = rm -rf
-endif
+BOARD = h743
+IDE = GCC+make
+RTOS = baremetal
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-firmware.elf: cmsis_core cmsis_h7 $(SOURCES) hal.h link.ld Makefile
-	arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:     # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_h7:       # ST CMSIS headers for STM32H7 series
-	git clone --depth 1 -b v1.10.3 https://github.com/STMicroelectronics/cmsis_device_h7 $@
-mbedtls:        # mbedTLS library
-	git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@
-
-ifeq ($(TLS), mbedtls)
-CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include
-CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c
-firmware.elf: mbedtls
-endif
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/6
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_h7 mbedtls
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/README.md b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/README.md
index 92686842..e1435c41 100644
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/README.md
+++ b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/README.md
@@ -1,3 +1 @@
-# Baremetal web device dashboard on NUCLEO-H743ZI
-
-See https://mongoose.ws/tutorials/stm32/all-make-baremetal-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=h743&ide=GCC+make&rtos=baremetal&file=README.md)
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/hal.h b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/hal.h
deleted file mode 100644
index c0fa2920..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/hal.h
+++ /dev/null
@@ -1,235 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-//
-// Datasheet: RM0433, devboard manual: UM2407
-// https://www.st.com/resource/en/reference_manual/rm0433-stm32h742-stm32h743753-and-stm32h750-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-// Alternate functions: https://www.st.com/resource/en/datasheet/stm32h743vi.pdf
-
-#pragma once
-
-#include <stm32h743xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('E', 1)   // On-board LED pin (yellow)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-
-#define LED LED2  // Use yellow LED for blinking
-
-// System clock (2.1, Figure 1; 8.5, Figure 45; 8.5.5, Figure 47; 8.5.6, Figure
-// 49) CPU_FREQUENCY <= 480 MHz; hclk = CPU_FREQUENCY / HPRE ; hclk <= 240 MHz;
-// APB clocks <= 120 MHz. D1 domain bus matrix (and so flash) runs at hclk
-// frequency. Configure flash latency (WS) in accordance to hclk freq (4.3.8,
-// Table 17) The Ethernet controller is in D2 domain and runs at hclk frequency
-enum {
-  D1CPRE = 1,  // actual divisor value
-  HPRE = 2,    // actual divisor value
-  D1PPRE = 4,  // register values, divisor value = BIT(value - 3) = / 2
-  D2PPRE1 = 4,
-  D2PPRE2 = 4,
-  D3PPRE = 4
-};
-// PLL1_P: odd division factors are not allowed (8.7.13) (according to Cube, '1'
-// is also an "odd division factor").
-// Make sure your chip is revision 'V', otherwise set PLL1_N = 400
-enum { PLL1_HSI = 64, PLL1_M = 32, PLL1_N = 480, PLL1_P = 2 };
-#define FLASH_LATENCY 0x24  // WRHIGHFREQ LATENCY
-#define CPU_FREQUENCY ((PLL1_HSI * PLL1_N / PLL1_M / PLL1_P / D1CPRE) * 1000000)
-// #define CPU_FREQUENCY ((PLL1_HSI / D1CPRE) * 1000000)
-#define AHB_FREQUENCY (CPU_FREQUENCY / HPRE)
-#define APB2_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE2 - 3)))
-#define APB1_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE1 - 3)))
-
-static inline void spin(volatile uint32_t n) {
-  while (n--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-
-#define GPIO(N) ((GPIO_TypeDef *) (0x40000000 + 0x18020000UL + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) {
-  return GPIO(PINBANK(pin));
-}
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB4ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-// D2 Kernel clock (8.7.21) USART1 defaults to pclk2 (APB2), while USART2,3
-// default to pclk1 (APB1). Even if using other kernel clocks, the APBx clocks
-// must be enabled for CPU access, as the kernel clock drives the BRR, not the
-// APB bus interface
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-#if 0  // CONSTANT BAUD RATE FOR REMOTE DEBUGGING WHILE SETTING THE PLL
-  SETBITS(RCC->D2CCIP2R, 7 << 3, 3 << 3);  // use HSI for UART1
-  freq = 64000000;
-#endif
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                         // Disable this UART
-  uart->BRR = freq / baud;               // Set baud rate
-  uart->CR1 = BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-static inline void rng_init(void) {
-  RCC->D2CCIP2R |= RCC_D2CCIP2R_RNGSEL_0;  // RNG clock source pll1_q_ck
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;       // Enable RNG clock
-  RNG->CR = RNG_CR_RNGEN;                  // Enable RNG
-}
-
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-static inline char chiprev(void) {
-  uint16_t rev = (uint16_t) (((uint32_t) DBGMCU->IDCODE) >> 16);
-  if (rev == 0x1003) return 'Y';
-  if (rev == 0x2003) return 'V';
-  return '?';
-}
-
-static inline unsigned int div2prescval(unsigned int div) {
-  // 0 --> /1; 8 --> /2 ... 11 --> /16;  12 --> /64 ... 15 --> /512
-  if (div == 1) return 0;
-  if (div > 16) div /= 2;
-  unsigned int val = 7;
-  while (div >>= 1) ++val;
-  return val;
-}
-
-static inline unsigned int pllrge(unsigned int f) {
-  unsigned int val = 0;
-  while (f >>= 1) ++val;
-  return val - 1;
-}
-
-static inline void clock_init(void) {
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  __DSB();
-  __ISB();
-  PWR->CR3 |= BIT(1);                          // select LDO (reset value)
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  PWR->D3CR |= BIT(15) | BIT(14);              // Select VOS1
-  uint32_t f = PWR->D3CR;  // fake read to wait for bus clocking
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  SYSCFG->PWRCR |= BIT(0);                     // ODEN
-  f = SYSCFG->PWRCR;
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  (void) f;
-  SETBITS(
-      RCC->D1CFGR, (0x0F << 8) | (7 << 4) | (0x0F << 0),
-      (div2prescval(D1CPRE) << 8) | (D1PPRE << 4) | (div2prescval(HPRE) << 0));
-  RCC->D2CFGR = (D2PPRE2 << 8) | (D2PPRE1 << 4);
-  RCC->D3CFGR = (D3PPRE << 4);
-  SETBITS(RCC->PLLCFGR, 3 << 2,
-          pllrge(PLL1_HSI / PLL1_M)
-              << 2);  // keep reset config (DIVP1EN, !PLL1VCOSEL), PLL1RGE
-  SETBITS(RCC->PLL1DIVR, (0x7F << 9) | (0x1FF << 0),
-          ((PLL1_P - 1) << 9) | ((PLL1_N - 1) << 0));  // Set PLL1_P PLL1_N
-  SETBITS(RCC->PLLCKSELR, 0x3F << 4,
-          PLL1_M << 4);  // Set PLL1_M (source defaults to HSI)
-  RCC->CR |= BIT(24);    // Enable PLL1
-  while ((RCC->CR & BIT(25)) == 0) spin(1);  // Wait until done
-  RCC->CFGR |= (3 << 0);                     // Set clock source to PLL1
-  while ((RCC->CFGR & (7 << 3)) != (3 << 3)) spin(1);  // Wait until done
-  FLASH->ACR = FLASH_LATENCY;                          // default is larger
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;         // Enable SYSCFG
-  SETBITS(SYSCFG->PMCR, 7 << 21, 4 << 21);      // Use RMII (12.3.1)
-  RCC->AHB1ENR |= BIT(15) | BIT(16) | BIT(17);  // Enable Ethernet clocks
-  NVIC_EnableIRQ(ETH_IRQn);                     // Setup Ethernet IRQ handler
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 61.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/link.ld b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/link.ld
deleted file mode 100644
index 715a6217..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/link.ld
+++ /dev/null
@@ -1,32 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 2048k
-  sram(rwx) : ORIGIN = 0x24000000, LENGTH = 512k  /* AXI SRAM in domain D1 */
-  /* 2.3.2: remaining SRAM is in other (non-contiguous) banks,
-     DTCM @0x20000000 is in domain D1 and not accessible by the ETH DMA controller in domain D2
-     SRAM @0x30000000 is in domain D2 and not directly available at startup to be used as stack (8.5.9 page 366) */
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;   /* for init_ram() */
-    *(.first_data)
-    *(.data SORT(.data.*))
-    _edata = .;  /* for init_ram() */
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : {
-    _sbss = .;              /* for init_ram() */
-    *(.bss SORT(.bss.*) COMMON)
-    _ebss = .;              /* for init_ram() */
-  } > sram
-
-  . = ALIGN(8);
-  _end = .;     /* for cmsis_gcc.h and init_ram() */
-}
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/main.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/main.c
deleted file mode 100644
index f9cb57db..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/main.c
+++ /dev/null
@@ -1,94 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-static volatile uint64_t s_ticks;  // Milliseconds since boot
-void SysTick_Handler(void) {       // SyStick IRQ handler, triggered every 1ms
-  s_ticks++;
-}
-
-uint64_t mg_millis(void) {  // Let Mongoose use our uptime function
-  return s_ticks;           // Return number of milliseconds since boot
-}
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-static void timer_fn(void *arg) {
-  gpio_toggle(LED);                                      // Blink LED
-  struct mg_tcpip_if *ifp = arg;                         // And show
-  const char *names[] = {"down", "up", "req", "ready"};  // network stats
-  MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
-           names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
-           ifp->ndrop, ifp->nerr));
-}
-
-// Device initialisation flow is in startup_XXX.s, provided by device vendor.
-// It inits data/bss, IRQ table, then calls SystemInit(), then calls main()
-int main(void) {
-  gpio_output(LED);               // Setup green LED
-  uart_init(UART_DEBUG, 115200);  // Initialise debug printf
-  ethernet_init();                // Initialise ethernet pins
-
-  MG_INFO(("Chip revision: %c, max cpu clock: %u MHz", chiprev(),
-           (chiprev() == 'V') ? 480 : 400));
-  MG_INFO(("Starting, CPU freq %g MHz", (double) SystemCoreClock / 1000000));
-
-  struct mg_mgr mgr;        // Initialise
-  mg_mgr_init(&mgr);        // Mongoose event manager
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-
-  mg_ota_boot();  // Call bootloader: continue to load, or boot another FW
-
-#if MG_OTA == MG_OTA_FLASH
-  // Demonstrate the use of mg_flash_{load/save} functions for keeping device
-  // configuration data on flash. Increment boot count on every boot.
-  struct deviceconfig {
-    uint32_t boot_count;
-    char some_other_data[40];
-  };
-  uint32_t key = 0x12345678;    // A unique key, one per data type
-  struct deviceconfig dc = {};  // Initialise to some default values
-  mg_flash_load(NULL, key, &dc, sizeof(dc));  // Load from flash
-  dc.boot_count++;                            // Increment boot count
-  mg_flash_save(NULL, key, &dc, sizeof(dc));  // And save back
-  MG_INFO(("Boot count: %u", dc.boot_count));
-#endif
-
-  // Initialise Mongoose network stack
-  struct mg_tcpip_driver_stm32h_data driver_data = {.mdc_cr = 4};
-  struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC(),
-                            // Uncomment below for static configuration:
-                            // .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
-                            // .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
-                            // .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
-                            .driver = &mg_tcpip_driver_stm32h,
-                            .driver_data = &driver_data};
-  mg_tcpip_init(&mgr, &mif);
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
-
-  MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
-  while (mif.state != MG_TCPIP_STATE_READY) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.h b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose_config.h b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose_config.h
deleted file mode 100644
index 338d6b43..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/mongoose_config.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#pragma once
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_NEWLIB
-#define MG_OTA MG_OTA_FLASH
-#define MG_DEVICE MG_DEVICE_STM32H7
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_CUSTOM_MILLIS 1
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1 
-#define MG_ENABLE_DRIVER_STM32H 1
-#define MG_ENABLE_LINES 1
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.c
deleted file mode 120000
index fe0e6f06..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.h b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.h
deleted file mode 120000
index 9de896ef..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/packed_fs.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/syscalls.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/syscalls.c
deleted file mode 100644
index 6fef1007..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/syscalls.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  unsigned char x = 0, *heap_end = (unsigned char *)((size_t) &x - 512);
-  (void) x;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  if (heap + incr > heap_end) return (void *) -1;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
-
-extern uint64_t mg_now(void);
-
-int _gettimeofday(struct timeval *tv, void *tz) {
-  uint64_t now = mg_now();
-  (void) tz;
-  tv->tv_sec = (time_t) (now / 1000);
-  tv->tv_usec = (unsigned long) ((now % 1000) * 1000);
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/sysinit.c b/examples/stm32/nucleo-h743zi-make-baremetal-builtin/sysinit.c
deleted file mode 100644
index 341ddc67..00000000
--- a/examples/stm32/nucleo-h743zi-make-baremetal-builtin/sysinit.c
+++ /dev/null
@@ -1,20 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-//
-// Vendor CMSIS usually contain system_XXXX.c file with SystemInit()
-// We don't use it - instead, we provide our own SystemInit().
-
-#include "hal.h"
-
-uint32_t SystemCoreClock;  // Holds system core clock in Hz. Required by CMSIS
-
-void SystemInit(void) {             // Called automatically by startup code
-  clock_init();                     // Core clock to 480 MHz
-  rng_init();                       // Initialise random number generator
-  SystemCoreClock = CPU_FREQUENCY;  // defined in hal.h
-  SysTick_Config(SystemCoreClock / 1000);  // Sys tick every 1ms
-}
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/FreeRTOSConfig.h b/examples/stm32/nucleo-h743zi-make-freertos-builtin/FreeRTOSConfig.h
deleted file mode 100644
index 71d9c4bc..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/FreeRTOSConfig.h
+++ /dev/null
@@ -1,38 +0,0 @@
-#pragma once
-
-#include "hal.h"
-
-#define configUSE_PREEMPTION 1
-#define configCPU_CLOCK_HZ CPU_FREQUENCY
-#define configTICK_RATE_HZ 1000
-#define configMAX_PRIORITIES 5
-#define configUSE_16_BIT_TICKS 0
-#define configUSE_TICK_HOOK 0
-#define configUSE_IDLE_HOOK 0
-#define configUSE_TIMERS 0
-#define configUSE_CO_ROUTINES 0
-#define configUSE_MALLOC_FAILED_HOOK 0
-#define configMINIMAL_STACK_SIZE 128
-#define configTOTAL_HEAP_SIZE (1024 * 128)
-#define INCLUDE_vTaskDelay 1
-#define INCLUDE_xTaskGetSchedulerState 1  // trying
-
-#ifdef __NVIC_PRIO_BITS
-#define configPRIO_BITS __NVIC_PRIO_BITS
-#else
-#define configPRIO_BITS 4
-#endif
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
-#define configKERNEL_INTERRUPT_PRIORITY \
-  (configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
-  (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
-
-#define configASSERT(expr) \
-  if (!(expr)) printf("FAILURE %s:%d: %s\n", __FILE__, __LINE__, #expr)
-
-#define vPortSVCHandler SVC_Handler
-#define xPortPendSVHandler PendSV_Handler
-//#define xPortSysTickHandler SysTick_Handler
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/Makefile b/examples/stm32/nucleo-h743zi-make-freertos-builtin/Makefile
index 3ea7ef4e..074bd89c 100644
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/Makefile
+++ b/examples/stm32/nucleo-h743zi-make-freertos-builtin/Makefile
@@ -1,59 +1,29 @@
-CFLAGS  = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
-CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
-CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
-CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_h7/Include
-CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 $(CFLAGS_EXTRA)
-LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
-
-SOURCES = main.c syscalls.c sysinit.c
-SOURCES += cmsis_h7/Source/Templates/gcc/startup_stm32h743xx.s # ST startup file. Compiler-dependent!
-
-# FreeRTOS. H7 has a Cortex-M7 r1p0 core, FreeRTOS recommends using CM4F port for non-r0p1 CM7 micros
-SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c
-SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c
-CFLAGS += -IFreeRTOS-Kernel/include 
-CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM4F -Wno-conversion
-
-# Mongoose options are defined in mongoose_config.h
-SOURCES += mongoose.c net.c packed_fs.c
-
-# Example specific build options. See README.md
-CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
-
-ifeq ($(OS),Windows_NT)
-  RM = cmd /C del /Q /F /S
-else
-  RM = rm -rf
-endif
+BOARD = h743
+IDE = GCC+make
+RTOS = FreeRTOS
+WIZARD_URL ?= http://mongoose.ws/wizard
 
 all build example: firmware.bin
 
-firmware.bin: firmware.elf
-	arm-none-eabi-objcopy -O binary $< $@
+firmware.bin: wizard
+	make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
 
-firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_h7 $(SOURCES) hal.h link.ld mongoose_config.h
-	arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@
+wizard:
+	hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
+	&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
+	unzip wizard.zip
+	cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
 
-flash: firmware.bin
-	st-flash --reset write $< 0x8000000
-
-cmsis_core:  # ARM CMSIS core headers
-	git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
-cmsis_h7:       # ST CMSIS headers for STM32H7 series
-	git clone --depth 1 -b v1.10.3 https://github.com/STMicroelectronics/cmsis_device_h7 $@
-FreeRTOS-Kernel:  # FreeRTOS sources
-	git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@
 
 # Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
 DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/6
 update: firmware.bin
 	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
 
-test update: CFLAGS += -DUART_DEBUG=USART1
+test update: CFLAGS_EXTRA ="-DUART_DEBUG=USART1"
 test: update
-	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
+	curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
 	grep 'READY, IP:' /tmp/output.txt       # Check for network init
-#	grep 'MQTT connected' /tmp/output.txt   # Check for MQTT connection success
 
 clean:
-	$(RM) firmware.* *.su cmsis_core cmsis_h7 FreeRTOS-Kernel
+	rm -rf firmware.* wizard*
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/README.md b/examples/stm32/nucleo-h743zi-make-freertos-builtin/README.md
index 7982ec9d..5e5c5437 100644
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/README.md
+++ b/examples/stm32/nucleo-h743zi-make-freertos-builtin/README.md
@@ -1,3 +1 @@
-# FreeRTOS Web device dashboard on NUCLEO-H743ZI
-
-See https://mongoose.ws/tutorials/stm32/all-make-freertos-builtin/
+See [Wizard](https://mongoose.ws/wizard/#/output?board=h743&ide=GCC+make&rtos=FreeRTOS&file=README.md)
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/hal.h b/examples/stm32/nucleo-h743zi-make-freertos-builtin/hal.h
deleted file mode 100644
index bfd2bfa3..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/hal.h
+++ /dev/null
@@ -1,185 +0,0 @@
-// Copyright (c) 2022-2023 Cesanta Software Limited
-// All rights reserved
-//
-// Datasheet: RM0433, devboard manual: UM2407
-// https://www.st.com/resource/en/reference_manual/rm0433-stm32h742-stm32h743753-and-stm32h750-value-line-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
-// Alternate functions: https://www.st.com/resource/en/datasheet/stm32h743vi.pdf
-
-#pragma once
-
-#include <stm32h743xx.h>
-
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-
-#define BIT(x) (1UL << (x))
-#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
-#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
-#define PINNO(pin) (pin & 255)
-#define PINBANK(pin) (pin >> 8)
-
-#define LED1 PIN('B', 0)   // On-board LED pin (green)
-#define LED2 PIN('E', 1)   // On-board LED pin (yellow)
-#define LED3 PIN('B', 14)  // On-board LED pin (red)
-
-#define LED LED2              // Use yellow LED for blinking
-
-// System clock (2.1, Figure 1; 8.5, Figure 45; 8.5.5, Figure 47; 8.5.6, Figure
-// 49) CPU_FREQUENCY <= 480 MHz; hclk = CPU_FREQUENCY / HPRE ; hclk <= 240 MHz;
-// APB clocks <= 120 MHz. D1 domain bus matrix (and so flash) runs at hclk
-// frequency. Configure flash latency (WS) in accordance to hclk freq (4.3.8,
-// Table 17) The Ethernet controller is in D2 domain and runs at hclk frequency
-enum {
-  D1CPRE = 1,  // actual divisor value
-  HPRE = 2,    // actual divisor value
-  D1PPRE = 4,  // register values, divisor value = BIT(value - 3) = / 2
-  D2PPRE1 = 4,
-  D2PPRE2 = 4,
-  D3PPRE = 4
-};
-// PLL1_P: odd division factors are not allowed (8.7.13) (according to Cube, '1'
-// is also an "odd division factor").
-// Make sure your chip is revision 'V', otherwise set PLL1_N = 400
-enum { PLL1_HSI = 64, PLL1_M = 32, PLL1_N = 480, PLL1_P = 2 };
-#define FLASH_LATENCY 0x24  // WRHIGHFREQ LATENCY
-#define CPU_FREQUENCY ((PLL1_HSI * PLL1_N / PLL1_M / PLL1_P / D1CPRE) * 1000000)
-// #define CPU_FREQUENCY ((PLL1_HSI / D1CPRE) * 1000000)
-#define AHB_FREQUENCY (CPU_FREQUENCY / HPRE)
-#define APB2_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE2 - 3)))
-#define APB1_FREQUENCY (AHB_FREQUENCY / (BIT(D2PPRE1 - 3)))
-
-static inline void spin(volatile uint32_t n) {
-  while (n--) (void) 0;
-}
-
-enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
-enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
-enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
-enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
-
-#define GPIO(N) ((GPIO_TypeDef *) (0x40000000 + 0x18020000UL + 0x400 * (N)))
-
-static GPIO_TypeDef *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); }
-static inline void gpio_toggle(uint16_t pin) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint32_t mask = BIT(PINNO(pin));
-  gpio->BSRR = mask << (gpio->ODR & mask ? 16 : 0);
-}
-static inline int gpio_read(uint16_t pin) {
-  return gpio_bank(pin)->IDR & BIT(PINNO(pin)) ? 1 : 0;
-}
-static inline void gpio_write(uint16_t pin, bool val) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  gpio->BSRR = BIT(PINNO(pin)) << (val ? 0 : 16);
-}
-static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
-                             uint8_t speed, uint8_t pull, uint8_t af) {
-  GPIO_TypeDef *gpio = gpio_bank(pin);
-  uint8_t n = (uint8_t) (PINNO(pin));
-  RCC->AHB4ENR |= BIT(PINBANK(pin));  // Enable GPIO clock
-  SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
-  SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
-  SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
-  SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
-          ((uint32_t) af) << ((n & 7) * 4));
-  SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
-}
-static inline void gpio_input(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-static inline void gpio_output(uint16_t pin) {
-  gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
-            GPIO_PULL_NONE, 0);
-}
-
-#ifndef UART_DEBUG
-#define UART_DEBUG USART3
-#endif
-
-// D2 Kernel clock (8.7.21) USART1 defaults to pclk2 (APB2), while USART2,3
-// default to pclk1 (APB1). Even if using other kernel clocks, the APBx clocks
-// must be enabled for CPU access, as the kernel clock drives the BRR, not the
-// APB bus interface
-static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
-  uint8_t af = 7;           // Alternate function
-  uint16_t rx = 0, tx = 0;  // pins
-  uint32_t freq = 0;        // Bus frequency. UART1 is on APB2, rest on APB1
-
-  if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
-  if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(17);
-  if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1LENR |= BIT(18);
-
-  if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10);
-  if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3);
-  if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9);
-
-#if 0  // CONSTANT BAUD RATE FOR REMOTE DEBUGGING WHILE SETTING THE PLL
-  SETBITS(RCC->D2CCIP2R, 7 << 3, 3 << 3);  // use HSI for UART1
-  freq = 64000000;
-#endif
-
-  gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
-  uart->CR1 = 0;                         // Disable this UART
-  uart->BRR = freq / baud;               // Set baud rate
-  uart->CR1 = BIT(0) | BIT(2) | BIT(3);  // Set UE, RE, TE
-}
-static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
-  uart->TDR = byte;
-  while ((uart->ISR & BIT(7)) == 0) spin(1);
-}
-static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
-  while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
-}
-static inline int uart_read_ready(USART_TypeDef *uart) {
-  return uart->ISR & BIT(5);  // If RXNE bit is set, data is ready
-}
-static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
-  return (uint8_t) (uart->RDR & 255);
-}
-
-static inline void rng_init(void) {
-  RCC->D2CCIP2R |= RCC_D2CCIP2R_RNGSEL_0;  // RNG clock source pll1_q_ck
-  RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN;       // Enable RNG clock
-  RNG->CR = RNG_CR_RNGEN;                  // Enable RNG
-}
-
-static inline uint32_t rng_read(void) {
-  while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0;
-  return RNG->DR;
-}
-
-static inline char chiprev(void) {
-  uint16_t rev = (uint16_t) (((uint32_t) DBGMCU->IDCODE) >> 16);
-  if (rev == 0x1003) return 'Y';
-  if (rev == 0x2003) return 'V';
-  return '?';
-}
-
-// Hw pull-ups on PHY RXD0,1,DV to enable autonegotiation
-static inline void ethernet_init(void) {
-  // Initialise Ethernet. Enable MAC GPIO pins, see
-  // https://www.st.com/resource/en/user_manual/um2407-stm32h7-nucleo144-boards-mb1364-stmicroelectronics.pdf
-  uint16_t pins[] = {PIN('A', 1),  PIN('A', 2),  PIN('A', 7),
-                     PIN('B', 13), PIN('C', 1),  PIN('C', 4),
-                     PIN('C', 5),  PIN('G', 11), PIN('G', 13)};
-  for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) {
-    gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE,
-              GPIO_PULL_NONE, 11);  // 11 is the Ethernet function
-  }
-  NVIC_EnableIRQ(ETH_IRQn);                     // Setup Ethernet IRQ handler
-  SETBITS(SYSCFG->PMCR, 7 << 21, 4 << 21);      // Use RMII (12.3.1)
-  RCC->AHB1ENR |= BIT(15) | BIT(16) | BIT(17);  // Enable Ethernet clocks
-}
-
-#define UUID ((uint8_t *) UID_BASE)  // Unique 96-bit chip ID. TRM 61.1
-
-// Helper macro for MAC generation
-#define GENERATE_LOCALLY_ADMINISTERED_MAC()                        \
-  {                                                                \
-    2, UUID[0] ^ UUID[1], UUID[2] ^ UUID[3], UUID[4] ^ UUID[5],    \
-        UUID[6] ^ UUID[7] ^ UUID[8], UUID[9] ^ UUID[10] ^ UUID[11] \
-  }
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/link.ld b/examples/stm32/nucleo-h743zi-make-freertos-builtin/link.ld
deleted file mode 100644
index 715a6217..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/link.ld
+++ /dev/null
@@ -1,32 +0,0 @@
-ENTRY(Reset_Handler);
-MEMORY {
-  flash(rx) : ORIGIN = 0x08000000, LENGTH = 2048k
-  sram(rwx) : ORIGIN = 0x24000000, LENGTH = 512k  /* AXI SRAM in domain D1 */
-  /* 2.3.2: remaining SRAM is in other (non-contiguous) banks,
-     DTCM @0x20000000 is in domain D1 and not accessible by the ETH DMA controller in domain D2
-     SRAM @0x30000000 is in domain D2 and not directly available at startup to be used as stack (8.5.9 page 366) */
-}
-_estack     = ORIGIN(sram) + LENGTH(sram);    /* stack points to end of SRAM */
-
-SECTIONS {
-  .vectors  : { KEEP(*(.isr_vector)) }  > flash
-  .text     : { *(.text* .text.*) }     > flash
-  .rodata   : { *(.rodata*) }           > flash
-
-  .data : {
-    _sdata = .;   /* for init_ram() */
-    *(.first_data)
-    *(.data SORT(.data.*))
-    _edata = .;  /* for init_ram() */
-  } > sram AT > flash
-  _sidata = LOADADDR(.data);
-
-  .bss : {
-    _sbss = .;              /* for init_ram() */
-    *(.bss SORT(.bss.*) COMMON)
-    _ebss = .;              /* for init_ram() */
-  } > sram
-
-  . = ALIGN(8);
-  _end = .;     /* for cmsis_gcc.h and init_ram() */
-}
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/main.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/main.c
deleted file mode 100644
index f01a1cb7..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/main.c
+++ /dev/null
@@ -1,83 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-
-#include "hal.h"
-#include "mongoose.h"
-#include "net.h"
-
-#define BLINK_PERIOD_MS 1000  // LED blinking period in millis
-
-// workaround SysTick firing before FreeRTOS has fully initialized (startup)
-extern void xPortSysTickHandler(void);
-void SysTick_Handler(void) {
-  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
-    xPortSysTickHandler();
-}
-
-bool mg_random(void *buf, size_t len) {  // Use on-board RNG
-  for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
-    uint32_t r = rng_read();
-    memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
-  }
-  return true;
-}
-
-static void timer_fn(void *arg) {
-  struct mg_tcpip_if *ifp = arg;                         // And show
-  const char *names[] = {"down", "up", "req", "ready"};  // network stats
-  MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
-           names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
-           ifp->ndrop, ifp->nerr));
-}
-
-static void server(void *args) {
-  struct mg_mgr mgr;        // Initialise Mongoose event manager
-  mg_mgr_init(&mgr);        // and attach it to the interface
-  mg_log_set(MG_LL_DEBUG);  // Set log level
-
-  // Initialise Mongoose network stack
-  ethernet_init();
-  struct mg_tcpip_driver_stm32h_data driver_data = {.mdc_cr = 4};
-  struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC(),
-                            // Uncomment below for static configuration:
-                            // .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
-                            // .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
-                            // .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
-                            .driver = &mg_tcpip_driver_stm32h,
-                            .driver_data = &driver_data};
-  mg_tcpip_init(&mgr, &mif);
-  mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
-
-  MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
-  while (mif.state != MG_TCPIP_STATE_READY) {
-    mg_mgr_poll(&mgr, 0);
-  }
-
-  MG_INFO(("Initialising application..."));
-  web_init(&mgr);
-
-  MG_INFO(("Starting event loop"));
-  for (;;) mg_mgr_poll(&mgr, 1);  // Infinite event loop
-  (void) args;
-}
-
-static void blinker(void *args) {
-  gpio_init(LED, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_MEDIUM,
-            GPIO_PULL_NONE, 0);
-  for (;;) {
-    gpio_toggle(LED);
-    vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS));
-  }
-  (void) args;
-}
-
-int main(void) {
-  uart_init(UART_DEBUG, 115200);  // Initialise UART
-
-  // Start tasks. NOTE: stack sizes are in 32-bit words
-  xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL);
-  xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL);
-
-  vTaskStartScheduler();  // This blocks
-  return 0;
-}
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.c
deleted file mode 120000
index 5e522bbc..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.c
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.h b/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.h
deleted file mode 120000
index ee4ac823..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose.h
+++ /dev/null
@@ -1 +0,0 @@
-../../../mongoose.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose_config.h b/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose_config.h
deleted file mode 100644
index 954efdd4..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/mongoose_config.h
+++ /dev/null
@@ -1,13 +0,0 @@
-#pragma once
-
-#include <errno.h>	// we are not using lwIP
-
-// See https://mongoose.ws/documentation/#build-options
-#define MG_ARCH MG_ARCH_FREERTOS
-
-#define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_DRIVER_STM32H 1
-#define MG_IO_SIZE 256
-#define MG_ENABLE_CUSTOM_RANDOM 1
-#define MG_ENABLE_PACKED_FS 1
-
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.c
deleted file mode 120000
index fe0e6f06..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.h b/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.h
deleted file mode 120000
index 9de896ef..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/net.h
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/net.h
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/packed_fs.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/packed_fs.c
deleted file mode 120000
index e06bf092..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/packed_fs.c
+++ /dev/null
@@ -1 +0,0 @@
-../../device-dashboard/packed_fs.c
\ No newline at end of file
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/syscalls.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/syscalls.c
deleted file mode 100644
index be3210aa..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/syscalls.c
+++ /dev/null
@@ -1,85 +0,0 @@
-#include <sys/stat.h>
-
-#include "hal.h"
-
-int _fstat(int fd, struct stat *st) {
-  if (fd < 0) return -1;
-  st->st_mode = S_IFCHR;
-  return 0;
-}
-
-void *_sbrk(int incr) {
-  extern char _end;
-  static unsigned char *heap = NULL;
-  unsigned char *prev_heap;
-  if (heap == NULL) heap = (unsigned char *) &_end;
-  prev_heap = heap;
-  heap += incr;
-  return prev_heap;
-}
-
-int _open(const char *path) {
-  (void) path;
-  return -1;
-}
-
-int _close(int fd) {
-  (void) fd;
-  return -1;
-}
-
-int _isatty(int fd) {
-  (void) fd;
-  return 1;
-}
-
-int _lseek(int fd, int ptr, int dir) {
-  (void) fd, (void) ptr, (void) dir;
-  return 0;
-}
-
-void _exit(int status) {
-  (void) status;
-  for (;;) asm volatile("BKPT #0");
-}
-
-void _kill(int pid, int sig) {
-  (void) pid, (void) sig;
-}
-
-int _getpid(void) {
-  return -1;
-}
-
-int _write(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
-  return -1;
-}
-
-int _read(int fd, char *ptr, int len) {
-  (void) fd, (void) ptr, (void) len;
-  return -1;
-}
-
-int _link(const char *a, const char *b) {
-  (void) a, (void) b;
-  return -1;
-}
-
-int _unlink(const char *a) {
-  (void) a;
-  return -1;
-}
-
-int _stat(const char *path, struct stat *st) {
-  (void) path, (void) st;
-  return -1;
-}
-
-int mkdir(const char *path, mode_t mode) {
-  (void) path, (void) mode;
-  return -1;
-}
-
-void _init(void) {}
diff --git a/examples/stm32/nucleo-h743zi-make-freertos-builtin/sysinit.c b/examples/stm32/nucleo-h743zi-make-freertos-builtin/sysinit.c
deleted file mode 100644
index 2d3c124e..00000000
--- a/examples/stm32/nucleo-h743zi-make-freertos-builtin/sysinit.c
+++ /dev/null
@@ -1,65 +0,0 @@
-// Copyright (c) 2023 Cesanta Software Limited
-// All rights reserved
-//
-// This file contains essentials required by the CMSIS:
-// uint32_t SystemCoreClock - holds the system core clock value
-// SystemInit() - initialises the system, e.g. sets up clocks
-
-#include "hal.h"
-
-uint32_t SystemCoreClock = CPU_FREQUENCY;
-
-static inline unsigned int div2prescval(unsigned int div) {
-  // 0 --> /1; 8 --> /2 ... 11 --> /16;  12 --> /64 ... 15 --> /512
-  if (div == 1) return 0;
-  if (div > 16) div /= 2;
-  unsigned int val = 7;
-  while (div >>= 1) ++val;
-  return val;
-}
-
-static inline unsigned int pllrge(unsigned int f) {
-  unsigned int val = 0;
-  while (f >>= 1) ++val;
-  return val - 1;
-}
-
-void SystemInit(void) {  // Called automatically by startup code
-  SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2));  // Enable FPU
-  asm("DSB");
-  asm("ISB");
-  PWR->CR3 |= BIT(1);                          // select LDO (reset value)
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  PWR->D3CR |= BIT(15) | BIT(14);              // Select VOS1
-  uint32_t f = PWR->D3CR;  // fake read to wait for bus clocking
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  SYSCFG->PWRCR |= BIT(0);                     // ODEN
-  f = SYSCFG->PWRCR;
-  while ((PWR->CSR1 & BIT(13)) == 0) spin(1);  // ACTVOSRDY
-  (void) f;
-  SETBITS(
-      RCC->D1CFGR, (0x0F << 8) | (7 << 4) | (0x0F << 0),
-      (div2prescval(D1CPRE) << 8) | (D1PPRE << 4) | (div2prescval(HPRE) << 0));
-  RCC->D2CFGR = (D2PPRE2 << 8) | (D2PPRE1 << 4);
-  RCC->D3CFGR = (D3PPRE << 4);
-  SETBITS(RCC->PLLCFGR, 3 << 2,
-          pllrge(PLL1_HSI / PLL1_M)
-              << 2);  // keep reset config (DIVP1EN, !PLL1VCOSEL), PLL1RGE
-  SETBITS(RCC->PLL1DIVR, (0x7F << 9) | (0x1FF << 0),
-          ((PLL1_P - 1) << 9) | ((PLL1_N - 1) << 0));  // Set PLL1_P PLL1_N
-  SETBITS(RCC->PLLCKSELR, 0x3F << 4,
-          PLL1_M << 4);  // Set PLL1_M (source defaults to HSI)
-  RCC->CR |= BIT(24);    // Enable PLL1
-  while ((RCC->CR & BIT(25)) == 0) spin(1);  // Wait until done
-  RCC->CFGR |= (3 << 0);                     // Set clock source to PLL1
-  while ((RCC->CFGR & (7 << 3)) != (3 << 3)) spin(1);  // Wait until done
-  FLASH->ACR = FLASH_LATENCY;                         // default is larger
-#if 0
-  // Enable SRAM block if you want to use it for ETH buffer (needs proper attributes in driver code)
-  // RCC->AHB2ENR |= BIT(29) | BIT(30) | BIT(31);
-#endif
-
-  RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;  // Enable SYSCFG
-  rng_init();                            // Initialise random number generator
-  SysTick_Config(CPU_FREQUENCY / 1000);  // Sys tick every 1ms
-}