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Merge pull request #3574 from cesanta/rollback
Add MG_OTA_{ROLLBACK,STATE_SET,STATE_GET}
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-131
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+2
-1
@@ -27,7 +27,7 @@ bool mg_ota_flash_begin(size_t new_firmware_size, struct mg_flash *flash) {
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s_size = new_firmware_size;
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MG_INFO(("Starting OTA, firmware size %lu", s_size));
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} else {
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MG_ERROR(("Firmware %lu is too big to fit %lu", new_firmware_size, half));
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MG_ERROR(("Firmware %lu is too big to fit %lu", new_firmware_size, half - flash->align));
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}
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}
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return ok;
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@@ -76,6 +76,7 @@ bool mg_ota_flash_end(struct mg_flash *flash) {
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}
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#endif
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s_size = 0;
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if (ok) MG_OTA_STATE_SET(MG_OTA_TESTING);
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if (ok) ok = flash->swap_fn();
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}
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MG_INFO(("Finishing OTA: %s", ok ? "ok" : "fail"));
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@@ -1041,6 +1041,11 @@ static void mg_upload_handler(struct mg_connection *c, int ev, void *ev_data) {
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(void) ev_data;
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}
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static void mg_upload_default_cb(struct mg_connection *c, const char *status) {
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MG_INFO(("%lu %s", c->id, status ? status : "ok"));
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mg_http_reply(c, status ? 500 : 200, "", "%s\n", status ? status : "ok");
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}
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void mg_http_start_upload(struct mg_connection *c, struct mg_http_message *hm,
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struct mg_str name, struct mg_str dir,
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struct mg_fs *fs,
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@@ -1048,6 +1053,7 @@ void mg_http_start_upload(struct mg_connection *c, struct mg_http_message *hm,
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struct mg_upload_priv *p = (struct mg_upload_priv *) c->data;
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char path[MG_PATH_MAX];
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struct mg_fd *fd;
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if (fn == NULL) fn = mg_upload_default_cb;
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if (sizeof(*p) > sizeof(c->data)) { fn(c, "data too small"); return; }
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if (!mg_path_is_sane(name)) { fn(c, "bad name"); return; }
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mg_snprintf(path, sizeof(path), "%.*s%c%.*s", (int) dir.len, dir.buf,
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@@ -1067,6 +1073,7 @@ void mg_http_start_upload(struct mg_connection *c, struct mg_http_message *hm,
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void mg_http_start_ota(struct mg_connection *c, struct mg_http_message *hm,
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void (*fn)(struct mg_connection *, const char *)) {
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struct mg_upload_priv *p = (struct mg_upload_priv *) c->data;
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if (fn == NULL) fn = mg_upload_default_cb;
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if (sizeof(*p) > sizeof(c->data)) { fn(c, "data too small"); return; }
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if (!mg_ota_begin(hm->body.len)) { fn(c, "ota begin failed"); return; }
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p->expected = hm->body.len;
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@@ -6,24 +6,24 @@
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#include "arch.h"
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#include "net.h"
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#define MG_OTA_NONE 0 // No OTA support
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#define MG_OTA_STM32H5 1 // STM32 H5
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#define MG_OTA_STM32H7 2 // STM32 H7
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#define MG_OTA_STM32H7_DUAL_CORE 3 // STM32 H7 dual core
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#define MG_OTA_STM32F 4 // STM32 F7/F4/F2
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#define MG_OTA_CH32V307 100 // WCH CH32V307
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#define MG_OTA_U2A 200 // Renesas U2A16, U2A8, U2A6
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#define MG_OTA_RT1020 300 // IMXRT1020
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#define MG_OTA_RT1050 301 // IMXRT1050
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#define MG_OTA_RT1060 302 // IMXRT1060
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#define MG_OTA_RT1064 303 // IMXRT1064
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#define MG_OTA_RT1170 304 // IMXRT1170
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#define MG_OTA_MCXN 310 // MCXN947
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#define MG_OTA_RW612 320 // FRDM-RW612
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#define MG_OTA_FLASH 900 // OTA via an internal flash
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#define MG_OTA_ESP32 910 // ESP32 OTA implementation
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#define MG_OTA_PICOSDK 920 // RP2040/2350 using Pico-SDK hardware_flash
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#define MG_OTA_CUSTOM 1000 // Custom implementation
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#define MG_OTA_NONE 0 // No OTA support
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#define MG_OTA_STM32H5 1 // STM32 H5
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#define MG_OTA_STM32H7 2 // STM32 H7
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#define MG_OTA_STM32H7_DUAL_CORE 3 // STM32 H7 dual core
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#define MG_OTA_STM32F 4 // STM32 F7/F4/F2
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#define MG_OTA_CH32V307 100 // WCH CH32V307
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#define MG_OTA_U2A 200 // Renesas U2A16, U2A8, U2A6
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#define MG_OTA_RT1020 300 // IMXRT1020
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#define MG_OTA_RT1050 301 // IMXRT1050
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#define MG_OTA_RT1060 302 // IMXRT1060
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#define MG_OTA_RT1064 303 // IMXRT1064
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#define MG_OTA_RT1170 304 // IMXRT1170
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#define MG_OTA_MCXN 310 // MCXN947
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#define MG_OTA_RW612 320 // FRDM-RW612
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#define MG_OTA_FLASH 900 // OTA via an internal flash
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#define MG_OTA_ESP32 910 // ESP32 OTA implementation
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#define MG_OTA_PICOSDK 920 // RP2040/2350 using Pico-SDK hardware_flash
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#define MG_OTA_CUSTOM 1000 // Custom implementation
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#ifndef MG_OTA
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#define MG_OTA MG_OTA_NONE
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@@ -33,15 +33,70 @@
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#define MG_IRAM __attribute__((noinline, section(".iram")))
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#else
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#define MG_IRAM
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#endif // compiler
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#endif // IRAM
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#endif // OTA
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#endif // compiler
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#endif // IRAM
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#endif // OTA
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// Firmware update API
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bool mg_ota_begin(size_t new_firmware_size); // Start writing
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bool mg_ota_write(const void *buf, size_t len); // Write chunk, aligned to 1k
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bool mg_ota_end(void); // Stop writing
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void mg_ota_url_check(struct mg_mgr *mgr,
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const char *current_version,
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const char *metadata_url,
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void (*fn)(const char *status));
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// MG_OTA_ROLLBACK: swap firmware banks and reset. On flash-based OTA the
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// default calls swap_fn() (no-op on single-bank) then resets. Override in
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// mongoose_config.h for platforms without mg_flash (ESP32, PicoSDK, etc.).
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#ifndef MG_OTA_ROLLBACK
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#define MG_OTA_ROLLBACK() \
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do { \
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mg_flash->swap_fn(); \
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NVIC_SystemReset(); \
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} while (0)
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#endif
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// MG_OTA_ROLLBACK_TIMER_START(seconds): arm a hardware watchdog as the rollback
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// deadline. If it fires before MG_OTA_STATE_SET(MG_OTA_CONFIRMED), the device
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// resets and MG_OTA_STATE_GET() == MG_OTA_FAILED triggers MG_OTA_ROLLBACK().
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#ifndef MG_OTA_ROLLBACK_TIMER_START
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#define MG_OTA_ROLLBACK_TIMER_START(seconds) (void) (seconds)
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#endif
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// OTA state values for MG_OTA_STATE_GET / MG_OTA_STATE_SET.
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// MG_OTA_CONFIRMED: firmware is committed, normal operation.
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// MG_OTA_TESTING: new firmware booted for the first time; IWDG is armed.
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// If the device reboots while in this state, it transitions
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// to MG_OTA_FAILED and rolls back on the next boot.
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// MG_OTA_FAILED: previous boot did not commit in time; rollback on next
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// boot.
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enum { MG_OTA_CONFIRMED = 0, MG_OTA_TESTING = 1, MG_OTA_FAILED = 2 };
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// Persistent OTA state storage. Define in mongoose_config.h to use a
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// location that survives resets
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#ifndef MG_OTA_STATE_GET
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#define MG_OTA_STATE_GET() 0
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#endif
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#ifndef MG_OTA_STATE_SET
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#define MG_OTA_STATE_SET(val) (void) (val)
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#endif
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// Call once at boot. Arms the rollback watchdog for (seconds) seconds when
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// the new firmware is in TESTING state. Rolls back immediately if FAILED.
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// boot (TESTING) → set FAILED → arm IWDG → run firmware
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// ├── commit called → set CONFIRMED → NVIC_SystemReset() → clean boot
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// └── IWDG fires → hard reset → boot → state is still FAILED → rollback
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#define MG_OTA_BOOT_CHECK(seconds) \
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do { \
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if (MG_OTA_STATE_GET() == MG_OTA_FAILED) { \
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MG_OTA_STATE_SET(MG_OTA_CONFIRMED); \
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MG_INFO(("Commit deadline expired, rolling back")); \
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MG_OTA_ROLLBACK(); \
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} else if (MG_OTA_STATE_GET() == MG_OTA_TESTING) { \
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MG_OTA_STATE_SET(MG_OTA_FAILED); \
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MG_INFO(("New firmware: commit within %u sec or rolls back", \
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(unsigned) (seconds))); \
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MG_OTA_ROLLBACK_TIMER_START(seconds); \
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} \
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} while (0)
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// Pull based OTA over HTTP
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void mg_ota_url_check(struct mg_mgr *mgr, const char *current_version,
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const char *metadata_url, void (*fn)(const char *status));
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+3
-6
@@ -96,10 +96,8 @@ static bool mg_stm32h5_swap(void) {
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uint32_t desired = flash_bank_is_swapped() ? 0 : MG_BIT(31);
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flash_unlock();
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flash_clear_err();
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// printf("OPTSR_PRG 1 %#lx\n", FLASH->OPTSR_PRG);
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MG_SET_BITS(MG_REG(FLASH_OPTSR_PRG), MG_BIT(31), desired);
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// printf("OPTSR_PRG 2 %#lx\n", FLASH->OPTSR_PRG);
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MG_REG(FLASH_OPTCR) |= MG_BIT(1); // OPTSTART
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MG_REG(FLASH_OPTCR) |= MG_BIT(1); // OPTSTART; triggers auto-reset on H5
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while ((MG_REG(FLASH_OPTSR_CUR) & MG_BIT(31)) != desired) (void) 0;
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return true;
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}
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@@ -146,10 +144,9 @@ bool mg_ota_write(const void *buf, size_t len) {
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return mg_ota_flash_write(buf, len, &s_mg_flash_stm32h5);
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}
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// Actual bank swap is deferred until reset, it is safe to execute in flash
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bool mg_ota_end(void) {
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if(!mg_ota_flash_end(&s_mg_flash_stm32h5)) return false;
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*(volatile unsigned long *) 0xe000ed0c = 0x5fa0004;
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if (!mg_ota_flash_end(&s_mg_flash_stm32h5)) return false;
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*(volatile uint32_t *) 0xe000ed0c = 0x5fa0004U; // NVIC_SystemReset()
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return true;
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}
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struct mg_flash *mg_flash = &s_mg_flash_stm32h5;
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+7
-7
@@ -112,6 +112,7 @@ MG_IRAM static bool mg_stm32h7_erase(void *addr) {
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MG_REG(bank + FLASH_CR) |= (sector & 7U) << 8U; // Sector to erase
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MG_REG(bank + FLASH_CR) |= MG_BIT(2); // Sector erase bit
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MG_REG(bank + FLASH_CR) |= MG_BIT(7); // Start erasing
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flash_wait(bank);
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ok = !flash_is_err(bank);
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MG_DEBUG(("Erase sector %lu @ %p %s. CR %#lx SR %#lx", sector, addr,
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ok ? "ok" : "fail", MG_REG(bank + FLASH_CR),
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@@ -127,9 +128,7 @@ MG_IRAM static bool mg_stm32h7_swap(void) {
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uint32_t desired = flash_bank_is_swapped(bank) ? 0 : MG_BIT(31);
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flash_unlock();
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flash_clear_err(bank);
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// printf("OPTSR_PRG 1 %#lx\n", FLASH->OPTSR_PRG);
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MG_SET_BITS(MG_REG(bank + FLASH_OPTSR_PRG), MG_BIT(31), desired);
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// printf("OPTSR_PRG 2 %#lx\n", FLASH->OPTSR_PRG);
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MG_REG(bank + FLASH_OPTCR) |= MG_BIT(1); // OPTSTART
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while ((MG_REG(bank + FLASH_OPTSR_CUR) & MG_BIT(31)) != desired) (void) 0;
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return true;
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@@ -162,7 +161,7 @@ MG_IRAM static bool mg_stm32h7_write(void *addr, const void *buf, size_t len) {
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if (flash_is_err(bank)) ok = false;
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}
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if (!s_flash_irq_disabled) MG_ARM_ENABLE_IRQ();
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MG_DEBUG(("Flash write %lu bytes @ %p: %s. CR %#lx SR %#lx", len, dst,
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MG_DEBUG(("Flash write %lu bytes @ %p: %s. CR %#lx SR %#lx", len, addr,
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ok ? "ok" : "fail", MG_REG(bank + FLASH_CR),
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MG_REG(bank + FLASH_SR)));
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MG_REG(bank + FLASH_CR) &= ~MG_BIT(1); // Clear programming flag
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@@ -175,7 +174,7 @@ MG_IRAM static void single_bank_swap(char *p1, char *p2, size_t s, size_t ss) {
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for (size_t ofs = 0; ofs < s; ofs += ss) {
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mg_stm32h7_write(p1 + ofs, p2 + ofs, ss);
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}
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*(volatile unsigned long *) 0xe000ed0c = 0x5fa0004;
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*(volatile uint32_t *) 0xe000ed0cU = 0x5fa0004U; // NVIC_SystemReset()
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}
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bool mg_ota_begin(size_t new_firmware_size) {
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@@ -185,8 +184,8 @@ bool mg_ota_begin(size_t new_firmware_size) {
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s_mg_flash_stm32h7.size /= 2;
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}
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#ifdef __ZEPHYR__
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*((uint32_t *)0xE000ED94) = 0;
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MG_DEBUG(("Jailbreak %s", *((uint32_t *)0xE000ED94) == 0 ? "successful" : "failed"));
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*((uint32_t *) 0xE000ED94) = 0;
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MG_DEBUG(("Jailbreak %s", *((uint32_t *) 0xE000ED94) == 0 ? "ok" : "failed"));
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#endif
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return mg_ota_flash_begin(new_firmware_size, &s_mg_flash_stm32h7);
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}
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@@ -199,7 +198,7 @@ bool mg_ota_end(void) {
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if (mg_ota_flash_end(&s_mg_flash_stm32h7)) {
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if (is_dualbank()) {
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// Bank swap is deferred until reset, been executing in flash, reset
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*(volatile unsigned long *) 0xe000ed0c = 0x5fa0004;
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*(volatile uint32_t *) 0xe000ed0cU = 0x5fa0004U; // NVIC_SystemReset()
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} else {
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// Swap partitions. Pray power does not go away
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MG_INFO(("Swapping partitions, size %u (%u sectors)",
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@@ -217,5 +216,6 @@ bool mg_ota_end(void) {
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}
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return false;
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}
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struct mg_flash *mg_flash = &s_mg_flash_stm32h7;
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#endif
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+1
-1
@@ -3,7 +3,7 @@
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#include "tls_uecc.h"
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#include "tls.h"
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#if MG_TLS == MG_TLS_BUILTIN
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#if MG_TLS == MG_TLS_BUILTIN || defined(MG_OTA_PUBLIC_KEY)
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#ifndef MG_UECC_RNG_MAX_TRIES
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#define MG_UECC_RNG_MAX_TRIES 64
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