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Add driver init to mg_mgr_init()
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@@ -1,8 +1,41 @@
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#pragma once
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#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
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struct mg_tcpip_driver_ra_data {
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// MDC clock "divider". MDC clock is software generated,
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uint32_t clock; // core clock frequency in Hz
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uint16_t irqno; // IRQn, R_ICU->IELSR[irqno]
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uint8_t phy_addr; // PHY address
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};
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#undef MG_ENABLE_TCPIP_DRIVER_INIT
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#define MG_ENABLE_TCPIP_DRIVER_INIT 0 // TODO(): needs SystemCoreClock
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#if 0
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#ifndef MG_MAC_ADDRESS
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#define MG_MAC_ADDRESS MG_MAC_ADDRESS_RANDOM
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#endif
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#ifndef MG_TCPIP_PHY_ADDR
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#define MG_TCPIP_PHY_ADDR 1
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#endif
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#ifndef MG_DRIVER_RA_CLOCK
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#define MG_DRIVER_RA_CLOCK
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#endif
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#ifndef MG_DRIVER_RA_IRQNO
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#define MG_DRIVER_RA_IRQNO 0
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#endif
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#define MG_TCPIP_DRIVER_DATA \
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static struct mg_tcpip_driver_ra_data driver_data = { \
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.clock = MG_DRIVER_RA_CLOCK, \
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.irqno = MG_DRIVER_RA_CLOCK, \
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.phy_addr = MG_TCPIP_PHY_ADDR, \
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};
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#define MG_TCPIP_DRIVER_CODE &mg_tcpip_driver_ra
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#define MG_TCPIP_DRIVER_NAME "ra"
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#endif
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#endif
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