From d9619a8fa4aa541ae4b2a4af0253f77743f2bd44 Mon Sep 17 00:00:00 2001 From: robert Date: Wed, 29 May 2024 10:48:53 -0400 Subject: [PATCH] XMC7: Ethernet descriptors 8-byte alignment --- mongoose.c | 15 +++++++++------ src/drivers/xmc7.c | 15 +++++++++------ 2 files changed, 18 insertions(+), 12 deletions(-) diff --git a/mongoose.c b/mongoose.c index 9e478a1b..200e750f 100644 --- a/mongoose.c +++ b/mongoose.c @@ -17380,12 +17380,15 @@ struct ETH_Type { #define ETH_DESC_CNT 4 // Descriptors count #define ETH_DS 2 // Descriptor size (words) +// TODO(): handle these in a portable compiler-independent CMSIS-friendly way +#define MG_8BYTE_ALIGNED __attribute__((aligned((8U)))) + static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; -static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors -static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors -static uint8_t s_txno; // Current TX descriptor -static uint8_t s_rxno; // Current RX descriptor +static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; +static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; +static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor +static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; @@ -17452,8 +17455,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { ETH0->RECEIVE_Q2_PTR = 1; ETH0->RECEIVE_Q1_PTR = 1; - // enable interrupts (TX and RX complete) - ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1); + // enable interrupts (RX complete) + ETH0->INT_ENABLE = MG_BIT(1); // set MAC address ETH0->SPEC_ADD1_BOTTOM = diff --git a/src/drivers/xmc7.c b/src/drivers/xmc7.c index a530cb30..f35bb032 100644 --- a/src/drivers/xmc7.c +++ b/src/drivers/xmc7.c @@ -59,12 +59,15 @@ struct ETH_Type { #define ETH_DESC_CNT 4 // Descriptors count #define ETH_DS 2 // Descriptor size (words) +// TODO(): handle these in a portable compiler-independent CMSIS-friendly way +#define MG_8BYTE_ALIGNED __attribute__((aligned((8U)))) + static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; -static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors -static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors -static uint8_t s_txno; // Current TX descriptor -static uint8_t s_rxno; // Current RX descriptor +static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; +static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED; +static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor +static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor static struct mg_tcpip_if *s_ifp; // MIP interface enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; @@ -131,8 +134,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) { ETH0->RECEIVE_Q2_PTR = 1; ETH0->RECEIVE_Q1_PTR = 1; - // enable interrupts (TX and RX complete) - ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1); + // enable interrupts (RX complete) + ETH0->INT_ENABLE = MG_BIT(1); // set MAC address ETH0->SPEC_ADD1_BOTTOM =