Replace mg_http_start_* with streaming uploads

tutorials/http/file-upload-single-post/main.c

@@ -29,7 +29,7 @@ static const char *s_tls_key =
     "4hf5Gx17YJkq5/z3k6ogPDPpoAYWIw1/sw==\n"
     "-----END EC PRIVATE KEY-----\n";
 
-static void upload(struct mg_http_message *hm, struct mg_str *data, void **p) {
+static bool upload(struct mg_http_message *hm, struct mg_str *data, void **p) {
   struct mg_fs *fs = &mg_fs_posix;
   if (hm != NULL) {
     char path[MG_PATH_MAX];
@@ -48,6 +48,7 @@ static void upload(struct mg_http_message *hm, struct mg_str *data, void **p) {
     MG_INFO(("UPLOAD END %p", p));
     if (*p) fs->cl(*p), *p = NULL;
   }
+  return true;  // signal success
 }
 
 static void fn(struct mg_connection *c, int ev, void *ev_data) {
@@ -55,13 +56,16 @@ static void fn(struct mg_connection *c, int ev, void *ev_data) {
     struct mg_tls_opts opts = {.cert = mg_str(s_tls_cert),
                                .key = mg_str(s_tls_key)};
     mg_tls_init(c, &opts);
+  } else if (ev == MG_EV_HTTP_HDRS) {
+    // Handle upload requests to /fs/*
+    struct mg_http_message *hm = (struct mg_http_message *) ev_data;
+    if (mg_match(hm->uri, mg_str("/fs/*"), NULL)) {
+      mg_http_stream_body(c, hm, upload, NULL);
+    }
   } else if (ev == MG_EV_HTTP_MSG && c->pfn != NULL) {
     struct mg_http_serve_opts opts = {.root_dir = "web_root"};
     mg_http_serve_dir(c, ev_data, &opts);
   }
-
-  // Handle upload requests to /fs/*
-  mg_http_stream_body(c, ev, ev_data, mg_str("/fs/*"), upload);
 }
 
 int main(void) {

tutorials/stm32/nucleo-h563zi/minimal/Makefile

@@ -12,7 +12,7 @@ SOURCES = main.c hal.c
 SOURCES += cmsis_h5/Source/Templates/gcc/startup_stm32h563xx.s
 SOURCES += mongoose/mongoose.c
 
-all build example: firmware.signed.bin
+all build example: firmware.bin
 
 mongoose/mongoose.c mongoose/mongoose.h:
 	cp ../../../../mongoose.[ch] mongoose/
@@ -25,9 +25,6 @@ firmware.bin: firmware.elf
 	@echo
 	@echo "To flash, run 'make flash', or use STM32CubeProgrammer"
 
-sign firmware.signed.bin: firmware.bin
-	node ../../../../resources/sign.js sign firmware.bin private.pem
-
 flash: firmware.bin
 	STM32_Programmer_CLI -c port=swd mode=UR -w firmware.elf -hardRst
 

tutorials/stm32/nucleo-h563zi/minimal/hal.h

@@ -181,23 +181,7 @@ static inline void hal_system_init(void) {
   __ISB();
 }
 
-// Enable TAMP/RTC APB clock, backup domain write access, and RTC/TAMP kernel
-// clock (LSI). Idempotent: skips RTC init if already enabled after a reset.
-// Must be called before accessing TAMP backup registers or IWDG.
-static inline void hal_backup_domain_init(void) {
-  RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN;  // enable TAMP/RTC APB clock
-  PWR->DBPCR |= PWR_DBPCR_DBP;           // enable backup domain write access
-  if ((RCC->BDCR & RCC_BDCR_RTCEN) == 0) {  // init only once (not warm reset)
-    RCC->BDCR |= RCC_BDCR_LSION;                           // enable LSI
-    while ((RCC->BDCR & RCC_BDCR_LSIRDY) == 0) (void) 0;  // wait ready
-    RCC->BDCR |= (2U << RCC_BDCR_RTCSEL_Pos);              // LSI as clock source
-    RCC->BDCR |= RCC_BDCR_RTCEN;                           // enable RTC/TAMP clock
-  }
-}
-
 static inline void hal_clock_init(void) {
-  hal_backup_domain_init();
-
   // Set flash latency. RM0481, section 7.11.1, section 7.3.4 table 37
   CLRSET(FLASH->ACR, (FLASH_ACR_WRHIGHFREQ_Msk | FLASH_ACR_LATENCY_Msk),
          FLASH_ACR_LATENCY_5WS | FLASH_ACR_WRHIGHFREQ_1);

tutorials/stm32/nucleo-h563zi/minimal/main.c

@@ -41,31 +41,13 @@ bool mg_random(void *buf, size_t len) {
 }
 
 static void http_ev_handler(struct mg_connection *c, int ev, void *ev_data) {
-  if (ev == MG_EV_HTTP_HDRS) {
-    struct mg_http_message *hm = (struct mg_http_message *) ev_data;
-    // Start OTA on headers so body chunks stream directly to flash (no RAM buffer)
-    if (mg_match(hm->uri, mg_str("/api/ota/update"), NULL)) {
-      mg_http_start_ota(c, hm, NULL);
-    }
-  } else if (ev == MG_EV_HTTP_MSG) {
+  if (ev == MG_EV_HTTP_MSG) {
     struct mg_http_message *hm = (struct mg_http_message *) ev_data;
     if (mg_match(hm->uri, mg_str("/api/tick"), NULL)) {
       mg_http_reply(c, 200, "", "{%m:%llu}\n", MG_ESC("tick"), hal_get_tick());
-    } else if (mg_match(hm->uri, mg_str("/api/ota/commit"), NULL)) {
-      c->data[0] = 1;
-      mg_http_reply(c, 200, "", "ok\n");
-    } else if (mg_match(hm->uri, mg_str("/api/ota/rollback"), NULL)) {
-      c->data[0] = 2;
-      mg_http_reply(c, 200, "", "ok\n");
     } else {
       mg_http_reply(c, 200, "", "Hi from Mongoose, tick %llu\n", hal_get_tick());
     }
-  } else if (ev == MG_EV_CLOSE && c->data[0] == 1) {
-    MG_OTA_STATE_SET(MG_OTA_CONFIRMED);
-    NVIC_SystemReset();
-  } else if (ev == MG_EV_CLOSE && c->data[0] == 2) {
-    MG_OTA_STATE_SET(MG_OTA_CONFIRMED);
-    MG_OTA_ROLLBACK();
   }
 }
 
@@ -74,8 +56,6 @@ int main(void) {
   hal_uart_init(UART_DEBUG, UART_DEBUG_TX_PIN, UART_DEBUG_RX_PIN, 115200);
   mg_log_set_fn(log_fn, UART_DEBUG);
 
-  MG_OTA_BOOT_CHECK();  // Must be called after clock init
-
   hal_rng_init();
   hal_gpio_output(LED_1);
   hal_gpio_output(LED_2);

tutorials/stm32/nucleo-h563zi/minimal/mongoose/mongoose_config.h

@@ -3,7 +3,6 @@
 
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_ARMGCC
-#define MG_OTA MG_OTA_STM32H5
 #define MG_TLS MG_TLS_BUILTIN
 #define MG_IO_SIZE 2048
 
@@ -13,39 +12,6 @@
 #define MG_ENABLE_PACKED_FS 1
 #define MG_ENABLE_DRIVER_STM32H 1
 
-#define MG_OTA_PUBLIC_KEY                                               \
-  {                                                                     \
-      0x19, 0x7f, 0xed, 0x81, 0x8b, 0xb7, 0xb2, 0xa5, 0xde, 0xe0, 0xde, \
-      0x04, 0x83, 0x60, 0xc8, 0x69, 0x61, 0x39, 0x30, 0x1f, 0xc1, 0x52, \
-      0x11, 0x4b, 0xb7, 0xa4, 0xd7, 0x52, 0x03, 0x36, 0xc6, 0xc1, 0xbf, \
-      0x22, 0x75, 0x04, 0x49, 0xf8, 0x46, 0x47, 0xec, 0x20, 0xd6, 0x8d, \
-      0x48, 0x29, 0x7d, 0x63, 0xb3, 0xf7, 0x1f, 0x58, 0x44, 0x82, 0xcc, \
-      0x7a, 0x4b, 0x5e, 0x68, 0x98, 0x24, 0x1f, 0x86, 0xf4,             \
-  }
-
-// OTA rollback timer via IWDG. PR=8 → /1024 on H563 (RM0481 §52.4.2).
-// Fixed 10 s hang-detection window: RLR = 10 * 32000 / 1024 = 312.
-// PVU/RVU must clear before writing RLR/starting (RM0481 §52.4.3).
-// mg_ota_poll() feeds the watchdog every 500ms while in MG_OTA_TESTING state.
-#define MG_OTA_ROLLBACK_TIMER_START()                                          \
-  do {                                                                         \
-    IWDG->KR = 0x5555U;                               /* unlock        */     \
-    IWDG->PR = 8U;                                    /* /1024         */     \
-    while (IWDG->SR & IWDG_SR_PVU) (void) 0;          /* wait PVU      */     \
-    IWDG->RLR = 312U;                                 /* 10 s          */     \
-    while (IWDG->SR & IWDG_SR_RVU) (void) 0;          /* wait RVU      */     \
-    IWDG->KR = 0xCCCCU;                               /* start         */     \
-    IWDG->KR = 0xAAAAU;                               /* reload RLR    */     \
-  } while (0)
-#define MG_OTA_ROLLBACK_TIMER_FEED() (IWDG->KR = 0xAAAAU)
-
-// OTA state in TAMP backup register 0 (survives all resets, clears on POR).
-// Requires hal_backup_domain_init() (called from hal_clock_init) to have run.
-#define MG_OTA_STATE_GET()    (RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, TAMP->BKP0R)
-#define MG_OTA_STATE_SET(v)                                           \
-  (RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, PWR->DBPCR |= PWR_DBPCR_DBP, \
-   (TAMP->BKP0R = (uint32_t) (v)), TAMP->BKP0R)
-
 // #define MG_DRIVER_MDC_CR 4   // RMII MDC clock divider, from 0 to 4
 // #define MG_TCPIP_PHY_ADDR 0  // PHY address
 

tutorials/stm32/nucleo-h563zi/minimal/private.pem

@@ -1,5 +0,0 @@
------BEGIN PRIVATE KEY-----
-MIGHAgEAMBMGByqGSM49AgEGCCqGSM49AwEHBG0wawIBAQQgto6awcVrVzHfgSaD
-WFiy6JrXahab3F5lfGvb7A1XzjShRANCAAQZf+2Bi7eypd7g3gSDYMhpYTkwH8FS
-EUu3pNdSAzbGwb8idQRJ+EZH7CDWjUgpfWOz9x9YRILMekteaJgkH4b0
------END PRIVATE KEY-----