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44 lines
1.5 KiB
C
44 lines
1.5 KiB
C
#pragma once
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#if MG_ENABLE_TCPIP && \
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(defined(MG_ENABLE_DRIVER_RA6) && MG_ENABLE_DRIVER_RA6) || \
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(defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8)
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struct mg_tcpip_driver_ra_data {
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// MDC clock "divider". MDC clock is software generated,
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uint32_t clock; // core clock frequency in Hz
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uint16_t irqno; // IRQn, R_ICU->IELSR[irqno]
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uint8_t phy_addr; // PHY address
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};
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#ifndef MG_DRIVER_CLK_FREQ
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#define MG_DRIVER_CLK_FREQ 100000000UL
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#endif
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#ifndef MG_DRIVER_IRQ_NO
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#define MG_DRIVER_IRQ_NO 0
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#endif
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#ifndef MG_TCPIP_PHY_ADDR
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#define MG_TCPIP_PHY_ADDR 0
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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do { \
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static struct mg_tcpip_driver_ra_data driver_data_; \
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static struct mg_tcpip_if mif_; \
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driver_data_.clock = MG_DRIVER_CLK_FREQ; \
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driver_data_.irqno = MG_DRIVER_IRQ_NO; \
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driver_data_.phy_addr = MG_TCPIP_PHY_ADDR; \
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mif_.ip = MG_TCPIP_IP; \
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mif_.mask = MG_TCPIP_MASK; \
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mif_.gw = MG_TCPIP_GW; \
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mif_.driver = &mg_tcpip_driver_ra; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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mg_tcpip_init(mgr, &mif_); \
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MG_INFO(("Driver: ra, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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#endif
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