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16 lines
659 B
C
16 lines
659 B
C
#pragma once
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struct mg_tcpip_driver_imxrt1020_data {
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// MDC clock divider. MDC clock is derived from IPS Bus clock (ipg_clk),
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// must not exceed 2.5MHz. Configuration for clock range 2.36~2.50 MHz
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// ipg_clk MSCR mdc_cr VALUE
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// -------------------------------------
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// -1 <-- tell driver to guess the value
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// 25 MHz 0x04 0
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// 33 MHz 0x06 1
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// 40 MHz 0x07 2
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// 50 MHz 0x09 3
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// 66 MHz 0x0D 4 <-- value for iMXRT1020-EVK at max freq.
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int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4
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};
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