mirror of
https://github.com/cesanta/mongoose.git
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221 lines
7.8 KiB
C
221 lines
7.8 KiB
C
/*
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** ###################################################################
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** Processors: RW610ETA2I
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** RW610HNA2I
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** RW610UKA2I
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** RW612ETA2I
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** RW612HNA2I
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** RW612UKA2I
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**
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** Version: rev. 1.0, 2021-03-16
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** Build: b240715
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**
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** Abstract:
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** CMSIS Peripheral Access Layer for OSTIMER
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**
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** Copyright 1997-2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2024 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2021-03-16)
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** Initial version.
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**
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** ###################################################################
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*/
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/*!
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* @file OSTIMER.h
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* @version 1.0
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* @date 2021-03-16
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* @brief CMSIS Peripheral Access Layer for OSTIMER
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*
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* CMSIS Peripheral Access Layer for OSTIMER
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*/
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#if !defined(OSTIMER_H_)
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#define OSTIMER_H_ /**< Symbol preventing repeated inclusion */
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#if (defined(CPU_RW610ETA2I) || defined(CPU_RW610HNA2I) || defined(CPU_RW610UKA2I))
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#include "RW610_COMMON.h"
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#elif (defined(CPU_RW612ETA2I) || defined(CPU_RW612HNA2I) || defined(CPU_RW612UKA2I))
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#include "RW612_COMMON.h"
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#else
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#error "No valid CPU defined!"
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#endif
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/* ----------------------------------------------------------------------------
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-- Device Peripheral Access Layer
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup Peripheral_access_layer Device Peripheral Access Layer
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* @{
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*/
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/*
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** Start of section using anonymous unions
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*/
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#if defined(__ARMCC_VERSION)
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#if (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#else
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#pragma push
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#pragma anon_unions
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#endif
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma language=extended
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#else
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#error Not supported compiler type
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#endif
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/* ----------------------------------------------------------------------------
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-- OSTIMER Peripheral Access Layer
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup OSTIMER_Peripheral_Access_Layer OSTIMER Peripheral Access Layer
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* @{
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*/
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/** OSTIMER - Register Layout Typedef */
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typedef struct {
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__I uint32_t EVTIMERL; /**< EVTIMER Low Register, offset: 0x0 */
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__I uint32_t EVTIMERH; /**< EVTIMER High Register, offset: 0x4 */
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__I uint32_t CAPTURE_L; /**< Local Capture Low Register for CPU, offset: 0x8 */
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__I uint32_t CAPTURE_H; /**< Local Capture High Register for CPU, offset: 0xC */
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__IO uint32_t MATCH_L; /**< Local Match Low Register for CPU, offset: 0x10 */
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__IO uint32_t MATCH_H; /**< Local Match High Register for CPU, offset: 0x14 */
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uint8_t RESERVED_0[4];
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__IO uint32_t OSEVENT_CTRL; /**< OS Event Timer Control Register for CPU, offset: 0x1C */
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} OSTIMER_Type;
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/* ----------------------------------------------------------------------------
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-- OSTIMER Register Masks
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup OSTIMER_Register_Masks OSTIMER Register Masks
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* @{
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*/
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/*! @name EVTIMERL - EVTIMER Low Register */
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/*! @{ */
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#define OSTIMER_EVTIMERL_EVTIMER_COUNT_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_EVTIMERL_EVTIMER_COUNT_VALUE_SHIFT (0U)
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/*! EVTIMER_COUNT_VALUE - EVTimer Count value */
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#define OSTIMER_EVTIMERL_EVTIMER_COUNT_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_EVTIMERL_EVTIMER_COUNT_VALUE_SHIFT)) & OSTIMER_EVTIMERL_EVTIMER_COUNT_VALUE_MASK)
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/*! @} */
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/*! @name EVTIMERH - EVTIMER High Register */
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/*! @{ */
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#define OSTIMER_EVTIMERH_EVTIMER_COUNT_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_EVTIMERH_EVTIMER_COUNT_VALUE_SHIFT (0U)
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/*! EVTIMER_COUNT_VALUE - EVTimer Count value */
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#define OSTIMER_EVTIMERH_EVTIMER_COUNT_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_EVTIMERH_EVTIMER_COUNT_VALUE_SHIFT)) & OSTIMER_EVTIMERH_EVTIMER_COUNT_VALUE_MASK)
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/*! @} */
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/*! @name CAPTURE_L - Local Capture Low Register for CPU */
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/*! @{ */
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#define OSTIMER_CAPTURE_L_CAPTURE_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_CAPTURE_L_CAPTURE_VALUE_SHIFT (0U)
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/*! CAPTURE_VALUE - EVTimer Capture value */
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#define OSTIMER_CAPTURE_L_CAPTURE_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_CAPTURE_L_CAPTURE_VALUE_SHIFT)) & OSTIMER_CAPTURE_L_CAPTURE_VALUE_MASK)
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/*! @} */
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/*! @name CAPTURE_H - Local Capture High Register for CPU */
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/*! @{ */
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#define OSTIMER_CAPTURE_H_CAPTURE_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_CAPTURE_H_CAPTURE_VALUE_SHIFT (0U)
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/*! CAPTURE_VALUE - EVTimer Capture value */
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#define OSTIMER_CAPTURE_H_CAPTURE_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_CAPTURE_H_CAPTURE_VALUE_SHIFT)) & OSTIMER_CAPTURE_H_CAPTURE_VALUE_MASK)
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/*! @} */
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/*! @name MATCH_L - Local Match Low Register for CPU */
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/*! @{ */
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#define OSTIMER_MATCH_L_MATCH_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_MATCH_L_MATCH_VALUE_SHIFT (0U)
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/*! MATCH_VALUE - EVTimer Match value */
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#define OSTIMER_MATCH_L_MATCH_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_MATCH_L_MATCH_VALUE_SHIFT)) & OSTIMER_MATCH_L_MATCH_VALUE_MASK)
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/*! @} */
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/*! @name MATCH_H - Local Match High Register for CPU */
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/*! @{ */
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#define OSTIMER_MATCH_H_MATCH_VALUE_MASK (0xFFFFFFFFU)
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#define OSTIMER_MATCH_H_MATCH_VALUE_SHIFT (0U)
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/*! MATCH_VALUE - EVTimer Match value */
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#define OSTIMER_MATCH_H_MATCH_VALUE(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_MATCH_H_MATCH_VALUE_SHIFT)) & OSTIMER_MATCH_H_MATCH_VALUE_MASK)
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/*! @} */
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/*! @name OSEVENT_CTRL - OS Event Timer Control Register for CPU */
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/*! @{ */
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTRFLAG_MASK (0x1U)
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTRFLAG_SHIFT (0U)
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/*! OSTIMER_INTRFLAG - Interrupt Flag */
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTRFLAG(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_OSEVENT_CTRL_OSTIMER_INTRFLAG_SHIFT)) & OSTIMER_OSEVENT_CTRL_OSTIMER_INTRFLAG_MASK)
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_MASK (0x2U)
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_SHIFT (1U)
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/*! OSTIMER_INTENA - Interrupt/Wake-up Request
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* 0b0..Interrupt/wake-up requests due to the OSTIMER_INTR flag are blocked.
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* 0b1..An interrupt/wake-up request to the domain processor will be asserted when the OSTIMER_INTR flag is set.
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*/
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#define OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_SHIFT)) & OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_MASK)
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#define OSTIMER_OSEVENT_CTRL_MATCH_WR_RDY_MASK (0x4U)
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#define OSTIMER_OSEVENT_CTRL_MATCH_WR_RDY_SHIFT (2U)
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/*! MATCH_WR_RDY - EVTimer Match Write Ready */
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#define OSTIMER_OSEVENT_CTRL_MATCH_WR_RDY(x) (((uint32_t)(((uint32_t)(x)) << OSTIMER_OSEVENT_CTRL_MATCH_WR_RDY_SHIFT)) & OSTIMER_OSEVENT_CTRL_MATCH_WR_RDY_MASK)
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/*! @} */
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/*!
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* @}
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*/ /* end of group OSTIMER_Register_Masks */
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/*!
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* @}
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*/ /* end of group OSTIMER_Peripheral_Access_Layer */
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/*
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** End of section using anonymous unions
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*/
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#if defined(__ARMCC_VERSION)
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#if (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic pop
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#else
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#pragma pop
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#endif
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#elif defined(__GNUC__)
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/* leave anonymous unions enabled */
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma language=default
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#else
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#error Not supported compiler type
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#endif
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/*!
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* @}
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*/ /* end of group Peripheral_access_layer */
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#endif /* OSTIMER_H_ */
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