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https://github.com/cesanta/mongoose.git
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303 lines
10 KiB
C
303 lines
10 KiB
C
/*
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** ###################################################################
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** Processors: RW610ETA2I
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** RW610HNA2I
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** RW610UKA2I
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** RW612ETA2I
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** RW612HNA2I
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** RW612UKA2I
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**
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** Version: rev. 1.0, 2021-03-16
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** Build: b240715
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**
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** Abstract:
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** CMSIS Peripheral Access Layer for UTICK
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**
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** Copyright 1997-2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2024 NXP
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** Revisions:
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** - rev. 1.0 (2021-03-16)
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** Initial version.
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**
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** ###################################################################
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*/
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/*!
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* @file UTICK.h
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* @version 1.0
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* @date 2021-03-16
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* @brief CMSIS Peripheral Access Layer for UTICK
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*
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* CMSIS Peripheral Access Layer for UTICK
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*/
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#if !defined(UTICK_H_)
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#define UTICK_H_ /**< Symbol preventing repeated inclusion */
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#if (defined(CPU_RW610ETA2I) || defined(CPU_RW610HNA2I) || defined(CPU_RW610UKA2I))
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#include "RW610_COMMON.h"
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#elif (defined(CPU_RW612ETA2I) || defined(CPU_RW612HNA2I) || defined(CPU_RW612UKA2I))
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#include "RW612_COMMON.h"
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#else
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#error "No valid CPU defined!"
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#endif
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/* ----------------------------------------------------------------------------
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-- Device Peripheral Access Layer
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup Peripheral_access_layer Device Peripheral Access Layer
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* @{
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*/
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/*
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** Start of section using anonymous unions
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*/
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#if defined(__ARMCC_VERSION)
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#if (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic push
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#else
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#pragma push
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#pragma anon_unions
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#endif
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#elif defined(__GNUC__)
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/* anonymous unions are enabled by default */
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma language=extended
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#else
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#error Not supported compiler type
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#endif
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/* ----------------------------------------------------------------------------
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-- UTICK Peripheral Access Layer
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup UTICK_Peripheral_Access_Layer UTICK Peripheral Access Layer
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* @{
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*/
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/** UTICK - Size of Registers Arrays */
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#define UTICK_CAP_COUNT 4u
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/** UTICK - Register Layout Typedef */
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typedef struct {
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__IO uint32_t CTRL; /**< Control, offset: 0x0 */
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__IO uint32_t STAT; /**< Status, offset: 0x4 */
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__IO uint32_t CFG; /**< Capture Configuration, offset: 0x8 */
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__O uint32_t CAPCLR; /**< Capture Clear, offset: 0xC */
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__I uint32_t CAP[UTICK_CAP_COUNT]; /**< Capture, array offset: 0x10, array step: 0x4 */
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} UTICK_Type;
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/* ----------------------------------------------------------------------------
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-- UTICK Register Masks
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---------------------------------------------------------------------------- */
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/*!
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* @addtogroup UTICK_Register_Masks UTICK Register Masks
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* @{
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*/
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/*! @name CTRL - Control */
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/*! @{ */
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#define UTICK_CTRL_DELAYVAL_MASK (0x7FFFFFFFU)
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#define UTICK_CTRL_DELAYVAL_SHIFT (0U)
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/*! DELAYVAL - Tick interval */
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#define UTICK_CTRL_DELAYVAL(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CTRL_DELAYVAL_SHIFT)) & UTICK_CTRL_DELAYVAL_MASK)
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#define UTICK_CTRL_REPEAT_MASK (0x80000000U)
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#define UTICK_CTRL_REPEAT_SHIFT (31U)
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/*! REPEAT - Repeat delay
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* 0b0..One-time delay
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* 0b1..Delay repeats continuously
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*/
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#define UTICK_CTRL_REPEAT(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CTRL_REPEAT_SHIFT)) & UTICK_CTRL_REPEAT_MASK)
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/*! @} */
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/*! @name STAT - Status */
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/*! @{ */
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#define UTICK_STAT_INTR_MASK (0x1U)
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#define UTICK_STAT_INTR_SHIFT (0U)
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/*! INTR - Interrupt flag
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* 0b0..No interrupt is pending
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* 0b1..An interrupt is pending
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*/
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#define UTICK_STAT_INTR(x) (((uint32_t)(((uint32_t)(x)) << UTICK_STAT_INTR_SHIFT)) & UTICK_STAT_INTR_MASK)
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#define UTICK_STAT_ACTIVE_MASK (0x2U)
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#define UTICK_STAT_ACTIVE_SHIFT (1U)
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/*! ACTIVE - Timer active flag
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* 0b0..The Micro-Tick Timer is not active (stopped)
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* 0b1..The Micro-Tick Timer is currently active
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*/
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#define UTICK_STAT_ACTIVE(x) (((uint32_t)(((uint32_t)(x)) << UTICK_STAT_ACTIVE_SHIFT)) & UTICK_STAT_ACTIVE_MASK)
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/*! @} */
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/*! @name CFG - Capture Configuration */
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/*! @{ */
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#define UTICK_CFG_CAPEN0_MASK (0x1U)
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#define UTICK_CFG_CAPEN0_SHIFT (0U)
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/*! CAPEN0 - Enable Capture 0
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* 0b0..Disabled
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* 0b1..Enabled
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*/
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#define UTICK_CFG_CAPEN0(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPEN0_SHIFT)) & UTICK_CFG_CAPEN0_MASK)
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#define UTICK_CFG_CAPEN1_MASK (0x2U)
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#define UTICK_CFG_CAPEN1_SHIFT (1U)
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/*! CAPEN1 - Enable Capture 1
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* 0b0..Disabled
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* 0b1..Enabled
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*/
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#define UTICK_CFG_CAPEN1(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPEN1_SHIFT)) & UTICK_CFG_CAPEN1_MASK)
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#define UTICK_CFG_CAPEN2_MASK (0x4U)
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#define UTICK_CFG_CAPEN2_SHIFT (2U)
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/*! CAPEN2 - Enable Capture 2
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* 0b0..Disabled
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* 0b1..Enabled
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*/
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#define UTICK_CFG_CAPEN2(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPEN2_SHIFT)) & UTICK_CFG_CAPEN2_MASK)
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#define UTICK_CFG_CAPEN3_MASK (0x8U)
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#define UTICK_CFG_CAPEN3_SHIFT (3U)
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/*! CAPEN3 - Enable Capture 3
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* 0b0..Disabled
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* 0b1..Enabled
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*/
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#define UTICK_CFG_CAPEN3(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPEN3_SHIFT)) & UTICK_CFG_CAPEN3_MASK)
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#define UTICK_CFG_CAPPOL0_MASK (0x100U)
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#define UTICK_CFG_CAPPOL0_SHIFT (8U)
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/*! CAPPOL0 - Capture Polarity 0
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* 0b0..Positive edge capture
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* 0b1..Negative edge capture
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*/
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#define UTICK_CFG_CAPPOL0(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPPOL0_SHIFT)) & UTICK_CFG_CAPPOL0_MASK)
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#define UTICK_CFG_CAPPOL1_MASK (0x200U)
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#define UTICK_CFG_CAPPOL1_SHIFT (9U)
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/*! CAPPOL1 - Capture Polarity 1
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* 0b0..Positive edge capture
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* 0b1..Negative edge capture
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*/
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#define UTICK_CFG_CAPPOL1(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPPOL1_SHIFT)) & UTICK_CFG_CAPPOL1_MASK)
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#define UTICK_CFG_CAPPOL2_MASK (0x400U)
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#define UTICK_CFG_CAPPOL2_SHIFT (10U)
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/*! CAPPOL2 - Capture Polarity 2
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* 0b0..Positive edge capture
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* 0b1..Negative edge capture
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*/
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#define UTICK_CFG_CAPPOL2(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPPOL2_SHIFT)) & UTICK_CFG_CAPPOL2_MASK)
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#define UTICK_CFG_CAPPOL3_MASK (0x800U)
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#define UTICK_CFG_CAPPOL3_SHIFT (11U)
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/*! CAPPOL3 - Capture Polarity 3
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* 0b0..Positive edge capture
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* 0b1..Negative edge capture
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*/
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#define UTICK_CFG_CAPPOL3(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CFG_CAPPOL3_SHIFT)) & UTICK_CFG_CAPPOL3_MASK)
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/*! @} */
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/*! @name CAPCLR - Capture Clear */
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/*! @{ */
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#define UTICK_CAPCLR_CAPCLR0_MASK (0x1U)
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#define UTICK_CAPCLR_CAPCLR0_SHIFT (0U)
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/*! CAPCLR0 - Clear capture 0
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* 0b0..Does nothing
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* 0b1..Write 1 to clear the CAP0 register value
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*/
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#define UTICK_CAPCLR_CAPCLR0(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAPCLR_CAPCLR0_SHIFT)) & UTICK_CAPCLR_CAPCLR0_MASK)
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#define UTICK_CAPCLR_CAPCLR1_MASK (0x2U)
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#define UTICK_CAPCLR_CAPCLR1_SHIFT (1U)
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/*! CAPCLR1 - Clear capture 1
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* 0b0..Does nothing
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* 0b1..Write 1 to clear the CAP1 register value
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*/
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#define UTICK_CAPCLR_CAPCLR1(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAPCLR_CAPCLR1_SHIFT)) & UTICK_CAPCLR_CAPCLR1_MASK)
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#define UTICK_CAPCLR_CAPCLR2_MASK (0x4U)
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#define UTICK_CAPCLR_CAPCLR2_SHIFT (2U)
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/*! CAPCLR2 - Clear capture 2
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* 0b0..Does nothing
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* 0b1..Write 1 to clear the CAP2 register value
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*/
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#define UTICK_CAPCLR_CAPCLR2(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAPCLR_CAPCLR2_SHIFT)) & UTICK_CAPCLR_CAPCLR2_MASK)
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#define UTICK_CAPCLR_CAPCLR3_MASK (0x8U)
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#define UTICK_CAPCLR_CAPCLR3_SHIFT (3U)
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/*! CAPCLR3 - Clear capture 3
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* 0b0..Does nothing
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* 0b1..Write 1 to clear the CAP3 register value
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*/
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#define UTICK_CAPCLR_CAPCLR3(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAPCLR_CAPCLR3_SHIFT)) & UTICK_CAPCLR_CAPCLR3_MASK)
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/*! @} */
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/*! @name CAP - Capture */
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/*! @{ */
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#define UTICK_CAP_CAP_VALUE_MASK (0x7FFFFFFFU)
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#define UTICK_CAP_CAP_VALUE_SHIFT (0U)
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/*! CAP_VALUE - Captured value for the related capture event */
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#define UTICK_CAP_CAP_VALUE(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAP_CAP_VALUE_SHIFT)) & UTICK_CAP_CAP_VALUE_MASK)
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#define UTICK_CAP_VALID_MASK (0x80000000U)
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#define UTICK_CAP_VALID_SHIFT (31U)
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/*! VALID - Captured value is valid
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* 0b0..A valid value has been not been captured
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* 0b1..A valid value has been captured, based on a transition of the related UTICK_CAPn pin
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*/
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#define UTICK_CAP_VALID(x) (((uint32_t)(((uint32_t)(x)) << UTICK_CAP_VALID_SHIFT)) & UTICK_CAP_VALID_MASK)
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/*! @} */
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/*!
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* @}
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*/ /* end of group UTICK_Register_Masks */
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/*!
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* @}
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*/ /* end of group UTICK_Peripheral_Access_Layer */
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/*
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** End of section using anonymous unions
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*/
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#if defined(__ARMCC_VERSION)
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#if (__ARMCC_VERSION >= 6010050)
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#pragma clang diagnostic pop
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#else
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#pragma pop
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#endif
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#elif defined(__GNUC__)
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/* leave anonymous unions enabled */
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#elif defined(__IAR_SYSTEMS_ICC__)
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#pragma language=default
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#else
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#error Not supported compiler type
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#endif
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/*!
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* @}
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*/ /* end of group Peripheral_access_layer */
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#endif /* UTICK_H_ */
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