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https://github.com/cesanta/mongoose.git
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498 lines
15 KiB
C
498 lines
15 KiB
C
/*
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* Copyright 2020-2023 NXP
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*
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_POWER_H_
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#define _FSL_POWER_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup power
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief POWER driver version 2.5.0. */
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#define FSL_POWER_DRIVER_VERSION (MAKE_VERSION(2, 5, 0))
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/*@}*/
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/*!
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* @brief Pin edge for wakeup.
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*/
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typedef enum _power_wakeup_edge
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{
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kPOWER_WakeupEdgeLow = 0U, /*!< Wakeup on pin low level. */
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kPOWER_WakeupEdgeHigh = 1U, /*!< Wakeup on pin high level. */
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} power_wakeup_edge_t;
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/*!
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* @brief Wakeup pin.
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*/
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typedef enum _power_wakeup_pin
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{
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kPOWER_WakeupPin0 = 0U, /*!< Wakeup0 pin. */
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kPOWER_WakeupPin1 = 1U, /*!< Wakeup1 pin. */
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} power_wakeup_pin_t;
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/*!
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* @brief Reset cause.
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*/
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typedef enum _power_reset_cause
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{
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kPOWER_ResetCauseSysResetReq = 1U << 0U, /*!< CM33 system soft reset request. */
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kPOWER_ResetCauseLockup = 1U << 1U, /*!< CM33 locked up. */
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kPOWER_ResetCauseWdt = 1U << 2U, /*!< Watchdog timer. */
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kPOWER_ResetCauseApResetReq = 1U << 3U, /*!< Debug mailbox reset. */
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kPOWER_ResetCauseCodeWdt = 1U << 4U, /*!< Code watchdog timer. */
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kPOWER_ResetCauseItrc = 1U << 5U, /*!< ITRC_CHIP reset. */
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kPOWER_ResetCauseResetB = 1U << 6U, /*!< sw_resetb_scantest reset. */
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kPOWER_ResetCauseAll = 0x7FU, /*!< All reset causes. Used in POWER_ClearResetCause(). */
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} power_reset_cause_t;
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/*!
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* @brief Reset source.
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*/
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typedef enum _power_reset_source
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{
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kPOWER_ResetSourceSysResetReq = 1U << 0U, /*!< CM33 system soft reset request. */
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kPOWER_ResetSourceLockup = 1U << 1U, /*!< CM33 locked up. */
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kPOWER_ResetSourceWdt = 1U << 2U, /*!< Watchdog timer. */
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kPOWER_ResetSourceApResetReq = 1U << 3U, /*!< Debug mailbox reset. */
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kPOWER_ResetSourceCodeWdt = 1U << 4U, /*!< Code watchdog timer. */
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kPOWER_ResetSourceItrc = 1U << 5U, /*!< ITRC_CHIP reset. */
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kPOWER_ResetSourceAll = 0x3FU, /*!< All reset sources. */
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} power_reset_source_t;
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/*!
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* @brief PM2 mem power up bits definition
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*/
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enum _pm2_mem_pu_bits
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{
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kPOWER_Pm2MemPuEnet = (1UL << 28),
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kPOWER_Pm2MemPuSdio = (1UL << 27),
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kPOWER_Pm2MemPuOtp = (1UL << 26),
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kPOWER_Pm2MemPuRom = (1UL << 25),
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kPOWER_Pm2MemPuFlexspi = (1UL << 24),
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kPOWER_Pm2MemPuPq = (1UL << 23),
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kPOWER_Pm2MemPuPkc = (1UL << 22),
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kPOWER_Pm2MemPuEls = (1UL << 21),
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kPOWER_Pm2MemPuAon1 = (1UL << 20),
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kPOWER_Pm2MemPuAon0 = (1UL << 19),
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kPOWER_Pm2MemPuSram18 = (1UL << 18),
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kPOWER_Pm2MemPuSram17 = (1UL << 17),
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kPOWER_Pm2MemPuSram16 = (1UL << 16),
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kPOWER_Pm2MemPuSram15 = (1UL << 15),
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kPOWER_Pm2MemPuSram14 = (1UL << 14),
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kPOWER_Pm2MemPuSram13 = (1UL << 13),
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kPOWER_Pm2MemPuSram12 = (1UL << 12),
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kPOWER_Pm2MemPuSram11 = (1UL << 11),
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kPOWER_Pm2MemPuSram10 = (1UL << 10),
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kPOWER_Pm2MemPuSram9 = (1UL << 9),
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kPOWER_Pm2MemPuSram8 = (1UL << 8),
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kPOWER_Pm2MemPuSram7 = (1UL << 7),
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kPOWER_Pm2MemPuSram6 = (1UL << 6),
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kPOWER_Pm2MemPuSram5 = (1UL << 5),
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kPOWER_Pm2MemPuSram4 = (1UL << 4),
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kPOWER_Pm2MemPuSram3 = (1UL << 3),
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kPOWER_Pm2MemPuSram2 = (1UL << 2),
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kPOWER_Pm2MemPuSram1 = (1UL << 1),
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kPOWER_Pm2MemPuSram0 = (1UL << 0),
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kPOWER_Pm2MemPuAll = (0x1FFFFFFFUL),
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};
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/*!
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* @brief PM2 ana power up bits definition
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*/
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enum _pm2_ana_pu_bits
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{
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kPOWER_Pm2AnaPuT3 = (1UL << 6),
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kPOWER_Pm2AnaPuTcpuTop = (1UL << 5),
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kPOWER_Pm2AnaPuTddrTop = (1UL << 4),
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kPOWER_Pm2AnaPuAnaTop = (1UL << 3),
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kPOWER_Pm2AnaPuGau = (1UL << 2),
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kPOWER_Pm2AnaPuUsb = (1UL << 1),
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kPOWER_Pm2AnaPuAvpll = (1UL << 0),
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kPOWER_Pm2AnaPuAll = (0x7FUL),
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};
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/*!
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* @brief clock gate bits definition
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*/
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enum _clk_gate_bits
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{
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/* Only bit 2 is configuable, others contrlled by HW */
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kPOWER_ClkGateTddrMciEnet = (1UL << 2),
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kPOWER_ClkGateAll = (1UL << 2),
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};
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/*!
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* @brief PM3 buck control bits definition
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*/
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enum _clk_pm3_buck_bits
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{
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kPOWER_Pm3Buck18 = (1UL << 7), /*!< 1: Use normal buck18 level in PM3. 0: Use sleep buck18 level in PM3 */
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kPOWER_Pm3Buck11 = (1UL << 6), /*!< 1: Use normal buck11 level in PM3. 0: Use sleep buck11 level in PM3 */
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kPOWER_Pm3BuckAll = (0xC0UL),
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};
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/*!
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* @brief Capture slow pulse width
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*/
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typedef enum _capt_slow_pulse_width
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{
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kPOWER_CaptSlowPulseWidth1 = 0U,
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kPOWER_CaptSlowPulseWidth2 = 1U,
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kPOWER_CaptSlowPulseWidth3 = 2U,
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kPOWER_CaptSlowPulseWidth4 = 3U,
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kPOWER_CaptSlowPulseWidth5 = 4U,
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kPOWER_CaptSlowPulseWidth6 = 5U,
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kPOWER_CaptSlowPulseWidth7 = 6U,
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} capt_slow_pulse_width_t;
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/*!
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* @brief Capture slow pulse edge
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*/
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typedef enum _capt_slow_pulse_edge
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{
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kPOWER_CaptSlowPulseEdgeRising = 0U,
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kPOWER_CaptSlowPulseEdgeFalling = 1U,
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kPOWER_CaptSlowPulseEdgeAny = 2U,
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} capt_slow_pulse_edge_t;
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/*!
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* @brief Capture timer callback function
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* @param param : User parameter for callback.
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*/
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typedef void (*capt_pulse_timer_callback_t)(void *param);
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/*!
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* @brief Power mode switch callback function
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* @param mode : Power mode to switch.
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* @param param : User parameter for callback.
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*/
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typedef void (*power_switch_callback_t)(uint32_t mode, void *param);
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/*!
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* @brief Init configuration.
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*/
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typedef struct _power_init_config
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{
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bool iBuck; /*!< true: VCORE and AVDD18 supplied from iBuck; false: supplied from external DCDC. */
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bool gateCauRefClk; /*!< true: CAU_SOC_SLP_REF_GEN_CLK gated; false: CAU_SOC_SLP_REF_GEN_CLK on. */
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} power_init_config_t;
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/*!
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* @brief Sleep configuration.
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*/
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typedef struct _power_sleep_config
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{
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uint32_t
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pm2MemPuCfg; /*!< Modules to keep powered on in PM2 mode. Logical OR of the enums in @ref _pm2_mem_pu_bits. */
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uint32_t pm2AnaPuCfg; /*!< Ana to keep powered on in PM2 mode. Logical OR of the enums in @ref _pm2_ana_pu_bits. */
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uint32_t clkGate; /*!< Source clock gate control. Logical OR of the enums in @ref _clk_gate_bits. */
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uint32_t memPdCfg; /*!< PMU MEM_CFG: Power Down memory configuration. Bit0-5 for PM3, bit8 for PM4.
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bit0: ram0-5 384KB
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bit1: ram6 64KB
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bit2: ram7 64KB
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bit3: ram8-9 128KB
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bit4: ram10-13 256KB
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bit5: ram14-18 320KB.
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bit8: aon mem higher 8KB */
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uint32_t pm3BuckCfg; /*!< PMIP BUCK control in PM3 mode. Logical OR of the enums in @ref _clk_pm3_buck_bits. */
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} power_sleep_config_t;
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/*!
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* @brief Glitch detector configuration.
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*/
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typedef struct _power_gdet_data
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{
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uint32_t CFG[6];
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uint32_t TRIM0;
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} power_gdet_data_t;
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/*!
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* @brief Glitch detector configuration load function.
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*/
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typedef bool (*power_load_gdet_cfg)(power_gdet_data_t *data);
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/**
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* @brief Enable system reset source
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* @param source : A bitmask of of @ref power_reset_source_t
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*/
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__STATIC_INLINE void POWER_EnableResetSource(uint32_t source)
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{
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assert((source & ~(uint32_t)kPOWER_ResetSourceAll) == 0U);
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PMU->SYS_RST_EN |= source;
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}
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/**
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* @brief Disable system reset source
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* @param source : A bitmask of of @ref power_reset_source_t
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*/
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__STATIC_INLINE void POWER_DisableResetSource(uint32_t source)
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{
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assert((source & ~(uint32_t)kPOWER_ResetSourceAll) == 0U);
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PMU->SYS_RST_EN &= ~source;
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}
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/**
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* @brief Get last reset cause
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* @return Or'ed cause of @ref power_reset_cause_t
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*/
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__STATIC_INLINE uint32_t POWER_GetResetCause(void)
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{
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/* On reset, PMU->SYS_RST_STATUS is backed up in RF_SYSCON->WO_SCRATCH_REG[3]
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and cleared by ROM */
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return RF_SYSCON->WO_SCRATCH_REG[3] & (uint32_t)kPOWER_ResetCauseAll;
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}
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/**
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* @brief Clear last reset cause
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* @param cause : A bitmask of of @ref power_reset_cause_t
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*/
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__STATIC_INLINE void POWER_ClearResetCause(uint32_t cause)
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{
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assert((cause & ~(uint32_t)kPOWER_ResetCauseAll) == 0U);
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PMU->SYS_RST_CLR = cause;
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}
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/**
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* @brief Configure pin edge for wakeup
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* @param pin : Wakeup pin
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* @param edge : Pin level for wakeup
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*/
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__STATIC_INLINE void POWER_ConfigWakeupPin(power_wakeup_pin_t pin, power_wakeup_edge_t edge)
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{
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PMU->WAKEUP_LEVEL = (PMU->WAKEUP_LEVEL & ~(1UL << (uint8_t)pin)) | ((uint32_t)edge << (uint8_t)pin);
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}
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/**
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* @brief Check if IRQ is the wakeup source
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* @param irq : IRQ number
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* @return true if IRQ is the wakeup source, false otherwise.
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*/
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bool POWER_GetWakeupStatus(IRQn_Type irq);
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/**
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* @brief Clear wakeup status
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* @param irq : IRQ number
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*/
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void POWER_ClearWakeupStatus(IRQn_Type irq);
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/**
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* @brief Enable the Wakeup interrupt.
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* @param irq : IRQ number
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*/
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void POWER_EnableWakeup(IRQn_Type irq);
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/**
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* @brief Disable the Wakeup interrupts.
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* @param irq : IRQ number
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*/
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void POWER_DisableWakeup(IRQn_Type irq);
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/**
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* @brief Set power mode on idle.
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* @param mode : 0 ~ 4 stands for PM0 ~ PM4.
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*/
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AT_QUICKACCESS_SECTION_CODE(void POWER_SetSleepMode(uint32_t mode));
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/**
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* @brief Get power mode waken up from.
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* @return Power mode.
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*/
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__STATIC_INLINE uint32_t POWER_GetWakenMode(void)
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{
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return (PMU->PWR_MODE_STATUS & PMU_PWR_MODE_STATUS_PWR_MODE_STATUS_MASK) + 1U;
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}
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/**
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* @brief Get current sleep configuration.
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* @param config : Pointer to config structure to save current config.
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*/
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void POWER_GetCurrentSleepConfig(power_sleep_config_t *config);
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/**
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* @brief Initialize power configuration.
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* @param config : Pointer to init config structure.
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*/
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void POWER_InitPowerConfig(const power_init_config_t *config);
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/**
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* @brief Configure CAU_SOC_SLP_REF_GEN_CLK on/off status in SoC sleep mode.
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* @param pdCau : true for clock off; false for clock on.
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*/
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void POWER_ConfigCauInSleep(bool pdCau);
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/**
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* @brief Set power mode switch callback. The callbacks are called with interrupt disabled.
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* @param pre : Function called before power mode switch
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* @param preParam : User parameter for pre callback
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* @param post : Function called after power mode switch
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* @param postParam : User parameter for post callback
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*/
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void POWER_SetPowerSwitchCallback(power_switch_callback_t pre,
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void *preParam,
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power_switch_callback_t post,
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void *postParam);
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/**
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* @brief Switch system into certain power mode.
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* @param mode : 0 ~ 4 stands for PM0 ~ PM4.
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* @param config : Sleep configuration on PM2-PM4.
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* @return True for success, else failure.
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*/
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AT_QUICKACCESS_SECTION_CODE(bool POWER_EnterPowerMode(uint32_t mode, const power_sleep_config_t *config));
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/**
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* @brief Power on WLAN.
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*/
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void POWER_PowerOnWlan(void);
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/**
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* @brief Power off WLAN.
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*/
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void POWER_PowerOffWlan(void);
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/**
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* @brief Enable MCI wakeup WLAN
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* @param wlWakeup : 8 bits wakeup mask
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*/
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__STATIC_INLINE void PMU_EnableWlanWakeup(uint8_t wlWakeup)
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{
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PMU->WLAN_CTRL |= PMU_WLAN_CTRL_WL_WAKEUP(wlWakeup);
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}
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/**
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* @brief Disable MCI wakeup WLAN
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* @param wlWakeup : 8 bits wakeup mask
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*/
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__STATIC_INLINE void PMU_DisableWlanWakeup(uint8_t wlWakeup)
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{
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PMU->WLAN_CTRL &= ~PMU_WLAN_CTRL_WL_WAKEUP(wlWakeup);
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}
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/**
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* @brief Power on BLE.
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*/
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void POWER_PowerOnBle(void);
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/**
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* @brief Power off BLE.
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*/
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void POWER_PowerOffBle(void);
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/**
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* @brief Enable MCI wakeup BLE
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* @param bleWakeup : 8 bits wakeup mask
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*/
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__STATIC_INLINE void PMU_EnableBleWakeup(uint8_t bleWakeup)
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{
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PMU->BLE_CTRL |= PMU_BLE_CTRL_BLE_WAKEUP(bleWakeup);
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}
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/**
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* @brief Disable MCI wakeup BLE
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* @param bleWakeup : 8 bits wakeup mask
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*/
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__STATIC_INLINE void PMU_DisableBleWakeup(uint8_t bleWakeup)
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{
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PMU->BLE_CTRL &= ~PMU_BLE_CTRL_BLE_WAKEUP(bleWakeup);
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}
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/**
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* @brief Power on GAU.
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*/
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void POWER_PowerOnGau(void);
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/**
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* @brief Power off GAU.
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*/
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void POWER_PowerOffGau(void);
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/**
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* @brief Enable capture slow pulse timer with 32768Hz clock source
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* @param width : input capture filter width in cycles
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* @param edge : trigger condition of counter
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* @param timeout : timer expire counter which will trigger callback
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* @param callback : callback function on timer expire
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* @param param : callback parameter
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*/
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void POWER_EnableCaptSlowPulseTimer(capt_slow_pulse_width_t width,
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capt_slow_pulse_edge_t edge,
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uint32_t timeout,
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capt_pulse_timer_callback_t cb,
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void *param);
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/**
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* @brief Enable capture fast pulse timer with 3.84/4MHz clock source
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* @param timeout : timer expire counter which will trigger callback
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* @param callback : callback function on timer expire
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* @param param : callback parameter
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*/
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void POWER_EnableCaptFastPulseTimer(uint32_t timeout, capt_pulse_timer_callback_t cb, void *param);
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/**
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* @brief Disable capture pulse timer
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*/
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void POWER_DisableCaptPulseTimer(void);
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/**
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* @brief Configure power rail voltage and LVD/HVD threshold.
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* @param dro : trim value from fuse.
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* @param pack : Device package type: 0 - QFN, 1 - CSP, 2 - BGA
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*/
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void POWER_InitVoltage(uint32_t dro, uint32_t pack);
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/**
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* @brief Initialize glitch detector configuration.
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* @param loadFunc : function pointer to the GDET load configuration.
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* @param data : GDET config data loaded from fuse.
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* @param pack : Device package type: 0 - QFN, 1 - CSP, 2 - BGA
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*/
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void Power_InitLoadGdetCfg(power_load_gdet_cfg loadFunc, const power_gdet_data_t *data, uint32_t pack);
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/**
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* @brief Disable GDET and VSensors
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*/
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AT_QUICKACCESS_SECTION_CODE(void POWER_DisableGDetVSensors(void));
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/**
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* @brief Enable GDET and VSensors
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* @return True for success, else failure.
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*/
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AT_QUICKACCESS_SECTION_CODE(bool POWER_EnableGDetVSensors(void));
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/**
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* @brief Apply SVC GDC equation and get the SVC trim configuration
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* @param gdetTrim : GDET trim value from fuse.
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* @param pack : Device package type: 0 - QFN, 1 - CSP, 2 - BGA
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*/
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uint32_t POWER_TrimSvc(uint32_t gdetTrim, uint32_t pack);
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#if defined(__cplusplus)
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}
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#endif /*_cplusplus */
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/*! @}*/
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#endif /* _FSL_POWER_H_ */
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