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Deomid Ryabkov
c2a10601b9
CL: Fix nsleep100 on STM32 PUBLISHED_FROM=cabb98a0541bac9bb66bfa702d54bf8ff20063e7
50 lines
1.3 KiB
ArmAsm
50 lines
1.3 KiB
ArmAsm
/*
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* Copyright (c) 2014-2018 Cesanta Software Limited
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* All rights reserved
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*
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* Licensed under the Apache License, Version 2.0 (the ""License"");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an ""AS IS"" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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.arch armv7e-m
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.syntax unified
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.thumb
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/* These are required to satisfy TI linker. */
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.eabi_attribute Tag_ABI_align_needed, 1
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.eabi_attribute Tag_ABI_align_preserved, 1
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.global mgos_nsleep100_impl
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.global mgos_nsleep100_loop_count
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#ifdef STM32
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.section .RamFunc.mgos_nsleep100_impl
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#else
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.section .iram.mgos_nsleep100_impl
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#endif
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.type mgos_nsleep100_impl, %function
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.align 4
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mgos_nsleep100_impl:
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ldr r3, =mgos_nsleep100_loop_count
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ldr r3, [r3]
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/* Because of speculative fetch, the core loop only takes 1 cycle. */
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muls r0, r3
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cbz r0, xxx
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lxx:
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subs r0, #1
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bne lxx
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xxx:
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bx lr
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.align 4
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.size mgos_nsleep100_impl, . - mgos_nsleep100_impl
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