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34 lines
805 B
Plaintext
34 lines
805 B
Plaintext
/* DTCMRAM (rwx) : ORIGIN = 0x20000400, LENGTH = 128k - 1k */ /* bootloader starts at 0x20000000 */
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ENTRY(Reset_Handler);
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MEMORY {
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flash(rx) : ORIGIN = 0x08040000, LENGTH = 2048k - 0x40000 /* bootloader starts at 0x08000000 */
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sram(rwx) : ORIGIN = 0x24000000, LENGTH = 512k
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}
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_estack = ORIGIN(sram) + LENGTH(sram); /* stack points to end of SRAM */
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SECTIONS {
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.vectors : { KEEP(*(.isr_vector)) } > flash
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.text : { *(.text* .text.*) } > flash
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.rodata : { *(.rodata*) } > flash
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.data : {
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_sdata = .;
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*(.first_data)
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*(.data SORT(.data.*))
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*(.iram .iram* .iram.*)
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_edata = .;
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} > sram AT > flash
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_sidata = LOADADDR(.data);
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.bss : {
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_sbss = .;
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*(.bss SORT(.bss.*) COMMON)
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_ebss = .;
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} > sram
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. = ALIGN(8);
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_end = .;
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}
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