Added module parameter for VID pin input thresholds.

git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@2715 7894878c-1315-0410-8ee3-d5d059ff63e0

CHANGES

@@ -18,6 +18,7 @@ ask CVS about it:
 -----------------------------------------------------------------------------
 
 2.9.0 (2004????)
+  Module lm93: Added module parameter for VID pin input thresholds.
 
 
 2.8.8 (20041007)

doc/chips/lm93

@@ -29,6 +29,12 @@ Module Parameters
   time (even though the hardware is capable of enabling both).  There's
   not a compelling use case for enabling both at once, anyway.  The default
   is "0,0".
+* vid_agtl: integer
+  A "0" configures the VID pins for V(ih) = 2.1V min, V(il) = 0.8V max.
+  A "1" configures the VID pins for V(ih) = 0.8V min, V(il) = 0.4V max.
+  (The latter setting is referred to as AGTL+ Compatible in the datasheet.)
+  I.e. this parameter controls the VID pin input thresholds; if your VID
+  inputs are not working, trying changing this.  The default value is "0".
 
 (common among sensor drivers)
 * force: short array (min = 1, max = 48)

kernel/chips/lm93.c

@@ -66,12 +66,16 @@ MODULE_PARM_DESC(disable_block,
 
 static int init = 1;
 MODULE_PARM(init, "i");
-MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
+MODULE_PARM_DESC(init, "Set to zero to bypass most chip initialization");
 
 static int vccp_limit_type[2] /* = {0,0} */ ;
 MODULE_PARM(vccp_limit_type, "2-2i");
 MODULE_PARM_DESC(vccp_limit_type, "Configures in7 and in8 limit modes");
 
+static int vid_agtl = 0;
+MODULE_PARM(vid_agtl, "i");
+MODULE_PARM_DESC(vid_agtl, "Configures VID pin input thresholds");
+
 /* -- SENSORS SYSCTL START -- */
 /* volts * 100 */
 #define LM93_SYSCTL_IN1				1001
@@ -2112,9 +2116,15 @@ static ctl_table lm93_dir_table_template[] = {
 static void lm93_init_client(struct i2c_client *client)
 {
 	int i;
-	u8 reg = lm93_read_byte(client, LM93_REG_CONFIG);
+	u8 reg;
+
+	/* configure VID pin input thresholds */
+	reg = lm93_read_byte(client, LM93_REG_GPI_VID_CTL);
+	lm93_write_byte(client, LM93_REG_GPI_VID_CTL,
+			reg | (vid_agtl ? 0x03 : 0x00));
 
 	/* start monitoring */
+	reg = lm93_read_byte(client, LM93_REG_CONFIG);
 	lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x01);
 
 	if (init) {

kernel/chips/lm93.h

@@ -98,6 +98,7 @@
 /* miscellaneous */
 #define LM93_REG_SFC1		0xbc
 #define LM93_REG_SFC2		0xbd
+#define LM93_REG_GPI_VID_CTL	0xbe
 #define LM93_REG_SF_TACH_TO_PWM	0xe0
 
 /* LM93 REGISTER VALUES */