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Decode latencies and timings (DDR2 SDRAM).
git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@3307 7894878c-1315-0410-8ee3-d5d059ff63e0
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1 file changed
+65
-6
@@ -64,6 +64,8 @@
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# fix latencies decoding (SDRAM)
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# fix CAS latency decoding (DDR SDRAM)
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# decode latencies, timings and module height (DDR SDRAM)
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# decode size (Direct Rambus, Rambus)
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# decode latencies and timings (DDR2 SDRAM)
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#
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#
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# EEPROM data decoding for SDRAM DIMM modules.
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@@ -800,6 +802,31 @@ sub decode_ddr_sdram($)
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}
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}
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sub ddr2_sdram_ctime($)
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{
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my $byte = shift;
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my $ctime;
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$ctime = $byte >> 4;
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if (($byte & 0xf) <= 9) { $ctime += ($byte & 0xf) * 0.1; }
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elsif (($byte & 0xf) == 10) { $ctime += 0.25; }
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elsif (($byte & 0xf) == 11) { $ctime += 0.33; }
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elsif (($byte & 0xf) == 12) { $ctime += 0.66; }
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elsif (($byte & 0xf) == 13) { $ctime += 0.75; }
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return $ctime;
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}
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sub ddr2_sdram_atime($)
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{
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my $byte = shift;
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my $atime;
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$atime = ($byte >> 4) * 0.1 + ($byte & 0xf) * 0.01;
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return $atime;
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}
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# Parameter: bytes 0-63
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sub decode_ddr2_sdram($)
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{
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@@ -832,15 +859,20 @@ sub decode_ddr2_sdram($)
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}
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my $highestCAS = 0;
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my %cas;
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for ($ii = 2; $ii < 7; $ii++) {
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if ($bytes->[18] & (1 << $ii)) {
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$highestCAS = $ii;
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$cas{$highestCAS}++;
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}
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}
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my $trcd;
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my $trp;
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my $tras;
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my $ctime = ($bytes->[9] >> 4) + ($bytes->[9] & 0xf) * 0.1;
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if ($bytes->[18] & 4) { $highestCAS = 2; }
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if ($bytes->[18] & 8) { $highestCAS = 3; }
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if ($bytes->[18] & 16) { $highestCAS = 4; }
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if ($bytes->[18] & 32) { $highestCAS = 5; }
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my $ctime;
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$ctime = ddr2_sdram_ctime($bytes->[9]);
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$trcd =($bytes->[29] >> 2)+(($bytes->[29] & 3)*0.25);
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$trp =($bytes->[27] >> 2)+(($bytes->[27] & 3)*0.25);
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@@ -851,6 +883,33 @@ sub decode_ddr2_sdram($)
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ceil($trcd/$ctime) . "-" .
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ceil($trp/$ctime) . "-" .
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ceil($tras/$ctime);
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# latencies
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if (keys %cas) { $temp = join ', ', sort { $b <=> $a } keys %cas; }
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else { $temp = "None"; }
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printl "Supported CAS Latencies", $temp;
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# timings
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if (exists $cas{$highestCAS}) {
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printl "Minimum Cycle Time (CAS $highestCAS)",
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"$ctime ns";
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printl "Maximum Access Time (CAS $highestCAS)",
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ddr2_sdram_atime($bytes->[10]) . " ns";
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}
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if (exists $cas{$highestCAS-1} && spd_written(@$bytes[23..24])) {
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printl "Minimum Cycle Time (CAS ".($highestCAS-1).")",
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ddr2_sdram_ctime($bytes->[23]) . " ns";
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printl "Maximum Access Time (CAS ".($highestCAS-1).")",
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ddr2_sdram_atime($bytes->[24]) . " ns";
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}
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if (exists $cas{$highestCAS-2} && spd_written(@$bytes[25..26])) {
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printl "Minimum Cycle Time (CAS ".($highestCAS-2).")",
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ddr2_sdram_ctime($bytes->[25]) . " ns";
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printl "Maximum Access Time (CAS ".($highestCAS-2).")",
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ddr2_sdram_atime($bytes->[26]) . " ns";
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}
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}
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# Parameter: bytes 0-63
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