mirror of
https://github.com/lm-sensors/lm-sensors.git
synced 2026-10-25 12:14:33 +00:00
Detect undefined manufacturer code and handle it properly.
Round up timing data. Minor display adjustments. Group cycle and access times, display the CAS value for each (SDRAM). Refactor some bitfield tests into loops (SDRAM). Display latencies and burst length on a single line (SDRAM). Don't display manufacturing location when undefined. Check that the manufacturing date is proper BCD, else fall back to hexadecimal display. git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@3303 7894878c-1315-0410-8ee3-d5d059ff63e0
This commit is contained in:
Jean Delvare committed
1 parent
4b0db08ea2
commit
d785c0ecce
1 file changed
+138
-111
+138
-111
@@ -50,6 +50,16 @@
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# don't decode revision code, manufacturing date and assembly serial
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# number where not set
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# decode the manufacturing date to an ISO8601 date
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# Version 1.3 2006-05-21 Jean Delvare <khali@linux-fr.org>
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# detect undefined manufacturer code and handle it properly
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# round up timing data
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# minor display adjustments
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# group cycle and access times, display the CAS value for each (SDRAM)
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# refactor some bitfield tests into loops (SDRAM)
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# display latencies and burst length on a single line (SDRAM)
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# don't display manufacturing location when undefined
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# check that the manufacturing date is proper BCD, else fall back to
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# hexadecimal display
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#
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#
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# EEPROM data decoding for SDRAM DIMM modules.
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@@ -76,6 +86,7 @@
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require 5.004;
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use strict;
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use POSIX;
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use Fcntl qw(:DEFAULT :seek);
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use vars qw($opt_html $opt_body $opt_bodyonly $opt_igncheck $use_sysfs
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@vendors %decode_callback);
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@@ -280,21 +291,36 @@ sub spd_written(@)
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return 0;
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}
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sub parity($)
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{
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my $n = shift;
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my $parity = 0;
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while ($n) {
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$parity++ if ($n & 1);
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$n >>= 1;
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}
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return ($parity & 1);
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}
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sub manufacturer(@)
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{
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my @bytes = @_;
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my $ai = 0;
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my $first;
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return ("Undefined", []) unless spd_written(@bytes);
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while (defined($first = shift(@bytes)) && $first == 0x7F) {
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$ai++;
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}
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if (defined $first && defined $vendors[$ai][($first & 0x7F) - 1]) {
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return ($vendors[$ai][($first & 0x7F) - 1], \@bytes);
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}
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return ("Invalid", []) unless defined $first;
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return ("Invalid", [$first, @bytes]) if parity($first) != 1;
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return ("Unknown", \@bytes) unless (($first & 0x7F) - 1 <= $vendors[$ai]);
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return ("Unknown", \@bytes);
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return ($vendors[$ai][($first & 0x7F) - 1], \@bytes);
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}
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sub manufacturer_data(@)
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@@ -403,31 +429,30 @@ sub decode_sdr_sdram($)
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}
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if($ii > 0 && $ii <= 12 && $k > 0) {
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printl "Size", ((1 << $ii) * $k) . "MB"; }
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printl "Size", ((1 << $ii) * $k) . " MB"; }
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else {
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printl "INVALID SIZE", $a . "," . $b . "," . $c . "," . $d;
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}
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my $highestCAS = 0;
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my @cas;
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for ($ii = 0; $ii < 6; $ii++) {
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push(@cas, $ii + 1) if ($bytes->[18] & (1 << $ii));
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}
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my $trcd;
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my $trp;
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my $tras;
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my $ctime = ($bytes->[9] >> 4) + ($bytes->[9] & 0xf) * 0.1;
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if ($bytes->[18] & 1) { $highestCAS = 1; }
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if ($bytes->[18] & 2) { $highestCAS = 2; }
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if ($bytes->[18] & 4) { $highestCAS = 3; }
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if ($bytes->[18] & 8) { $highestCAS = 4; }
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if ($bytes->[18] & 16) { $highestCAS = 5; }
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if ($bytes->[18] & 32) { $highestCAS = 6; }
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if ($bytes->[18] & 64) { $highestCAS = 7; }
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if ($bytes->[18] & 128) { $highestCAS = 8; }
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$trcd =$bytes->[29];
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$trp =$bytes->[27];;
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$tras =$bytes->[30];
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printl "tCL-tRCD-tRP-tRAS:" , $highestCAS . "-" . ($trcd/$ctime) . "-" . ($trp/$ctime) . "-" . ($tras/$ctime);
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printl "tCL-tRCD-tRP-tRAS",
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$cas[$#cas] . "-" .
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ceil($trcd/$ctime) . "-" .
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ceil($trp/$ctime) . "-" .
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ceil($tras/$ctime);
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$l = "Number of Row Address Bits";
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if ($bytes->[3] == 0) { printl $l, "Undefined!"; }
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@@ -464,14 +489,6 @@ sub decode_sdr_sdram($)
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elsif ($bytes->[8] == 255) { printl $l, "New Table"; }
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else { printl $l, "Undefined!"; }
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$l = "Cycle Time highest CAS latency";
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$temp = ($bytes->[9] >> 4) + ($bytes->[9] & 0xf) * 0.1;
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printl $l, "$temp ns";
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$l = "Access Time";
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$temp = ($bytes->[10] >> 4) + ($bytes->[10] & 0xf) * 0.1;
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printl $l, "$temp ns";
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$l = "Module Configuration Type";
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if ($bytes->[11] == 0) { printl $l, "No Parity"; }
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elsif ($bytes->[11] == 1) { printl $l, "Parity"; }
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@@ -517,16 +534,13 @@ sub decode_sdr_sdram($)
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prints "The Following Apply to SDRAM DIMMs ONLY";
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$l = "Burst lengths supported";
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$temp = "";
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if ($bytes->[16] & 1) { $temp .= "Burst Length = 1\n"; }
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if ($bytes->[16] & 2) { $temp .= "Burst Length = 2\n"; }
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if ($bytes->[16] & 4) { $temp .= "Burst Length = 4\n"; }
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if ($bytes->[16] & 8) { $temp .= "Burst Length = 8\n"; }
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if ($bytes->[16] & 16) { $temp .= "Undefined! (bit 4)\n"; }
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if ($bytes->[16] & 32) { $temp .= "Undefined! (bit 5)\n"; }
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if ($bytes->[16] & 64) { $temp .= "Undefined! (bit 6)\n"; }
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if ($bytes->[16] & 128) { $temp .= "Burst Length = Page\n"; }
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if ($bytes->[16] == 0) { $temp .= "(None Supported)\n"; }
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my @array;
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for ($ii = 0; $ii < 4; $ii++) {
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push(@array, 1 << $ii) if ($bytes->[16] & (1 << $ii));
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}
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push(@array, "Page") if ($bytes->[16] & 128);
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if (@array) { $temp = join ', ', @array; }
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else { $temp = "None"; }
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printl $l, $temp;
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$l = "Number of Device Banks";
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@@ -534,44 +548,68 @@ sub decode_sdr_sdram($)
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else { printl $l, $bytes->[17]; }
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$l = "Supported CAS Latencies";
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$temp = "";
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if ($bytes->[18] & 1) { $temp .= "CAS Latency = 1\n"; }
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if ($bytes->[18] & 2) { $temp .= "CAS Latency = 2\n"; }
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if ($bytes->[18] & 4) { $temp .= "CAS Latency = 3\n"; }
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if ($bytes->[18] & 8) { $temp .= "CAS Latency = 4\n"; }
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if ($bytes->[18] & 16) { $temp .= "CAS Latency = 5\n"; }
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if ($bytes->[18] & 32) { $temp .= "CAS Latency = 6\n"; }
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if ($bytes->[18] & 64) { $temp .= "CAS Latency = 7\n"; }
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if ($bytes->[18] & 128) { $temp .= "Undefined (bit 7)\n"; }
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if ($bytes->[18] == 0) { $temp .= "(None Supported)\n"; }
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if (@cas) { $temp = join ', ', @cas; }
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else { $temp = "None"; }
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printl $l, $temp;
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$l = "Supported CS Latencies";
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$temp = "";
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if ($bytes->[19] & 1) { $temp .= "CS Latency = 0\n"; }
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if ($bytes->[19] & 2) { $temp .= "CS Latency = 1\n"; }
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if ($bytes->[19] & 4) { $temp .= "CS Latency = 2\n"; }
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if ($bytes->[19] & 8) { $temp .= "CS Latency = 3\n"; }
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if ($bytes->[19] & 16) { $temp .= "CS Latency = 4\n"; }
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if ($bytes->[19] & 32) { $temp .= "CS Latency = 5\n"; }
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if ($bytes->[19] & 64) { $temp .= "CS Latency = 6\n"; }
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if ($bytes->[19] & 128) { $temp .= "Undefined (bit 7)\n"; }
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if ($bytes->[19] == 0) { $temp .= "(None Supported)\n"; }
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@array = ();
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for ($ii = 0; $ii < 6; $ii++) {
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push(@array, $ii) if ($bytes->[19] & (1 << $ii));
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}
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if (@array) { $temp = join ', ', @array; }
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else { $temp = "None"; }
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printl $l, $temp;
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$l = "Supported WE Latencies";
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$temp = "";
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if ($bytes->[20] & 1) { $temp .= "WE Latency = 0\n"; }
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if ($bytes->[20] & 2) { $temp .= "WE Latency = 1\n"; }
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if ($bytes->[20] & 4) { $temp .= "WE Latency = 2\n"; }
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if ($bytes->[20] & 8) { $temp .= "WE Latency = 3\n"; }
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if ($bytes->[20] & 16) { $temp .= "WE Latency = 4\n"; }
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if ($bytes->[20] & 32) { $temp .= "WE Latency = 5\n"; }
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if ($bytes->[20] & 64) { $temp .= "WE Latency = 6\n"; }
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if ($bytes->[20] & 128) { $temp .= "Undefined (bit 7)\n"; }
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if ($bytes->[20] == 0) { $temp .= "(None Supported)\n"; }
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@array = ();
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for ($ii = 0; $ii < 6; $ii++) {
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push(@array, $ii) if ($bytes->[20] & (1 << $ii));
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}
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if (@array) { $temp = join ', ', @array; }
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else { $temp = "None"; }
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printl $l, $temp;
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if (@cas >= 1) {
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$l = "Cycle Time (CAS ".$cas[$#cas].")";
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$temp = ($bytes->[9] >> 4) + ($bytes->[9] & 0xf) * 0.1;
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printl $l, "$temp ns";
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$l = "Access Time (CAS ".$cas[$#cas].")";
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$temp = ($bytes->[10] >> 4) + ($bytes->[10] & 0xf) * 0.1;
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printl $l, "$temp ns";
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}
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if (@cas >= 2 && spd_written(@$bytes[23..24])) {
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$l = "Cycle Time (CAS ".$cas[$#cas-1].")";
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$temp = $bytes->[23] >> 4;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else {
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if ($temp < 4 ) { $temp=$temp + 15; }
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printl $l, $temp + (($bytes->[23] & 0xf) * 0.1) . " ns";
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}
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$l = "Access Time (CAS ".$cas[$#cas-1].")";
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$temp = $bytes->[24] >> 4;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else {
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if ($temp < 4 ) { $temp=$temp + 15; }
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printl $l, $temp + (($bytes->[24] & 0xf) * 0.1) . " ns";
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}
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}
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if (@cas >= 3 && spd_written(@$bytes[25..26])) {
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$l = "Cycle Time (CAS ".$cas[$#cas-2].")";
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$temp = $bytes->[25] >> 2;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else { printl $l, $temp + ($bytes->[25] & 0x3) * 0.25 . " ns"; }
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$l = "Access Time (CAS ".$cas[$#cas-2].")";
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$temp = $bytes->[26] >> 2;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else { printl $l, $temp + ($bytes->[26] & 0x3) * 0.25 . " ns"; }
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}
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$l = "SDRAM Module Attributes";
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$temp = "";
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if ($bytes->[21] & 1) { $temp .= "Buffered Address/Control Inputs\n"; }
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@@ -599,34 +637,6 @@ sub decode_sdr_sdram($)
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if ($bytes->[22] & 128) { $temp .= "Undefined (bit 7)\n"; }
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printl $l, $temp;
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$l = "SDRAM Cycle Time (2nd highest CAS)";
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$temp = $bytes->[23] >> 4;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else {
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if ($temp < 4 ) { $temp=$temp + 15; }
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printl $l, $temp + (($bytes->[23] & 0xf) * 0.1) . " ns";
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}
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$l = "SDRAM Access from Clock Time (2nd highest CAS)";
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$temp = $bytes->[24] >> 4;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else {
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if ($temp < 4 ) { $temp=$temp + 15; }
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printl $l, $temp + (($bytes->[24] & 0xf) * 0.1) . " ns";
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}
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prints "The Following are Optional (may be Bogus)";
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$l = "SDRAM Cycle Time (3rd highest CAS)";
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$temp = $bytes->[25] >> 2;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else { printl $l, $temp + ($bytes->[25] & 0x3) * 0.25 . " ns"; }
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$l = "SDRAM Access from Clock Time (3rd highest CAS)";
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$temp = $bytes->[26] >> 2;
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if ($temp == 0) { printl $l, "Undefined!"; }
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else { printl $l, $temp + ($bytes->[26] & 0x3) * 0.25 . " ns"; }
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prints "The Following are Required (for SDRAMs)";
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$l = "Minimum Row Precharge Time";
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@@ -711,7 +721,7 @@ sub decode_ddr_sdram($)
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}
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if($ii > 0 && $ii <= 12 && $k > 0) {
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printl "Size", ((1 << $ii) * $k) . "MB"; }
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printl "Size", ((1 << $ii) * $k) . " MB"; }
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else {
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printl "INVALID SIZE", $a . "," . $b . "," . $c . "," . $d;
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}
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@@ -735,8 +745,11 @@ sub decode_ddr_sdram($)
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$trp =($bytes->[27] >> 2)+(($bytes->[27] & 3)*0.25);
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$tras = $bytes->[30];
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printl "tCL-tRCD-tRP-tRAS:" , $highestCAS . "-" . ($trcd/$ctime) . "-" . ($trp/$ctime) . "-" . ($tras/$ctime);
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printl "tCL-tRCD-tRP-tRAS",
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$highestCAS . "-" .
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ceil($trcd/$ctime) . "-" .
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ceil($trp/$ctime) . "-" .
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ceil($tras/$ctime);
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}
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# Parameter: bytes 0-63
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@@ -768,7 +781,7 @@ sub decode_ddr2_sdram($)
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$k = (($c & 0x7) + 1) * $d;
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if($ii > 0 && $ii <= 12 && $k > 0) {
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printl "Size", ((1 << $ii) * $k) . "MB";
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printl "Size", ((1 << $ii) * $k) . " MB";
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} else {
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printl "INVALID SIZE", $a . "," . $b . "," . $c . "," . $d;
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}
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@@ -788,9 +801,11 @@ sub decode_ddr2_sdram($)
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$trp =($bytes->[27] >> 2)+(($bytes->[27] & 3)*0.25);
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$tras =$bytes->[30];
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printl "tCL-tRCD-tRP-tRAS:" , $highestCAS . "-" . ($trcd/$ctime) . "-" . ($trp/$ctime) . "-" . ($tras/$ctime);
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printl "tCL-tRCD-tRP-tRAS",
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$highestCAS . "-" .
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ceil($trcd/$ctime) . "-" .
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ceil($trp/$ctime) . "-" .
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ceil($tras/$ctime);
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}
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%decode_callback = (
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@@ -824,7 +839,7 @@ sub decode_intel_spec_freq($)
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if ($bytes->[63] & 64) { $temp .= "CLK 1 Connected\n"; }
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if ($bytes->[63] & 128) { $temp .= "CLK 0 Connected\n"; }
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if (($bytes->[63] & 192) == 192) { $temp .= "Double-sided DIMM\n"; }
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else { $temp .= "Single-sided DIMM\n"; }
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elsif (($bytes->[63] & 192) != 0) { $temp .= "Single-sided DIMM\n"; }
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printl $l, $temp;
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}
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@@ -978,13 +993,15 @@ for my $i ( 0 .. $#dimm_list ) {
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$temp = manufacturer_data(@{$extra});
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printl $l, $temp if defined $temp;
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# Try the location code as ASCII first, as earlier specifications
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# suggested this. As newer specifications don't mention it anymore,
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# we still fall back to binary.
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$l = "Manufacturing Location Code";
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$temp = (chr($bytes[8]) =~ m/^[\w\d]$/) ? chr($bytes[8])
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: sprintf("0x%.2X", $bytes[8]);
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printl $l, $temp;
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if (spd_written($bytes[8])) {
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# Try the location code as ASCII first, as earlier specifications
|
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# suggested this. As newer specifications don't mention it anymore,
|
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# we still fall back to binary.
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$l = "Manufacturing Location Code";
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$temp = (chr($bytes[8]) =~ m/^[\w\d]$/) ? chr($bytes[8])
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: sprintf("0x%.2X", $bytes[8]);
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printl $l, $temp;
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}
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|
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$l = "Part Number";
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$temp = part_number(@bytes[9..26]);
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@@ -998,10 +1015,20 @@ for my $i ( 0 .. $#dimm_list ) {
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|
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if (spd_written(@bytes[29..30])) {
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$l = "Manufacturing Date";
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# Note that this will break in year 2080
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$temp = sprintf("%d%02X-W%02X\n",
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$bytes[29] >= 0x80 ? 19 : 20,
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@bytes[29..30]);
|
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# In theory the year and week are in BCD format, but
|
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# this is not always true in practice :(
|
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if (($bytes[29] & 0xf0) <= 0x90
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&& ($bytes[29] & 0x0f) <= 0x09
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&& ($bytes[30] & 0xf0) <= 0x90
|
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&& ($bytes[30] & 0x0f) <= 0x09) {
|
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# Note that this heuristic will break in year 2080
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||||
$temp = sprintf("%d%02X-W%02X\n",
|
||||
$bytes[29] >= 0x80 ? 19 : 20,
|
||||
@bytes[29..30]);
|
||||
} else {
|
||||
$temp = sprintf("0x%02X%02X\n",
|
||||
@bytes[29..30]);
|
||||
}
|
||||
printl $l, $temp;
|
||||
}
|
||||
|
||||
|
||||
Reference in new issue
Block a user