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Merge pull request #3072 from cesanta/rw612-wifi-xpresso

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RW612 MCUXpresso WiFi example with FreeRTOS and LWIP
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Sergio R. Caprile authored and GitHub committed 2025-03-08 14:56:29 -03:00
2 parents fbc231f33e 05f9e61a41
commit b30cf6587c
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tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/.cproject
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tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/.project
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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>frdm-rw612-xpresso-freertos-lwip</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>com.nxp.mcuxpresso.core.datamodels.sdkNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/.settings/language.settings.xml
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="com.crt.advproject.config.exe.debug.736372086" name="Debug">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuildCommandParser" id="com.crt.advproject.GCCBuildCommandParser" keep-relative-paths="false" name="MCU GCC Build Output Parser" parameter="(arm-none-eabi-gcc)|(arm-none-eabi-[gc]\+\+)|(gcc)|([gc]\+\+)|(clang)" prefer-non-shared="true"/>
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="-1252776358287366685" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
</extension>
</configuration>
<configuration id="com.crt.advproject.config.exe.release.637693614" name="Release">
<extension point="org.eclipse.cdt.core.LanguageSettingsProvider">
<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
<provider copy-of="extension" id="com.crt.advproject.GCCBuildCommandParser"/>
<provider class="com.crt.advproject.specs.MCUGCCBuiltinSpecsDetector" console="false" env-hash="-1262952445740183997" id="com.crt.advproject.GCCBuildSpecCompilerParser" keep-relative-paths="false" name="MCU GCC Built-in Compiler Parser" parameter="${COMMAND} ${FLAGS} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
</extension>
</configuration>
</project>
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/.settings/org.eclipse.core.resources.prefs
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eclipse.preferences.version=1
encoding/<project>=UTF-8
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/cmsis_compiler.h
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/*
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* CMSIS Compiler Generic Header File
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* TI Arm Clang Compiler (tiarmclang)
*/
#elif defined (__ti__)
#include "cmsis_tiarmclang.h"
/*
* LLVM/Clang Compiler
*/
#elif defined ( __clang__ )
#include "cmsis_clang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#if __ARM_ARCH_PROFILE == 'A'
#include "a-profile/cmsis_iccarm_a.h"
#elif __ARM_ARCH_PROFILE == 'R'
#include "r-profile/cmsis_iccarm_r.h"
#elif __ARM_ARCH_PROFILE == 'M'
#include "m-profile/cmsis_iccarm_m.h"
#else
#error "Unknown Arm architecture profile"
#endif
/*
* TI Arm Compiler (armcl)
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#ifndef __NO_INIT
#define __NO_INIT __attribute__ ((section (".noinit")))
#endif
#ifndef __ALIAS
#define __ALIAS(x) __attribute__ ((alias(x)))
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#ifndef __NO_INIT
#define __NO_INIT __attribute__ ((section (".noinit")))
#endif
#ifndef __ALIAS
#define __ALIAS(x) __attribute__ ((alias(x)))
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#ifndef __NO_INIT
#define __NO_INIT __attribute__ ((section (".noinit")))
#endif
#ifndef __ALIAS
#define __ALIAS(x) __attribute__ ((alias(x)))
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/cmsis_gcc.h
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tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/cmsis_version.h
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/*
* Copyright (c) 2009-2023 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* CMSIS Core Version Definitions
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS-Core(M) Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< \brief CMSIS Core(M) version number */
/* CMSIS-Core(A) Version definitions */
#define __CA_CMSIS_VERSION_MAIN ( 6U) /*!< \brief [31:16] CMSIS-Core(A) main version */
#define __CA_CMSIS_VERSION_SUB ( 1U) /*!< \brief [15:0] CMSIS-Core(A) sub version */
#define __CA_CMSIS_VERSION ((__CA_CMSIS_VERSION_MAIN << 16U) | \
__CA_CMSIS_VERSION_SUB ) /*!< \brief CMSIS-Core(A) version number */
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/core_cm33.h
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tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/m-profile/armv8m_mpu.h
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/*
* Copyright (c) 2017-2022 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* CMSIS-Core(M) MPU API for Armv8-M and Armv8.1-M MPU
*/
#ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
/** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for Normal memory, Outer and Inner cacheability.
* \param NT Non-Transient: Set to 1 for Non-transient data. Set to 0 for Transient data.
* \param WB Write-Back: Set to 1 to use a Write-Back policy. Set to 0 to use a Write-Through policy.
* \param RA Read Allocation: Set to 1 to enable cache allocation on read miss. Set to 0 to disable cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to enable cache allocation on write miss. Set to 0 to disable cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Normal memory outer-cacheable and inner-cacheable attributes
* WT = Write Through, WB = Write Back, TR = Transient, RA = Read-Allocate, WA = Write Allocate
*/
#define MPU_ATTR_NORMAL_OUTER_NON_CACHEABLE (0b0100)
#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA (0b0010)
#define MPU_ATTR_NORMAL_OUTER_WT_TR_WA (0b0001)
#define MPU_ATTR_NORMAL_OUTER_WT_TR_RA_WA (0b0011)
#define MPU_ATTR_NORMAL_OUTER_WT_RA (0b1010)
#define MPU_ATTR_NORMAL_OUTER_WT_WA (0b1001)
#define MPU_ATTR_NORMAL_OUTER_WT_RA_WA (0b1011)
#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA (0b0101)
#define MPU_ATTR_NORMAL_OUTER_WB_TR_WA (0b0110)
#define MPU_ATTR_NORMAL_OUTER_WB_TR_RA_WA (0b0111)
#define MPU_ATTR_NORMAL_OUTER_WB_RA (0b1101)
#define MPU_ATTR_NORMAL_OUTER_WB_WA (0b1110)
#define MPU_ATTR_NORMAL_OUTER_WB_RA_WA (0b1111)
#define MPU_ATTR_NORMAL_INNER_NON_CACHEABLE (0b0100)
#define MPU_ATTR_NORMAL_INNER_WT_TR_RA (0b0010)
#define MPU_ATTR_NORMAL_INNER_WT_TR_WA (0b0001)
#define MPU_ATTR_NORMAL_INNER_WT_TR_RA_WA (0b0011)
#define MPU_ATTR_NORMAL_INNER_WT_RA (0b1010)
#define MPU_ATTR_NORMAL_INNER_WT_WA (0b1001)
#define MPU_ATTR_NORMAL_INNER_WT_RA_WA (0b1011)
#define MPU_ATTR_NORMAL_INNER_WB_TR_RA (0b0101)
#define MPU_ATTR_NORMAL_INNER_WB_TR_WA (0b0110)
#define MPU_ATTR_NORMAL_INNER_WB_TR_RA_WA (0b0111)
#define MPU_ATTR_NORMAL_INNER_WB_RA (0b1101)
#define MPU_ATTR_NORMAL_INNER_WB_WA (0b1110)
#define MPU_ATTR_NORMAL_INNER_WB_RA_WA (0b1111)
/** \brief Memory Attribute
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
/* \brief Specifies MAIR_ATTR number */
#define MAIR_ATTR(x) ((x > 7 || x < 0) ? 0 : x)
/**
* Shareability
*/
/** \brief Normal memory, non-shareable */
#define ARM_MPU_SH_NON (0U)
/** \brief Normal memory, outer shareable */
#define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory, inner shareable */
#define ARM_MPU_SH_INNER (3U)
/**
* Access permissions
* AP = Access permission, RO = Read-only, RW = Read/Write, NP = Any privilege, PO = Privileged code only
*/
/** \brief Normal memory, read/write */
#define ARM_MPU_AP_RW (0U)
/** \brief Normal memory, read-only */
#define ARM_MPU_AP_RO (1U)
/** \brief Normal memory, any privilege level */
#define ARM_MPU_AP_NP (1U)
/** \brief Normal memory, privileged access only */
#define ARM_MPU_AP_PO (0U)
/*
* Execute-never
* XN = Execute-never, EX = Executable
*/
/** \brief Normal memory, Execution only permitted if read permitted */
#define ARM_MPU_XN (1U)
/** \brief Normal memory, Execution only permitted if read permitted */
#define ARM_MPU_EX (0U)
/** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory. Set to 0 for a read/write memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory. Set to 0 for privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region. Set to 0 for a read/write memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region. Set to 0 for privileged memory region.
* \param XN eXecute Never: Set to 1 for a non-executable memory region. Set to 0 for an executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/**
\brief Read MPU Type Register
\return Number of MPU regions
*/
__STATIC_INLINE uint32_t ARM_MPU_TYPE()
{
return ((MPU->TYPE) >> 8);
}
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
__DMB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#ifdef MPU_NS
/** Enable the Non-secure MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
__DMB();
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the Non-secure MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#endif
/** Set the memory attribute encoding to the given MPU.
* \param mpu Pointer to the MPU to be configured.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
{
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
}
#ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
}
#endif
/** Clear and disable the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
mpu->RNR = rnr;
mpu->RLAR = 0U;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU, rnr);
}
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
mpu->RBAR = rbar;
mpu->RLAR = rlar;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
}
#ifdef MPU_NS
/** Configure the given Non-secure MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table to the given MPU.
* \param mpu Pointer to the MPU registers to be used.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
table += c;
cnt -= c;
rnrOffset = 0U;
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
/** Load the given number of MPU regions from a table.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/m-profile/cmsis_gcc_m.h
+717
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@@ -0,0 +1,717 @@
/*
* Copyright (c) 2009-2023 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* CMSIS-Core(M) Compiler GCC Header File
*/
#ifndef __CMSIS_GCC_M_H
#define __CMSIS_GCC_M_H
#ifndef __CMSIS_GCC_H
#error "This file must not be included directly"
#endif
#include <arm_acle.h>
/* ######################### Startup and Lowlevel Init ######################## */
#ifndef __PROGRAM_START
/**
\brief Initializes data and bss sections
\details This default implementations initialized all data and additional bss
sections relying on .copy.table and .zero.table specified properly
in the used linker script.
*/
__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
{
extern void _start(void) __NO_RETURN;
typedef struct __copy_table {
uint32_t const* src;
uint32_t* dest;
uint32_t wlen;
} __copy_table_t;
typedef struct __zero_table {
uint32_t* dest;
uint32_t wlen;
} __zero_table_t;
extern const __copy_table_t __copy_table_start__;
extern const __copy_table_t __copy_table_end__;
extern const __zero_table_t __zero_table_start__;
extern const __zero_table_t __zero_table_end__;
for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
for(uint32_t i=0u; i<pTable->wlen; ++i) {
pTable->dest[i] = pTable->src[i];
}
}
for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
for(uint32_t i=0u; i<pTable->wlen; ++i) {
pTable->dest[i] = 0u;
}
}
_start();
}
#define __PROGRAM_START __cmsis_start
#endif
#ifndef __INITIAL_SP
#define __INITIAL_SP __StackTop
#endif
#ifndef __STACK_LIMIT
#define __STACK_LIMIT __StackLimit
#endif
#ifndef __VECTOR_TABLE
#define __VECTOR_TABLE __Vectors
#endif
#ifndef __VECTOR_TABLE_ATTRIBUTE
#define __VECTOR_TABLE_ATTRIBUTE __attribute__((used, section(".vectors")))
#endif
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
#ifndef __STACK_SEAL
#define __STACK_SEAL __StackSeal
#endif
#ifndef __TZ_STACK_SEAL_SIZE
#define __TZ_STACK_SEAL_SIZE 8U
#endif
#ifndef __TZ_STACK_SEAL_VALUE
#define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL
#endif
__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
*((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
}
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Control Register (non-secure)
\details Returns the content of the non-secure Control Register when in secure mode.
\return non-secure Control Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
{
__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
__ISB();
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Control Register (non-secure)
\details Writes the given value to the non-secure Control Register when in secure state.
\param [in] control Control Register value to set
*/
__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
{
__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
__ISB();
}
#endif
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
return (result);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_APSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, apsr" : "=r" (result) );
return (result);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
{
uint32_t result;
__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
return (result);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Process Stack Pointer (non-secure)
\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
\return PSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Process Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
{
__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
}
#endif
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSP(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Main Stack Pointer (non-secure)
\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
\return MSP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Main Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
{
__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
}
#endif
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Stack Pointer (non-secure)
\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
\return SP Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
return (result);
}
/**
\brief Set Stack Pointer (non-secure)
\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
\param [in] topOfStack Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
{
__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
}
#endif
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Priority Mask (non-secure)
\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
\return Priority Mask value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
{
__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Priority Mask (non-secure)
\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
\param [in] priMask Priority Mask
*/
__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
{
__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
}
#endif
#if (__ARM_ARCH_ISA_THUMB >= 2)
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Base Priority (non-secure)
\details Returns the current value of the non-secure Base Priority register when in secure state.
\return Base Priority register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
{
__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Base Priority (non-secure)
\details Assigns the given value to the non-secure Base Priority register when in secure state.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
{
__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
}
#endif
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
return (result);
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Fault Mask (non-secure)
\details Returns the current value of the non-secure Fault Mask register when in secure state.
\return Fault Mask register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t result;
__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
return (result);
}
#endif
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Fault Mask (non-secure)
\details Assigns the given value to the non-secure Fault Mask register when in secure state.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
{
__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
}
#endif
#endif /* (__ARM_ARCH_ISA_THUMB >= 2) */
#if (__ARM_ARCH >= 8)
/**
\brief Get Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
return (0U);
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim" : "=r" (result) );
return (result);
#endif
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Process Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\return PSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
return (0U);
#else
uint32_t result;
__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
return (result);
#endif
}
#endif
/**
\brief Set Process Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
#endif
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Process Stack Pointer (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure PSPLIM is RAZ/WI */
(void)ProcStackPtrLimit;
#else
__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
#endif
}
#endif
/**
\brief Get Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
return (0U);
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim" : "=r" (result) );
return (result);
#endif
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Get Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always.
\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
\return MSPLIM Register value
*/
__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
return (0U);
#else
uint32_t result;
__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
return (result);
#endif
}
#endif
/**
\brief Set Main Stack Pointer Limit
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
*/
__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
#endif
}
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
/**
\brief Set Main Stack Pointer Limit (non-secure)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored.
\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
\param [in] MainStackPtrLimit Main Stack Pointer value to set
*/
__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
!(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
/* without main extensions, the non-secure MSPLIM is RAZ/WI */
(void)MainStackPtrLimit;
#else
__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
#endif
}
#endif
#endif /* (__ARM_ARCH >= 8) */
/*@} end of CMSIS_Core_RegAccFunctions */
#endif /* __CMSIS_GCC_M_H */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/CMSIS/tz_context.h
+68
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/*
* Copyright (c) 2017-2023 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/*
* CMSIS Core(M) Context Management for Armv8-M TrustZone
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/board/board.c
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/*
* Copyright 2021-2024 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_common.h"
#include "fsl_debug_console.h"
#include "fsl_clock.h"
#include "board.h"
#include "fsl_flexspi.h"
#include "fsl_cache.h"
#include "fsl_io_mux.h"
#include "fsl_power.h"
#include "fsl_ocotp.h"
#include "mcuxClEls.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_FLEXSPI_DLL_LOCK_RETRY (10)
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
/* Initialize debug console. */
void BOARD_InitDebugConsole(void)
{
uint32_t uartClkSrcFreq = 0;
/* attach FRG0 clock to FLEXCOMM3 (debug console) */
CLOCK_SetFRGClock(BOARD_DEBUG_UART_FRG_CLK);
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
}
static status_t flexspi_hyper_ram_run_seq(FLEXSPI_Type *base, uint32_t seqIndex)
{
flexspi_transfer_t flashXfer;
status_t status;
/* Write data */
flashXfer.deviceAddress = 0U;
flashXfer.port = kFLEXSPI_PortB1;
flashXfer.cmdType = kFLEXSPI_Command;
flashXfer.SeqNumber = 1;
flashXfer.seqIndex = seqIndex;
status = FLEXSPI_TransferBlocking(base, &flashXfer);
return status;
}
/* Initialize psram. */
status_t BOARD_InitPsRam(void)
{
flexspi_device_config_t psramConfig = {
.flexspiRootClk = 106666667, /* 106MHZ SPI serial clock */
.isSck2Enabled = false,
.flashSize = 0x2000, /* 64Mb/KByte */
.addressShift = false,
.CSIntervalUnit = kFLEXSPI_CsIntervalUnit1SckCycle,
.CSInterval = 0,
.CSHoldTime = 3,
.CSSetupTime = 3,
.dataValidTime = 1,
.columnspace = 0,
.enableWordAddress = false,
.AWRSeqIndex = 12,
.AWRSeqNumber = 1,
.ARDSeqIndex = 11,
.ARDSeqNumber = 1,
.AHBWriteWaitUnit = kFLEXSPI_AhbWriteWaitUnit2AhbCycle,
.AHBWriteWaitInterval = 0,
.enableWriteMask = true,
};
uint32_t psramLUT[16] = {
/* Read Data */
[0] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 24),
[1] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 6, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD,
0x04),
/* Write Data */
[4] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x38, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 24),
[5] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x00, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),
/* Reset Enable */
[8] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x66, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),
/* Reset */
[12] = FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x99, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),
};
flexspi_config_t config;
#if BOARD_ENABLE_PSRAM_CACHE
cache64_config_t cacheCfg;
#endif
status_t status = kStatus_Success;
if (!BOARD_IS_XIP()) /* FlexSPI not initialized */
{
CLOCK_EnableClock(kCLOCK_Flexspi);
RESET_ClearPeripheralReset(kFLEXSPI_RST_SHIFT_RSTn);
BOARD_SetFlexspiClock(FLEXSPI, 5U, 3U); /* 320M / 3 */
/* Get FLEXSPI default settings and configure the flexspi. */
FLEXSPI_GetDefaultConfig(&config);
/* Init FLEXSPI. */
config.rxSampleClock = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
config.rxSampleClockPortB = kFLEXSPI_ReadSampleClkLoopbackFromDqsPad;
config.rxSampleClockDiff = false;
/*Set AHB buffer size for reading data through AHB bus. */
config.ahbConfig.enableAHBPrefetch = true;
config.ahbConfig.enableAHBBufferable = true;
config.ahbConfig.enableAHBCachable = true;
config.ahbConfig.enableReadAddressOpt = true;
for (uint8_t i = 1; i < FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT - 1; i++)
{
config.ahbConfig.buffer[i].bufferSize = 0;
}
/* FlexSPI has total 1KB RX buffer.
* Set DMA0 master to use AHB Rx Buffer0.
*/
config.ahbConfig.buffer[0].masterIndex = 10; /* GDMA */
config.ahbConfig.buffer[0].bufferSize = 512; /* Allocate 512B bytes for DMA0 */
config.ahbConfig.buffer[0].enablePrefetch = true;
config.ahbConfig.buffer[0].priority = 0;
/* All other masters use last buffer with 512B bytes. */
config.ahbConfig.buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT - 1].bufferSize = 512;
#if !(defined(FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_COMBINATIONEN) && FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_COMBINATIONEN)
config.enableCombination = false;
#endif
FLEXSPI_Init(BOARD_FLEXSPI_PSRAM, &config);
}
/* Configure flash settings according to serial flash feature. */
FLEXSPI_SetFlashConfig(BOARD_FLEXSPI_PSRAM, &psramConfig, kFLEXSPI_PortB1);
/* Update bottom LUT table (44-59). */
FLEXSPI_UpdateLUT(BOARD_FLEXSPI_PSRAM, 44U, psramLUT, ARRAY_SIZE(psramLUT));
/* Do software reset. */
FLEXSPI_SoftwareReset(BOARD_FLEXSPI_PSRAM);
do
{
/* Reset PSRAM */
status = flexspi_hyper_ram_run_seq(BOARD_FLEXSPI_PSRAM, 13U);
if (status == kStatus_Success)
{
status = flexspi_hyper_ram_run_seq(BOARD_FLEXSPI_PSRAM, 14U);
}
if (status != kStatus_Success)
{
status = kStatus_Fail;
break;
}
#if BOARD_ENABLE_PSRAM_CACHE
CACHE64_GetDefaultConfig(&cacheCfg);
/* Suppose:
Flash on PC bus starting from 0x08000000, controlled by cache 0.
PSRAM on PS bus starting from 0x28000000, controlled by cache 1.
*/
CACHE64_Init(CACHE64_POLSEL1, &cacheCfg);
CACHE64_EnableWriteBuffer(CACHE64_CTRL1, true);
CACHE64_EnableCache(CACHE64_CTRL1);
#endif
} while (false);
return status;
}
void BOARD_InitSleepPinConfig(void)
{
int32_t i;
/* Set all non-AON pins output low level in sleep mode. */
for (i = 0; i < 22; i++)
{
IO_MUX_SetPinOutLevelInSleep(i, IO_MUX_SleepPinLevelLow);
}
for (i = 28; i < 64; i++)
{
IO_MUX_SetPinOutLevelInSleep(i, IO_MUX_SleepPinLevelLow);
}
/* Set RF_CNTL 0-3 output low level in sleep mode. */
for (i = 0; i < 4; i++)
{
IO_MUX_SetRfPinOutLevelInSleep(i, IO_MUX_SleepPinLevelLow);
}
}
void BOARD_DeinitFlash(FLEXSPI_Type *base)
{
/* Enable FLEXSPI clock again */
CLKCTL0->PSCCTL0_SET = CLKCTL0_PSCCTL0_SET_FLEXSPI0_MASK;
/* Enable FLEXSPI module */
base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK;
/* Wait until FLEXSPI is not busy */
while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK)))
{
}
/* Disable module during the reset procedure */
base->MCR0 |= FLEXSPI_MCR0_MDIS_MASK;
}
void BOARD_InitFlash(FLEXSPI_Type *base)
{
uint32_t status;
uint32_t lastStatus;
uint32_t retry;
/* Loopback from DQS pad can maximize RD board flash speed. */
if ((base->MCR0 & FLEXSPI_MCR0_RXCLKSRC_MASK) != FLEXSPI_MCR0_RXCLKSRC(1))
{
base->MCR0 = (base->MCR0 & ~FLEXSPI_MCR0_RXCLKSRC_MASK) | FLEXSPI_MCR0_RXCLKSRC(1);
}
/* If serial root clock is >= 100 MHz, DLLEN set to 1, OVRDEN set to 0, then SLVDLYTARGET setting of 0x0 is
* recommended. */
base->DLLCR[0] = 0x1U;
/* Enable FLEXSPI module */
base->MCR0 &= ~FLEXSPI_MCR0_MDIS_MASK;
base->MCR0 |= FLEXSPI_MCR0_SWRESET_MASK;
while (base->MCR0 & FLEXSPI_MCR0_SWRESET_MASK)
{
}
/* Need to wait DLL locked if DLL enabled */
if (0U != (base->DLLCR[0] & FLEXSPI_DLLCR_DLLEN_MASK))
{
lastStatus = base->STS2;
retry = BOARD_FLEXSPI_DLL_LOCK_RETRY;
/* Wait slave delay line locked and slave reference delay line locked. */
do
{
status = base->STS2;
if ((status & (FLEXSPI_STS2_AREFLOCK_MASK | FLEXSPI_STS2_ASLVLOCK_MASK)) ==
(FLEXSPI_STS2_AREFLOCK_MASK | FLEXSPI_STS2_ASLVLOCK_MASK))
{
/* Locked */
retry = 100;
break;
}
else if (status == lastStatus)
{
/* Same delay cell number in calibration */
retry--;
}
else
{
retry = BOARD_FLEXSPI_DLL_LOCK_RETRY;
lastStatus = status;
}
} while (retry > 0);
/* According to ERR011377, need to delay at least 100 NOPs to ensure the DLL is locked. */
for (; retry > 0U; retry--)
{
__NOP();
}
}
}
/* BOARD_SetFlexspiClock run in RAM used to configure FlexSPI clock source and divider when XIP. */
void BOARD_SetFlexspiClock(FLEXSPI_Type *base, uint32_t src, uint32_t divider)
{
if ((CLKCTL0->FLEXSPIFCLKSEL != CLKCTL0_FLEXSPIFCLKSEL_SEL(src)) ||
((CLKCTL0->FLEXSPIFCLKDIV & CLKCTL0_FLEXSPIFCLKDIV_DIV_MASK) != (divider - 1)))
{
/* Always deinit FLEXSPI and init FLEXSPI for the flash to make sure the flash works correctly after the
FLEXSPI root clock changed as the default FLEXSPI configuration may does not work for the new root clock
frequency. */
BOARD_DeinitFlash(base);
/* Disable clock before changing clock source */
CLKCTL0->PSCCTL0_CLR = CLKCTL0_PSCCTL0_CLR_FLEXSPI0_MASK;
/* Update flexspi clock. */
CLKCTL0->FLEXSPIFCLKSEL = CLKCTL0_FLEXSPIFCLKSEL_SEL(src);
CLKCTL0->FLEXSPIFCLKDIV |= CLKCTL0_FLEXSPIFCLKDIV_RESET_MASK; /* Reset the divider counter */
CLKCTL0->FLEXSPIFCLKDIV = CLKCTL0_FLEXSPIFCLKDIV_DIV(divider - 1);
while ((CLKCTL0->FLEXSPIFCLKDIV) & CLKCTL0_FLEXSPIFCLKDIV_REQFLAG_MASK)
{
}
/* Enable FLEXSPI clock again */
CLKCTL0->PSCCTL0_SET = CLKCTL0_PSCCTL0_SET_FLEXSPI0_MASK;
BOARD_InitFlash(base);
}
}
static bool LoadGdetCfg(power_gdet_data_t *data)
{
bool retval = true;
/* If T3 256M clock is disabled, GDET cannot work. */
if ((SYSCTL2->SOURCE_CLK_GATE & SYSCTL2_SOURCE_CLK_GATE_T3PLL_MCI_256M_CG_MASK) != 0U)
{
retval = false;
}
else
{
/* GDET clock has been characterzed to 64MHz */
CLKCTL0->ELS_GDET_CLK_SEL = CLKCTL0_ELS_GDET_CLK_SEL_SEL(2);
}
if (retval)
{
/* LOAD command */
MCUX_CSSL_FP_FUNCTION_CALL_BEGIN(result, token, mcuxClEls_GlitchDetector_LoadConfig_Async((uint8_t *)data));
if ((MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_GlitchDetector_LoadConfig_Async) != token) ||
(MCUXCLELS_STATUS_OK_WAIT != result))
{
retval = false;
}
MCUX_CSSL_FP_FUNCTION_CALL_END();
}
if (retval)
{
/* Wait for the mcuxClEls_GlitchDetector_LoadConfig_Async operation to complete. */
MCUX_CSSL_FP_FUNCTION_CALL_BEGIN(result, token, mcuxClEls_WaitForOperation(MCUXCLELS_ERROR_FLAGS_CLEAR));
if ((MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_WaitForOperation) != token) || (MCUXCLELS_STATUS_OK != result))
{
retval = false;
}
MCUX_CSSL_FP_FUNCTION_CALL_END();
}
return retval;
}
static void ConfigSvcSensor(void)
{
uint64_t svc;
uint32_t pack;
status_t status;
power_gdet_data_t gdetData = {0U};
uint32_t rev = SOCCTRL->CHIP_INFO & SOCCIU_CHIP_INFO_REV_NUM_MASK;
status = OCOTP_ReadSVC(&svc);
if (status == kStatus_Success)
{ /* CES */
status = OCOTP_ReadPackage(&pack);
if (status == kStatus_Success)
{
/*
A2 CES: Use SVC voltage.
A1 CES: Keep boot voltage 1.11V.
*/
POWER_InitVoltage((rev == 2U) ? ((uint32_t)svc >> 16) : 0U, pack);
}
/* SVC GDET config */
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead(149, &gdetData.CFG[0]) : status;
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead(150, &gdetData.CFG[1]) : status;
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead(151, &gdetData.CFG[2]) : status;
/* A2 CES load fuse 155 for trim calculation. A1 CES directly use the default trim value in fuse 152. */
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead((rev == 2U) ? 155 : 152, &gdetData.CFG[3]) : status;
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead(153, &gdetData.CFG[4]) : status;
status = (status == kStatus_Success) ? OCOTP_OtpFuseRead(154, &gdetData.CFG[5]) : status;
assert(status == kStatus_Success);
/* Must configure GDET load function for POWER_EnableGDetVSensors(). */
Power_InitLoadGdetCfg(LoadGdetCfg, &gdetData, pack);
}
else
{
/* A1/A2 non-CES */
SystemCoreClockUpdate();
/* LPBG trim */
BUCK11->BUCK_CTRL_EIGHTEEN_REG = 0x6U;
/* Change buck level */
PMU->PMIP_BUCK_LVL = PMU_PMIP_BUCK_LVL_SLEEP_BUCK18_SEL(0x60U) | /* 1.8V */
PMU_PMIP_BUCK_LVL_SLEEP_BUCK11_SEL(0x22U) | /* 0.8V */
PMU_PMIP_BUCK_LVL_NORMAL_BUCK18_SEL(0x60U) | /* 1.8V */
PMU_PMIP_BUCK_LVL_NORMAL_BUCK11_SEL(0x54U); /* 1.05V */
/* Delay 600us */
SDK_DelayAtLeastUs(600, SystemCoreClock);
}
}
/* This function is used to configure static voltage compansation and sensors, and in XIP case, change FlexSPI clock
to a stable source before clock tree(Such as PLL and Main clock) update */
void BOARD_ClockPreConfig(void)
{
OCOTP_OtpInit();
ConfigSvcSensor();
OCOTP_OtpDeinit();
if (BOARD_IS_XIP())
{
/* Move FLEXSPI clock source to T3 256m / 4 to avoid instruction/data fetch issue in XIP when
* updating PLL and main clock.
*/
BOARD_SetFlexspiClock(FLEXSPI, 6U, 4U);
}
else
{
RESET_ClearPeripheralReset(kFLEXSPI_RST_SHIFT_RSTn);
BOARD_DeinitFlash(FLEXSPI);
CLOCK_AttachClk(kNONE_to_FLEXSPI_CLK);
CLOCK_DisableClock(kCLOCK_Flexspi);
RESET_SetPeripheralReset(kFLEXSPI_RST_SHIFT_RSTn);
}
}
/* Update FlexSPI clock source and set flash to full speed */
void BOARD_ClockPostConfig(void)
{
if (BOARD_IS_XIP())
{
/* Call function BOARD_SetFlexspiClock() to set clock source to aux0_pll_clk. */
BOARD_SetFlexspiClock(FLEXSPI, 2U, 2U);
}
else
{
}
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/board/board.h
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/*
* Copyright 2021-2024 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "fsl_common.h"
#include "fsl_gpio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "FRDM-RW612"
/*! @brief Macro to judge XIP */
#define BOARD_IS_XIP() \
((((uint32_t)BOARD_InitDebugConsole >= 0x08000000U) && ((uint32_t)BOARD_InitDebugConsole < 0x10000000U)) || \
(((uint32_t)BOARD_InitDebugConsole >= 0x18000000U) && ((uint32_t)BOARD_InitDebugConsole < 0x20000000U)))
/*! @brief The UART to use for debug messages. */
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) FLEXCOMM3
#define BOARD_DEBUG_UART_INSTANCE 3U
#define BOARD_DEBUG_UART USART3
#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetFlexCommClkFreq(3)
#define BOARD_DEBUG_UART_FRG_CLK \
(&(const clock_frg_clk_config_t){3, kCLOCK_FrgPllDiv, 255, 0}) /*!< Select FRG3 mux as frg_pll */
#define BOARD_DEBUG_UART_CLK_ATTACH kFRG_to_FLEXCOMM3
#define BOARD_DEBUG_UART_RST kFC3_RST_SHIFT_RSTn
#define BOARD_DEBUG_UART_CLKSRC kCLOCK_Flexcomm3
#define BOARD_UART_IRQ_HANDLER FLEXCOMM3_IRQHandler
#define BOARD_UART_IRQ FLEXCOMM3_IRQn
#ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE 115200
#endif /* BOARD_DEBUG_UART_BAUDRATE */
#define BOARD_FLEXSPI_PSRAM FLEXSPI
#ifndef BOARD_ENABLE_PSRAM_CACHE
#define BOARD_ENABLE_PSRAM_CACHE 1
#endif
/* Board I2C for codec */
#define BOARD_CODEC_I2C_BASEADDR I2C2
#define BOARD_CODEC_I2C_CLOCK_FREQ CLOCK_GetFlexCommClkFreq(2U)
#define BOARD_CODEC_I2C_INSTANCE 2
#define BOARD_CODEC_I2C_SDA_PORT 0
#define BOARD_CODEC_I2C_SCL_PORT 0
#define BOARD_CODEC_I2C_SDA_PIN 16
#define BOARD_CODEC_I2C_SCL_PIN 17
/* Board led color mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
/* A fake led on GPIO header */
#ifndef BOARD_LED_BLUE_GPIO
#define BOARD_LED_BLUE_GPIO GPIO
#endif
#define BOARD_LED_BLUE_GPIO_PORT 0U
#ifndef BOARD_LED_BLUE_GPIO_PIN
#define BOARD_LED_BLUE_GPIO_PIN 0U
#endif
#define LED_BLUE_INIT(output) \
GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN, \
&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_BLUE */
#define LED_BLUE_ON() \
GPIO_PortSet(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
#define LED_BLUE_OFF() \
GPIO_PortClear(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
#define LED_BLUE_TOGGLE() \
GPIO_PortToggle(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PORT, \
1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
/* Board SW PIN */
#ifndef BOARD_SW2_GPIO
#define BOARD_SW2_GPIO GPIO
#endif
#define BOARD_SW2_GPIO_PORT 0U
#ifndef BOARD_SW2_GPIO_PIN
#define BOARD_SW2_GPIO_PIN 11U
#endif
#define BOARD_ENET0_PHY_ADDRESS (0x02U)
/*! @brief The USIM SMARTCARD PHY configuration. */
#define BOARD_SMARTCARD_MODULE (USIM) /*!< SMARTCARD communicational module instance */
#define BOARD_SMARTCARD_MODULE_IRQ (USIM_IRQn) /*!< SMARTCARD communicational module IRQ handler */
#define BOARD_SMARTCARD_CLOCK_MODULE_CLK_FREQ (CLOCK_GetUsimClkFreq())
#define BOARD_SMARTCARD_CLOCK_VALUE (4000000U) /*!< SMARTCARD clock frequency (4Mhz) */
#define BOARD_SMARTCARD_IRQ_PORT (0)
#define BOARD_SMARTCARD_IRQ_PIN (19)
#define BOARD_SMARTCARD_TS_TIMER_IRQ (CTIMER0_IRQn)
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
void BOARD_InitDebugConsole(void);
status_t BOARD_InitPsRam(void);
void BOARD_InitSleepPinConfig(void);
void BOARD_ClockPreConfig(void);
void BOARD_ClockPostConfig(void);
AT_QUICKACCESS_SECTION_CODE(void BOARD_SetFlexspiClock(FLEXSPI_Type *base, uint32_t src, uint32_t divider));
AT_QUICKACCESS_SECTION_CODE(void BOARD_DeinitFlash(FLEXSPI_Type *base));
AT_QUICKACCESS_SECTION_CODE(void BOARD_InitFlash(FLEXSPI_Type *base));
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/board/clock_config.c
+277
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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to set up clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up all selectors to provide selected clocks.
*
* 3. Set up all dividers.
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v13.0
processor: RW612
package_id: RW612ETA2I
mcu_data: ksdk2_0
processor_version: 15.0.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "fsl_power.h"
#include "fsl_clock.h"
#include "clock_config.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockRUN();
}
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
outputs:
- {id: audio_pll_clk.outFreq, value: 4246732800/345600007 MHz}
- {id: aux0_pll_clk.outFreq, value: 260 MHz}
- {id: avpll_ch1_clkout.outFreq, value: 4246732800/345600007 MHz}
- {id: avpll_ch2_clkout.outFreq, value: 1415577600/22118401 MHz}
- {id: cau_slp_clk.outFreq, value: 4 MHz}
- {id: clk_32k.outFreq, value: 32 kHz}
- {id: clk_pmu_sys.outFreq, value: 52 MHz}
- {id: els_128m_clk.outFreq, value: 128 MHz}
- {id: els_256m_clk.outFreq, value: 256 MHz}
- {id: els_64m_clk.outFreq, value: 64 MHz}
- {id: ffro_clk_div4.outFreq, value: 640/53 MHz}
- {id: hclk.outFreq, value: 260 MHz}
- {id: lposc_clk_i.outFreq, value: 1 MHz}
- {id: main_clk.outFreq, value: 260 MHz}
- {id: main_pll_clk.outFreq, value: 260 MHz}
- {id: otp_fuse_32m_clk.outFreq, value: 32 MHz}
- {id: refclk_phy.outFreq, value: 40 MHz}
- {id: sfro_clk_i.outFreq, value: 16 MHz}
- {id: systick_fclk.outFreq, value: 260 MHz}
- {id: t3pll_mci_256m.outFreq, value: 256 MHz}
- {id: t3pll_mci_48_60m_irc.outFreq, value: 2560/53 MHz}
- {id: tcpu_mci_clk.outFreq, value: 260 MHz}
- {id: tddr_mci_flexspi_clk.outFreq, value: 320 MHz}
settings:
- {id: CLKCTL0.MAINCLKSELB.sel, value: CLKCTL0.MAINPLLCLKDIV}
- {id: CLKCTL0.MAINPLLCLKDIV.scale, value: '1', locked: true}
- {id: CLKCTL0.PMUFCLKDIV.scale, value: '5', locked: true}
- {id: CLKCTL0.SYSCPUAHBCLKDIV.scale, value: '1', locked: true}
- {id: CLKCTL0.SYSTICKFCLKSEL.sel, value: CLKCTL0.SYSTICKFCLKDIV}
- {id: CLKCTL0.WDT0FCLKSEL.sel, value: NO_CLOCK}
- {id: CLKCTL1.FRGPLLCLKDIV.scale, value: '13', locked: true}
- {id: CLKCTL1.OSEVENTFCLKSEL.sel, value: NO_CLOCK}
- {id: REFCLK_SYS_Config, value: Disabled}
- {id: SYSCTL2.CH1_M.scale, value: '2621440', locked: true}
- {id: SYSCTL2.CH1_OFFSET_DIV.scale, value: '345600007', locked: true}
- {id: SYSCTL2.CH2_M.scale, value: '2621440', locked: true}
- {id: SYSCTL2.CH2_OFFSET_DIV.scale, value: '66355203', locked: true}
- {id: SYSCTL2.T3_FBDIV.scale, value: '64', locked: true}
- {id: SYSCTL2.T3_REFDIV.scale, value: '1', locked: true}
- {id: T3PLL_MCI_213P3M_Config, value: Disabled}
- {id: T3PLL_MCI_FLEXSPI_Config, value: Disabled}
- {id: TCPU_MCI_FLEXSPI_CLK_Config, value: Disabled}
- {id: TDDR_MCI_ENET_CLK_Config, value: Disabled}
sources:
- {id: CAU.XTAL_OSC.outFreq, value: 40 MHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
const clock_avpll_config_t avpllConfig_BOARD_BootClockRUN =
{
.ch1Freq = kCLOCK_AvPllChFreq12p288m, /* AVPLL channel frequency 12.288 MHz */
.ch2Freq = kCLOCK_AvPllChFreq64m, /* AVPLL channel frequency 64 MHz */
.enableCali = true, /* AVPLL calibration is enabled */
};
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
/* Disable GDET and VSensors */
POWER_DisableGDetVSensors();
/* Enable CAU sleep clock for PMU */
if ((PMU->CAU_SLP_CTRL & PMU_CAU_SLP_CTRL_SOC_SLP_RDY_MASK) == 0U)
{
/* Enable the CAU sleep clock. */
CLOCK_EnableClock(kCLOCK_RefClkCauSlp);
}
if ((SYSCTL2->SOURCE_CLK_GATE & SYSCTL2_SOURCE_CLK_GATE_REFCLK_SYS_CG_MASK) != 0U)
{
/* Enable the REFCLK_SYS clock. */
CLOCK_EnableClock(kCLOCK_RefClkSys);
}
/* Initialize T3 PLL and enable outputs that are not clock gated. */
CLOCK_InitT3RefClk(kCLOCK_T3MciIrc48m);
/* Enable FFRO - T3 PLL 48/60 MHz IRC clock output */
CLOCK_EnableClock(kCLOCK_T3PllMciIrcClk);
/* Enable T3 PLL 256 MHz clock output */
CLOCK_EnableClock(kCLOCK_T3PllMci256mClk);
BOARD_ClockPreConfig();
/* Set core clock to safe system oscillator clock for initialization of other sources. */
CLOCK_AttachClk(kSYSOSC_to_MAIN_CLK);
CLOCK_SetClkDiv(kCLOCK_DivSysCpuAhbClk, 1);
/* Initialize TCPU PLL and enable outputs that are not clock gated. */
CLOCK_InitTcpuRefClk(3120000000UL, kCLOCK_TcpuFlexspiDiv10);
/* Enable TCPU PLL MCI clock output */
CLOCK_EnableClock(kCLOCK_TcpuMciClk);
/* Initialize TDDR PLL and enable outputs that are not clock gated. */
CLOCK_InitTddrRefClk(kCLOCK_TddrFlexspiDiv10);
/* Enable TDDR PLL FlexSPI clock output */
CLOCK_EnableClock(kCLOCK_TddrMciFlexspiClk);
/* Initialize AVPLL and enable both channels. */
CLOCK_InitAvPll(&avpllConfig_BOARD_BootClockRUN);
/* Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kRC32K_to_CLK32K); /* Switch CLK32K to RC32K */
/*!< Please note SYSTICK_CLK source is used only if the SysTick SYST_CSR register CLKSOURCE bit is set to 0. */
CLOCK_AttachClk(kSYSTICK_DIV_to_SYSTICK_CLK); /* Switch SYSTICK_CLK to SYSTICK_DIV */
/* Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAudioPllClk, 1U); /* Set .AUDIOPLLCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivPllFrgClk, 13U); /* Set .FRGPLLCLKDIV divider to value 13 */
CLOCK_SetClkDiv(kCLOCK_DivMainPllClk, 1U); /* Set .MAINPLLCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivAux0PllClk, 1U); /* Set .AUX0PLLCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U); /* Set .SYSTICKFCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivPmuFclk, 5U); /* Set .PMUFCLKDIV divider to value 5 */
/* Select the main clock source for the main system clock (MAINCLKSELA and MAINCLKSELB). */
CLOCK_AttachClk(kMAIN_PLL_to_MAIN_CLK);
BOARD_ClockPostConfig();
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_HCLK;
}
/*******************************************************************************
********************** Configuration BOARD_BootClockLPR ***********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockLPR
outputs:
- {id: aux0_pll_clk.outFreq, value: 260 MHz}
- {id: clk_32k.outFreq, value: 32 kHz}
- {id: clk_pmu_sys.outFreq, value: 52 MHz}
- {id: els_128m_clk.outFreq, value: 128 MHz}
- {id: els_256m_clk.outFreq, value: 256 MHz}
- {id: els_64m_clk.outFreq, value: 64 MHz}
- {id: hclk.outFreq, value: 260 MHz}
- {id: main_clk.outFreq, value: 260 MHz}
- {id: main_pll_clk.outFreq, value: 260 MHz}
- {id: otp_fuse_32m_clk.outFreq, value: 32 MHz}
- {id: refclk_phy.outFreq, value: 40 MHz}
- {id: refclk_sys.outFreq, value: 40 MHz}
- {id: sfro_clk_i.outFreq, value: 16 MHz}
- {id: systick_fclk.outFreq, value: 260 MHz}
- {id: t3pll_mci_256m.outFreq, value: 256 MHz}
- {id: tcpu_mci_clk.outFreq, value: 260 MHz}
settings:
- {id: AVPLL_Init_Config, value: Disabled}
- {id: CAU_SLP_CLK_Config, value: Disabled}
- {id: CLKCTL0.MAINCLKSELB.sel, value: CLKCTL0.MAINPLLCLKDIV}
- {id: CLKCTL0.MAINPLLCLKDIV.scale, value: '1', locked: true}
- {id: CLKCTL0.SYSOSCBYPASS_SEL.sel, value: NO_CLOCK}
- {id: CLKCTL0.SYSTICKFCLKSEL.sel, value: CLKCTL0.SYSTICKFCLKDIV}
- {id: CLKCTL1.CLKOUTSEL1.sel, value: CLKCTL1.CLKOUTSEL0}
- {id: CLKCTL1.CLKOUTSEL2.sel, value: CLKCTL1.CLKOUTSEL1}
- {id: CLKCTL1.FRGPLLCLKDIV.scale, value: '13', locked: true}
- {id: SYSCTL2.T3_FBDIV.scale, value: '64'}
- {id: SYSCTL2.TCPU_FBDIV.scale, value: '78', locked: true}
- {id: SYSCTL2.TCPU_MCI_FLEXSPI_CLK_DIV.scale, value: '10', locked: true}
- {id: SYSCTL2.TCPU_REFDIV.scale, value: '1', locked: true}
- {id: T3PLL_MCI_213P3M_Config, value: Disabled}
- {id: T3PLL_MCI_48_60M_IRC_Config, value: Disabled}
- {id: T3PLL_MCI_FLEXSPI_Config, value: Disabled}
- {id: TCPU_MCI_FLEXSPI_CLK_Config, value: Disabled}
- {id: TDDR_MCI_ENET_CLK_Config, value: Disabled}
- {id: TDDR_MCI_FLEXSPI_CLK_Config, value: Disabled}
- {id: TDDR_PLL_Init_Config, value: Disabled}
sources:
- {id: CAU.XTAL_OSC.outFreq, value: 40 MHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockLPR configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockLPR configuration
******************************************************************************/
void BOARD_BootClockLPR(void)
{
/* Disable GDET and VSensors */
POWER_DisableGDetVSensors();
/* Enable CAU sleep clock for PMU */
if ((PMU->CAU_SLP_CTRL & PMU_CAU_SLP_CTRL_SOC_SLP_RDY_MASK) == 0U)
{
/* Enable the CAU sleep clock. */
CLOCK_EnableClock(kCLOCK_RefClkCauSlp);
}
if ((SYSCTL2->SOURCE_CLK_GATE & SYSCTL2_SOURCE_CLK_GATE_REFCLK_SYS_CG_MASK) != 0U)
{
/* Enable the REFCLK_SYS clock. */
CLOCK_EnableClock(kCLOCK_RefClkSys);
}
/* Initialize T3 PLL and enable outputs that are not clock gated. */
CLOCK_InitT3RefClk(kCLOCK_T3MciIrc48m);
/* Enable T3 PLL 256 MHz clock output */
CLOCK_EnableClock(kCLOCK_T3PllMci256mClk);
BOARD_ClockPreConfig();
/* Set core clock to safe system oscillator clock for initialization of other sources. */
CLOCK_AttachClk(kSYSOSC_to_MAIN_CLK);
CLOCK_SetClkDiv(kCLOCK_DivSysCpuAhbClk, 1);
/* Initialize TCPU PLL and enable outputs that are not clock gated. */
CLOCK_InitTcpuRefClk(3120000000UL, kCLOCK_TcpuFlexspiDiv10);
/* Enable TCPU PLL MCI clock output */
CLOCK_EnableClock(kCLOCK_TcpuMciClk);
/* Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kRC32K_to_CLK32K); /* Switch CLK32K to RC32K */
/*!< Please note SYSTICK_CLK source is used only if the SysTick SYST_CSR register CLKSOURCE bit is set to 0. */
CLOCK_AttachClk(kSYSTICK_DIV_to_SYSTICK_CLK); /* Switch SYSTICK_CLK to SYSTICK_DIV */
/* Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivPllFrgClk, 13U); /* Set .FRGPLLCLKDIV divider to value 13 */
CLOCK_SetClkDiv(kCLOCK_DivMainPllClk, 1U); /* Set .MAINPLLCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivAux0PllClk, 1U); /* Set .AUX0PLLCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U); /* Set .SYSTICKFCLKDIV divider to value 1 */
CLOCK_SetClkDiv(kCLOCK_DivPmuFclk, 5U); /* Set .PMUFCLKDIV divider to value 5 */
/* Select the main clock source for the main system clock (MAINCLKSELA and MAINCLKSELB). */
CLOCK_AttachClk(kMAIN_PLL_to_MAIN_CLK);
/* Deinitialization of the AVPLL. */
CLOCK_DeinitAvPll();
/* Deinitialize TDDR PLL. */
CLOCK_DeinitTddrRefClk();
BOARD_ClockPostConfig();
/*!< Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKLPR_HCLK;
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/board/clock_config.h
+198
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/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockRUN configuration
******************************************************************************/
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKRUN_AUDIO_PLL_CLK 12287999UL /* Clock consumers of audio_pll_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_AUX0_PLL_CLK 260000000UL /* Clock consumers of aux0_pll_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_AUX1_PLL_CLK 0UL /* Clock consumers of aux1_pll_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_AVPLL_CH1_CLKOUT 12287999UL /* Clock consumers of avpll_ch1_clkout output : N/A */
#define BOARD_BOOTCLOCKRUN_AVPLL_CH2_CLKOUT 63999997UL /* Clock consumers of avpll_ch2_clkout output : N/A */
#define BOARD_BOOTCLOCKRUN_CAU_SLP_CLK 4000000UL /* Clock consumers of cau_slp_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_CLK_32K 32000UL /* Clock consumers of clk_32k output : RTC */
#define BOARD_BOOTCLOCKRUN_CLK_OUT 0UL /* Clock consumers of clk_out output : N/A */
#define BOARD_BOOTCLOCKRUN_CLK_PMU_SYS 52000000UL /* Clock consumers of clk_pmu_sys output : PMU */
#define BOARD_BOOTCLOCKRUN_CTIMER0_FCLK 0UL /* Clock consumers of ctimer0_fclk output : CTIMER0 */
#define BOARD_BOOTCLOCKRUN_CTIMER1_FCLK 0UL /* Clock consumers of ctimer1_fclk output : CTIMER1 */
#define BOARD_BOOTCLOCKRUN_CTIMER2_FCLK 0UL /* Clock consumers of ctimer2_fclk output : CTIMER2 */
#define BOARD_BOOTCLOCKRUN_CTIMER3_FCLK 0UL /* Clock consumers of ctimer3_fclk output : CTIMER3 */
#define BOARD_BOOTCLOCKRUN_DMIC_FCLK 0UL /* Clock consumers of dmic_fclk output : DMIC0 */
#define BOARD_BOOTCLOCKRUN_ELS_128M_CLK 128000000UL /* Clock consumers of els_128m_clk output : ELS */
#define BOARD_BOOTCLOCKRUN_ELS_256M_CLK 256000000UL /* Clock consumers of els_256m_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_ELS_64M_CLK 64000000UL /* Clock consumers of els_64m_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_ELS_FCLK 0UL /* Clock consumers of els_fclk output : ELS */
#define BOARD_BOOTCLOCKRUN_FFRO_CLK_DIV4 12075471UL /* Clock consumers of ffro_clk_div4 output : N/A */
#define BOARD_BOOTCLOCKRUN_FLEXCOMM0_FCLK 0UL /* Clock consumers of flexcomm0_fclk output : FLEXCOMM0 */
#define BOARD_BOOTCLOCKRUN_FLEXCOMM14_FCLK 0UL /* Clock consumers of flexcomm14_fclk output : FLEXCOMM14 */
#define BOARD_BOOTCLOCKRUN_FLEXCOMM1_FCLK 0UL /* Clock consumers of flexcomm1_fclk output : FLEXCOMM1 */
#define BOARD_BOOTCLOCKRUN_FLEXCOMM2_FCLK 0UL /* Clock consumers of flexcomm2_fclk output : FLEXCOMM2 */
#define BOARD_BOOTCLOCKRUN_FLEXCOMM3_FCLK 0UL /* Clock consumers of flexcomm3_fclk output : FLEXCOMM3 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI_FCLK 0UL /* Clock consumers of flexspi_fclk output : FLEXSPI */
#define BOARD_BOOTCLOCKRUN_GAU_FCLK 0UL /* Clock consumers of gau_fclk output : GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1 */
#define BOARD_BOOTCLOCKRUN_HCLK 260000000UL /* Clock consumers of hclk output : AHB_SECURE_CTRL, APU0, APU1, BLEAPU, BLECTRL, BUCK11, BUCK18, CACHE64_CTRL0, CACHE64_CTRL1, CACHE64_POLSEL0, CACHE64_POLSEL1, CAU, CDOG, CLKCTL0, CLKCTL1, CRC, CTIMER0, CTIMER1, CTIMER2, CTIMER3, DMA0, DMA1, DMIC0, ELS, ENET, FLEXCOMM0, FLEXCOMM1, FLEXCOMM14, FLEXCOMM2, FLEXCOMM3, FLEXSPI, FREQME, GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1, GDMA, GPIO, INPUTMUX, ITRC, LCDIC, MCI_IO_MUX, MRT0, MRT1, OCOTP, OSTIMER, PINT, PKC, PMU, POWERQUAD, PUF, ROMCP, RSTCTL0, RSTCTL1, RTC, SCT0, SDU_FBR_CARD, SDU_FN0_CARD, SDU_FN_CARD, SECGPIO, SENSOR_CTRL, SOCCTRL, SOC_OTP_CTRL, SYSCTL0, SYSCTL1, SYSCTL2, SysTick, TRNG, USBOTG, USIM, UTICK, WLAPU, WLCTRL, WWDT0 */
#define BOARD_BOOTCLOCKRUN_LCD_FCLK 0UL /* Clock consumers of lcd_fclk output : LCDIC */
#define BOARD_BOOTCLOCKRUN_LPOSC_CLK_I 1000000UL /* Clock consumers of lposc_clk_i output : N/A */
#define BOARD_BOOTCLOCKRUN_MAIN_CLK 260000000UL /* Clock consumers of main_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_MAIN_PLL_CLK 260000000UL /* Clock consumers of main_pll_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_MCLK_OUT 0UL /* Clock consumers of mclk_out output : N/A */
#define BOARD_BOOTCLOCKRUN_OSEVENT_FCLK 0UL /* Clock consumers of osevent_fclk output : OSTIMER */
#define BOARD_BOOTCLOCKRUN_OTP_FUSE_32M_CLK 32000000UL /* Clock consumers of otp_fuse_32m_clk output : OCOTP */
#define BOARD_BOOTCLOCKRUN_REFCLK_PHY 40000000UL /* Clock consumers of refclk_phy output : USBOTG */
#define BOARD_BOOTCLOCKRUN_REFCLK_SYS 0UL /* Clock consumers of refclk_sys output : N/A */
#define BOARD_BOOTCLOCKRUN_SCT_FCLK 0UL /* Clock consumers of sct_fclk output : SCT0 */
#define BOARD_BOOTCLOCKRUN_SFRO_CLK_I 16000000UL /* Clock consumers of sfro_clk_i output : N/A */
#define BOARD_BOOTCLOCKRUN_SYSOSC_CLK_I 0UL /* Clock consumers of sysosc_clk_i output : N/A */
#define BOARD_BOOTCLOCKRUN_SYSTICK_FCLK 260000000UL /* Clock consumers of systick_fclk output : SysTick */
#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_213P3M 0UL /* Clock consumers of t3pll_mci_213p3m output : N/A */
#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_256M 256000000UL /* Clock consumers of t3pll_mci_256m output : N/A */
#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_48_60M_IRC 48301886UL /* Clock consumers of t3pll_mci_48_60m_irc output : N/A */
#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_FLEXSPI_CLK 0UL /* Clock consumers of t3pll_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_TCPU_MCI_CLK 260000000UL /* Clock consumers of tcpu_mci_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_TCPU_MCI_FLEXSPI_CLK 0UL /* Clock consumers of tcpu_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_TDDR_MCI_ENET_CLK 0UL /* Clock consumers of tddr_mci_enet_clk output : ENET */
#define BOARD_BOOTCLOCKRUN_TDDR_MCI_FLEXSPI_CLK 320000000UL /* Clock consumers of tddr_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKRUN_USIM_FCLK 0UL /* Clock consumers of usim_fclk output : USIM */
#define BOARD_BOOTCLOCKRUN_UTICK_FCLK 0UL /* Clock consumers of utick_fclk output : UTICK */
#define BOARD_BOOTCLOCKRUN_WDT0_FCLK 0UL /* Clock consumers of wdt0_fclk output : WWDT0 */
/*! @brief AVPLL set for BOARD_BootClockRUN configuration.
*/
extern const clock_avpll_config_t avpllConfig_BOARD_BootClockRUN;
/*! @brief Clock pre-initialization function.
*/
extern void BOARD_ClockPreConfig(void);
/*! @brief Clock post-initialization function.
*/
extern void BOARD_ClockPostConfig(void);
/*******************************************************************************
* API for BOARD_BootClockRUN configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockRUN(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
********************** Configuration BOARD_BootClockLPR ***********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockLPR configuration
******************************************************************************/
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKLPR_AUDIO_PLL_CLK 0UL /* Clock consumers of audio_pll_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_AUX0_PLL_CLK 260000000UL /* Clock consumers of aux0_pll_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_AUX1_PLL_CLK 0UL /* Clock consumers of aux1_pll_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_AVPLL_CH1_CLKOUT 0UL /* Clock consumers of avpll_ch1_clkout output : N/A */
#define BOARD_BOOTCLOCKLPR_AVPLL_CH2_CLKOUT 0UL /* Clock consumers of avpll_ch2_clkout output : N/A */
#define BOARD_BOOTCLOCKLPR_CAU_SLP_CLK 0UL /* Clock consumers of cau_slp_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_CLK_32K 32000UL /* Clock consumers of clk_32k output : RTC */
#define BOARD_BOOTCLOCKLPR_CLK_OUT 0UL /* Clock consumers of clk_out output : N/A */
#define BOARD_BOOTCLOCKLPR_CLK_PMU_SYS 52000000UL /* Clock consumers of clk_pmu_sys output : PMU */
#define BOARD_BOOTCLOCKLPR_CTIMER0_FCLK 0UL /* Clock consumers of ctimer0_fclk output : CTIMER0 */
#define BOARD_BOOTCLOCKLPR_CTIMER1_FCLK 0UL /* Clock consumers of ctimer1_fclk output : CTIMER1 */
#define BOARD_BOOTCLOCKLPR_CTIMER2_FCLK 0UL /* Clock consumers of ctimer2_fclk output : CTIMER2 */
#define BOARD_BOOTCLOCKLPR_CTIMER3_FCLK 0UL /* Clock consumers of ctimer3_fclk output : CTIMER3 */
#define BOARD_BOOTCLOCKLPR_DMIC_FCLK 0UL /* Clock consumers of dmic_fclk output : DMIC0 */
#define BOARD_BOOTCLOCKLPR_ELS_128M_CLK 128000000UL /* Clock consumers of els_128m_clk output : ELS */
#define BOARD_BOOTCLOCKLPR_ELS_256M_CLK 256000000UL /* Clock consumers of els_256m_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_ELS_64M_CLK 64000000UL /* Clock consumers of els_64m_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_ELS_FCLK 0UL /* Clock consumers of els_fclk output : ELS */
#define BOARD_BOOTCLOCKLPR_FFRO_CLK_DIV4 0UL /* Clock consumers of ffro_clk_div4 output : N/A */
#define BOARD_BOOTCLOCKLPR_FLEXCOMM0_FCLK 0UL /* Clock consumers of flexcomm0_fclk output : FLEXCOMM0 */
#define BOARD_BOOTCLOCKLPR_FLEXCOMM14_FCLK 0UL /* Clock consumers of flexcomm14_fclk output : FLEXCOMM14 */
#define BOARD_BOOTCLOCKLPR_FLEXCOMM1_FCLK 0UL /* Clock consumers of flexcomm1_fclk output : FLEXCOMM1 */
#define BOARD_BOOTCLOCKLPR_FLEXCOMM2_FCLK 0UL /* Clock consumers of flexcomm2_fclk output : FLEXCOMM2 */
#define BOARD_BOOTCLOCKLPR_FLEXCOMM3_FCLK 0UL /* Clock consumers of flexcomm3_fclk output : FLEXCOMM3 */
#define BOARD_BOOTCLOCKLPR_FLEXSPI_FCLK 0UL /* Clock consumers of flexspi_fclk output : FLEXSPI */
#define BOARD_BOOTCLOCKLPR_GAU_FCLK 0UL /* Clock consumers of gau_fclk output : GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1 */
#define BOARD_BOOTCLOCKLPR_HCLK 260000000UL /* Clock consumers of hclk output : AHB_SECURE_CTRL, APU0, APU1, BLEAPU, BLECTRL, BUCK11, BUCK18, CACHE64_CTRL0, CACHE64_CTRL1, CACHE64_POLSEL0, CACHE64_POLSEL1, CAU, CDOG, CLKCTL0, CLKCTL1, CRC, CTIMER0, CTIMER1, CTIMER2, CTIMER3, DMA0, DMA1, DMIC0, ELS, ENET, FLEXCOMM0, FLEXCOMM1, FLEXCOMM14, FLEXCOMM2, FLEXCOMM3, FLEXSPI, FREQME, GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1, GDMA, GPIO, INPUTMUX, ITRC, LCDIC, MCI_IO_MUX, MRT0, MRT1, OCOTP, OSTIMER, PINT, PKC, PMU, POWERQUAD, PUF, ROMCP, RSTCTL0, RSTCTL1, RTC, SCT0, SDU_FBR_CARD, SDU_FN0_CARD, SDU_FN_CARD, SECGPIO, SENSOR_CTRL, SOCCTRL, SOC_OTP_CTRL, SYSCTL0, SYSCTL1, SYSCTL2, SysTick, TRNG, USBOTG, USIM, UTICK, WLAPU, WLCTRL, WWDT0 */
#define BOARD_BOOTCLOCKLPR_LCD_FCLK 0UL /* Clock consumers of lcd_fclk output : LCDIC */
#define BOARD_BOOTCLOCKLPR_LPOSC_CLK_I 0UL /* Clock consumers of lposc_clk_i output : N/A */
#define BOARD_BOOTCLOCKLPR_MAIN_CLK 260000000UL /* Clock consumers of main_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_MAIN_PLL_CLK 260000000UL /* Clock consumers of main_pll_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_MCLK_OUT 0UL /* Clock consumers of mclk_out output : N/A */
#define BOARD_BOOTCLOCKLPR_OSEVENT_FCLK 0UL /* Clock consumers of osevent_fclk output : OSTIMER */
#define BOARD_BOOTCLOCKLPR_OTP_FUSE_32M_CLK 32000000UL /* Clock consumers of otp_fuse_32m_clk output : OCOTP */
#define BOARD_BOOTCLOCKLPR_REFCLK_PHY 40000000UL /* Clock consumers of refclk_phy output : USBOTG */
#define BOARD_BOOTCLOCKLPR_REFCLK_SYS 40000000UL /* Clock consumers of refclk_sys output : N/A */
#define BOARD_BOOTCLOCKLPR_SCT_FCLK 0UL /* Clock consumers of sct_fclk output : SCT0 */
#define BOARD_BOOTCLOCKLPR_SFRO_CLK_I 16000000UL /* Clock consumers of sfro_clk_i output : N/A */
#define BOARD_BOOTCLOCKLPR_SYSOSC_CLK_I 0UL /* Clock consumers of sysosc_clk_i output : N/A */
#define BOARD_BOOTCLOCKLPR_SYSTICK_FCLK 260000000UL /* Clock consumers of systick_fclk output : SysTick */
#define BOARD_BOOTCLOCKLPR_T3PLL_MCI_213P3M 0UL /* Clock consumers of t3pll_mci_213p3m output : N/A */
#define BOARD_BOOTCLOCKLPR_T3PLL_MCI_256M 256000000UL /* Clock consumers of t3pll_mci_256m output : N/A */
#define BOARD_BOOTCLOCKLPR_T3PLL_MCI_48_60M_IRC 0UL /* Clock consumers of t3pll_mci_48_60m_irc output : N/A */
#define BOARD_BOOTCLOCKLPR_T3PLL_MCI_FLEXSPI_CLK 0UL /* Clock consumers of t3pll_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_TCPU_MCI_CLK 260000000UL /* Clock consumers of tcpu_mci_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_TCPU_MCI_FLEXSPI_CLK 0UL /* Clock consumers of tcpu_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_TDDR_MCI_ENET_CLK 0UL /* Clock consumers of tddr_mci_enet_clk output : ENET */
#define BOARD_BOOTCLOCKLPR_TDDR_MCI_FLEXSPI_CLK 0UL /* Clock consumers of tddr_mci_flexspi_clk output : N/A */
#define BOARD_BOOTCLOCKLPR_USIM_FCLK 0UL /* Clock consumers of usim_fclk output : USIM */
#define BOARD_BOOTCLOCKLPR_UTICK_FCLK 0UL /* Clock consumers of utick_fclk output : UTICK */
#define BOARD_BOOTCLOCKLPR_WDT0_FCLK 0UL /* Clock consumers of wdt0_fclk output : WWDT0 */
/*******************************************************************************
* API for BOARD_BootClockLPR configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockLPR(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/mcuxClEls_GlitchDetector.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_GlitchDetector.h
* @brief ELS header for controlling the glitch detector.
*
* This header exposes functions that configure the ELS glitch detector.
*/
#ifndef MCUXCLELS_GLITCHDETECTOR_H_
#define MCUXCLELS_GLITCHDETECTOR_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common types & functionality
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup mcuxClEls_GlitchDetector mcuxClEls_GlitchDetector
* @brief This part of the @ref mcuxClEls driver supports glitch detector functionality
* @ingroup mcuxClEls
* @{
*/
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_GlitchDetector_Macros mcuxClEls_GlitchDetector_Macros
* @brief Defines all macros of @ref mcuxClEls_GlitchDetector
* @ingroup mcuxClEls_GlitchDetector
* @{
*/
#define MCUXCLELS_GLITCHDETECTOR_CFG_SIZE ((size_t) 0x18u) ///< Glitch detector configuration size
#define MCUXCLELS_GLITCHDETECTOR_TRIM_SIZE ((size_t) 0x04u) ///< Glitch detector trim value size
/**
* @}
*/ /* mcuxClEls_GlitchDetector_Macros */
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_GlitchDetector_Functions mcuxClEls_GlitchDetector_Functions
* @brief Defines all functions of @ref mcuxClEls_GlitchDetector
* @ingroup mcuxClEls_GlitchDetector
* @{
*/
/**
* @brief Loads a glitch detector configuration.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] Pointer to the memory area which contains the glitch detector configuration. The size is fixed at #MCUXCLELS_GLITCHDETECTOR_CFG_SIZE bytes.
*
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_LoadConfig_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_LoadConfig_Async(
uint8_t const * pInput
);
/**
* @brief Calculates optimal ELS glitch detector configuration and writes it to system memory.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[out] Pointer to the memory area which receives the glitch detector trim value. The size is fixed at #MCUXCLELS_GLITCHDETECTOR_TRIM_SIZE bytes.
*
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_Trim_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_Trim_Async(
uint8_t * pOutput
);
/**
* @brief Reads the glitch detector's event counter
*
* This function converts the event counter from Gray code to an unsigned number.
*
* @param[in] Pointer to the word where the counter value will be stored.
*
* @retval #MCUXCLELS_STATUS_OK on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_GetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_GetEventCounter(
uint8_t * pCount
);
/**
* @brief Resets the glitch detector's event counter
*
* @retval #MCUXCLELS_STATUS_OK on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_ResetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_ResetEventCounter( void
);
/**
* @}
*/ /* mcuxClEls_GlitchDetector_Functions */
/**
* @}
*/ /* mcuxClEls_GlitchDetector */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_GLITCHDETECTOR_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClAeadModes_MemoryConsumption.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClAeadModes_MemoryConsumption.h
* @brief Defines the memory consumption for the clAeadModes component */
#ifndef MCUXCLAEADMODES_MEMORYCONSUMPTION_H_
#define MCUXCLAEADMODES_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/**
* @defgroup mcuxClAead_MemoryConsumption mcuxClAead_MemoryConsumption
* @brief Defines the memory consumption for the mcuxClAead component
* All work area sizes in bytes are a multiple of CPU wordsize.
* @ingroup mcuxClAead
* @{
*/
#define MCUXCLAEAD_CRYPT_CPU_WA_BUFFER_SIZE (124u)
#define MCUXCLAEAD_CRYPT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_CRYPT_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_INIT_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLAEAD_INIT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_INIT_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_PROCESS_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLAEAD_PROCESS_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_PROCESS_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_PROCESS_ADATA_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLAEAD_PROCESS_ADATA_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_PROCESS_ADATA_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_FINISH_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLAEAD_FINISH_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_FINISH_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_VERIFY_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLAEAD_VERIFY_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_VERIFY_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_MAX_CPU_WA_BUFFER_SIZE (124u)
#define MCUXCLAEAD_MAX_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_MAX_CPU_WA_BUFFER_SIZE )
#define MCUXCLAEAD_CONTEXT_SIZE (124u)
#define MCUXCLAEAD_CONTEXT_SIZE_IN_WORDS (MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_CONTEXT_SIZE))
/** @def MCUXCLAEAD_WA_SIZE_MAX
* @brief Define the max workarea size in bytes required for this component.
* Work area sizes in bytes are a multiple of CPU wordsize.
*/
#define MCUXCLAEAD_WA_SIZE_MAX (124u)
#define MCUXCLAEAD_WA_SIZE_IN_WORDS_MAX (MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLAEAD_WA_SIZE_MAX))
/**
* @}
*/ /* mcuxClAead_MemoryConsumption */
#endif /* MCUXCLAEADMODES_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClCipherModes_MemoryConsumption.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClCipher_MemoryConsumption.h
* @brief Memory consumption of the mcuxClCipher component
* All work area sizes in bytes are a multiple of CPU wordsize.
*/
#ifndef MCUXCLCIPHER_MEMORYCONSUMPTION_H_
#define MCUXCLCIPHER_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/* Workarea sizes */
#define MCUXCLCIPHER_AES_CRYPT_CPU_WA_BUFFER_SIZE (48u)
#define MCUXCLCIPHER_AES_CRYPT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLCIPHER_AES_CRYPT_CPU_WA_BUFFER_SIZE)
#define MCUXCLCIPHER_AES_INIT_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLCIPHER_AES_PROCESS_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLCIPHER_AES_FINISH_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLCIPHER_AES_INIT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLCIPHER_AES_INIT_CPU_WA_BUFFER_SIZE)
#define MCUXCLCIPHER_AES_PROCESS_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLCIPHER_AES_PROCESS_CPU_WA_BUFFER_SIZE)
#define MCUXCLCIPHER_AES_FINISH_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLCIPHER_AES_FINISH_CPU_WA_BUFFER_SIZE)
#define MCUXCLCIPHER_MAX_AES_CPU_WA_BUFFER_SIZE (MCUXCLCIPHER_AES_CRYPT_CPU_WA_BUFFER_SIZE)
#define MCUXCLCIPHER_MAX_AES_CPU_WA_BUFFER_SIZE_IN_WORDS (MCUXCLCIPHER_AES_CRYPT_CPU_WA_BUFFER_SIZE_IN_WORDS)
/* Context sizes */
#define MCUXCLCIPHER_AES_CONTEXT_SIZE (48u)
#define MCUXCLCIPHER_AES_CONTEXT_SIZE_IN_WORDS (MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLCIPHER_AES_CONTEXT_SIZE))
#endif /* MCUXCLCIPHER_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClEcc_MemoryConsumption.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEcc_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClEcc component
*/
#ifndef MCUXCLECC_MEMORYCONSUMPTION_H_
#define MCUXCLECC_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/**
* @defgroup mcuxClEcc_MemoryConsumption mcuxClEcc_MemoryConsumption
* @brief Defines the memory consumption for the @ref mcuxClEcc component
* @ingroup mcuxClEcc
* @{
*/
/**
* @addtogroup MCUXCLECC_WACPU_
* @brief Define the CPU workarea size required by mcuxClEcc APIs.
* @{
*/
#define MCUXCLECC_KEYGEN_WACPU_SIZE 504u ///< CPU workarea size (in bytes) for #mcuxClEcc_KeyGen.
#define MCUXCLECC_SIGN_WACPU_SIZE 504u ///< CPU workarea size (in bytes) for #mcuxClEcc_Sign.
#ifdef MCUXCL_FEATURE_ECC_ECDSA_DETERMINISTIC
#define MCUXCLECC_SIGN_DETERMINISTIC_ECDSA_WACPU_SIZE $(mcuxClEcc_Sign_DeterministicECDSA_WaCPU_SIZE)u ///< CPU workarea size (in bytes) for #mcuxClEcc_Sign.
#endif /* MCUXCL_FEATURE_ECC_ECDSA_DETERMINISTIC */
#define MCUXCLECC_VERIFY_WACPU_SIZE 424u ///< CPU workarea size (in bytes) for #mcuxClEcc_Verify.
#define MCUXCLECC_POINTMULT_WACPU_SIZE 416u ///< CPU workarea size (in bytes) for #mcuxClEcc_PointMult.
/**
* @}
*/ /* MCUXCLECC_WACPU_ */
/**
* @addtogroup MCUXCLECC_MONTDH_WACPU_
* @brief Define the CPU workarea size required by mcuxClEcc MontDH APIs.
* @{
*/
#define MCUXCLECC_MONTDH_GENERATEKEYPAIR_CURVE25519_WACPU_SIZE 444u ///< CPU workarea size (in bytes) for #mcuxClEcc_MontDH_GenerateKeyPair.
#define MCUXCLECC_MONTDH_GENERATEKEYPAIR_CURVE448_WACPU_SIZE 468u ///< CPU workarea size (in bytes) for #mcuxClEcc_MontDH_GenerateKeyPair.
#define MCUXCLECC_MONTDH_KEYAGREEMENT_CURVE25519_WACPU_SIZE 88u ///< CPU workarea size (in bytes) for #mcuxClEcc_MontDH_KeyAgreement.
#define MCUXCLECC_MONTDH_KEYAGREEMENT_CURVE448_WACPU_SIZE 88u ///< CPU workarea size (in bytes) for #mcuxClEcc_MontDH_KeyAgreement.
/**
* @}
*/ /* MCUXCLECC_MONTDH_WACPU_ */
/**
* @addtogroup MCUXCLECC_EDDSA_WACPU_
* @brief Define the CPU workarea size required by mcuxClEcc EdDSA APIs.
* @{
*/
#define MCUXCLECC_EDDSA_GENERATEKEYPAIR_ED25519_WACPU_SIZE 680u ///< CPU workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateKeyPair for Ed25519.
#define MCUXCLECC_EDDSA_GENERATESIGNATURE_ED25519_WACPU_SIZE 540u ///< CPU workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateSignature for Ed25519.
#define MCUXCLECC_EDDSA_VERIFYSIGNATURE_ED25519_WACPU_SIZE 540u ///< CPU workarea size (in bytes) for #mcuxClEcc_EdDSA_VerifySignature for Ed25519.
/**
* @}
*/ /* MCUXCLECC_EDDSA_WACPU_ */
/**
* @addtogroup MCUXCLECC_WAPKC_
* @brief Define the PKC workarea size required by mcuxClEcc APIs.
* @{
*/
/**
* @brief PKC wordsize in ECC component.
*/
#define MCUXCLECC_PKC_WORDSIZE 8u
/**
* PKC workarea size (in bytes) for #mcuxClEcc_KeyGen for arbitrary lengths of p and n.
*/
#define MCUXCLECC_KEYGEN_WAPKC_SIZE(pByteLen,nByteLen) \
(24u * (MCUXCLCORE_ALIGN_TO_WORDSIZE(MCUXCLECC_PKC_WORDSIZE, MCUXCLCORE_MAX(pByteLen,nByteLen)) + MCUXCLECC_PKC_WORDSIZE))
#define MCUXCLECC_KEYGEN_WAPKC_SIZE_128 (576u)
#define MCUXCLECC_KEYGEN_WAPKC_SIZE_256 (960u)
#define MCUXCLECC_KEYGEN_WAPKC_SIZE_384 (1344u)
#define MCUXCLECC_KEYGEN_WAPKC_SIZE_512 (1728u)
#define MCUXCLECC_KEYGEN_WAPKC_SIZE_640 (2112u)
/**
* PKC workarea size (in bytes) for #mcuxClEcc_Sign for arbitrary lengths of p and n.
*/
#define MCUXCLECC_SIGN_WAPKC_SIZE(pByteLen,nByteLen) \
(24u * (MCUXCLCORE_ALIGN_TO_WORDSIZE(MCUXCLECC_PKC_WORDSIZE, MCUXCLCORE_MAX(pByteLen,nByteLen)) + MCUXCLECC_PKC_WORDSIZE))
#define MCUXCLECC_SIGN_WAPKC_SIZE_128 (576u )
#define MCUXCLECC_SIGN_WAPKC_SIZE_256 (960u )
#define MCUXCLECC_SIGN_WAPKC_SIZE_384 (1344u )
#define MCUXCLECC_SIGN_WAPKC_SIZE_512 (1728u )
#define MCUXCLECC_SIGN_WAPKC_SIZE_640 (2112u )
/**
* PKC workarea size (in bytes) for #mcuxClEcc_Verify for arbitrary lengths of p and n.
*/
#define MCUXCLECC_VERIFY_WAPKC_SIZE(pByteLen,nByteLen) \
(28u * (MCUXCLCORE_ALIGN_TO_WORDSIZE(MCUXCLECC_PKC_WORDSIZE, MCUXCLCORE_MAX(pByteLen,nByteLen)) + MCUXCLECC_PKC_WORDSIZE))
#define MCUXCLECC_VERIFY_WAPKC_SIZE_128 (672u)
#define MCUXCLECC_VERIFY_WAPKC_SIZE_256 (1120u)
#define MCUXCLECC_VERIFY_WAPKC_SIZE_384 (1568u)
#define MCUXCLECC_VERIFY_WAPKC_SIZE_512 (2016u)
#define MCUXCLECC_VERIFY_WAPKC_SIZE_640 (2464u)
/**
* PKC workarea size (in bytes) for #mcuxClEcc_PointMult for arbitrary lengths of p and n.
*/
#define MCUXCLECC_POINTMULT_WAPKC_SIZE(pByteLen,nByteLen) \
(24u * (MCUXCLCORE_ALIGN_TO_WORDSIZE(MCUXCLECC_PKC_WORDSIZE, MCUXCLCORE_MAX(pByteLen,nByteLen)) + MCUXCLECC_PKC_WORDSIZE))
#define MCUXCLECC_POINTMULT_WAPKC_SIZE_128 (576u)
#define MCUXCLECC_POINTMULT_WAPKC_SIZE_256 (960u)
#define MCUXCLECC_POINTMULT_WAPKC_SIZE_384 (1344u)
#define MCUXCLECC_POINTMULT_WAPKC_SIZE_512 (1728u)
#define MCUXCLECC_POINTMULT_WAPKC_SIZE_640 (2112u)
/**
* @}
*/ /* MCUXCLECC_WAPKC_ */
/**
* @addtogroup MCUXCLECC_MONTDH_WAPKC_
* @brief Define the PKC workarea size required by mcuxClEcc_Mont APIs.
* @{
*/
/**
* PKC workarea size (in bytes) for #mcuxClEcc_MontDH_KeyGeneration.
*/
#define MCUXCLECC_MONTDH_GENERATEKEYPAIR_CURVE25519_WAPKC_SIZE 880u
#define MCUXCLECC_MONTDH_GENERATEKEYPAIR_CURVE448_WAPKC_SIZE 1408u
/**
* PKC workarea size (in bytes) for #mcuxClEcc_MontDH_KeyAgreement.
*/
#define MCUXCLECC_MONTDH_KEYAGREEMENT_CURVE25519_WAPKC_SIZE 880u
#define MCUXCLECC_MONTDH_KEYAGREEMENT_CURVE448_WAPKC_SIZE 1408u
/**
* @}
*/ /* MCUXCLECC_MONTDH_WAPKC_ */
/**
* @addtogroup MCUXCLECC_EDDSA_WAPKC_
* @brief Define the PKC workarea size required by mcuxClEcc EdDSA APIs.
* @{
*/
/**
* PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateKeyPair.
*/
#define MCUXCLECC_EDDSA_GENERATEKEYPAIR_ED25519_WAPKC_SIZE 1760u ///< PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateKeyPair for Ed25519.
/**
* PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateSignature.
*/
#define MCUXCLECC_EDDSA_GENERATESIGNATURE_ED25519_WAPKC_SIZE 1760u ///< PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_GenerateSignature for Ed25519.
/**
* PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_VerifySignature.
*/
#define MCUXCLECC_EDDSA_VERIFYSIGNATURE_ED25519_WAPKC_SIZE 1760u ///< PKC workarea size (in bytes) for #mcuxClEcc_EdDSA_VerifySignature for Ed25519.
/**
* @}
*/ /* MCUXCLECC_EDDSA_WAPKC_ */
/**
* @addtogroup MCUXCLECC_EDDSA_GENKEYPAIR_DESC_SIZE_
* @brief Define for the EdDSA key pair generation descriptor size.
* @{
*/
#define MCUXCLECC_EDDSA_GENERATEKEYPAIR_DESCRIPTOR_SIZE 8u ///< EdDSA key pair generation descriptor size in bytes.
#define MCUXCLECC_EDDSA_GENERATEKEYPAIR_DESCRIPTOR_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLECC_EDDSA_GENERATEKEYPAIR_DESCRIPTOR_SIZE ) ///< EdDSA key pair generation descriptor size in words.
/**
* @}
*/ /* MCUXCLECC_EDDSA_GENKEYPAIR_DESC_SIZE_ */
/**
* @addtogroup MCUXCLECC_EDDSA_SIGNATURE_PROTOCOL_DESC_SIZE_
* @brief Define for the EdDSA signature protocol descriptor size.
* @{
*/
#define MCUXCLECC_EDDSA_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE 20u ///< EdDSA signature generation descriptor size.
#define MCUXCLECC_EDDSA_ED25519_SIZE_SIGNATURE_PROTOCOL_DESCRIPTOR(contextLen) \
(MCUXCLECC_EDDSA_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE + MCUXCLECC_EDDSA_SIZE_HASH_PREFIX(MCUXCLECC_EDDSA_ED25519_DOMPREFIXLEN, (contextLen))) ///< Byte length of an Ed25519 signature protocol descriptor.
#define MCUXCLECC_EDDSA_ED25519_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE_IN_WORD(contextLen) \
MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLECC_EDDSA_ED25519_SIZE_SIGNATURE_PROTOCOL_DESCRIPTOR(contextLen))
/**
* @}
*/ /* MCUXCLECC_EDDSA_SIGNATURE_PROTOCOL_DESC_SIZE_ */
#ifdef MCUXCL_FEATURE_ECC_ECDSA_DETERMINISTIC
/**
* @addtogroup MCUXCLECC_ECDSA_SIGNATURE_PROTOCOL_DESC_SIZE_
* @brief Define for the ECDSA signature protocol descriptor size.
* @{
*/
#define MCUXCLECC_ECDSA_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE 12u ///< ECDSA signature generation descriptor size in bytes.
#define MCUXCLECC_ECDSA_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLECC_ECDSA_SIGNATURE_PROTOCOL_DESCRIPTOR_SIZE) ///< ECDSA signature generation descriptor size in words.
/**
* @}
*/ /* MCUXCLECC_EDDSA_SIGNATURE_PROTOCOL_DESC_SIZE_ */
#endif /* MCUXCL_FEATURE_ECC_ECDSA_DETERMINISTIC */
/**
* @}
*/ /* mcuxClEcc_MemoryConsumption */
#endif /* MCUXCLECC_MEMORYCONSUMPTION_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClHashModes_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClHash component */
#ifndef MCUXCLHASHMODES_MEMORYCONSUMPTION_H_
#define MCUXCLHASHMODES_MEMORYCONSUMPTION_H_
/**
* @defgroup mcuxClHashModes_WoarkareaConsumption mcuxClHashModes_WoarkareaConsumption
* @brief Definitions of workarea sizes for the mcuxClHashModes functions.
* @ingroup mcuxClHash_Constants
* @{
*/
/****************************************************************************/
/* Definitions of workarea buffer sizes for the mcuxClHashModes functions. */
/****************************************************************************/
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA_1 (104u) ///< Defines the workarea size required for mcuxClHash_compute on SHA-1
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA_1 (232u) ///< Defines the workarea size required for mcuxClHash_compare on SHA-1
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA_1 (4u) ///< Defines the workarea size required for mcuxClHash_process on SHA-1
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA_1 (4u) ///< Defines the workarea size required for mcuxClHash_finish on SHA-1
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA_1 (232u) ///< Defines the workarea size required for mcuxClHash_verify on SHA-1
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_224 (96u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-224
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_224 (224u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-224
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_224 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-224
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_224 (60u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-224
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_224 (4u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-224
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_224 (96u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-224
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_224 (96u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-224
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_256 (96u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-256
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_256 (224u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-256
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_256 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-256
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_256 (132u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-256
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_256 (4u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-256
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_256 (96u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-256
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_256 (224u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-256
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_384 (192u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-384
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_384 (288u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-384
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_384 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-384
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_384 (100u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-384
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_384 (4u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-384
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_384 (192u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-384
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_384 (288u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-384
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_512 (192u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_512_224 (192u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512/224
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_SHA2_512_256 (192u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512/256
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_512 (320u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_512_224 (248u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512/224
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_SHA2_512_256 (256u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512/256
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512_224 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512/224
#define MCUXCLHASH_COMPUTE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512_256 (4u) ///< Defines the workarea size required for mcuxClHash_compute on SHA2-512/256
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512 (132u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512_224 (60u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512/224
#define MCUXCLHASH_COMPARE_NONBLOCKING_CPU_WA_BUFFER_SIZE_SHA2_512_256 (68u) ///< Defines the workarea size required for mcuxClHash_compare on SHA2-512/256
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_512 (4u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-512
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_512_224 (192u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-512/224
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_SHA2_512_256 (192u) ///< Defines the workarea size required for mcuxClHash_process on SHA2-512/256
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_512 (192u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-512
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_512_224 (192u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-512/224
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_SHA2_512_256 (192u) ///< Defines the workarea size required for mcuxClHash_finish on SHA2-512/256
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_512 (320u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-512
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_512_224 (248u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-512/224
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_SHA2_512_256 (256u) ///< Defines the workarea size required for mcuxClHash_verify on SHA2-512/256
/** @} */
/**
* @defgroup mcuxClHashModes_ContextSize mcuxClHashModes_ContextSize
* @brief Definitions of context sizes and state sizes for extraction of states of a hash operation.
* @ingroup mcuxClHash_Constants
* @{
*/
/**************************************************************************************************************/
/* Definitions of context sizes and state buffer sizes for mcuxClHash_export_state and mcuxClHash_import_state */
/**************************************************************************************************************/
#define MCUXCLHASH_CONTEXT_SIZE_SHA_1_IN_WORDS (116u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA_1 (28u) ///< Defines the state size required for SHA-1
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_224_IN_WORDS (128u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_224 (40u) ///< Defines the state size required for SHA2-224
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_256_IN_WORDS (128u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_256 (40u) ///< Defines the state size required for SHA2-256
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_384_IN_WORDS (224u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_384 (80u) ///< Defines the state size required for SHA2-384
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_512_IN_WORDS (224u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_512 (80u) ///< Defines the state size required for SHA2-512
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_512_224_IN_WORDS (224u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_512_224 (80u) ///< Defines the state size required for SHA2-512/224
#define MCUXCLHASH_CONTEXT_SIZE_SHA2_512_256_IN_WORDS (224u / sizeof(uint32_t))
#define MCUXCLHASH_EXPORT_IMPORT_STATE_SIZE_SHA2_512_256 (80u) ///< Defines the state size required for SHA2-512/256
/** @} */
#endif /* MCUXCLHASHMODES_MEMORYCONSUMPTION_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClHash_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClHash component */
#ifndef MCUXCLHASH_MEMORYCONSUMPTION_H_
#define MCUXCLHASH_MEMORYCONSUMPTION_H_
#define MCUXCLHASH_COMPUTE_CPU_WA_BUFFER_SIZE_MAX (192u) ///< Defines the max workarea size required for mcuxClHash_compute
#define MCUXCLHASH_COMPARE_CPU_WA_BUFFER_SIZE_MAX (192u) ///< Defines the max workarea size required for mcuxClHash_compare
#define MCUXCLHASH_INIT_CPU_WA_BUFFER_SIZE (4u) ///< Defines the max workarea size required for mcuxClHash_init
#define MCUXCLHASH_PROCESS_CPU_WA_BUFFER_SIZE_MAX (192u) ///< Defines the max workarea size required for mcuxClHash_process
#define MCUXCLHASH_FINISH_CPU_WA_BUFFER_SIZE_MAX (192u) ///< Defines the max workarea size required for mcuxClHash_finish
#define MCUXCLHASH_VERIFY_CPU_WA_BUFFER_SIZE_MAX (192u) ///< Defines the max workarea size required for mcuxClHash_verify
#define MCUXCLHASH_MAX_CPU_WA_BUFFER_SIZE (192u) ///< Defines the max workarea size required for this component
/****************************************************************************/
/* Definitions of context sizes for the mcuxClHash multi-part functions. */
/****************************************************************************/
#define MCUXCLHASH_CONTEXT_SIZE (400u) ///< Defines the maximum size a context might need.
#define MCUXCLHASH_CONTEXT_SIZE_IN_WORDS (400u / sizeof(uint32_t))
#endif /* MCUXCLHASH_MEMORYCONSUMPTION_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClHmac_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClHmac component
* All work area sizes in bytes are a multiple of CPU wordsize.
*/
#ifndef MCUXCLHMAC_MEMORYCONSUMPTION_H_
#define MCUXCLHMAC_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/**
* @defgroup mcuxClHmac_MemoryConsumption mcuxClHmac_MemoryConsumption
* @brief Defines the memory consumption for the mcuxClHmac component
* @ingroup mcuxClHmac
* @{
*/
/* Workarea sizes */
#define MCUXCLHMAC_COMPUTE_CPU_WA_BUFFER_SIZE (360u)
#define MCUXCLHMAC_COMPUTE_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_COMPUTE_CPU_WA_BUFFER_SIZE)
#define MCUXCLHMAC_INIT_CPU_WA_BUFFER_SIZE (360u)
#define MCUXCLHMAC_INIT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_INIT_CPU_WA_BUFFER_SIZE)
#define MCUXCLHMAC_PROCESS_CPU_WA_BUFFER_SIZE (4u)
#define MCUXCLHMAC_PROCESS_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_PROCESS_CPU_WA_BUFFER_SIZE)
#define MCUXCLHMAC_FINISH_CPU_WA_BUFFER_SIZE (168u)
#define MCUXCLHMAC_FINISH_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_FINISH_CPU_WA_BUFFER_SIZE)
#define MCUXCLHMAC_MAX_CPU_WA_BUFFER_SIZE (360u)
#define MCUXCLHMAC_MAX_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_MAX_CPU_WA_BUFFER_SIZE)
/* Context sizes */
#define MCUXCLHMAC_CONTEXT_SIZE_SW (580u)
#define MCUXCLHMAC_CONTEXT_SIZE_SW_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_CONTEXT_SIZE_SW)
#define MCUXCLHMAC_CONTEXT_SIZE_ELS (72u)
#define MCUXCLHMAC_CONTEXT_SIZE_ELS_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_CONTEXT_SIZE_ELS)
#define MCUXCLHMAC_MAX_CONTEXT_SIZE (580u)
#define MCUXCLHMAC_MAX_CONTEXT_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_MAX_CONTEXT_SIZE)
/* Mode descriptor sizes */
#define MCUXCLHMAC_HMAC_MODE_DESCRIPTOR_SIZE (48u)
#define MCUXCLHMAC_HMAC_MODE_DESCRIPTOR_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLHMAC_HMAC_MODE_DESCRIPTOR_SIZE)
/**
* @}
*/ /* mcuxClMac_MemoryConsumption */
#endif /* MCUXCLHMAC_MEMORYCONSUMPTION_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClKey_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClKey component
* All work area sizes in bytes are a multiple of CPU wordsize.
*/
#ifndef MCUXCLKEY_MEMORYCONSUMPTION_H_
#define MCUXCLKEY_MEMORYCONSUMPTION_H_
/**
* @defgroup mcuxClKey_MemoryConsumption mcuxClKey_MemoryConsumption
* @brief Defines the memory consumption for the mcuxClKey component
* @ingroup mcuxClKey
* @{
*/
#define MCUXCLKEY_DESCRIPTOR_SIZE (56u)
#define MCUXCLKEY_DESCRIPTOR_SIZE_IN_WORDS (MCUXCLKEY_DESCRIPTOR_SIZE / sizeof(uint32_t))
#define MCUXCLKEY_TYPEDESCRIPTOR_SIZE (12u)
#define MCUXCLKEY_TYPEDESCRIPTOR_SIZE_IN_WORDS (MCUXCLKEY_TYPEDESCRIPTOR_SIZE / sizeof(uint32_t))
#define MCUXCLKEY_CUSTOMTYPEDESCRIPTOR_SIZE (12u)
#define MCUXCLKEY_CUSTOMTYPEDESCRIPTOR_SIZE_IN_WORDS (MCUXCLKEY_CUSTOMTYPEDESCRIPTOR_SIZE / sizeof(uint32_t))
#ifdef MCUXCL_FEATURE_KEY_DERIVATION
#define MCUXCLKEY_DERIVATION_MODE_DESCRIPTOR_SIZE ($(mcuxClKey_DerivationModeDescriptorSize)u)
#define MCUXCLKEY_DERIVATION_MODE_DESCRIPTOR_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_MODE_DESCRIPTOR_SIZE / sizeof(uint32_t))
#ifdef MCUXCL_FEATURE_KEY_DERIVATION_NIST_SP800_108
#define MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE $(mcuxClKey_derivationEngine_NIST_SP800_108_wa_cpu)u
#define MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_CPU_WA_SIZE / sizeof(uint32_t))
#define MCUXCLKEY_DERIVATION_CM_CPU_WA_SIZE MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE /* deprecated, use MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE instead */
#define MCUXCLKEY_DERIVATION_CM_CPU_WA_SIZE_IN_WORDS MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE_IN_WORDS /* deprecated, use MCUXCLKEY_DERIVATION_NIST_SP800_108_CPU_WA_SIZE_IN_WORDS instead */
#endif /* MCUXCL_FEATURE_KEY_DERIVATION_NIST_SP800_108 */
#ifdef MCUXCL_FEATURE_KEY_DERIVATION_NIST_SP800_56C
#define MCUXCLKEY_DERIVATION_NIST_SP800_56C_CPU_WA_SIZE $(mcuxClKey_derivationEngine_NIST_SP800_56C_wa_cpu)u
#define MCUXCLKEY_DERIVATION_NIST_SP800_56C_CPU_WA_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_NIST_SP800_56C_CPU_WA_SIZE / sizeof(uint32_t))
#endif /* MCUXCL_FEATURE_KEY_DERIVATION_NIST_SP800_56C */
#ifdef MCUXCL_FEATURE_KEY_DERIVATION_HKDF
#define MCUXCLKEY_DERIVATION_HKDF_CPU_WA_SIZE $(mcuxClKey_derivationEngine_HKDF_wa_cpu)u
#define MCUXCLKEY_DERIVATION_HKDF_CPU_WA_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_HKDF_CPU_WA_SIZE / sizeof(uint32_t))
#endif /* MCUXCL_FEATURE_KEY_DERIVATION_HKDF */
#ifdef MCUXCL_FEATURE_KEY_DERIVATION_PBKDF2
#define MCUXCLKEY_DERIVATION_PBKDF2_CPU_WA_SIZE $(mcuxClKey_derivationEngine_PBKDF2_wa_cpu)u
#define MCUXCLKEY_DERIVATION_PBKDF2_CPU_WA_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_PBKDF2_CPU_WA_SIZE / sizeof(uint32_t))
#endif /* MCUXCL_FEATURE_KEY_DERIVATION_PBKDF2 */
#define MCUXCLKEY_DERIVATION_CPU_WA_SIZE $(mcuxClKey_derivation_max_wa_cpu)u
#define MCUXCLKEY_DERIVATION_CPU_WA_SIZE_IN_WORDS (MCUXCLKEY_DERIVATION_CPU_WA_SIZE / sizeof(uint32_t))
#endif /* MCUXCL_FEATURE_KEY_DERIVATION */
/**
* @}
*/ /* mcuxClKey_MemoryConsumption */
#endif /* MCUXCLKEY_MEMORYCONSUMPTION_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMacModes_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClMacModes component
* All work area sizes in bytes are a multiple of CPU wordsize.
*/
#ifndef MCUXCLMACMODES_MEMORYCONSUMPTION_H_
#define MCUXCLMACMODES_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/**
* @defgroup mcuxClMacModes_MemoryConsumption mcuxClMacModes_MemoryConsumption
* @brief Defines the memory consumption for the mcuxClMacModes component
* @ingroup mcuxClMacModes
* @{
*/
/* Workarea sizes */
#define MCUXCLMAC_MAX_CPU_WA_BUFFER_SIZE (16u)
#define MCUXCLMAC_MAX_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_MAX_CPU_WA_BUFFER_SIZE)
#define MCUXCLMAC_COMPUTE_CPU_WA_BUFFER_SIZE (16u)
#define MCUXCLMAC_COMPUTE_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_COMPUTE_CPU_WA_BUFFER_SIZE)
#define MCUXCLMAC_INIT_CPU_WA_BUFFER_SIZE (16u)
#define MCUXCLMAC_INIT_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_INIT_CPU_WA_BUFFER_SIZE)
#define MCUXCLMAC_PROCESS_CPU_WA_BUFFER_SIZE (16u)
#define MCUXCLMAC_PROCESS_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_PROCESS_CPU_WA_BUFFER_SIZE)
#define MCUXCLMAC_FINISH_CPU_WA_BUFFER_SIZE (16u)
#define MCUXCLMAC_FINISH_CPU_WA_BUFFER_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_FINISH_CPU_WA_BUFFER_SIZE)
/* Context sizes */
#define MCUXCLMAC_CONTEXT_SIZE (52u)
#define MCUXCLMAC_CONTEXT_SIZE_IN_WORDS MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLMAC_CONTEXT_SIZE)
/* Mode descriptor sizes */
/**
* @}
*/ /* mcuxClMac_MemoryConsumption */
#endif /* MCUXCLMACMODES_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClRandomModes_MemoryConsumption.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClRandomModes_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClRandom component
*/
#ifndef MCUXCLRANDOMMODES_MEMORYCONSUMPTION_H_
#define MCUXCLRANDOMMODES_MEMORYCONSUMPTION_H_
#include <mcuxClCore_Macros.h>
/**
* @defgroup mcuxClRandomModes_MemoryConsumption mcuxClRandomModes_MemoryConsumption
* @brief Defines the memory consumption for the @ref mcuxClRandom component
* @ingroup mcuxClRandom
* @{
*/
#define MCUXCLRANDOMMODES_PATCHMODE_DESCRIPTOR_SIZE (20u)
#define MCUXCLRANDOMMODES_PATCHMODE_DESCRIPTOR_SIZE_IN_WORDS (MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLRANDOMMODES_PATCHMODE_DESCRIPTOR_SIZE))
#ifdef MCUXCL_FEATURE_RANDOMMODES_TESTMODE
#define MCUXCLRANDOMMODES_TESTMODE_DESCRIPTOR_SIZE (20u)
#define MCUXCLRANDOMMODES_TESTMODE_DESCRIPTOR_SIZE_IN_WORDS (MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLRANDOMMODES_TESTMODE_DESCRIPTOR_SIZE))
#endif
#define MCUXCLRANDOMMODES_MAX_CPU_WA_BUFFER_SIZE (324u)
#define MCUXCLRANDOMMODES_INIT_WACPU_SIZE (312u)
#define MCUXCLRANDOMMODES_RESEED_WACPU_SIZE (280u)
#define MCUXCLRANDOMMODES_GENERATE_WACPU_SIZE (280u)
#define MCUXCLRANDOMMODES_SELFTEST_WACPU_SIZE (324u)
#define MCUXCLRANDOMMODES_UNINIT_WACPU_SIZE (0u)
#define MCUXCLRANDOMMODES_CHECKSECURITYSTRENGTH_WACPU_SIZE (0u)
#define MCUXCLRANDOMMODES_NCINIT_WACPU_SIZE (0u)
#define MCUXCLRANDOMMODES_NCGENERATE_WACPU_SIZE (0u)
#define MCUXCLRANDOMMODES_CREATEPATCHMODE_WACPU_SIZE (0u)
#define MCUXCLRANDOMMODES_CREATETESTMODEFROMNORMALMODE_WACPU_SIZE (0u)
#ifdef MCUXCL_FEATURE_RANDOMMODES_CTRDRBG
#ifdef MCUXCL_FEATURE_RANDOMMODES_SECSTRENGTH_256
#define MCUXCLRANDOMMODES_CTR_DRBG_AES256_CONTEXT_SIZE (64u)
#define MCUXCLRANDOMMODES_CTR_DRBG_AES256_CONTEXT_SIZE_IN_WORDS ((MCUXCLRANDOMMODES_CTR_DRBG_AES256_CONTEXT_SIZE + sizeof(uint32_t) - 1u) / sizeof(uint32_t))
#endif // MCUXCL_FEATURE_RANDOMMODES_SECSTRENGTH_256
#ifdef MCUXCL_FEATURE_RANDOMMODES_SECSTRENGTH_256
#define MCUXCLRANDOMMODES_TESTMODE_CTR_DRBG_AES256_INIT_ENTROPY_SIZE (71u)
#define MCUXCLRANDOMMODES_TESTMODE_CTR_DRBG_AES256_RESEED_ENTROPY_SIZE (55u)
#endif // MCUXCL_FEATURE_RANDOMMODES_SECSTRENGTH_256
#endif /* MCUXCL_FEATURE_RANDOMMODES_CTRDRBG */
/**
* @}
*/ /* mcuxClRandomModes_MemoryConsumption */
#endif /* MCUXCLRANDOMMODES_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClRsa_MemoryConsumption.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClRsa_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClRsa component
*/
#ifndef MCUXCLRSA_MEMORYCONSUMPTION_H_
#define MCUXCLRSA_MEMORYCONSUMPTION_H_
#if defined(MCUXCL_FEATURE_CIPHER_RSA_ENCRYPT) || defined(MCUXCL_FEATURE_CIPHER_RSA_DECRYPT)
#define MCUXCLRSA_CIPHER_MODE_SIZE ($(mcuxClRsa_Cipher_AlgorithmMode_Descriptors_Size)u)
#define MCUXCLRSA_CIPHER_MODE_SIZE_IN_WORD MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(MCUXCLRSA_CIPHER_MODE_SIZE)
#endif /* defined(MCUXCL_FEATURE_CIPHER_RSA_ENCRYPT) || defined(MCUXCL_FEATURE_CIPHER_RSA_DECRYPT) */
#ifdef MCUXCL_FEATURE_CIPHER_RSA_ENCRYPT
/****************************************************************************/
/* Definitions of workarea sizes for the RSA encryption. */
/****************************************************************************/
/**
* @defgroup MCUXCLRSA_ENCRYPT_WA MCUXCLRSA_ENCRYPT_WA
* @brief Definitions of workarea sizes for the RSA encryption.
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_ENCRYPT_1024_WACPU_SIZE ($(mcuxClRsa_Util_Encrypt_1024_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_encrypt function for 1024-bit keys.
#define MCUXCLRSA_ENCRYPT_2048_WACPU_SIZE ($(mcuxClRsa_Util_Encrypt_2048_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_encrypt function for 2048-bit keys.
#define MCUXCLRSA_ENCRYPT_3072_WACPU_SIZE ($(mcuxClRsa_Util_Encrypt_3072_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_encrypt function for 3072-bit keys.
#define MCUXCLRSA_ENCRYPT_4096_WACPU_SIZE ($(mcuxClRsa_Util_Encrypt_4096_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_encrypt function for 4096-bit keys.
#define MCUXCLRSA_ENCRYPT_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_2048_WACPU_SIZE : \
MCUXCLRSA_ENCRYPT_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length.
#define MCUXCLRSA_ENCRYPT_1024_WAPKC_SIZE ($(mcuxClRsa_Util_Encrypt_1024_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_encrypt function for 1024-bit keys.
#define MCUXCLRSA_ENCRYPT_2048_WAPKC_SIZE ($(mcuxClRsa_Util_Encrypt_2048_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_encrypt function for 2048-bit keys.
#define MCUXCLRSA_ENCRYPT_3072_WAPKC_SIZE ($(mcuxClRsa_Util_Encrypt_3072_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_encrypt function for 3072-bit keys.
#define MCUXCLRSA_ENCRYPT_4096_WAPKC_SIZE ($(mcuxClRsa_Util_Encrypt_4096_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_encrypt function for 4096-bit keys.
#define MCUXCLRSA_ENCRYPT_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_3072_WAPKC_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_ENCRYPT_2048_WAPKC_SIZE : \
MCUXCLRSA_ENCRYPT_1024_WAPKC_SIZE))) ///< Macro to extract PKC workarea size to be used with a non-standard key length.
/** @} */
#endif /* MCUXCL_FEATURE_CIPHER_RSA_ENCRYPT */
#ifdef MCUXCL_FEATURE_CIPHER_RSA_DECRYPT
/****************************************************************************/
/* Definitions of workarea sizes for the RSA decryption. */
/****************************************************************************/
/**
* @defgroup MCUXCLRSA_DECRYPT_WA MCUXCLRSA_DECRYPT_WA
* @brief Definitions of workarea sizes for the RSA decryption.
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_DECRYPT_1024_WACPU_SIZE ($(mcuxClRsa_Util_Decrypt_1024_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_decrypt function for 1024-bit keys.
#define MCUXCLRSA_DECRYPT_2048_WACPU_SIZE ($(mcuxClRsa_Util_Decrypt_2048_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_decrypt function for 2048-bit keys.
#define MCUXCLRSA_DECRYPT_3072_WACPU_SIZE ($(mcuxClRsa_Util_Decrypt_3072_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_decrypt function for 3072-bit keys.
#define MCUXCLRSA_DECRYPT_4096_WACPU_SIZE ($(mcuxClRsa_Util_Decrypt_4096_WaCPU)u) ///< Definition of CPU workarea size for the mcuxClRsa_Util_decrypt function for 4096-bit keys.
#define MCUXCLRSA_DECRYPT_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_2048_WACPU_SIZE : \
MCUXCLRSA_DECRYPT_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length.
#define MCUXCLRSA_DECRYPT_1024_WAPKC_SIZE ($(mcuxClRsa_Util_Decrypt_1024_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_decrypt function for 1024-bit keys.
#define MCUXCLRSA_DECRYPT_2048_WAPKC_SIZE ($(mcuxClRsa_Util_Decrypt_2048_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_decrypt function for 2048-bit keys.
#define MCUXCLRSA_DECRYPT_3072_WAPKC_SIZE ($(mcuxClRsa_Util_Decrypt_3072_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_decrypt function for 3072-bit keys.
#define MCUXCLRSA_DECRYPT_4096_WAPKC_SIZE ($(mcuxClRsa_Util_Decrypt_4096_WaPKC)u) ///< Definition of PKC workarea size for the mcuxClRsa_Util_decrypt function for 4096-bit keys.
#define MCUXCLRSA_DECRYPT_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_3072_WAPKC_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_DECRYPT_2048_WAPKC_SIZE : \
MCUXCLRSA_DECRYPT_1024_WAPKC_SIZE))) ///< Macro to extract PKC workarea size to be used with a non-standard key length.
/** @} */
#endif /* MCUXCL_FEATURE_CIPHER_RSA_DECRYPT */
/****************************************************************************/
/* Definitions of workarea sizes for the mcuxClRsa Sign */
/****************************************************************************/
/**
* @defgroup MCUXCLRSA_SIGN_WA MCUXCLRSA_SIGN_WA
* @brief Definitions of workarea sizes for the mcuxClRsa Sign
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_SIGN_PLAIN_NOENCODE_1024_WACPU_SIZE (152u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 1024-bit private plain keys using mode mcuxClRsa_Mode_Sign_NoEncode.
#define MCUXCLRSA_SIGN_PLAIN_NOENCODE_2048_WACPU_SIZE (280u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 2048-bit private plain keys using mode mcuxClRsa_Mode_Sign_NoEncode.
#define MCUXCLRSA_SIGN_PLAIN_NOENCODE_3072_WACPU_SIZE (408u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 3072-bit private plain keys using mode mcuxClRsa_Mode_Sign_NoEncode.
#define MCUXCLRSA_SIGN_PLAIN_NOENCODE_4096_WACPU_SIZE (536u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 4096-bit private plain keys using mode mcuxClRsa_Mode_Sign_NoEncode.
#define MCUXCLRSA_SIGN_PLAIN_NOENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_NOENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_NOENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_NOENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_PLAIN_NOENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATEPLAIN.
#define MCUXCLRSA_SIGN_PLAIN_PSSENCODE_1024_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 1024-bit private plain keys using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PSSENCODE_2048_WACPU_SIZE (280u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 2048-bit private plain keys using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PSSENCODE_3072_WACPU_SIZE (408u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 3072-bit private plain keys using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PSSENCODE_4096_WACPU_SIZE (536u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 4096-bit private plain keys using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PSSENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PSSENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PSSENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PSSENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_PLAIN_PSSENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATEPLAIN.
#define MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_1024_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 1024-bit private plain keys using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_2048_WACPU_SIZE (280u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 2048-bit private plain keys using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_3072_WACPU_SIZE (408u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 3072-bit private plain keys using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_4096_WACPU_SIZE (536u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function for 4096-bit private plain keys using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*.
#define MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_PLAIN_PKCS1V15ENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATEPLAIN.
#define MCUXCLRSA_SIGN_PLAIN_1024_WAPKC_SIZE (1064u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 1024-bit private plain keys.
#define MCUXCLRSA_SIGN_PLAIN_2048_WAPKC_SIZE (1960u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 2048-bit private plain keys.
#define MCUXCLRSA_SIGN_PLAIN_3072_WAPKC_SIZE (2856u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 3072-bit private plain keys.
#define MCUXCLRSA_SIGN_PLAIN_4096_WAPKC_SIZE (3752u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 4096-bit private plain keys.
#define MCUXCLRSA_SIGN_PLAIN_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_3072_WAPKC_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_PLAIN_2048_WAPKC_SIZE : \
MCUXCLRSA_SIGN_PLAIN_1024_WAPKC_SIZE))) ///< Macro to extract PKC workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATEPLAIN.
#define MCUXCLRSA_SIGN_CRT_NOENCODE_1024_WACPU_SIZE (104u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_NoEncode, for 1024-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_NOENCODE_2048_WACPU_SIZE (168u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_NoEncode, for 2048-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_NOENCODE_3072_WACPU_SIZE (232u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_NoEncode, for 3072-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_NOENCODE_4096_WACPU_SIZE (296u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_NoEncode, for 4096-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_NOENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_NOENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_NOENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_NOENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_CRT_NOENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATECRT or MCUXCLRSA_KEY_PRIVATECRT_DFA.
#define MCUXCLRSA_SIGN_CRT_PSSENCODE_1024_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*, for 1024-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PSSENCODE_2048_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*, for 2048-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PSSENCODE_3072_WACPU_SIZE (232u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*, for 3072-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PSSENCODE_4096_WACPU_SIZE (296u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_Pss_Sha2_*, for 4096-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PSSENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PSSENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PSSENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PSSENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_CRT_PSSENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATECRT or MCUXCLRSA_KEY_PRIVATECRT_DFA.
#define MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_1024_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*, for 1024-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_2048_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*, for 2048-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_3072_WACPU_SIZE (232u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*, for 3072-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_4096_WACPU_SIZE (296u) ///< Definition of CPU workarea size for the mcuxClRsa_sign function using mode mcuxClRsa_Mode_Sign_PKCS1v15_Sha2_*, for 4096-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_3072_WACPU_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_2048_WACPU_SIZE : \
MCUXCLRSA_SIGN_CRT_PKCS1V15ENCODE_1024_WACPU_SIZE))) ///< Macro to extract CPU workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATECRT or MCUXCLRSA_KEY_PRIVATECRT_DFA.
#define MCUXCLRSA_SIGN_CRT_1024_WAPKC_SIZE (1000u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 1024-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_2048_WAPKC_SIZE (1896u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 2048-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_3072_WAPKC_SIZE (2792u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 3072-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_4096_WAPKC_SIZE (3688u) ///< Definition of PKC workarea size for the mcuxClRsa_sign function for 4096-bit private CRT keys.
#define MCUXCLRSA_SIGN_CRT_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_3072_WAPKC_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_SIGN_CRT_2048_WAPKC_SIZE : \
MCUXCLRSA_SIGN_CRT_1024_WAPKC_SIZE))) ///< Macro to extract PKC workarea size to be used with a non-standard key length, with a key of type MCUXCLRSA_KEY_PRIVATECRT or MCUXCLRSA_KEY_PRIVATECRT_DFA.
/** @} */
/****************************************************************************/
/* Definitions of workarea sizes for the mcuxClRsa Verify */
/****************************************************************************/
/**
* @defgroup MCUXCLRSA_VERIFY_WA MCUXCLRSA_VERIFY_WA
* @brief Definitions of workarea sizes for the mcuxClRsa Verify
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_VERIFY_NOVERIFY_WACPU_SIZE (20u) ///< Definition of CPU workarea size for the mcuxClRsa_verify function using mode mcuxClRsa_Mode_Verify_NoVerify.
#define MCUXCLRSA_VERIFY_PSSVERIFY_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_verify function using mode mcuxClRsa_Mode_Verify_PssVerify.
#define MCUXCLRSA_VERIFY_PKCS1V15VERIFY_WACPU_SIZE (196u) ///< Definition of CPU workarea size for the mcuxClRsa_verify function using mode mcuxClRsa_Mode_Verify_PKCS1v15_Sha2_*.
#define MCUXCLRSA_VERIFY_1024_WAPKC_SIZE (864u) ///< Definition of PKC workarea size for the mcuxClRsa_verify function for 1024-bit keys.
#define MCUXCLRSA_VERIFY_2048_WAPKC_SIZE (1632u) ///< Definition of PKC workarea size for the mcuxClRsa_verify function for 2048-bit keys.
#define MCUXCLRSA_VERIFY_3072_WAPKC_SIZE (2400u) ///< Definition of PKC workarea size for the mcuxClRsa_verify function for 3072-bit keys.
#define MCUXCLRSA_VERIFY_4096_WAPKC_SIZE (3168u) ///< Definition of PKC workarea size for the mcuxClRsa_verify function for 4096-bit keys.
#define MCUXCLRSA_VERIFY_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_VERIFY_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_VERIFY_3072_WAPKC_SIZE : \
((1024u < (keyBitLength)) ? MCUXCLRSA_VERIFY_2048_WAPKC_SIZE : \
MCUXCLRSA_VERIFY_1024_WAPKC_SIZE))) ///< Macro to extract PKC workarea size to be used with a non-standard key length.
/** @} */
/**********************************************************************************/
/* Definitions of workarea sizes for the mcuxClRsa_KeyGeneration_Crt function. */
/**********************************************************************************/
/**
* @defgroup MCUXCLRSA_KEYGENERATION_CRT_WA MCUXCLRSA_KEYGENERATION_CRT_WA
* @brief Definitions of workarea sizes for the mcuxClRsa_KeyGeneration_Crt function.
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_KEYGENERATION_CRT_2048_WACPU_SIZE (632u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_3072_WACPU_SIZE (760u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_4096_WACPU_SIZE (888u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_CRT_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_CRT_3072_WACPU_SIZE : \
MCUXCLRSA_KEYGENERATION_CRT_2048_WACPU_SIZE)) ///< Macro to extract CPU workarea size (in bytes) for the given key length.
#define MCUXCLRSA_KEYGENERATION_CRT_2048_WAPKC_SIZE (1864u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_3072_WAPKC_SIZE (2696u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_4096_WAPKC_SIZE (3528u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Crt function for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_CRT_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_CRT_3072_WAPKC_SIZE : \
MCUXCLRSA_KEYGENERATION_CRT_2048_WAPKC_SIZE)) ///< Macro to extract PKC workarea size (in bytes) for the given key length.
/** @} */
/********************************************************************************/
/* Definitions of workarea sizes for the mcuxClRsa_KeyGeneration_Plain function. */
/********************************************************************************/
/**
* @defgroup MCUXCLRSA_KEYGENERATION_PLAIN_WA MCUXCLRSA_KEYGENERATION_PLAIN_WA
* @brief Definitions of workarea sizes for the mcuxClRsa_KeyGeneration_Plain function.
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_KEYGENERATION_PLAIN_2048_WACPU_SIZE (620u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_3072_WACPU_SIZE (748u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_4096_WACPU_SIZE (876u) ///< Definition of CPU workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_WACPU_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_PLAIN_4096_WACPU_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_PLAIN_3072_WACPU_SIZE : \
MCUXCLRSA_KEYGENERATION_PLAIN_2048_WACPU_SIZE)) ///< Macro to extract CPU workarea size for the given key length.
#define MCUXCLRSA_KEYGENERATION_PLAIN_2048_WAPKC_SIZE (1992u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_3072_WAPKC_SIZE (2888u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_4096_WAPKC_SIZE (3784u) ///< Definition of PKC workarea size (in bytes) for the mcuxClRsa_KeyGeneration_Plain function for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_WAPKC_SIZE(keyBitLength) \
((3072u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_PLAIN_4096_WAPKC_SIZE : \
((2048u < (keyBitLength)) ? MCUXCLRSA_KEYGENERATION_PLAIN_3072_WAPKC_SIZE : \
MCUXCLRSA_KEYGENERATION_PLAIN_2048_WAPKC_SIZE)) ///< Macro to extract PKC workarea size for the given key length.
/** @} */
/*************************************************************************************************************************/
/* Definitions of generated key data size for the mcuxClRsa_KeyGeneration_Crt and mcuxClRsa_KeyGeneration_Plain functions. */
/*************************************************************************************************************************/
/**
* @defgroup MCUXCLRSA_KEYGENERATION_KEY_DATA_SIZE MCUXCLRSA_KEYGENERATION_KEY_DATA_SIZE
* @brief Definitions of bufer sizes for the mcuxClRsa_KeyGeneration_Crt and mcuxClRsa_KeyGeneration_Plain functions.
* @ingroup mcuxClRsa_Macros
* @{
*/
#define MCUXCLRSA_KEYGENERATION_PLAIN_KEY_DATA_2048_SIZE (556u) ///< Definition of bufer size (in bytes) for the private plain key data for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_KEY_DATA_3072_SIZE (812u) ///< Definition of bufer size (in bytes) for the private plain key data for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_PLAIN_KEY_DATA_4096_SIZE (1068u) ///< Definition of bufer size (in bytes) for the private plain key data for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_KEY_DATA_2048_SIZE (708u) ///< Definition of bufer size (in bytes) for the private CRT key data for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_KEY_DATA_3072_SIZE (1028u) ///< Definition of bufer size (in bytes) for the private CRT key data for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_CRT_KEY_DATA_4096_SIZE (1348u) ///< Definition of bufer size (in bytes) for the private CRT key data for 4096-bit keys
#define MCUXCLRSA_KEYGENERATION_PUBLIC_KEY_DATA_2048_SIZE (556u) ///< Definition of bufer size (in bytes) for the public key data for 2048-bit keys
#define MCUXCLRSA_KEYGENERATION_PUBLIC_KEY_DATA_3072_SIZE (812u) ///< Definition of bufer size (in bytes) for the public key data for 3072-bit keys
#define MCUXCLRSA_KEYGENERATION_PUBLIC_KEY_DATA_4096_SIZE (1068u) ///< Definition of bufer size (in bytes) for the public key data for 4096-bit keys
/** @} */
#endif /* MCUXCLRSA_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/includes/platform/rw61x/mcuxClSession_MemoryConsumption.h
+23
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/*--------------------------------------------------------------------------*/
/* Copyright 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClSession_MemoryConsumption.h
* @brief Defines the memory consumption for the mcuxClSession component
*/
#ifndef MCUXCLSESSION_MEMORYCONSUMPTION_H_
#define MCUXCLSESSION_MEMORYCONSUMPTION_H_
#endif /* MCUXCLSESSION_MEMORYCONSUMPTION_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/compiler/mcuxClToolchain.h
+144
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef COMPILER_TOOLCHAIN_H_
#define COMPILER_TOOLCHAIN_H_
/* for armclang */
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#define CSS_IDATA_SEGMENT __attribute__((section("CSS_IDATA_SEGMENT")))
#define CSS_CONST_SEGMENT __attribute__((section("CSS_CONST_SEGMENT")))
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4))) __attribute__((section("MCUX_OBFUSCATED_FUP_SEGMENT")))
#define UNUSED_PARAM __attribute__((unused))
/*
Use of UNALIGNED on ARMCLANG
The __unaligned keyword is a type qualifier that tells the compiler to treat the pointer or variable as an unaligned pointer or variable.
www.keil.com/support/man/docs/armclang_ref/armclang_ref_pfl1493130433688.htm
The use of __attribute__((packed)) is incorrect on ARMCLANG
The packed type attribute specifies that a type must have the smallest possible alignment. This attribute only applies to struct and union types.
www.keil.com/support/man/docs/armclang_ref/armclang_ref_chr1393328521340.htm
-munaligned-access is the default for architectures that support unaligned accesses to data. This default applies to all architectures supported by Arm Compiler for Embedded 6, except Armv6-M, and Armv8-M without the Main Extension.
*/
#define UNALIGNED __unaligned
#define MCUX_CSSL_UNUSED(p) ((void) (p))
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
/* using the gcc toolchain file for both gcc and armgcc */
#elif defined ( __GNUC__ )
#define CSS_IDATA_SEGMENT
#define CSS_CONST_SEGMENT
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4)))
#define UNUSED_PARAM __attribute__((unused))
#define UNALIGNED
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
/* for armcc compiler */
#elif defined ( __CC_ARM )
#define CSS_IDATA_SEGMENT __attribute__((section("CSS_IDATA_SEGMENT")))
#define CSS_CONST_SEGMENT __attribute__((section("CSS_CONST_SEGMENT")))
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4))) __attribute__((section("MCUX_OBFUSCATED_FUP_SEGMENT")))
#define UNUSED_PARAM __attribute__((unused))
#define UNALIGNED __packed
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
/* for ghs compiler */
#elif defined ( __ghs__ )
#define CSS_IDATA_SEGMENT
#define CSS_CONST_SEGMENT
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4)))
#define UNUSED_PARAM __attribute__((unused))
#define UNALIGNED
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
/* for iar compiler */
#elif defined ( __ICCARM__ )
#define CSS_IDATA_SEGMENT __attribute__((section("CSS_IDATA_SEGMENT")))
#define CSS_CONST_SEGMENT __attribute__((section("CSS_CONST_SEGMENT")))
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4))) __attribute__((section(".mcux_obfuscated_fup_segment")))
#define UNUSED_PARAM __attribute__((unused))
#define UNALIGNED __packed
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
/* for llvm */
#elif defined ( __clang__ )
#define CSS_IDATA_SEGMENT
#define CSS_CONST_SEGMENT
#define MCUX_FUP_ATTRIBUTE __attribute__((aligned(4)))
#define UNUSED_PARAM __attribute__((unused))
#define UNALIGNED
/* Macro for alligning buffers to cpu word */
#define ALIGNED __attribute__((aligned(4)))
#endif
#if defined(__ghs__) || defined( __ICCARM__ ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || defined(__GNUC__)
#define GHS_ICCARM_ARMCC_GT_10_5_GNUC
#endif
#if defined(__ghs__) || defined(__gcc__) || defined(__ICCARM__) || defined(__GNUC__)
#define GHS_GCC_ICCARM_GNUC
#endif
#if defined(__ghs__) || defined(__gcc__) || defined(__ICCARM__)
#define GHS_GCC_ICCARM
#endif
#if defined(__ICCARM__) || defined(__ARMCC_VERSION) || defined(__CC_ARM) || defined(__GNUC__)
#define ICCARM_ARMCC_GNUC
#endif
#if defined(__ICCARM__) || defined(__ARMCC_VERSION) || defined(__GNUC__)
#define ICCARM_ARMCLANG_GNUC
#endif
#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
#define ARMCC_LT_10_5 //6.01 build 0050
#endif
#if defined ( __CC_ARM )
/* Arm Compiler 4/5 */
#define MCUX_CL_COMPILER_ARMCC
#define MCUX_CL_COMPILER_ARM_COMPILER
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
/* Arm Compiler 6.6 LTM (armclang) */
#define MCUX_CL_COMPILER_ARMCLANG_LTM
#define MCUX_CL_COMPILER_ARM_COMPILER
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
/* Arm Compiler above 6.10.1 (armclang) */
#define MCUX_CL_COMPILER_ARMCLANG
#define MCUX_CL_COMPILER_ARM_COMPILER
#elif defined (_clang_)
#define MCUX_CL_COMPILER_ARM_COMPILER /* i.e. Version 6.01 build 0019 */
#endif
#if ( defined(__ARMCC_VERSION) || defined(_MSC_VER) ) && !defined(inline) && !defined(__cplusplus)
#define ARMCC_MSC_VER_NOT_INLINE_NOT_CPP
#endif
#endif /* COMPILER_TOOLCHAIN_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClBuffer/inc/internal/mcuxClBuffer_Internal.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer_Internal.h
* \brief Internal functions of the mcuxClBuffer component
*/
#ifndef MCUXCLBUFFER_INTERNAL_H_
#define MCUXCLBUFFER_INTERNAL_H_
#include <mcuxClCore_Platform.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Include the configuration for the buffer types. */
#include <mcuxClBuffer_Cfg.h>
/* Include the selected implementation of the buffer types. */
#if defined(MCUXCLBUFFER_USE_OBJECT) && (1 == MCUXCLBUFFER_USE_OBJECT)
# include <internal/mcuxClBuffer_Internal_Object.h>
#elif defined(MCUXCLBUFFER_USE_POINTER) && (1 == MCUXCLBUFFER_USE_POINTER)
# include <internal/mcuxClBuffer_Internal_Pointer.h>
#else
# error "No buffer type implementation found/configured."
#endif
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLBUFFER_INTERNAL_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClBuffer/inc/internal/mcuxClBuffer_Internal_Pointer.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer_Internal_Pointer.h
* \brief Provides the internal API & implementation for the plain C pointer buffer types.
*/
#ifndef MCUXCLBUFFER_INTERNAL_POINTER_H_
#define MCUXCLBUFFER_INTERNAL_POINTER_H_
#include <mcuxClToolchain.h>
#include <mcuxClCore_Platform.h>
#include <mcuxClBuffer.h>
#include <mcuxClBuffer_Pointer.h>
#include <mcuxCsslDataIntegrity.h>
#include <mcuxCsslMemory.h>
#include <mcuxClMemory_Copy.h>
#include <mcuxClMemory_Copy_Reversed.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* \defgroup clBufferUsage Buffer read/write functionality
* \brief Buffer read/write functionality.
* \ingroup mcuxClBuffer
*/
/* TODO CLNS-10260: finalize the implementation and especially update all the memory functions that are called from here, once CLNS-9401 is finished.
* Appropriate memory functions should be called, to properly handle the security and the different cases of length/alignment (e.g. length being a multiple of 4 or power of 2).
*/
/**
* \brief Writes the pointer of \p bufSrc plus the \p offset in \p ppDest.
*
* \param bufSrc Input buffer
* \param offset Offset of the input buffer
* \param bufCpuWa Not used
* \param ppDest Pointer to the address where the result is written to
* \param byteLength Not used
*
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_inputBufferToCPU)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_inputBufferToCPU(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *bufCpuWa UNUSED_PARAM, const uint8_t **ppDest, uint32_t byteLength UNUSED_PARAM)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_inputBufferToCPU);
*ppDest = (const uint8_t *)bufSrc + offset;
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_inputBufferToCPU, MCUXCLBUFFER_STATUS_OK);
}
/**
* \brief Perform a read from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_read)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_read(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_read);
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_DI_EXPUNGE(memCpyParams, ((uint32_t) pDst) + ((uint32_t) bufSrc) + byteLength + offset);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUXCLMEMORY_FP_MEMORY_COPY(pDst, &bufSrc[offset], byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_read, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy)
);
}
/**
* \brief Perform a word-wise read from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_read_word)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_read_word(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_read_word);
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_DI_EXPUNGE(memCpyParams, ((uint32_t) pDst) + ((uint32_t) bufSrc) + byteLength + offset);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUXCLMEMORY_FP_MEMORY_COPY(pDst, &bufSrc[offset], byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_read_word, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy)
);
}
/**
* \brief Perform an read with endianess reversal from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_read_reverse)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_read_reverse(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_read_reverse);
MCUXCLMEMORY_FP_MEMORY_COPY_REVERSED(pDst, &bufSrc[offset], byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_read_reverse, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy_reversed));
}
/**
* \brief Perform a secure read from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_read_secure)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_read_secure(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_read_secure);
MCUXCLMEMORY_FP_MEMORY_COPY(pDst, &bufSrc[offset], byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_read_secure, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy));
}
/**
* \brief Perform a secure read with endianess reversal from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_read_secure_reverse)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_read_secure_reverse(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_read_secure_reverse);
MCUXCLMEMORY_FP_MEMORY_COPY_REVERSED(pDst, &bufSrc[offset], byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_read_secure_reverse, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy_reversed));
}
/**
* \brief Perform a write to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_write)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_write(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_write);
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_DI_EXPUNGE(memCpyParams, ((uint32_t) pSrc) + ((uint32_t) bufDst) + byteLength + offset);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUXCLMEMORY_FP_MEMORY_COPY(&bufDst[offset], pSrc, byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_write, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy)
);
}
/**
* \brief Perform a word-wise write to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_write_word)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_write_word(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_write_word);
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_DI_EXPUNGE(memCpyParams, ((uint32_t) pSrc) + ((uint32_t) bufDst) + byteLength + offset);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUXCLMEMORY_FP_MEMORY_COPY(&bufDst[offset], pSrc, byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_write_word, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy)
);
}
/**
* \brief Perform a write with endianess reversal to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_write_reverse)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_write_reverse(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_write_reverse);
MCUXCLMEMORY_FP_MEMORY_COPY_REVERSED(&bufDst[offset], pSrc, byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_write_reverse, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy_reversed));
}
/**
* \brief Perform a secure write to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_write_secure)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_write_secure(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_write_secure);
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_DI_EXPUNGE(memCpyParams, ((uint32_t) pSrc) + ((uint32_t) bufDst) + byteLength + offset);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUXCLMEMORY_FP_MEMORY_COPY(&bufDst[offset], pSrc, byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_write_secure, MCUXCLBUFFER_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy));
}
/**
* \brief Perform a secure write with endianess reversal to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_write_secure_reverse)
static inline MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_write_secure_reverse(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_write_secure_reverse);
MCUXCLMEMORY_FP_MEMORY_COPY_REVERSED(&bufDst[offset], pSrc, byteLength);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_write_secure_reverse, MCUXCLBUFFER_STATUS_OK, MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy_reversed));
}
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLBUFFER_INTERNAL_POINTER_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer.h
* \brief Provides the API for the CL buffer types.
*/
#ifndef MCUXCLBUFFER_H_
#define MCUXCLBUFFER_H_
#include <mcuxClCore_Platform.h>
#include <mcuxClBuffer_Constants.h>
/* Include the actual implementation of the flow protection mechanism. */
#include <mcuxClBuffer_Impl.h>
/**
* \addtogroup mcuxClAPI MCUX CL -- API
*
* \defgroup mcuxClBuffer Buffer API
* \brief CL Buffer types.
* \ingroup mcuxClAPI
*/
/**
* \defgroup clBufInit Buffer initialization functionality
* \brief Buffer initialization functionality.
* \ingroup mcuxClBuffer
*
* Two sets of default buffer initializations are provided, each with
* read-only (RO, for mcuxCl_InputBuffer_t) and read-write (RW, for mcuxCl_Buffer_t)
* variants:
* - Plain: basic CPU copy operations (aligned when possible)
* - DMA: utilizing DMA peripherals
*
* \note The DMA variants will be mapped to plain for buffer implementations
* that do not support DMA operations.
*
* Additionally a custom initializer is provided as well as some aliases
* that can be used as shorthand notation.
*/
/**
* \def MCUXCLBUFFER_INIT
* \brief Initialize an input/output buffer (mcuxCl_Buffer_t).
* \api
* \ingroup clBufInit
*
* This macro is an alias for \p MCUXCLBUFFER_INIT_RW.
*
* \see MCUXCLBUFFER_INIT_RW
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT(name, info, ptr, size) \
MCUXCLBUFFER_INIT_RW(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_RO
* \brief Initialize an input buffer (mcuxCl_InputBuffer_t) with plain CPU handling.
* \api
* \ingroup clBufInit
*
* This macro can be used to initialize an input buffer that will be handled
* using plain CPU operations.
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_RO(name, info, ptr, size) \
MCUXCLBUFFER_INIT_PLAIN_RO_IMPL(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_RW
* \brief Initialize an input/output buffer (mcuxCl_Buffer_t) with plain CPU handling.
* \api
* \ingroup clBufInit
*
* This macro can be used to initialize an input/output buffer that will be
* handled using plain CPU operations.
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_RW(name, info, ptr, size) \
MCUXCLBUFFER_INIT_PLAIN_RW_IMPL(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_DMA_RO
* \brief Initialize an input buffer (mcuxCl_InputBuffer_t) with DMA handling.
* \api
* \ingroup clBufInit
*
* This macro can be used to initialize an input buffer that will be handled
* using DMA operations.
*
* \note DMA operations are only supported for object-oriented buffer implementations.
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_DMA_RO(name, info, ptr, size) \
MCUXCLBUFFER_INIT_DMA_RO_IMPL(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_DMA_RW
* \brief Initialize an input/output buffer (mcuxCl_Buffer_t) with DMA handling.
* \api
* \ingroup clBufInit
*
* This macro can be used to initialize an input/output buffer that will be
* handled using DMA operations.
*
* \note DMA operations are only supported for object-oriented buffer implementations.
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_DMA_RW(name, info, ptr, size) \
MCUXCLBUFFER_INIT_DMA_RW_IMPL(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_DMA
* \brief Initialize an input/output buffer (mcuxCl_Buffer_t) with DMA handling.
* \api
* \ingroup clBufInit
*
* This macro is an alias for \p MCUXCLBUFFER_INIT_RW.
*
* \see MCUXCLBUFFER_INIT_RW
*
* \param name the name to be used for the buffer variable
* \param info pointer to a data structure that holds relevant information for the handler
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_DMA(name, info, ptr, size) \
MCUXCLBUFFER_INIT_DMA_RW(name, info, ptr, size)
/**
* \def MCUXCLBUFFER_INIT_CUSTOM
* \brief Initialize an input/output buffer with custom handler
* \api
* \ingroup clBufInit
*
* This macro can be used to initialize an input/output buffer with a custom
* handler.
*
* \note Custom handlers are only supported for object-oriented buffer
* implementations.
*
* \param name the name to be used for the buffer variable
* \param handler the callback function that will handle the buffer operations
* \param info pointer to a data structure that holds relevant information for the handler
* \param spec specification of the buffer properties
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_INIT_CUSTOM(name, handler, info, spec, ptr, size) \
MCUXCLBUFFER_INIT_CUSTOM_IMPL(name, handler, info, spec, ptr, size)
/**
* \defgroup clBufUpdate Buffer manipulation functionality
* \brief Input/output buffer manipulation functionality.
* \ingroup mcuxClBuffer
*/
/**
* \def MCUXCLBUFFER_UPDATE
* \brief Update the buffer pointer with the given offset.
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable to update.
* \param offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_UPDATE(name, offset) \
MCUXCLBUFFER_UPDATE_IMPL(name, offset)
/**
* \def MCUXCLBUFFER_DERIVE_RO
* \brief Derive a new input buffer object from an existing one (updated with the given offset).
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable to create.
* \param original the name of the buffer variable that will be cloned.
* \param offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_DERIVE_RO(name, original, offset) \
MCUXCLBUFFER_DERIVE_RO_IMPL(name, original, offset)
/**
* \def MCUXCLBUFFER_DERIVE_RW
* \brief Derive a new input/output buffer object from an existing one (updated with the given offset).
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable to create.
* \param original the name of the buffer variable that will be cloned.
* \param offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_DERIVE_RW(name, original, offset) \
MCUXCLBUFFER_DERIVE_RW_IMPL(name, original, offset)
/**
* \def MCUXCLBUFFER_SET
* \brief Update the buffer pointer the a new memory location.
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable to update
* \param ptr pointer to the memory location of the buffer
* \param size size of the buffer - RFU
*/
#define MCUXCLBUFFER_SET(name, ptr, size) \
MCUXCLBUFFER_SET_IMPL(name, ptr, size)
/**
* \def MCUXCLBUFFER_GET
* \brief Get the pointer of the buffer
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable
*/
#define MCUXCLBUFFER_GET(name) \
MCUXCLBUFFER_GET_IMPL(name)
/**
* \def MCUXCLBUFFER_IS_NULL
* \brief Check the buffer and its pointer against NULL
* \api
* \ingroup clBufUpdate
*
* \param name the name of the buffer variable
*/
#define MCUXCLBUFFER_IS_NULL(name) \
MCUXCLBUFFER_IS_NULL_IMPL(name)
#endif /* MCUXCLBUFFER_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer_Cfg.h
* \brief Configuration of the implementation for the buffer types.
*/
#ifndef MCUXCLBUFFER_CFG_H_
#define MCUXCLBUFFER_CFG_H_
#include <mcuxClCore_Platform.h>
/**
* \addtogroup mcuxClCFG MCUX CL -- Configurations
*
* \defgroup mcuxClBuffer_CFG Buffer Configuration
* \brief Configuration options for the buffer types.
* \ingroup mcuxClCFG
*/
/**
* \def MCUXCLBUFFER_USE_OBJECT
* \brief If set to 1, use the object oriented buffer implementation.
* \ingroup mcuxClBuffer_CFG
*/
#define MCUXCLBUFFER_USE_OBJECT 0
/**
* \def MCUXCLBUFFER_USE_POINTER
* \brief If set to 1, use the plain C pointer buffer implementation.
* \ingroup mcuxClBuffer_CFG
*/
#define MCUXCLBUFFER_USE_POINTER 1
/* Basic configuration sanity check */
#endif /* MCUXCLBUFFER_CFG_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** \file mcuxClBuffer_Constants.h
* \brief Constants for use with the mcuxClBuffer component */
#ifndef MCUXCLBUFFER_CONSTANTS_H_
#define MCUXCLBUFFER_CONSTANTS_H_
#include <mcuxClCore_Platform.h>
/**
* \defgroup clBufferConstants Buffer constants
* \brief Buffer constants
* \ingroup mcuxClBuffer
*/
/**
* \brief Buffer status code
*
* This type provides information about the status of the Buffer operation that
* has been performed.
*/
typedef uint32_t mcuxClBuffer_Status_t;
/* Error codes */
#define MCUXCLBUFFER_STATUS_ERROR ((mcuxClBuffer_Status_t) 0x01235330u)
#define MCUXCLBUFFER_STATUS_OK ((mcuxClBuffer_Status_t) 0x01232E03u)
#define MCUXCLBUFFER_STATUS_FAULT ((mcuxClBuffer_Status_t) 0x0123F0F0u)
#endif /* MCUXCLBUFFER_CONSTANTS_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer_Impl.h
* \brief Selection of the implementation for the buffer types.
*/
#ifndef MCUXCLBUFFER_IMPL_H_
#define MCUXCLBUFFER_IMPL_H_
#include <mcuxClCore_Platform.h>
/* Include the configuration for the buffer types. */
#include <mcuxClBuffer_Cfg.h>
/* Include the selected implementation of the buffer types. */
#if defined(MCUXCLBUFFER_USE_OBJECT) && (1 == MCUXCLBUFFER_USE_OBJECT)
# include <mcuxClBuffer_Object.h>
#elif defined(MCUXCLBUFFER_USE_POINTER) && (1 == MCUXCLBUFFER_USE_POINTER)
# include <mcuxClBuffer_Pointer.h>
#else
# error "No buffer type implementation found/configured."
#endif
#endif /* MCUXCLBUFFER_IMPL_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer_Pointer.h
* \brief Provides the implementation for the basic C pointer buffer types.
*/
#ifndef MCUXCLBUFFER_POINTER_H_
#define MCUXCLBUFFER_POINTER_H_
#include <mcuxClCore_Platform.h>
#include <mcuxCsslFlowProtection.h>
/**
* \addtogroup mcuxClAPI MCUX CL -- API
*
* \addtogroup mcuxClBuffer Buffer API
* \brief Essential types and functionality.
* \ingroup mcuxClAPI
*/
/**
* \defgroup clBufferTypes Buffer type definitions
* \brief Types used by the buffer operations.
* \ingroup mcuxClBuffer
*/
/**
* \brief Input buffer type
* \ingroup clBufferTypes
*
* This type provides a pointer to the memory location that should be used to
* read input data from.
*/
typedef const uint8_t * mcuxCl_InputBuffer_t;
/**
* \brief Input/output buffer type
* \ingroup clBufferTypes
*
* This type provides a pointer to the memory location that can be used for
* both reading input data and writing output data.
*/
typedef uint8_t * mcuxCl_Buffer_t;
/**
* \brief Perform a read from the buffer
*
* \param bufSrc Input buffer from which the data shall be read.
* \param offset Offset into the buffer at which the read operation shall start.
* \param pDst Pointer to the memory location where the data will be stored.
* \param byteLength Amount of bytes that will be read.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClBuffer_import)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_import(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength);
/**
* \brief Perform a write to the buffer
*
* \param bufDst Output buffer to which the data shall be written.
* \param offset Offset into the buffer at which the write operation shall start.
* \param pSrc Pointer to the memory location from where the data will be read.
* \param byteLength Amount of bytes that will be written.
* \return Status of the operation.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClBuffer_export)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_export(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength);
/**
* \def MCUXCLBUFFER_INIT_PLAIN_RO_IMPL
* \brief Initialize an input buffer with plain CPU handling.
* \ingroup clBufInit
*
* This macro can be used to initialize an input buffer that will be handled
* using plain CPU operations.
*
* \param _name the name to be used for the buffer variable
* \param _info unused for the current implementation
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_INIT_PLAIN_RO_IMPL(_name, _info, _ptr, _size) \
mcuxCl_InputBuffer_t (_name) = (mcuxCl_InputBuffer_t)(_ptr)
/**
* \def MCUXCLBUFFER_INIT_PLAIN_RW_IMPL
* \brief Initialize an input/output buffer with plain CPU handling.
* \ingroup clBufInit
*
* This macro can be used to initialize an input/output buffer that will be
* handled using plain CPU operations.
*
* \param _name the name to be used for the buffer variable
* \param _info unused for the current implementation
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_INIT_PLAIN_RW_IMPL(_name, _info, _ptr, _size) \
mcuxCl_Buffer_t (_name) = (mcuxCl_Buffer_t)(_ptr)
/**
* \def MCUXCLBUFFER_INIT_DMA_RO_IMPL
* \brief DMA handling is not supported. Initialize an input buffer with plain CPU handling.
* \ingroup clBufInit
*
* This buffer implementation does not support DMA handling, so CPU handling is used as a fallback.
* This macro is an alias for \p MCUXCLBUFFER_INIT_PLAIN_RO_IMPL.
*
* \param _name the name to be used for the buffer variable
* \param _info unused for the current implementation
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_INIT_DMA_RO_IMPL(_name, _info, _ptr, _size) \
MCUXCLBUFFER_INIT_PLAIN_RO_IMPL(_name, _info, _ptr, _size)
/**
* \def MCUXCLBUFFER_INIT_DMA_RW_IMPL
* \brief DMA handling is not supported. Initialize an input/output buffer with plain CPU handling.
* \ingroup clBufInit
*
* This buffer implementation does not support DMA handling, so CPU handling is used as a fallback.
* This macro is an alias for \p MCUXCLBUFFER_INIT_PLAIN_RW_IMPL.
*
* \param _name the name to be used for the buffer variable
* \param _info unused for the current implementation
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_INIT_DMA_RW_IMPL(_name, _info, _ptr, _size) \
MCUXCLBUFFER_INIT_PLAIN_RW_IMPL(_name, _info, _ptr, _size)
/**
* \def MCUXCLBUFFER_INIT_CUSTOM_IMPL
* \brief Usage of custom handler is not supported. Initialize an input/output buffer with plain CPU handling.
* \ingroup clBufInit
*
* This macro is an alias for \p MCUXCLBUFFER_INIT_PLAIN_RW_IMPL.
*
* \param _name the name to be used for the buffer variable
* \param _handler unused for the current implementation
* \param _info unused for the current implementation
* \param _spec unused for the current implementation
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_INIT_CUSTOM_IMPL(_name, _handler, _info, _spec, _ptr, _size) \
MCUXCLBUFFER_INIT_PLAIN_RW_IMPL(_name, _info, _ptr, _size)
/**
* \def MCUXCLBUFFER_UPDATE_IMPL
* \brief Update the buffer pointer with the given offset.
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable to update
* \param _offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_UPDATE_IMPL(_name, _offset) \
do { (_name) += (_offset); } while(false)
/**
* \def MCUXCLBUFFER_DERIVE_RO_IMPL
* \brief Derive a new input buffer object from an existing one (updated with the given offset).
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable to create.
* \param _original the name of the buffer variable that will be cloned.
* \param _offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_DERIVE_RO_IMPL(_name, _original, _offset) \
mcuxCl_InputBuffer_t (_name) = (mcuxCl_InputBuffer_t) &(_original)[_offset]
/**
* \def MCUXCLBUFFER_DERIVE_RW_IMPL
* \brief Derive a new input/output buffer object from an existing one (updated with the given offset).
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable to create.
* \param _original the name of the buffer variable that will be cloned.
* \param _offset the amount of bytes that the buffer pointer should be moved.
*/
#define MCUXCLBUFFER_DERIVE_RW_IMPL(_name, _original, _offset) \
mcuxCl_Buffer_t (_name) = (mcuxCl_Buffer_t) &(_original)[_offset]
/**
* \def MCUXCLBUFFER_SET_IMPL
* \brief Update the buffer pointer the a new memory location.
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable to update
* \param _ptr pointer to the memory location of the buffer
* \param _size unused for the current implementation
*/
#define MCUXCLBUFFER_SET_IMPL(_name, _ptr, _size) \
do { (_name) = (_ptr); } while(false)
/**
* \def MCUXCLBUFFER_GET_IMPL
* \brief Get the pointer of the buffer
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable
*/
#define MCUXCLBUFFER_GET_IMPL(_name) \
(_name)
/**
* \def MCUXCLBUFFER_IS_NULL_IMPL
* \brief Check the buffer pointer against NULL
* \ingroup clBufUpdate
*
* \param _name the name of the buffer variable
*/
#define MCUXCLBUFFER_IS_NULL_IMPL(_name) \
(NULL == MCUXCLBUFFER_GET_IMPL(_name))
#endif /* MCUXCLBUFFER_POINTER_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxClBuffer.c
* \brief Provides the internal implementation for the plain C pointer buffer types.
*/
#include <mcuxClToolchain.h>
#include <mcuxClCore_Platform.h>
#include <mcuxClBuffer.h>
#include <mcuxCsslDataIntegrity.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <internal/mcuxClBuffer_Internal.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_export)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_export(mcuxCl_Buffer_t bufDst, uint32_t offset, const uint8_t *pSrc, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_export);
MCUX_CSSL_FP_FUNCTION_CALL(status, mcuxClBuffer_write(bufDst, offset, pSrc, byteLength));
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_export, status, MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClBuffer_write));
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClBuffer_import)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClBuffer_Status_t) mcuxClBuffer_import(mcuxCl_InputBuffer_t bufSrc, uint32_t offset, uint8_t *pDst, uint32_t byteLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClBuffer_import);
MCUX_CSSL_FP_FUNCTION_CALL(status, mcuxClBuffer_read(bufSrc, offset, pDst, byteLength));
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClBuffer_import, status, MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClBuffer_read));
}
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef MCUXCLCORE_EXAMPLES_H_
#define MCUXCLCORE_EXAMPLES_H_
#include <mcuxClCore_Platform.h>
#include <mcuxClCore_Macros.h>
#include <mcuxCsslFlowProtection.h>
/**
* \def MCUXCLEXAMPLE_FUNCTION
* \brief Macro to indicate that the symbol is an example function.
*/
// TODO CLNS-3599: #define MCUXCLEXAMPLE_FUNCTION(_name) uint32_t _name(void)
#define MCUXCLEXAMPLE_FUNCTION(_name) \
MCUX_CSSL_ANALYSIS_START_PATTERN_EXAMPLE_FUNCTION() \
bool _name(void) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXAMPLE_FUNCTION()
/**
* \def MCUXCLEXAMPLE_STATUS_OK
* \brief Example execution completed successfully.
*/
#define MCUXCLEXAMPLE_STATUS_OK true // TODO CLNS-3599: 0xC001C0DEu
/**
* \def MCUXCLEXAMPLE_OK
* \brief Example execution completed successfully.
* \deprecated{Replaced by MCUXCLEXAMPLE_STATUS_OK}
*/
#define MCUXCLEXAMPLE_OK MCUXCLEXAMPLE_STATUS_OK
/**
* \def MCUXCLEXAMPLE_STATUS_ERROR
* \brief Example execution resulted in an unexpected error.
*/
#define MCUXCLEXAMPLE_STATUS_ERROR false // TODO CLNS-3599: 0xEEEEEEEEu
/**
* \def MCUXCLEXAMPLE_ERROR
* \brief Example execution resulted in an unexpected error.
* \deprecated{Replaced by MCUXCLEXAMPLE_STATUS_ERROR}
*/
#define MCUXCLEXAMPLE_ERROR MCUXCLEXAMPLE_STATUS_ERROR
/**
* \def MCUXCLEXAMPLE_STATUS_FAILURE
* \brief Example execution resulted in an expected failure.
*/
#define MCUXCLEXAMPLE_STATUS_FAILURE false // TODO CLNS-3599: 0xFFFFFFFFu
/**
* \def MCUXCLEXAMPLE_FAILURE
* \brief Example execution resulted in an expected failure.
* \deprecated{Replaced by MCUXCLEXAMPLE_STATUS_FAILURE}
*/
#define MCUXCLEXAMPLE_FAILURE MCUXCLEXAMPLE_STATUS_FAILURE
/**
* \brief Assert whether two buffers are equal.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClCore_assertEqual)
static inline bool mcuxClCore_assertEqual(const uint8_t * const x, const uint8_t * const y, uint32_t length)
{
for (uint32_t i = 0; i < length; ++i)
{
if (x[i] != y[i])
{
return false;
}
}
return true;
}
#endif /* MCUXCLCORE_EXAMPLES_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClCore_Macros.h
* @brief Definition of macros.
*
*/
#ifndef MCUXCLCORE_MACROS_H_
#define MCUXCLCORE_MACROS_H_
/* Macro to calculate the rounded down number of words that fit into the specified size */
#define MCUXCLCORE_NUM_OF_WORDS_FLOOR(wordsize, size) \
((size) / (wordsize))
/* Macro to calculate the rounded up number of words needed to fit an object of the specified size */
#define MCUXCLCORE_NUM_OF_WORDS_CEIL(wordsize, size) \
(((size) / (wordsize)) + ((((size) % (wordsize)) + ((wordsize) - 1u)) / (wordsize)))
/* Macro to calculate the rounded down number of CPU words that fit into the specified size */
#define MCUXCLCORE_NUM_OF_CPUWORDS_FLOOR(size) \
MCUXCLCORE_NUM_OF_WORDS_FLOOR(sizeof(uint32_t), size)
/* Macro to calculate the rounded up number of CPU words needed to fit an object of the specified size */
#define MCUXCLCORE_NUM_OF_CPUWORDS_CEIL(size) \
MCUXCLCORE_NUM_OF_WORDS_CEIL(sizeof(uint32_t), size)
/* Macro to round up a given size to the nearest multiple of a specified word size */
#define MCUXCLCORE_ALIGN_TO_WORDSIZE(wordsize, size) \
(MCUXCLCORE_NUM_OF_WORDS_CEIL(wordsize, size) * (wordsize))
/* Macro to round up a given size to the nearest multiple of the CPU word size */
#define MCUXCLCORE_ALIGN_TO_CPU_WORDSIZE(size) \
MCUXCLCORE_ALIGN_TO_WORDSIZE(sizeof(uint32_t), size)
/* Macro to calculate the maximum of two values */
#define MCUXCLCORE_MAX(a, b) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("Fixed values are allowed as macro inputs") \
(((a) > (b)) ? (a) : (b)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT()
/* Macro to calculate the minimum of two values */
#define MCUXCLCORE_MIN(a, b) \
(((a) < (b)) ? (a) : (b))
#endif /* MCUXCLCORE_MACROS_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2021, 2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef MCUXCLCORE_PLATFORM_H_
#define MCUXCLCORE_PLATFORM_H_
#include <stddef.h>
#include <stdint.h>
#include <stdbool.h>
#include <mcuxCsslAnalysis.h>
#include <mcuxClConfig.h> // Exported features flags header
#ifdef MCUXCL_FEATURE_HW_DMA_WORKAROUND
/** Convert the register address to the one used in secure mode. */
#define MCUXCL_MSDK_REG_SECURE_ADDR(x) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Convert pointer to address for bitwise operations needed in bit masking.") \
((uint32_t)(x) | (0x1UL << 28)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
/** Convert the register address to the one used in non-secure mode. */
#define MCUXCL_MSDK_REG_NONSECURE_ADDR(x) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Convert pointer to address for bitwise operations needed in bit masking.") \
((uint32_t)(x) & ~(0x1UL << 28)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
/** Address mapping to allow HW IP access 0x2xxx_xxxx memory range */
#define MCUXCL_HW_DMA_WORKAROUND(addr) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Convert pointer to address for bitwise operations needed in mapping calculations.") \
(((uint32_t)(MCUXCL_MSDK_REG_NONSECURE_ADDR(addr)) < 0x00780000u) ? ((uint32_t)(addr) | 0x20000000u) : (uint32_t)(addr)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
#else
#define MCUXCL_HW_DMA_WORKAROUND(addr) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Convert pointer to address for bitwise operations needed in mapping calculations. This instance needed for consistent macro behaviour.") \
((uint32_t)(addr)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
#endif /* MCUXCL_FEATURE_DMA_WORKAROUND */
#endif /* MCUXCLCORE_PLATFORM_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef MCUXCLCORE_TOOLCHAIN_H_
#define MCUXCLCORE_TOOLCHAIN_H_
#include <mcuxClCore_Platform.h>
#include <mcuxCsslFlowProtection.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCl_Core_Swap64)
static inline uint64_t mcuxCl_Core_Swap64(uint64_t value)
{
return __builtin_bswap64(value);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCl_Core_Swap32)
static inline uint32_t mcuxCl_Core_Swap32(uint32_t value)
{
return __builtin_bswap32(value);
}
#endif /* MCUXCLCORE_TOOLCHAIN_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/internal/mcuxClEls_Internal.h
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@@ -0,0 +1,380 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_Internal.h
* @brief Provide macros for mcuxClEls internal use.
* This header declares internal macros to deduplicate code and support for internal use only. */
#ifndef MCUXCLELS_INTERNAL_H_
#define MCUXCLELS_INTERNAL_H_
#include <mcuxClCore_Platform.h>
#include <platform_specific_headers.h>
#include <stdint.h>
#include <stdbool.h>
#include <mcuxCsslFlowProtection.h>
#include <internal/mcuxClEls_Internal_mapping.h>
#include <internal/mcuxClEls_SfrAccess.h>
#include <mcuxCsslAnalysis.h>
#include <mcuxClEls_Common.h>
#include <mcuxClEls_Types.h>
#ifdef __cplusplus
extern "C" {
#endif
/**** ****/
/**** ELS Hardware Abstraction Layer ****/
/**** ****/
/** Asserts the correctness of the supplied parameters*/
#define MCUXCLELS_INPUT_PARAM_CHECK(x_) if((x_)) { return MCUXCLELS_STATUS_SW_INVALID_PARAM; }
#define MCUXCLELS_INPUT_PARAM_CHECK_PROTECTED(funcid, x_) \
do \
{ \
if ((x_)) \
{ \
MCUX_CSSL_FP_FUNCTION_EXIT(funcid, MCUXCLELS_STATUS_SW_INVALID_PARAM); \
} \
MCUX_CSSL_ANALYSIS_START_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION() \
} while (false) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION()
#define ELS_CMD_BIG_ENDIAN ((uint8_t) 0x01U) ///< ELS command option specifying big-endian byte order
#define ELS_CMD_LITTLE_ENDIAN ((uint8_t) 0x00U) ///< ELS command option specifying little-endian byte order
// Utility code of mcuxClEls implementation
/** Sets the variable-size input buffer from which the input 0 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput0(const uint8_t *pInput, uint32_t inputSize)
{
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC0, MCUXCL_HW_DMA_WORKAROUND(pInput));
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC0_LEN, inputSize);
}
/** Sets the fixed-size input buffer from which the input 0 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput0_fixedSize(const uint8_t *pInput)
{
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC0, MCUXCL_HW_DMA_WORKAROUND(pInput));
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
}
/** Sets the fixed-size input buffer from which the input 1 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput1_fixedSize(const uint8_t *pInput)
{
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC1, MCUXCL_HW_DMA_WORKAROUND(pInput));
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
}
/** Sets the variable-size input buffer from which the input 2 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput2(const uint8_t *pInput, uint32_t inputSize)
{
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC2, MCUXCL_HW_DMA_WORKAROUND(pInput));
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC2_LEN, inputSize);
}
/** Sets the fixed-size input buffer from which the input 2 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput2_fixedSize(const uint8_t * pInput)
{
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC2, MCUXCL_HW_DMA_WORKAROUND(pInput));
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
}
/** Sets the fixed-size input offset from which the input 2 of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setInput2Offset_fixedSize(uint32_t inputOffset)
{
MCUXCLELS_SFR_WRITE(ELS_DMA_SRC2, inputOffset);
}
/** Sets the variable-size output buffer to which the result of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setOutput(uint8_t *pOutput, uint32_t outputSize)
{
MCUXCLELS_SFR_WRITE(ELS_DMA_RES0, MCUXCL_HW_DMA_WORKAROUND(pOutput));
MCUXCLELS_SFR_WRITE(ELS_DMA_RES0_LEN, outputSize);
}
/** Sets the output buffer to which the result of the ELS operation will be transferred via DMA. */
static inline void mcuxClEls_setOutput_fixedSize(uint8_t *pOutput)
{
MCUXCLELS_SFR_WRITE(ELS_DMA_RES0, MCUXCL_HW_DMA_WORKAROUND(pOutput));
}
/** Sets the ELS keystore index 0, for commands that access a single key. */
static inline void mcuxClEls_setKeystoreIndex0(uint32_t index)
{
MCUXCLELS_SFR_WRITE(ELS_KIDX0, index);
}
/** Sets the ELS keystore index 1, for commands that access 2 keys. */
static inline void mcuxClEls_setKeystoreIndex1(uint32_t index)
{
MCUXCLELS_SFR_WRITE(ELS_KIDX1, index);
}
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/** Sets the ELS keystore index 2, for commands that access 3 keys. */
static inline void mcuxClEls_setKeystoreIndex2(uint32_t index)
{
MCUXCLELS_SFR_WRITE(ELS_KIDX2, index);
}
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/** Sets the ELS requested key properties, for commands that create a key. */
static inline void mcuxClEls_setRequestedKeyProperties(uint32_t properties)
{
MCUXCLELS_SFR_WRITE(ELS_KPROPIN, properties);
}
/** Starts an ELS command. */
static inline void mcuxClEls_startCommand(uint32_t command, uint32_t cmdcfg0, uint32_t byteOrder)
{
uint32_t ctrl = MCUXCLELS_SFR_FIELD_FORMAT(ELS_CTRL, ELS_CMD, command)
| MCUXCLELS_SFR_FIELD_FORMAT(ELS_CTRL, ELS_START, 1u)
| MCUXCLELS_SFR_FIELD_FORMAT(ELS_CTRL, ELS_EN, 1u)
| MCUXCLELS_SFR_FIELD_FORMAT(ELS_CTRL, BYTE_ORDER, byteOrder);
MCUXCLELS_SFR_WRITE(ELS_CMDCFG0, cmdcfg0);
MCUXCLELS_SFR_WRITE(ELS_CTRL, ctrl);
}
/** Gets a specific field in the given SFR value, according to the given mask and shift value.
* @retval @c value of the requested field in the given ELS SFR value */
static inline uint32_t mcuxClEls_getSfrField(uint32_t sfrValue, uint32_t mask, uint32_t shift)
{
return ((uint32_t)(sfrValue & mask) >> shift);
}
/** Set a specific field in the given SFR value, according to the given mask and shift value.
* The unrelated fields/bits will not be changed */
static inline void mcuxClEls_setSfrField(volatile uint32_t *pSfr, uint32_t value, uint32_t mask, uint32_t shift)
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_HARDWARE_ACCESS("Sfr offset from address")
/* get the current value of the SFR and clear the bits that will be set */
uint32_t sfrValue = *pSfr & (~mask);
/* set the bits and re-write the full value to the SFR */
*pSfr = sfrValue | (((uint32_t)(value << shift)) & mask);
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_HARDWARE_ACCESS()
}
/** Tests if the ELS is in BUSY state.
* @retval @c true if the ELS is in BUSY state */
static inline bool mcuxClEls_isBusy(void)
{
return (0u != MCUXCLELS_SFR_BITREAD(ELS_STATUS, ELS_BUSY) );
}
/** Macros to access the bit fields for the ELS_STATUS SFR */
#define MCUXCLELS_SFR_STATUS_ELS_BUSY ELS_BUSY
#define MCUXCLELS_SFR_STATUS_ELS_IRQ ELS_IRQ
#define MCUXCLELS_SFR_STATUS_ELS_ERR ELS_ERR
#define MCUXCLELS_SFR_STATUS_PRNG_RDY PRNG_RDY
#define MCUXCLELS_SFR_STATUS_ECDSA_VFY_STATUS ECDSA_VFY_STATUS
#define MCUXCLELS_SFR_STATUS_PPROT PPROT
#define MCUXCLELS_SFR_STATUS_DRBG_ENT_LVL DRBG_ENT_LVL
#define MCUXCLELS_SFR_STATUS_DTRNG_BUSY DTRNG_BUSY
#define MCUXCLELS_SFR_STATUS_ELS_LOCKED ELS_LOCKED
/** Gets a specific field in the ELS_STATUS SFR.
* @param field: Any field name in MCUXCLELS_SFR_STATUS_* */
#define MCUXCLELS_GET_STATUS_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_STATUS), MCUXCLELS_SFR_FIELD_MASK(ELS_STATUS, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_STATUS, field))
/** Macros to access the bit fields for the ELS_CTRL SFR */
#define MCUXCLELS_SFR_CTRL_ELS_EN ELS_EN
#define MCUXCLELS_SFR_CTRL_START ELS_START
#define MCUXCLELS_SFR_CTRL_RESET ELS_RESET
#define MCUXCLELS_SFR_CTRL_CMD ELS_CMD
#define MCUXCLELS_SFR_CTRL_BYTE_ORDER BYTE_ORDER
/** Gets a specific field in the ELS_CTRL SFR.
* @param field: Any field name in MCUXCLELS_SFR_CTRL_* */
#define MCUXCLELS_GET_CTRL_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_CTRL), MCUXCLELS_SFR_FIELD_MASK(ELS_CTRL, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_CTRL, field))
/** Sets a specific field in the ELS_CTRL SFR. The unrelated fields/bits will not be changed
* @param field: Any field name in MCUXCLELS_SFR_CTRL_*
* @param value: The value to set the requested SFR field to */
#define MCUXCLELS_SET_CTRL_FIELD(field, value) \
mcuxClEls_setSfrField(&MCUXCLELS_SFR_READ(ELS_CTRL), (value), MCUXCLELS_SFR_FIELD_MASK(ELS_CTRL, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_CTRL, field))
/** Macros to access the bit fields for the ELS_CFG SFR */
#define MCUXCLELS_SFR_CFG_ADCTRL ADCTRL
#define MCUXCLELS_SFR_CFG_SHA2_DIRECT SHA2_DIRECT
/** Gets a specific field in the ELS_CFG SFR.
* @param field: Any field name in MCUXCLELS_SFR_CFG_* */
#define MCUXCLELS_GET_CFG_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_CFG), MCUXCLELS_SFR_FIELD_MASK(ELS_CFG, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_CFG, field))
/** Sets a specific field in the ELS_CFG SFR. The unrelated fields/bits will not be changed
* @param field: Any field name in MCUXCLELS_SFR_CFG_*
* @param value: The value to set the requested SFR field to */
#define MCUXCLELS_SET_CFG_FIELD(field, value) \
mcuxClEls_setSfrField(&MCUXCLELS_SFR_READ(ELS_CFG), (value), MCUXCLELS_SFR_FIELD_MASK(ELS_CFG, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_CFG, field))
/** Macros to access the bit fields for the ELS_ERR_STATUS SFR */
#define MCUXCLELS_SFR_ERR_STATUS_BUS_ERR BUS_ERR
#define MCUXCLELS_SFR_ERR_STATUS_OPN_ERR OPN_ERR
#define MCUXCLELS_SFR_ERR_STATUS_ALG_ERR ALG_ERR
#define MCUXCLELS_SFR_ERR_STATUS_ITG_ERR ITG_ERR
#define MCUXCLELS_SFR_ERR_STATUS_FLT_ERR FLT_ERR
#define MCUXCLELS_SFR_ERR_STATUS_PRNG_ERR PRNG_ERR
#define MCUXCLELS_SFR_ERR_STATUS_ERR_LVL ERR_LVL
#define MCUXCLELS_SFR_ERR_STATUS_DTRNG_ERR DTRNG_ERR
/** Gets a specific field in the ELS_ERR_STATUS SFR.
* @param field: Any field name in MCUXCLELS_SFR_ERR_STATUS_* */
#define MCUXCLELS_GET_ERROR_STATUS_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_ERR_STATUS), MCUXCLELS_SFR_FIELD_MASK(ELS_ERR_STATUS, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_ERR_STATUS, field))
/** Checks if a specific error bit in the ELS_ERR_STATUS SFR is set.
* @retval @c true if the requested ELS error status bit is set */
#define MCUXCLELS_IS_ERROR_BIT_SET(field) \
(1u == MCUXCLELS_GET_ERROR_STATUS_FIELD(field))
/** Macros to access the bit fields for the ELS_CMDCRC_CTRL SFR */
#define MCUXCLELS_SFR_CMDCRC_CTRL_CMDCRC_RST CMDCRC_RST
#define MCUXCLELS_SFR_CMDCRC_CTRL_CMDCRC_EN CMDCRC_EN
/** Sets a specific field in the ELS_CMDCRC_CTRL SFR. The unrelated fields/bits will not be changed
* @param field: Any field name in MCUXCLELS_SFR_CMDCRC_CTRL_*
* @param value: The value to set the requested SFR field to */
#define MCUXCLELS_SET_CMDCRC_CTRL_FIELD(field, value) \
mcuxClEls_setSfrField(&MCUXCLELS_SFR_READ(ELS_CMDCRC_CTRL), (value), MCUXCLELS_SFR_FIELD_MASK(ELS_CMDCRC_CTRL, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_CMDCRC_CTRL, field))
/** Macros to access the bit fields for the ELS_SHA2_CTRL SFR */
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_START SHA2_START
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_RST SHA2_RST
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_INIT SHA2_INIT
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_LOAD SHA2_LOAD
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_MODE SHA2_MODE
#define MCUXCLELS_SFR_SHA2_CTRL_SHA2_BYTE_ORDER SHA2_BYTE_ORDER
/** Gets a specific field in the ELS_SHA2_CTRL SFR.
* @param field: Any field name in MCUXCLELS_SFR_SHA2_CTRL_* */
#define MCUXCLELS_GET_SHA2_CTRL_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_SHA2_CTRL), MCUXCLELS_SFR_FIELD_MASK(ELS_SHA2_CTRL, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_SHA2_CTRL, field))
/** Sets a specific field in the ELS_SHA2_CTRL SFR. The unrelated fields/bits will not be changed
* @param field: Any field name in MCUXCLELS_SFR_SHA2_CTRL_*
* @param value: The value to set the requested SFR field to */
#define MCUXCLELS_SET_SHA2_CTRL_FIELD(field, value) \
mcuxClEls_setSfrField(&MCUXCLELS_SFR_READ(ELS_SHA2_CTRL), (value), MCUXCLELS_SFR_FIELD_MASK(ELS_SHA2_CTRL, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_SHA2_CTRL, field))
/** Macro to access the bit fields for the ELS_SHA2_STATUS SFR */
#define MCUXCLELS_SFR_SHA2_STATUS_SHA2_BUSY SHA2_BUSY
/** Gets a specific field in the ELS_SHA2_STATUS SFR.
* @param field: Any field name in MCUXCLELS_SFR_SHA2_STATUS_* */
#define MCUXCLELS_GET_SHA2_STATUS_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_SHA2_STATUS), MCUXCLELS_SFR_FIELD_MASK(ELS_SHA2_STATUS, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_SHA2_STATUS, field))
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
/**
* Macros to access the bit fields for the ELS_GDET_EVTCNT SFR
* */
#define MCUXCLELS_SFR_GDET_EVTCNT_GDET_EVTCNT GDET_EVTCNT
#define MCUXCLELS_SFR_GDET_EVTCNT_GDET_EVTCNT_CLR_DONE GDET_EVTCNT_CLR_DONE
/** Gets a specific field in ELS_GDET_EVTCNT SFR.
* @param field: Any field name in MCUXCLELS_SFR_GDET_EVTCNT_* */
#define MCUXCLELS_GET_GDET_EVTCNT_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_GDET_EVTCNT), MCUXCLELS_SFR_FIELD_MASK(ELS_GDET_EVTCNT, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_GDET_EVTCNT, field))
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
/** Macros to access the bit fields for the ELS_INT_ENABLE SFR */
#define MCUXCLELS_SFR_INT_ENABLE_INT_EN INT_EN
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define MCUXCLELS_SFR_INT_ENABLE_GDET_INT_EN GDET_INT_EN
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
/** Gets a specific field in the ELS_INT_ENABLE SFR.
* @param field: Any field name in MCUXCLELS_SFR_INT_ENABLE_* */
#define MCUXCLELS_GET_INT_ENABLE_FIELD(field) \
mcuxClEls_getSfrField(MCUXCLELS_SFR_READ(ELS_INT_ENABLE), MCUXCLELS_SFR_FIELD_MASK(ELS_INT_ENABLE, field), MCUXCLELS_SFR_FIELD_SHIFT(ELS_INT_ENABLE, field))
/* Total buffer size in output, which is used for cache maintenance */
#define MCUXCLELS_HASH_BUFFER_SIZE(options) MCUXCLELS_HASH_BUFFER_SIZE_DIGEST(options) + MCUXCLELS_HASH_BUFFER_SIZE_RTF(options)
#define MCUXCLELS_HASH_BUFFER_SIZE_RTF(options) ( (MCUXCLELS_HASH_RTF_OUTPUT_ENABLE == options.bits.rtfoe) ? MCUXCLELS_HASH_RTF_OUTPUT_SIZE : 0u )
#define MCUXCLELS_HASH_BUFFER_SIZE_DIGEST(options) ( (1u < options.bits.hashmd) ? MCUXCLELS_HASH_OUTPUT_SIZE_SHA_512 : MCUXCLELS_HASH_OUTPUT_SIZE_SHA_256 )
#ifdef MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING
extern uint32_t mcuxClEls_rng_drbg_block_counter;
#define MCUXCLELS_RNG_DRBG_ITERATIVE_SEEDING_ITERATIONS 8u
#define MCUXCLELS_RNG_DRBG_BLOCK_COUNTER_THRESHOLD 4096u
#define MCUXCLELS_RNG_DRBG_ECCKEYGEN_INCREASE 10u
#define MCUXCLELS_RNG_DRBG_ECCSIGN_INCREASE 14u
#define MCUXCLELS_RNG_DRBG_ECCVERIFY_INCREASE 5u
#define MCUXCLELS_RNG_DRBG_KEYDELETE128_INCREASE 4u
#define MCUXCLELS_RNG_DRBG_KEYDELETE256_INCREASE 6u
#define MCUXCLELS_RNG_DRBG_DRBGREQUEST_INCREASE(outputLength) ((outputLength + 15u) / 16u)
/**
* @brief This function resets the internal ELS DRBG block counter and reseeds the ELS DRBG
* using the iterative reseeding procedure
*
* @retval #MCUXCLELS_STATUS_SW_FAULT if a failure occurred
* @retval #MCUXCLELS_STATUS_OK on successful operation
*/
MCUX_CSSL_ANALYSIS_START_PATTERN_DESCRIPTIVE_IDENTIFIER()
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Dtrng_IterativeReseeding_Reseed)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Dtrng_IterativeReseeding_Reseed(const uint8_t *pDtrngConfig);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DESCRIPTIVE_IDENTIFIER()
#endif /* MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING */
/**
* @brief This function provides error handling for mcuxClEls_KeyExport_Async function
*
* @param[in] pOutput The memory address of the exported key which will be cleared
* @param[in] keyLength The key length which will be cleared
* @param[in] interrupt_state_old The interrupts state which will be restored
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_handleKeyExportError)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_handleKeyExportError(uint8_t *pOutput, size_t keyLength, mcuxClEls_InterruptOptionEn_t interrupt_state_old);
/* Functional macro to check for ELS Level 1 errors */
#define MCUXCLELS_LEVEL1_ERROR(returnCode) (MCUXCLELS_STATUS_HW_OPERATIONAL == (returnCode)) || (MCUXCLELS_STATUS_HW_ALGORITHM == (returnCode)) || (MCUXCLELS_STATUS_HW_BUS == (returnCode))
/** read from ELS PRNG SFR. */
static inline uint32_t mcuxClEls_readPrngOut(void)
{
return MCUXCLELS_SFR_READ(ELS_PRNG_DATOUT);
}
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_INTERNAL_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/internal/mcuxClEls_Internal_Common.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Internal_Common.h
* @brief ELS header for common internal functionality.
*/
#ifndef MCUXCLELS_INTERNAL_COMMON_H_
#define MCUXCLELS_INTERNAL_COMMON_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common types
#include <platform_specific_headers.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @def MCUXCLELS_HW_VERSION
* @ingroup mcuxClEls_Common
* @brief Compatible ELS hardware IP version for the CLNS release that this header is part of.
*/
#ifndef MCUXCL_FEATURE_ELS_GET_FW_VERSION
#define MCUXCLELS_HW_VERSION ((mcuxClEls_HwVersion_t) { \
.bits = { \
.revision = (uint32_t) ELS_HW_VERSION_REVISION, \
.minor = (uint32_t) ELS_HW_VERSION_MINOR, \
.major = (uint32_t) ELS_HW_VERSION_MAJOR, \
.level = (uint32_t) ELS_HW_VERSION_LEVEL \
} \
})
#else /* MCUXCL_FEATURE_ELS_GET_FW_VERSION */
#define MCUXCLELS_HW_VERSION ((mcuxClEls_HwVersion_t) { \
.bits = { \
.revision = (uint32_t) ELS_HW_VERSION_REVISION, \
.minor = (uint32_t) ELS_HW_VERSION_MINOR, \
.major = (uint32_t) ELS_HW_VERSION_MAJOR, \
.fw_revision = (uint32_t) ELS_HW_VERSION_FW_REVISION, \
.fw_minor = (uint32_t) ELS_HW_VERSION_FW_MINOR, \
.fw_major = (uint32_t) ELS_HW_VERSION_FW_MAJOR \
} \
})
#endif /* MCUXCL_FEATURE_ELS_GET_FW_VERSION */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_INTERNAL_COMMON_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/internal/mcuxClEls_Internal_mapping.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Internal_mapping.h
* @brief Header providing mapping for legacy definitions (with CSS)
*/
#ifndef MCUXCLELS_INTERNAL_MAPPING_H_
#define MCUXCLELS_INTERNAL_MAPPING_H_
#if !defined(ELS_KS_CNT)
#define ELS_KS_CNT CSS_KS_CNT
#endif
#if !defined(ID_CFG_ELS_CMD_AUTH_CIPHER)
#define ID_CFG_ELS_CMD_AUTH_CIPHER ID_CFG_CSS_CMD_AUTH_CIPHER
#endif
#if !defined(ID_CFG_ELS_CMD_CHAL_RESP_GEN)
#define ID_CFG_ELS_CMD_CHAL_RESP_GEN ID_CFG_CSS_CMD_CHAL_RESP_GEN
#endif
#if !defined(ID_CFG_ELS_CMD_CIPHER)
#define ID_CFG_ELS_CMD_CIPHER ID_CFG_CSS_CMD_CIPHER
#endif
#if !defined(ID_CFG_ELS_CMD_CKDF)
#define ID_CFG_ELS_CMD_CKDF ID_CFG_CSS_CMD_CKDF
#endif
#if !defined(ID_CFG_ELS_CMD_CMAC)
#define ID_CFG_ELS_CMD_CMAC ID_CFG_CSS_CMD_CMAC
#endif
#if !defined(ID_CFG_ELS_CMD_DRBG_TEST)
#define ID_CFG_ELS_CMD_DRBG_TEST ID_CFG_CSS_CMD_DRBG_TEST
#endif
#if !defined(ID_CFG_ELS_CMD_DTRNG_CFG_LOAD)
#define ID_CFG_ELS_CMD_DTRNG_CFG_LOAD ID_CFG_CSS_CMD_DTRNG_CFG_LOAD
#endif
#if !defined(ID_CFG_ELS_CMD_DTRNG_EVAL)
#define ID_CFG_ELS_CMD_DTRNG_EVAL ID_CFG_CSS_CMD_DTRNG_EVAL
#endif
#if !defined(ID_CFG_ELS_CMD_DTRNG_PRVL_CFG_LOAD)
#define ID_CFG_ELS_CMD_DTRNG_PRVL_CFG_LOAD ID_CFG_CSS_CMD_DTRNG_PRVL_CFG_LOAD
#endif
#if !defined(ID_CFG_ELS_CMD_ECKXH)
#define ID_CFG_ELS_CMD_ECKXH ID_CFG_CSS_CMD_ECKXH
#endif
#if !defined(ID_CFG_ELS_CMD_ECSIGN)
#define ID_CFG_ELS_CMD_ECSIGN ID_CFG_CSS_CMD_ECSIGN
#endif
#if !defined(ID_CFG_ELS_CMD_ECVFY)
#define ID_CFG_ELS_CMD_ECVFY ID_CFG_CSS_CMD_ECVFY
#endif
#if !defined(ID_CFG_ELS_CMD_GDET_CFG_LOAD)
#define ID_CFG_ELS_CMD_GDET_CFG_LOAD ID_CFG_CSS_CMD_GDET_CFG_LOAD
#endif
#if !defined(ID_CFG_ELS_CMD_GDET_TRIM)
#define ID_CFG_ELS_CMD_GDET_TRIM ID_CFG_CSS_CMD_GDET_TRIM
#endif
#if !defined(ID_CFG_ELS_CMD_HASH)
#define ID_CFG_ELS_CMD_HASH ID_CFG_CSS_CMD_HASH
#endif
#if !defined(ID_CFG_ELS_CMD_HKDF)
#define ID_CFG_ELS_CMD_HKDF ID_CFG_CSS_CMD_HKDF
#endif
#if !defined(ID_CFG_ELS_CMD_HMAC)
#define ID_CFG_ELS_CMD_HMAC ID_CFG_CSS_CMD_HMAC
#endif
#if !defined(ID_CFG_ELS_CMD_KDELETE)
#define ID_CFG_ELS_CMD_KDELETE ID_CFG_CSS_CMD_KDELETE
#endif
#if !defined(ID_CFG_ELS_CMD_KEYGEN)
#define ID_CFG_ELS_CMD_KEYGEN ID_CFG_CSS_CMD_KEYGEN
#endif
#if !defined(ID_CFG_ELS_CMD_KEYIN)
#define ID_CFG_ELS_CMD_KEYIN ID_CFG_CSS_CMD_KEYIN
#endif
#if !defined(ID_CFG_ELS_CMD_KEYOUT)
#define ID_CFG_ELS_CMD_KEYOUT ID_CFG_CSS_CMD_KEYOUT
#endif
#if !defined(ID_CFG_ELS_CMD_KEYPROV)
#define ID_CFG_ELS_CMD_KEYPROV ID_CFG_CSS_CMD_KEYPROV
#endif
#if !defined(ID_CFG_ELS_CMD_TLS)
#define ID_CFG_ELS_CMD_TLS ID_CFG_CSS_CMD_TLS
#endif
#if (!defined(ID_CFG_ELS_CMD_RND_REQ)) && defined(ID_CFG_CSS_CMD_RND_REQ)
#define ID_CFG_ELS_CMD_RND_REQ ID_CFG_CSS_CMD_RND_REQ
#endif
#if (!defined(ID_CFG_ELS_CMD_DRBG_REQ)) && defined(ID_CFG_CSS_CMD_DRBG_REQ)
#define ID_CFG_ELS_CMD_DRBG_REQ ID_CFG_CSS_CMD_DRBG_REQ
#endif
#endif /* MCUXCLELS_INTERNAL_MAPPING_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/internal/mcuxClEls_SfrAccess.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_SfrAccess.h
* @brief Provide macros for mcuxClEls internal use.
* This header declares internal macros to deduplicate code and support for internal use only. */
#ifndef MCUXCLELS_SFRACCESS_H_
#define MCUXCLELS_SFRACCESS_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <platform_specific_headers.h>
#include <stdint.h>
#include <stdbool.h>
#include <internal/mcuxClEls_Internal_mapping.h>
#ifdef __cplusplus
extern "C" {
#endif
/**** ****/
/**** ELS Hardware Abstraction Layer ****/
/**** ****/
/**
* Definitions for accessing ELS SFRs via, e.g., IP_ELS->STATUS.
*/
/** Helper macros for constructing SFR field name constants */
#define MCUXCLELS_PASTE(a,b) a ## b
#define MCUXCLELS_CONCAT(a,b) MCUXCLELS_PASTE(a,b)
#define MCUXCLELS_SFR_FIELD(prefix,sfr,field) MCUXCLELS_CONCAT(prefix,MCUXCLELS_CONCAT(MCUXCLELS_CONCAT(sfr,_),field))
/** Helper macros to get the mask and shift values for a specific ELS SFR field */
#define MCUXCLELS_SFR_FIELD_MASK(sfr, field) MCUXCLELS_CONCAT(MCUXCLELS_SFR_FIELD(ELS_SFR_PREFIX,sfr,field), _MASK)
#define MCUXCLELS_SFR_FIELD_SHIFT(sfr, field) MCUXCLELS_CONCAT(MCUXCLELS_SFR_FIELD(ELS_SFR_PREFIX,sfr,field), _SHIFT)
#define MCUXCLELS_SFR_FIELD_FORMAT(sfr, field, val) (MCUXCLELS_SFR_FIELD(ELS_SFR_PREFIX,sfr,field) (val))
/**********************************************************/
/* Helper macros for ELS SFR access */
/**********************************************************/
/** Read from ELS SFR */
#define MCUXCLELS_SFR_READ(sfr) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_INTEGER_TO_POINTER("Converting address defined externally to SFR pointer") \
(ELS_SFR_BASE->ELS_SFR_NAME(sfr)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_INTEGER_TO_POINTER()
/** Write to ELS SFR */
#define MCUXCLELS_SFR_WRITE(sfr, value) \
do{ \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Converting address defined externally to SFR pointer") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_HARDWARE_ACCESS("Sfr offset from address") \
ELS_SFR_BASE->ELS_SFR_NAME(sfr) = (value); \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_HARDWARE_ACCESS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER() \
} while(false)
/** Read from ELS SFR bit field */
#define MCUXCLELS_SFR_BITREAD(sfr, bit) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Converting address defined externally to SFR pointer") \
((ELS_SFR_BASE->ELS_SFR_NAME(sfr) & MCUXCLELS_SFR_FIELD_MASK(sfr, bit)) >> MCUXCLELS_SFR_FIELD_SHIFT(sfr, bit)) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER() \
/** Set bit field of ELS SFR (read-modify-write) */
#define MCUXCLELS_SFR_BITSET(sfr, bit) \
do{ ELS_SFR_BASE->ELS_SFR_NAME(sfr) |= MCUXCLELS_SFR_FIELD_MASK(sfr, bit); } while(false)
/** Clear bit field of ELS SFR (read-modify-write) */
#define MCUXCLELS_SFR_BITCLEAR(sfr, bit) \
do{ ELS_SFR_BASE->ELS_SFR_NAME(sfr) &= (~ (uint32_t) MCUXCLELS_SFR_FIELD_MASK(sfr, bit)); } while(false)
/** Set value of multi-bit field of ELS SFR (read-modify-write) */
#define MCUXCLELS_SFR_BITVALSET(sfr, bit, val) \
do{ \
uint32_t temp = ELS_SFR_BASE->ELS_SFR_NAME(sfr) & (~ (uint32_t) MCUXCLELS_SFR_FIELD_MASK(sfr, bit)); \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_HARDWARE_ACCESS("Sfr offset from address") \
ELS_SFR_BASE->ELS_SFR_NAME(sfr) = temp | ((val) << MCUXCLELS_SFR_FIELD_SHIFT(sfr, bit)) & MCUXCLELS_SFR_FIELD_MASK(sfr, bit); \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_HARDWARE_ACCESS() \
} while(false)
/**** ------------------------------ ****/
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_SFRACCESS_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020, 2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls.h
* @brief Top-level include file for the ELS driver
*
* This includes headers for all of the functionality provided by the ELS IP.
*
* @defgroup mcuxClEls mcuxClEls
* @brief ELS driver
*
* This component abstracts the hardware access to the ELS IP.
* The library exposes the following hardware functionality:
* <ol>
* <li> COMMON
* <ul>
* <li> Determine information of the underlying ELS hardware IP
* <ul> <li> #mcuxClEls_GetHwVersion </ul>
* @if MCUXCL_FEATURE_ELS_HWCONFIG
* <ul> <li> #mcuxClEls_GetHwConfig </ul>
* @endif
* <ul> <li> #mcuxClEls_GetHwState </ul>
* <li> ELS enabling, disabling, and software reset
* <ul> <li> #mcuxClEls_Enable_Async </ul>
* <ul> <li> #mcuxClEls_Reset_Async </ul>
* <ul> <li> #mcuxClEls_Disable </ul>
* <li> Interrupt management
* <ul> <li> #mcuxClEls_SetIntEnableFlags </ul>
* <ul> <li> #mcuxClEls_GetIntEnableFlags </ul>
* <ul> <li> #mcuxClEls_ResetIntFlags </ul>
* <ul> <li> #mcuxClEls_SetIntFlags </ul>
* <li> Wait for completion of an ELS operation
* <ul> <li> #mcuxClEls_WaitForOperation </ul>
* <ul> <li> #mcuxClEls_LimitedWaitForOperation </ul>
* <li> Error handling
* <ul> <li> #mcuxClEls_ResetErrorFlags </ul>
* <ul> <li> #mcuxClEls_GetErrorCode </ul>
* <ul> <li> #mcuxClEls_GetErrorLevel </ul>
* <li> Random delay feature for AES based operations
* <ul> <li> #mcuxClEls_SetRandomStartDelay </ul>
* <ul> <li> #mcuxClEls_GetRandomStartDelay </ul>
* @if MCUXCL_FEATURE_ELS_LOCKING
* <li> ELS Locking
* <ul> <li> #mcuxClEls_GetLock </ul>
* <ul> <li> #mcuxClEls_ReleaseLock </ul>
* <ul> <li> #mcuxClEls_IsLocked </ul>
* <ul> <li> #mcuxClEls_SetMasterUnlock </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_RESP_GEN
* <li> Calculate response to a hardware generated challenge
* <ul> <li> #mcuxClEls_RespGen_Async </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_DMA_ADDRESS_READBACK
* <li> Final Address Readback (security feature)
* <ul> <li> #mcuxClEls_GetLastDmaAddress </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK
* <li> Final Address Compare (security feature)
* <ul> <li> #mcuxClEls_CompareDmaFinalOutputAddress </ul>
* @endif
* </ul>
* <li> CRC
* <ul>
* <li> Command CRC checks
* <ul> <li> #mcuxClEls_ConfigureCommandCRC </ul>
* <ul> <li> #mcuxClEls_GetCommandCRC </ul>
* <ul> <li> #mcuxClEls_VerifyVsRefCRC </ul>
* <ul> <li> #mcuxClEls_UpdateRefCRC </ul>
* </ul>
* <li> HASH
* <ul>
* <li> SHA-2 hashing
* <ul> <li> #mcuxClEls_Hash_Async </ul>
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* <li> SHA-2 hashing in direct mode
* <ul> <li> #mcuxClEls_ShaDirect_Enable </ul>
* <ul> <li> #mcuxClEls_ShaDirect_Disable </ul>
* <ul> <li> #mcuxClEls_Hash_ShaDirect </ul>
* @endif
* </ul>
* @if MCUXCL_FEATURE_ELS_HMAC
* <li> HMAC (Keyed-Hash Message Authentication Code)
* <ul>
* <li> HMAC
* <ul> <li> #mcuxClEls_Hmac_Async </ul>
* </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_CMAC
* <li> CMAC (Cipher-Based Message Authentication Code)
* <ul>
* <li> CMAC
* <ul> <li> #mcuxClEls_Cmac_Async </ul>
* </ul>
* @endif
* <li> CIPHER (Symmetric Encryption)
* <ul>
* <li> AES
* <ul> <li> #mcuxClEls_Cipher_Async </ul>
* </ul>
* @if MCUXCL_FEATURE_ELS_AEAD
* <li> AEAD (Authenticated Encryption with Associated Data)
* <ul>
* <li> Authenticated Encryption with Associated Data
* <ul>
* <li> #mcuxClEls_Aead_Init_Async
* <li> #mcuxClEls_Aead_UpdateAad_Async
* <li> #mcuxClEls_Aead_UpdateData_Async
* <li> #mcuxClEls_Aead_Finalize_Async
* </ul>
* </ul>
* @endif
* <li> KEY MANAGEMENT
* <ul>
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_DELETE
* <li> Key deletion
* <ul> <li> #mcuxClEls_KeyDelete_Async </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_KEYPROV
* <li> Key provisioning
* <ul> <li> #mcuxClEls_KeyProvision_Async </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_KEYPROV_ROM
* <li> Key provisioning (ROM)
* <ul> <li> #mcuxClEls_KeyProvisionRom_Async </ul>
* @endif
* <li> Key import
* <ul> <li> #mcuxClEls_KeyImport_Async </ul>
* @if MCUXCL_FEATURE_ELS_PUK_INTERNAL
* <li> Public key import
* <ul> <li> #mcuxClEls_KeyImportPuk_Async </ul>
* @endif
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_EXPORT
* <li> Key export
* <ul> <li> #mcuxClEls_KeyExport_Async </ul>
* @endif
* <li> Key properties
* <ul> <li> #mcuxClEls_GetKeyProperties </ul>
* </ul>
* @if MCUXCL_FEATURE_ELS_RNG
* <li> RNG
* <ul>
* <li> Random data generation using DRBG
* <ul> <li> #mcuxClEls_Rng_DrbgRequest_Async </ul>
* @if MCUXCL_FEATURE_ELS_RND_RAW
* <li> Get raw (unprocessed) random data from the DTRNG
* <ul> <li> #mcuxClEls_Rng_DrbgRequestRaw_Async </ul>
* @endif
* <li> FIPS CAVP test mode
* <ul> <li> #mcuxClEls_Rng_DrbgTestInstantiate_Async </ul>
* <ul> <li> #mcuxClEls_Rng_DrbgTestExtract_Async </ul>
* <ul> <li> #mcuxClEls_Rng_DrbgTestAesEcb_Async </ul>
* <ul> <li> #mcuxClEls_Rng_DrbgTestAesCtr_Async </ul>
* <li> Configuration of the DTRNG
* <ul> <li> #mcuxClEls_Rng_Dtrng_ConfigLoad_Async </ul>
* <ul> <li> #mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async </ul>
* <li> PRNG
* @if MCUXCL_FEATURE_ELS_PRND_INIT
* <ul> <li> #mcuxClEls_Prng_Init_Async </ul>
* @endif
* <ul> <li> #mcuxClEls_Prng_GetRandomWord </ul>
* <ul> <li> #mcuxClEls_Prng_GetRandom </ul>
* </ul>
* @endif
* <li> ECC (Elliptic Curve Cryptography)
* <ul>
* <li> ECC Key generation
* <ul> <li> #mcuxClEls_EccKeyGen_Async </ul>
* @if MCUXCL_FEATURE_ELS_ECC_KEY_EXCHANGE
* <li> ECC key exchange
* <ul> <li> #mcuxClEls_EccKeyExchange_Async </ul>
* @if MCUXCL_FEATURE_ELS_PUK_INTERNAL
* <ul> <li> #mcuxClEls_EccKeyExchangeInt_Async </ul>
* @endif
* @endif
* <li> ECC signature generation
* <ul> <li> #mcuxClEls_EccSign_Async </ul>
* <li> ECC signature verification
* <ul> <li> #mcuxClEls_EccVerify_Async </ul>
* @if MCUXCL_FEATURE_ELS_PUK_INTERNAL
* <ul> <li> #mcuxClEls_EccVerifyInt_Async </ul>
* @endif
* </ul>
* <li> KEY DERIVATION
* <ul>
* <li> Key derivation
* <ul>
* @if MCUXCL_FEATURE_ELS_CKDF
* <li> #mcuxClEls_Ckdf_Sp800108_Async
* @if MCUXCL_FEATURE_ELS_CKDF_SP80056C
* <li> #mcuxClEls_Ckdf_Sp80056c_Extract_Async
* <li> #mcuxClEls_Ckdf_Sp80056c_Expand_Async
* @endif
* @endif
* @if MCUXCL_FEATURE_ELS_HKDF
* <li> #mcuxClEls_Hkdf_Rfc5869_Async
* <li> #mcuxClEls_Hkdf_Sp80056c_Async
* @endif
* </ul>
* @if MCUXCL_FEATURE_ELS_TLS
* <li> Master Key and Session Key derivation
* <ul>
* <li> #mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async
* <li> #mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async
* </ul>
* @endif
* </ul>
* @if MCUXCL_FEATURE_ELS_GLITCHDETECTOR
* <li> ELS Glitch Detector control
* <ul>
* <li> #mcuxClEls_GlitchDetector_LoadConfig_Async
* <li> #mcuxClEls_GlitchDetector_Trim_Async
* <li> #mcuxClEls_GlitchDetector_GetEventCounter
* <li> #mcuxClEls_GlitchDetector_ResetEventCounter
* </ul>
* @endif
* </ol>
*
* After each call to a function ending in <tt>_Async</tt>, one of the waiting functions #mcuxClEls_WaitForOperation or #mcuxClEls_LimitedWaitForOperation must be called to ensure completion.
* The waiting functions may fail, e.g., when the ELS enters an error state.
*/
#ifndef MCUXCLELS_H_
#define MCUXCLELS_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Types.h>
#include <mcuxClEls_Common.h>
#ifdef MCUXCL_FEATURE_ELS_CMD_CRC
#include <mcuxClEls_Crc.h>
#endif /* MCUXCL_FEATURE_ELS_CMD_CRC */
#include <mcuxClEls_Hash.h>
#include <mcuxClEls_Hmac.h>
#include <mcuxClEls_Cmac.h>
#include <mcuxClEls_Cipher.h>
#include <mcuxClEls_Aead.h>
#include <mcuxClEls_KeyManagement.h>
#include <mcuxClEls_Rng.h>
#include <mcuxClEls_Ecc.h>
#include <mcuxClEls_Kdf.h>
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#include <mcuxClEls_GlitchDetector.h>
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
#endif /* MCUXCLELS_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Aead.h
* @brief ELS header for Authenticated Encryption with Associated Data (AEAD).
*
* This header exposes functions that enable using the ELS for Authenticated Encryption with Associated Data (AEAD).
* The AEAD algorithm supported by ELS is AES in Galois/Counter Mode (GCM), as described in NIST Special Publication
* 800-38D.
*/
/**
* @defgroup mcuxClEls_Aead mcuxClEls_Aead
* @brief This part of the @ref mcuxClEls driver supports Authenticated Encryption with Associated Data (AEAD).
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_AEAD_H_
#define MCUXCLELS_AEAD_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Aead_Macros mcuxClEls_Aead_Macros
* @brief Defines all macros of @ref mcuxClEls_Aead
* @ingroup mcuxClEls_Aead
* @{
*/
/**
* @defgroup MCUXCLELS_AEAD_ MCUXCLELS_AEAD_
* @brief Defines macros used to initialize #mcuxClEls_AeadOption_t
* @ingroup mcuxClEls_Aead_Macros
* @{
*/
#define MCUXCLELS_AEAD_ENCRYPT ((uint8_t)0x00U) ///< Set #mcuxClEls_AeadOption_t.dcrpt to this value to encrypt data
#define MCUXCLELS_AEAD_DECRYPT ((uint8_t)0x01U) ///< Set #mcuxClEls_AeadOption_t.dcrpt to this value to decrypt data
#define MCUXCLELS_AEAD_STATE_IN_DISABLE ((uint8_t)0x00U) ///< Set #mcuxClEls_AeadOption_t.acpsie to this value to load the GCM state from ELS
#define MCUXCLELS_AEAD_STATE_IN_ENABLE ((uint8_t)0x01U) ///< Set #mcuxClEls_AeadOption_t.acpsie to this value to load the GCM state from the context
#define MCUXCLELS_AEAD_LASTINIT_TRUE (0x01U) ///< Set #mcuxClEls_AeadOption_t.lastinit to this value if this is the last call to init
#define MCUXCLELS_AEAD_LASTINIT_FALSE (0x00U) ///< Set #mcuxClEls_AeadOption_t.lastinit to this value if this is not the last call to init
#define MCUXCLELS_AEAD_EXTERN_KEY ((uint8_t)0x01U) ///< Set #mcuxClEls_AeadOption_t.extkey to this value to use an external key
#define MCUXCLELS_AEAD_INTERN_KEY ((uint8_t)0x00U) ///< Set #mcuxClEls_AeadOption_t.extkey to this value to use a key from the ELS keystore
#define MCUXCLELS_AEAD_ACPMOD_INIT ((uint8_t)0x00U) ///< Set #mcuxClEls_AeadOption_t.acpmod to this value for Init mode. For internal use
#define MCUXCLELS_AEAD_ACPMOD_AADPROC ((uint8_t)0x01U) ///< Set #mcuxClEls_AeadOption_t.acpmod to this value for Process Additional Authenticated Data mode. For internal use
#define MCUXCLELS_AEAD_ACPMOD_MSGPROC ((uint8_t)0x02U) ///< Set #mcuxClEls_AeadOption_t.acpmod to this value for Process Message mode. For internal use
#define MCUXCLELS_AEAD_ACPMOD_FINAL ((uint8_t)0x03U) ///< Set #mcuxClEls_AeadOption_t.acpmod to this value for Finalize mode. For internal use
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_AEAD_STATE_OUT_ENABLE ((uint8_t)0x01U) ///< Set #mcuxClEls_AeadOption_t.acpsoe to this value to save the state to the context. For internal use
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @}
*/
#define MCUXCLELS_AEAD_IV_BLOCK_SIZE 16U ///< AES-GCM IV Granularity: 128 bit (16 bytes)
#define MCUXCLELS_AEAD_AAD_BLOCK_SIZE 16U ///< AES-GCM AAD Granularity: 128 bit (16 bytes)
#define MCUXCLELS_AEAD_TAG_SIZE 16U ///< tag size: Tag generation supports only a 128 bit wide tag (16 bytes)
#define MCUXCLELS_AEAD_CONTEXT_SIZE 80U ///< context size: 512 bit (64 bytes) + 16 bytes for finalize
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Aead_Types mcuxClEls_Aead_Types
* @brief Defines all types of @ref mcuxClEls_Aead
* @ingroup mcuxClEls_Aead
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_Aead_Init_Async, #mcuxClEls_Aead_UpdateAad_Async, #mcuxClEls_Aead_UpdateData_Async and #mcuxClEls_Aead_Finalize_Async.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_AeadOption_t word-wise
struct
{
uint32_t :1; ///< RFU
uint32_t dcrpt :1; ///< Defines if encryption or decryption shall be performed
uint32_t acpmod :2; ///< This field is managed internally
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
uint32_t acpsoe :1; ///< This field is managed internally
#else
uint32_t :1; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
uint32_t acpsie :1; ///< This field is managed internally
uint32_t msgendw :4; ///< The size of the last data block (plain/cipher text) in bytes, without padding
uint32_t lastinit :1; ///< Defines whether this is the last call to init
uint32_t :2; ///< RFU
uint32_t extkey :1; ///< Defines whether an external key shall be used
uint32_t :18; ///< RFU
} bits; ///< Access #mcuxClEls_AeadOption_t bit-wise
} mcuxClEls_AeadOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Aead_Functions mcuxClEls_Aead_Functions
* @brief Defines all functions of @ref mcuxClEls_Aead
* @ingroup mcuxClEls_Aead
* @{
*/
/**
* @brief AES-GCM initialization
*
* This is the first stage of AEAD encryption/decryption. This generates the initial context out of the IV @p pIV and the key (@p pKey or @p keyIdx).
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The AEAD command options. For more information, see #mcuxClEls_AeadOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore
* @param[in] pKey Pointer to the key
* @param[in] keyLength Size of @p pKey in bytes
* @param[in] pIV Pointer to memory area that contains the IV
* @param[in] ivLength Size of @p pIV in bytes, with padding
* @param [out] pAeadCtx Pointer to the memory area that receives the AEAD context structure. Must be at least #MCUXCLELS_AEAD_CONTEXT_SIZE bytes long.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_AEAD_EXTERN_KEY</dt>
* <dd>@p keyIdx is ignored.
*
* @p pKey must be a valid AES key and @p keyLength a valid AES key size (see @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_).</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_AEAD_INTERN_KEY</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights.
*
* @p pKey and @p keyLength are ignored.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Aead_Init_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Aead_Init_Async(
mcuxClEls_AeadOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pIV,
size_t ivLength,
uint8_t * pAeadCtx
);
/**
* @brief AES-GCM partial initialization
*
* This is the first stage of AEAD encryption/decryption. This generates the initial context out of the IV @p pIV and the key (@p pKey or @p keyIdx).
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The AEAD command options. For more information, see #mcuxClEls_AeadOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore
* @param[in] pKey Pointer to the key
* @param[in] keyLength Size of @p pKey in bytes
* @param[in] pIV Pointer to memory area that contains the IV
* @param[in] ivLength Size of @p pIV in bytes, with padding
* @param [out] pAeadCtx Pointer to the memory area that receives the AEAD context structure. Must be at least #MCUXCLELS_AEAD_CONTEXT_SIZE bytes long.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_AEAD_EXTERN_KEY</dt>
* <dd>@p keyIdx is ignored.
*
* @p pKey must be a valid AES key and @p keyLength a valid AES key size (see @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_).</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_AEAD_INTERN_KEY</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights.
*
* @p pKey and @p keyLength are ignored.</dd>
*
* <dt>@p options.msgendw</dt>
* <dd>This field is ignored</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Aead_PartialInit_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Aead_PartialInit_Async(
mcuxClEls_AeadOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pIV,
size_t ivLength,
uint8_t * pAeadCtx
);
/**
* @brief AES-GCM update of the Additional Authenticated Data (AAD)
*
* This is the second stage of AEAD encryption/decryption. This updates the internal authentication tag with the AAD.
*
* #mcuxClEls_Aead_Init_Async must have been called before calling this function.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The AEAD command options. For more information, see #mcuxClEls_AeadOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore
* @param[in] pKey Pointer to the key
* @param[in] keyLength Size of @p pKey in bytes
* @param[in] pAad Memory area that contains the AAD
* @param[in] aadLength Length of the @p pAad in bytes with padding
* @param[in, out] pAeadCtx Pointer to the AEAD context structure. Must be at least #MCUXCLELS_AEAD_CONTEXT_SIZE bytes long.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_AEAD_EXTERN_KEY</dt>
* <dd>@p keyIdx is ignored.
*
* @p pKey must be a valid AES key and @p keyLength a valid AES key size (see @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_).</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_AEAD_INTERN_KEY</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights.
*
* @p pKey and @p keyLength are ignored.</dd>
*
* <dt>@p options.msgendw</dt>
* <dd>This field is ignored</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Aead_UpdateAad_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Aead_UpdateAad_Async(
mcuxClEls_AeadOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pAad,
size_t aadLength,
uint8_t * pAeadCtx
);
/**
* @brief AES-GCM update of the encrypted data
*
* This is the third stage of AEAD encryption/decryption. This processes the given plaintext (in case of encryption)
* or ciphertext (in case of decryption) and outputs the ciphertext (in case of encryption) or plaintext (in case of decryption).
*
* #mcuxClEls_Aead_Init_Async, #mcuxClEls_Aead_UpdateAad_Async must have been called before calling this function.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The AEAD command options. For more information, see #mcuxClEls_AeadOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore
* @param[in] pKey Pointer to the key
* @param[in] keyLength Size of @p pKey in bytes
* @param[in] pInput Pointer to the memory location of the data to be processed
* @param[in] inputLength Size of @p pInput in bytes with padding
* @param [out] pOutput Pointer to the processed data memory location
* @param[in, out] pAeadCtx Pointer to the AEAD context structure. Must be at least #MCUXCLELS_AEAD_CONTEXT_SIZE bytes long.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_AEAD_EXTERN_KEY</dt>
* <dd>@p keyIdx is ignored.
*
* @p pKey must be a valid AES key and @p keyLength a valid AES key size (see @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_).</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_AEAD_INTERN_KEY</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights.
*
* @p pKey and @p keyLength are ignored.</dd>
*
* <dt>@p options.msgendw</dt>
* <dd>This field has to be set to the size of the last data block (plain/cipher text) in bytes, without padding.
* In case the last block is a full block, this field has to be set to 0.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Aead_UpdateData_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Aead_UpdateData_Async(
mcuxClEls_AeadOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pOutput,
uint8_t * pAeadCtx
);
/**
* @brief AES-GCM final encryption/decryption
*
* This is the fourth stage of AEAD encryption/decryption. This updates the authentication tag with the final data
* length block and outputs the tag at the desired location.
*
* #mcuxClEls_Aead_Init_Async, #mcuxClEls_Aead_UpdateAad_Async and #mcuxClEls_Aead_UpdateData_Async must have been called
* before calling this function.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The AEAD command options. For more information, see #mcuxClEls_AeadOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore
* @param[in] pKey Pointer to the key
* @param[in] keyLength Size of @p pKey in bytes
* @param[in] aadLength Length of the complete Additional Authenticated Data (AAD) in bytes, without padding.
* @param[in] dataLength Length of the complete plaintext/ciphertext in bytes, without padding.
* @param [out] pTag Pointer where the resulting tag will be stored
* @param[in] pAeadCtx Pointer to the AEAD context structure. Must be at least #MCUXCLELS_AEAD_CONTEXT_SIZE bytes long.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_AEAD_EXTERN_KEY</dt>
* <dd>@p keyIdx is ignored.
*
* @p pKey must be a valid AES key and @p keyLength a valid AES key size (see @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_).</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_AEAD_INTERN_KEY</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights.
*
* @p pKey and @p keyLength are ignored.</dd>
*
* <dt>@p options.msgendw</dt>
* <dd>This field is ignored</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Aead_Finalize_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Aead_Finalize_Async(
mcuxClEls_AeadOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
size_t aadLength,
size_t dataLength,
uint8_t * pTag,
uint8_t * pAeadCtx
);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_AEAD_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Cipher.h
+239
View File
@@ -0,0 +1,239 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Cipher.h
* @brief ELS header for symmetric ciphers.
*
* This header exposes functions that enable using the ELS for symmetric encryption/decryption.
* The cipher algorithm supported by ELS is AES in the following modes:
* - Electronic Code Book (ECB) mode,
* - Cipher Block Chaining (CBC) mode, and
* - Counter (CTR) mode.
* Supported key sizes are 128, 192, and 256 bits.
*/
/**
* @defgroup mcuxClEls_Cipher mcuxClEls_Cipher
* @brief This part of the @ref mcuxClEls driver supports functionality for symmetric ciphers
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_CIPHER_H_
#define MCUXCLELS_CIPHER_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Cipher_Macros mcuxClEls_Cipher_Macros
* @brief Defines all macros of @ref mcuxClEls_Cipher
* @ingroup mcuxClEls_Cipher
* @{
*/
/**
* @defgroup MCUXCLELS_CIPHER_ MCUXCLELS_CIPHER_
* @brief Defines valid options to be used by #mcuxClEls_CipherOption_t
* @ingroup mcuxClEls_Cipher_Macros
*
* Valid AES key sizes in bytes
* @{
*/
#define MCUXCLELS_CIPHER_ENCRYPT 0U ///< Set this option at #mcuxClEls_CipherOption_t.dcrpt to perform an encryption
#define MCUXCLELS_CIPHER_DECRYPT 1U ///< Set this option at #mcuxClEls_CipherOption_t.dcrpt to perform a decryption
#define MCUXCLELS_CIPHER_STATE_OUT_ENABLE 1U ///< Set this option at #mcuxClEls_CipherOption_t.cphsoe to export the internal ELS state to @p pIV
#define MCUXCLELS_CIPHER_STATE_OUT_DISABLE 0U ///< Set this option at #mcuxClEls_CipherOption_t.cphsoe to not export the internal ELS state
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CIPHER_STATE_IN_ENABLE 1U ///< Set this option at #mcuxClEls_CipherOption_t.cphsie to import an external ELS state from @p pIV
#define MCUXCLELS_CIPHER_STATE_IN_DISABLE 0U ///< Set this option at #mcuxClEls_CipherOption_t.cphsie to not import an external ELS state
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
#define MCUXCLELS_CIPHER_EXTERNAL_KEY 1U ///< Set this option at #mcuxClEls_CipherOption_t.extkey to use a key located in CPU memory provided by @p pKey
#define MCUXCLELS_CIPHER_INTERNAL_KEY 0U ///< Set this option at #mcuxClEls_CipherOption_t.extkey to use a key located in ELS keystore privded by @p keyIdx
#define MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_ECB 0x00U ///< Set this option at #mcuxClEls_CipherOption_t.cphmde to use AES engine in Electornic Code Book (ECB) mode
#define MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CBC 0x01U ///< Set this option at #mcuxClEls_CipherOption_t.cphmde to use AES engine in Cipher Block Chaining (CBC) mode
#define MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CTR 0x02U ///< Set this option at #mcuxClEls_CipherOption_t.cphmde to use AES engine in Counter (CTR) mode
/**
* @}
*/
/**
* @ingroup mcuxClEls_Cipher_Macros
*/
#define MCUXCLELS_CIPHER_BLOCK_SIZE_AES ((size_t) 16U) ///< Size of an AES input block: 128 bit (16 bytes)
/**
* @defgroup MCUXCLELS_CIPHER_KEY_SIZE_AES_ MCUXCLELS_CIPHER_KEY_SIZE_AES_
* @brief Defines valid AES key sizes in bytes
* @ingroup mcuxClEls_Cipher_Macros
* @{
*/
#define MCUXCLELS_CIPHER_KEY_SIZE_AES_128 ((size_t) 16U) ///< Size of an AES128 key: 128 bit (16 bytes)
#define MCUXCLELS_CIPHER_KEY_SIZE_AES_192 ((size_t) 24U) ///< Size of an AES192 key: 192 bit (24 bytes)
#define MCUXCLELS_CIPHER_KEY_SIZE_AES_256 ((size_t) 32U) ///< Size of an AES192 key: 256 bit (32 bytes)
/**
* @}
*
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Cipher_Types mcuxClEls_Cipher_Types
* @brief Defines all types of @ref mcuxClEls_Cipher
* @ingroup mcuxClEls_Cipher
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_Cipher_Async
*
* Bit field to configure #mcuxClEls_Cipher_Async. See @ref MCUXCLELS_CIPHER_ for possible options.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_CipherOption_t word-wise
struct
{
uint32_t :1; ///< RFU
uint32_t dcrpt :1; ///< Define operation mode
uint32_t cphmde :2; ///< Define cipher mode
uint32_t cphsoe :1; ///< Define whether the ELS internal cipher state should be extracted to external memory or kept internally
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
uint32_t cphsie :1; ///< Define whether an external provided cipher state should be imported from external memory
uint32_t :7; ///< RFU
#else
uint32_t :8; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
uint32_t extkey :1; ///< Define whether an external key from memory or ELS internal key should be used
uint32_t :18; ///< RFU
} bits; ///< Access #mcuxClEls_CipherOption_t bit-wise
} mcuxClEls_CipherOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Cipher_Functions mcuxClEls_Cipher_Functions
* @brief Defines all functions of @ref mcuxClEls_Cipher
* @ingroup mcuxClEls_Cipher
* @{
*/
/**
* @brief Performs AES encryption/decryption.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Performs an AES encryption/decryption. Call #mcuxClEls_WaitForOperation to complete the operation.
* @param[in] options Encryption/decryption command options. For detailed information, see #mcuxClEls_CipherOption_t.
* @param[in] keyIdx Index of the key inside the ELS keystore. See parameter properties section in function description.
* @param[in] pKey Memory area that contains the key. See parameter properties section in function description.
* @param[in] keyLength Size of @p pKey in bytes. Must be a valid key size of @ref MCUXCLELS_CIPHER_KEY_SIZE_AES_. See parameter properties section in function description.
* @param[in] pInput Pointer to the input data to be encrypted/decrypted. Padding must be already applied.
* @param[in] inputLength Size of @p pInput in bytes, must be a multiple of the block size.
* @param[in, out] pIV A pointer to the memory location which contains/receives the IV/state of cipher. See parameter properties section in function description.
* @param[out] pOutput Pointer to the output buffer to store encrypted/decrypted data.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.cphmde == #MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_ECB</dt>
* <dd>@p pIV is ignored.
*
* <dt>@p options.cphmde == #MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CBC</dt>
* <dd>@p pIV must be set to the IV (when encrypting the first block) or to the last block of the ciphertext of the previous operation.
* ELS will always read and write to this location.
*
* @ifnot ELS_NO_INTERNAL_STATE_FLAGS
* @p options.cphsie is ignored.
* @endif
*
* @p options.cphsoe is ignored.</dd>
*
* <dt>@p options.cphmde == #MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CTR</dt>
* <dd>@p pIV must be set to the IV (when encrypting the first block) or to the state output of the previous
* encryption/decryption operation. ELS will write to this location if @p options.cphsoe == #MCUXCLELS_CIPHER_STATE_OUT_ENABLE.</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_CIPHER_EXTERNAL_KEY</dt>
* <dd>@p keyIdx is ignored.</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_CIPHER_INTERNAL_KEY</dt>
* <dd>@p pKey is ignored.
*
* @p keyLength is ignored.</dd>
*
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Cipher_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Cipher_Async(
mcuxClEls_CipherOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pIV,
uint8_t * pOutput
);
/**
* @}
*/
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_CIPHER_H_ */
/**
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Cmac.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Cmac.h
* @brief ELS header for CMAC support.
* This header exposes functions that enable using the ELS for the generation of cipher-based message authentication
* codes (CMAC).
* The supported cipher algorithm is AES-128 and AES-256.
*/
/**
* @defgroup mcuxClEls_Cmac mcuxClEls_Cmac
* @brief This part of the @ref mcuxClEls driver supports functionality for cipher-based message authentication codes (CMAC).
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_CMAC_H_
#define MCUXCLELS_CMAC_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* MACROS
**********************************************/
/**
* @defgroup mcuxClEls_Cmac_Macros mcuxClEls_Cmac_Macros
* @brief Defines all macros of @ref mcuxClEls_Cmac
* @ingroup mcuxClEls_Cmac
* @{
*/
/**
* @defgroup MCUXCLELS_CMAC_KEY_SIZE_ MCUXCLELS_CMAC_KEY_SIZE_
* @brief Valid CMAC key sizes in bytes
* @ingroup mcuxClEls_Cmac_Macros
* @{ */
#define MCUXCLELS_CMAC_KEY_SIZE_128 ((size_t) 16U) ///< Size of 128 bit CMAC key (16 bytes)
#define MCUXCLELS_CMAC_KEY_SIZE_256 ((size_t) 32U) ///< Size of 256 bit CMAC key (32 bytes)
/** @} */
/**
* @defgroup MCUXCLELS_CMAC_ MCUXCLELS_CMAC_
* @brief Option values for #mcuxClEls_CmacOption_t
* @ingroup mcuxClEls_Cmac_Macros
* @{ */
#define MCUXCLELS_CMAC_EXTERNAL_KEY_ENABLE 1U ///< Set #mcuxClEls_CmacOption_t.extkey to this value to use an external key
#define MCUXCLELS_CMAC_EXTERNAL_KEY_DISABLE 0U ///< Set #mcuxClEls_CmacOption_t.extkey to this value to use a key from the ELS keystore
#define MCUXCLELS_CMAC_INITIALIZE_DISABLE 0U ///< Set #mcuxClEls_CmacOption_t.initialize to this value if the message chunk does not include the first block of the message
#define MCUXCLELS_CMAC_INITIALIZE_ENABLE 1U ///< Set #mcuxClEls_CmacOption_t.initialize to this value if the message chunk includes the first block of the message
#define MCUXCLELS_CMAC_FINALIZE_DISABLE 0U ///< Set #mcuxClEls_CmacOption_t.finalize to this value if the message chunk does not include the last block of the message
#define MCUXCLELS_CMAC_FINALIZE_ENABLE 1U ///< Set #mcuxClEls_CmacOption_t.finalize to this value if the message chunk includes the last block of the message
/**
* @}
*/
#define MCUXCLELS_CMAC_OUT_SIZE ((size_t) 16U) ///< Size of CMAC output: 128 bit (16 bytes)
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Cmac_Types mcuxClEls_Cmac_Types
* @brief Defines all types of @ref mcuxClEls_Cmac
* @ingroup mcuxClEls_Cmac
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_Cmac_Async.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_CmacOption_t word-wise
struct
{
uint32_t initialize : 1; ///< Request initial processing for the first block of the message
uint32_t finalize : 1; ///< Request final processing for the last block of the message
uint32_t soe : 1; ///< This field is managed internally
uint32_t sie : 1; ///< This field is managed internally
uint32_t :9; ///< RFU
uint32_t extkey :1; ///< An external key should be used
uint32_t :18; ///< RFU
} bits; ///< Access #mcuxClEls_CmacOption_t bit-wise
} mcuxClEls_CmacOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Cmac_Functions mcuxClEls_Cmac_Functions
* @brief Defines all functions of @ref mcuxClEls_Cmac
* @ingroup mcuxClEls_Cmac
* @{
*/
/**
* @brief Performs CMAC with AES-128 or AES-256
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The command options. For more information, see #mcuxClEls_CmacOption_t.
* @param[in] keyIdx The CMAC key index
* @param[in] pKey Pointer to the padded CMAC key
* @param[in] keyLength Size of @p pKey in bytes. Must be a @ref MCUXCLELS_CMAC_KEY_SIZE_ "valid CMAC key size". See the parameter properties section in the function description.
* @param[in] pInput Pointer to a memory location which contains the data, padded via SP 800-38b standard, to be authenticated
* @param[in] inputLength Size of @p pInput in bytes before padding
* @param[in, out] pMac Pointer to the CMAC command state input/output. See the parameter properties section in the function description.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_CMAC_EXTERNAL_KEY_ENABLE</dt>
* <dd>@p keyIdx is ignored.</dd>
*
* <dt>@p options.extkey == #MCUXCLELS_CMAC_EXTERNAL_KEY_DISABLE</dt>
* <dd>@p pKey is ignored.
*
* @p keyLength is ignored.</dd>
*
* <dt>(@p options.finalize == #MCUXCLELS_CMAC_FINALIZE_DISABLE)</dt>
* <dd>The intermediate state is written to @p pMac. </dd>
*
* <dt>@p options.finalize == #MCUXCLELS_CMAC_FINALIZE_ENABLE</dt>
* <dd>The resulting MAC is written to @p pMac.
*
* @p options.soe is ignored.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if an invalid parameter was specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Cmac_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Cmac_Async(
mcuxClEls_CmacOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pKey,
size_t keyLength,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pMac
);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_CMAC_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Common.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Common.h
* @brief ELS header for common functionality.
*
* This header exposes functions that support hardware state management for other ELS commands.
*/
/**
* @defgroup mcuxClEls_Common mcuxClEls_Common
* @brief This part of the @ref mcuxClEls driver supports common functionality
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_COMMON_H_
#define MCUXCLELS_COMMON_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Types.h> // Common types
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup mcuxClEls_Common_Macros mcuxClEls_Common_Macros
* @brief Defines all macros of @ref mcuxClEls_Common
* @ingroup mcuxClEls_Common
* @{
*/
#define MCUXCLELS_API ///< Marks a function as a public API function of the mcuxClEls component
/**********************************************
* CONSTANTS
**********************************************/
#ifdef MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK
#define MCUXCLELS_DMA_READBACK_PROTECTION_TOKEN MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_CompareDmaFinalOutputAddress)
#else
#define MCUXCLELS_DMA_READBACK_PROTECTION_TOKEN (0u)
#endif
/**
* @defgroup mcuxClEls_InterruptOptionEn_t_Macros mcuxClEls_InterruptOptionEn_t
* @brief Defines interrupt enable option values
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_ELS_INTERRUPT_ENABLE (0x01U) ///< Set this option at #mcuxClEls_InterruptOptionEn_t.elsint to allow ELS to trigger an interrupt
#define MCUXCLELS_ELS_INTERRUPT_DISABLE (0x00U) ///< Set this option at #mcuxClEls_InterruptOptionEn_t.elsint to prevent ELS from triggering an interrupt
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define MCUXCLELS_GLITCH_DETECTOR_INTERRUPT_ENABLE ((uint32_t) 1U) ///< Set this option at #mcuxClEls_InterruptOptionEn_t.gdetint to allow the Glitch Detector to trigger an interrupt
#define MCUXCLELS_GLITCH_DETECTOR_INTERRUPT_DISABLE ((uint32_t) 0U) ///< Set this option at #mcuxClEls_InterruptOptionEn_t.gdetint to prevent the Glitch Detector from triggering an interrupt
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
/**@}*/
/**
* @defgroup mcuxClEls_InterruptOptionRst_t_Macros mcuxClEls_InterruptOptionRst_t
* @brief Defines interrupt reset option values
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_ELS_RESET_CLEAR (0x01U) ///< Set this option at #mcuxClEls_InterruptOptionRst_t.elsint to reset the ELS interrupt flag
#define MCUXCLELS_ELS_RESET_KEEP (0x00U) ///< Set this option at #mcuxClEls_InterruptOptionRst_t.elsint to keep the ELS interrupt flag
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define MCUXCLELS_GLITCH_DETECTOR_RESET_CLEAR ((uint32_t) 1U) ///< Set this option at #mcuxClEls_InterruptOptionRst_t.gdetint to reset the Glitch Detector interrupt flag
#define MCUXCLELS_GLITCH_DETECTOR_RESET_KEEP ((uint32_t) 0U) ///< Set this option at #mcuxClEls_InterruptOptionRst_t.gdetint to keep the Glitch Detector interrupt flag
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
/**@}*/
/**
* @defgroup mcuxClEls_InterruptOptionSet_t_Macros mcuxClEls_InterruptOptionSet_t
* @brief Defines interrupt set option values
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_ELS_INTERRUPT_SET (0x01U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.elsint to set the ELS interrupt flag
#define MCUXCLELS_ELS_INTERRUPT_KEEP (0x00U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.elsint to leave the ELS interrupt flag unchanged
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define MCUXCLELS_GLITCH_DETECTOR_NEG_SET (0x01U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.gdetint_neg to set the negative Glitch Detector interrupt flag
#define MCUXCLELS_GLITCH_DETECTOR_NEG_KEEP (0x00U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.gdetint_neg to leave the negative Glitch Detector interrupt flag unchanged
#define MCUXCLELS_GLITCH_DETECTOR_POS_SET (0x01U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.gdetint_pos to set the positive Glitch Detector interrupt flag
#define MCUXCLELS_GLITCH_DETECTOR_POS_KEEP (0x00U) ///< Set this option at #mcuxClEls_InterruptOptionSet_t.gdetint_pos to leave the positive Glitch Detector interrupt flag unchanged
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
/**@}*/
/**
* @defgroup MCUXCLELS_ERROR_FLAGS_ MCUXCLELS_ERROR_FLAGS_
* @brief Options for error flag clearing
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_ERROR_FLAGS_KEEP ((mcuxClEls_ErrorHandling_t) 0x0u) ///< Set this option at #mcuxClEls_ErrorHandling_t to not clear any error flags
#define MCUXCLELS_ERROR_FLAGS_CLEAR ((mcuxClEls_ErrorHandling_t) 0x1u) ///< Set this option at #mcuxClEls_ErrorHandling_t to clear all ELS error flags
/**@}*/
/**
* @defgroup MCUXCLELS_RESET_ MCUXCLELS_RESET_
* @brief Options for reset handling
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_RESET_DO_NOT_CANCEL ((mcuxClEls_ResetOption_t) 0x0u) ///< Set this option at #mcuxClEls_ResetOption_t to abort the requested command if another ELS operation is still running
#define MCUXCLELS_RESET_CANCEL ((mcuxClEls_ResetOption_t) 0x1u) ///< Set this option at #mcuxClEls_ResetOption_t to execute the requested command even if another ELS operation is still running
/**@}*/
/**
* @defgroup MCUXCLELS_STATUS_PPROT_ MCUXCLELS_STATUS_PPROT_
* @brief Values for the privilege/security level of ELS commands
*
* Note that some keys and memory areas may only be accessible when ELS is on a certain privilege/security level.
*
* The default value, before any command has been executed, is #MCUXCLELS_STATUS_PPROT_UNPRIVILEGED_NONSECURE.
*
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_STATUS_PPROT_UNPRIVILEGED_SECURE ((uint32_t) 0x0u) ///< This value of #mcuxClEls_HwState_t.pprot means that the most recently started ELS operation was or is running in unprivileged secure mode
#define MCUXCLELS_STATUS_PPROT_PRIVILEGED_SECURE ((uint32_t) 0x1u) ///< This value of #mcuxClEls_HwState_t.pprot means that the most recently started ELS operation was or is running in privileged secure mode
#define MCUXCLELS_STATUS_PPROT_UNPRIVILEGED_NONSECURE ((uint32_t) 0x2u) ///< This value of #mcuxClEls_HwState_t.pprot means that the most recently started ELS operation was or is running in unprivileged non-secure mode
#define MCUXCLELS_STATUS_PPROT_PRIVILEGED_NONSECURE ((uint32_t) 0x3u) ///< This value of #mcuxClEls_HwState_t.pprot means that the most recently started ELS operation was or is running in privileged non-secure mode
/**@}*/
/**
* @defgroup MCUXCLELS_STATUS_ECDSAVFY_ MCUXCLELS_STATUS_ECDSAVFY_
* @brief ECDSA verify check values
* @ingroup mcuxClEls_Common_Macros
* @{
*/
#define MCUXCLELS_STATUS_ECDSAVFY_NORUN ((uint32_t) 0x0u) ///< This value of #mcuxClEls_HwState_t.ecdsavfy means that no ECDSA verify operation has been executed
#define MCUXCLELS_STATUS_ECDSAVFY_FAIL ((uint32_t) 0x1u) ///< This value of #mcuxClEls_HwState_t.ecdsavfy means that the most recently finished ECDSA signature verification failed
#define MCUXCLELS_STATUS_ECDSAVFY_OK ((uint32_t) 0x2u) ///< This value of #mcuxClEls_HwState_t.ecdsavfy means that the most recently finished ECDSA signature verification passed
#define MCUXCLELS_STATUS_ECDSAVFY_ERROR ((uint32_t) 0x3u) ///< This value of #mcuxClEls_HwState_t.ecdsavfy means that an error has occurred
/**@}*/
/**
* @defgroup MCUXCLELS_STATUS_DRBGENTLVL_ MCUXCLELS_STATUS_DRBGENTLVL_
* @brief Constants for Entropy quality of the current DRBG instance
* @ingroup mcuxClEls_Common_Macros
* @{ */
#define MCUXCLELS_STATUS_DRBGENTLVL_NONE ((uint32_t) 0x0u) ///< This value of #mcuxClEls_HwState_t.drbgentlvl means that the DRBG is not running
#define MCUXCLELS_STATUS_DRBGENTLVL_LOW ((uint32_t) 0x1u) ///< This value of #mcuxClEls_HwState_t.drbgentlvl means that the DRBG can generate random numbers with a low security strength (sufficient for commands with a low DRBG security strength requirement, see the function description to check which level is required)
#define MCUXCLELS_STATUS_DRBGENTLVL_HIGH ((uint32_t) 0x2u) ///< This value of #mcuxClEls_HwState_t.drbgentlvl means that the DRBG can generate random numbers with 128 bits of security strength (sufficient for commands with a high DRBG security strength requirement, see the function description to check which level is required)
/** @} */
#ifdef MCUXCL_FEATURE_ELS_LOCKING
/**
* @defgroup MCUXCLELS_LOCKING_ MCUXCLELS_LOCKING_
* @brief Constants for ELS locking feature
* @ingroup mcuxClEls_Common_Macros
* @{ */
#define MCUXCLELS_MASTER_UNLOCK_ANY ((uint32_t) 0x1Fu) ///< Any bus master ID can override ELS lock
/** @} */
#endif /* MCUXCL_FEATURE_ELS_LOCKING */
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Common_Types mcuxClEls_Common_Types
* @brief Defines all types of @ref mcuxClEls_Common
* @ingroup mcuxClEls_Common
* @{
*/
/**
* @brief Result type of #mcuxClEls_GetHwVersion
*
* Contains the ELS version value.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_HwVersion_t word-wise
struct
{
uint32_t revision :4; ///< Revision number
uint32_t minor :8; ///< Minor version
uint32_t major :4; ///< Major version
#ifndef MCUXCL_FEATURE_ELS_GET_FW_VERSION
uint32_t level :4; ///< Release level version
uint32_t :12; ///< RFU
#else /* MCUXCL_FEATURE_ELS_GET_FW_VERSION */
uint32_t fw_revision :4; ///< Firmware Revision number
uint32_t fw_minor :8; ///< Firmware Minor version
uint32_t fw_major :4; ///< Firmware Major version
#endif /* MCUXCL_FEATURE_ELS_GET_FW_VERSION */
} bits; ///< Access #mcuxClEls_HwVersion_t bit-wise
} mcuxClEls_HwVersion_t;
/**
* @brief Result type of #mcuxClEls_GetHwState
*
* Contains ELS status information.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_HwState_t word-wise
struct
{
uint32_t busy :1; ///< ELS is busy
uint32_t irq :1; ///< ELS interrupt activated
uint32_t err :1; ///< ELS is in error state
uint32_t prngready :1; ///< ELS PRNG is seeded and ready to use
uint32_t ecdsavfy :2; ///< ECDSA verify operation state (For possible values of this field, see @ref MCUXCLELS_STATUS_ECDSAVFY_)
uint32_t pprot :2; ///< The privilege/security level of the most recently started ELS command (For possible values of this field, see @ref MCUXCLELS_STATUS_PPROT_)
uint32_t drbgentlvl :2; ///< Entropy quality of the current DRBG instance (For possible values of this field, see @ref MCUXCLELS_STATUS_DRBGENTLVL_)
uint32_t dtrng_busy: 1; ///< Indicates the DTRNG is gathering entropy
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
uint32_t gdet_pos :1; ///< Glitch detector interrupt activated (positive)
uint32_t gdet_neg :1; ///< Glitch detector interrupt activated (negative)
#else
uint32_t :2; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
uint32_t :3; ///< RFU
#ifdef MCUXCL_FEATURE_ELS_LOCKING
uint32_t els_locked :1; ///< ELS is locked
#else
uint32_t :1; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_LOCKING */
uint32_t :15; ///< RFU
} bits; ///< Access #mcuxClEls_HwState_t bit-wise
} mcuxClEls_HwState_t;
/**
* @brief Type to handle ELS error clearing options
*
* For possible values, see @ref MCUXCLELS_ERROR_FLAGS_.
*/
typedef uint32_t mcuxClEls_ErrorHandling_t;
/**
* @brief Type to handle ELS reset options
*
* For possible values, see @ref MCUXCLELS_RESET_.
*/
typedef uint32_t mcuxClEls_ResetOption_t;
/**
* @brief Command option type for #mcuxClEls_SetIntEnableFlags and #mcuxClEls_GetIntEnableFlags
*
* Used to get/set ELS interrupt enable options.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_InterruptOptionEn_t word-wise
struct
{
uint32_t elsint :1; ///< Whether ELS interrupt should be used. (For possible values of this field, see @ref mcuxClEls_InterruptOptionEn_t_Macros)
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
uint32_t gdetint :1; ///< Whether Glitch detector interrupt should be used. (For possible values of this field, see @ref mcuxClEls_InterruptOptionEn_t_Macros)
#else
uint32_t :1; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
uint32_t :30; ///< RFU
} bits; ///< Access #mcuxClEls_InterruptOptionEn_t bit-wise
} mcuxClEls_InterruptOptionEn_t;
/**
* @brief Type to control which ELS interrupts should be reset when calling #mcuxClEls_ResetIntFlags
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_InterruptOptionRst_t word-wise
struct
{
uint32_t elsint :1; ///< Whether ELS interrupt should be reset. (For possible values of this field, see @ref mcuxClEls_InterruptOptionRst_t_Macros)
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
uint32_t gdetint :1; ///< Whether Glitch detector interrupt should be reset. (For possible values of this field, see @ref mcuxClEls_InterruptOptionRst_t_Macros)
#else
uint32_t :1; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
uint32_t :30; ///< RFU
} bits; ///< Access #mcuxClEls_InterruptOptionRst_t bit-wise
} mcuxClEls_InterruptOptionRst_t;
/**
* @brief Type to control which ELS interrupts should be set when calling #mcuxClEls_SetIntFlags
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_InterruptOptionSet_t word-wise
struct
{
uint32_t elsint :1; ///< Whether ELS interrupt should be set. (For possible values of this field, see @ref mcuxClEls_InterruptOptionSet_t_Macros)
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
uint32_t gdetint_neg :1;///< Whether Glitch detector neg interrupt should be set. (For possible values of this field, see @ref mcuxClEls_InterruptOptionSet_t_Macros)
uint32_t gdetint_pos :1;///< Whether Glitch detector pos interrupt should be set. (For possible values of this field, see @ref mcuxClEls_InterruptOptionSet_t_Macros)
#else
uint32_t :2; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_GLITCHDETECTOR */
uint32_t :29; ///< RFU
} bits; ///< Access #mcuxClEls_InterruptOptionSet_t bit-wise
} mcuxClEls_InterruptOptionSet_t;
/**
* @brief Result type of #mcuxClEls_GetHwConfig
*
* Contains ELS configuration values.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_InterruptOptionSet_t word-wise
struct
{
uint32_t ciphersup :1; ///< Indicates whether the cipher command is supported
uint32_t authciphersup :1; ///< Indicates whether the auth_cipher command is supported
uint32_t ecsignsup :1; ///< Indicates whether the ecsign command is supported
uint32_t ecvfysup :1; ///< Indicates whether the ecvfy command is supported
uint32_t eckxchsup :1; ///< Indicates whether the dhkey_xch command is supported
uint32_t keygensup :1; ///< Indicates whether the keygen command is supported
uint32_t keyinsup :1; ///< Indicates whether the keyin command is supported
uint32_t keyoutsup :1; ///< Indicates whether the keyout command is supported
uint32_t kdeletesup :1; ///< Indicates whether the kdelete command is supported
uint32_t keyprovsup :1; ///< Indicates whether the keyprov command is supported
uint32_t ckdfsup :1; ///< Indicates whether the ckdf command is supported
uint32_t hkdfsup :1; ///< Indicates whether the hkdf command is supported
uint32_t tlsinitsup :1; ///< Indicates whether the tls_init command is supported
uint32_t hashsup :1; ///< Indicates whether the hash command is supported
uint32_t hmacsup :1; ///< Indicates whether the hmac command is supported
uint32_t cmacsup :1; ///< Indicates whether the cmac command is supported
uint32_t drbgreqsup :1; ///< Indicates whether the drbg_req command is supported
uint32_t drbgtestsup :1; ///< Indicates whether the drbg_test command is supported
uint32_t dtrgncfgloadsup :1; ///< Indicates whether the dtrng_cfg_load command is is supported
uint32_t dtrngevalsup :1; ///< Indicates whether the dtrng_eval command is supported
uint32_t gdetcfgloadsup :1; ///< Indicates whether the gdet_cfg_load command is supported
uint32_t gdettrimsup :1; ///< Indicates whether the gdet_trim command is supported
uint32_t :10; ///< RFU
} bits; ///< Access #mcuxClEls_InterruptOptionSet_t bit-wise
} mcuxClEls_HwConfig_t;
#define drbgreqsub drbgreqsup ///< Deprecated name for #mcuxClEls_HwConfig_t.drbgreqsup
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Common_Functions mcuxClEls_Common_Functions
* @brief Defines all functions of @ref mcuxClEls_Common
* @ingroup mcuxClEls_Common
* @{
*/
/**
* @brief Determines the version of the underlying ELS hardware IP.
*
* @attention This header was delivered as part of a CLNS release which is compatible with a specific ELS hardware IP version.
*
* @param[out] result Pointer which will be filled with the ELS hardware version
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetHwVersion)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwVersion(
mcuxClEls_HwVersion_t * result
);
#ifdef MCUXCL_FEATURE_ELS_HWCONFIG
/**
* @brief Determines the hardware configuration of the underlying ELS hardware IP.
*
* @param[out] result Pointer which will be filled with the ELS hardware configuration
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetHwConfig)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwConfig(
mcuxClEls_HwConfig_t * result
);
#endif /* MCUXCL_FEATURE_ELS_HWCONFIG */
/**
* @brief Determines the current state of the ELS.
*
* @param[out] result Pointer which will be filled with the ELS status information
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetHwState)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwState(
mcuxClEls_HwState_t * result
);
/**
* @brief Enables the ELS.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK_WAIT
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK_WAIT
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Enable_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Enable_Async(
void
);
/**
* @brief Perform a synchronous reset of the ELS.
*
* This means that:
* - any running ELS command will be stopped,
* - all errors will be cleared,
* - all keys will be deleted,
* - any RNG entropy will be discarded,
* - the glitch detector will be reset and
* - the run-time fingerprint will be restored to its default value.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options A value indicating whether any running ELS operations shall be canceled
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the reset
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Reset_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Reset_Async(
mcuxClEls_ResetOption_t options
);
/**
* @brief Disable the ELS.
*
* This is useful as a power saving mechanism.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Disable)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Disable(
void
);
/**
* @brief Set interrupt enable flags.
*
* @param[in] options The command options, determining which interrupts should be enabled or disabled. For more information, see #mcuxClEls_InterruptOptionEn_t.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_SetIntEnableFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetIntEnableFlags(
mcuxClEls_InterruptOptionEn_t options
);
/**
* @brief Get interrupt enable flags.
*
* @param[out] result Pointer which is filled with the configuration of the interrupts enable register.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetIntEnableFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetIntEnableFlags(
mcuxClEls_InterruptOptionEn_t * result
);
/**
* @brief Clear the interrupt status register.
*
* @param[in] options The command options, determining which interrupt status bits should be cleared. For more information, see #mcuxClEls_InterruptOptionRst_t.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ResetIntFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ResetIntFlags(
mcuxClEls_InterruptOptionRst_t options
);
/**
* @brief Set the interrupt status register, for debug and testing purposes.
*
* @param[in] options The command options, determining which interrupt status bits should be set. For more information, see #mcuxClEls_InterruptOptionSet_t.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_SetIntFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetIntFlags(
mcuxClEls_InterruptOptionSet_t options
);
/**
* @brief Wait for an ELS operation and optionally clear the error status.
*
* If an ELS operation is active, this function waits for completion of that operation. For this, the
* busy flag of ELS is polled. Additionally, this function checks and returns any applicable error indication.
* If no operation is active, the function returns immediately.
*
* @param[in] errorHandling Define if error flags shall be cleared.
*
* @retval #MCUXCLELS_STATUS_OK if the last operation was successful, or no operation was active
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_WaitForOperation)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_WaitForOperation(
mcuxClEls_ErrorHandling_t errorHandling
);
/**
* @brief Await the completion of an ELS operation for a limited amount of time and optionally clear the error status.
*
* If an ELS operation is active, this function waits for completion of that operation until a counter expires.
* For this, the busy flag of ELS is polled. The counting mechanism behaves like a simple for-loop from
* @p counterLimit to one. This counter does not have a well-defined relationship to real-world time.
* Additionally, this function checks and returns any applicable error indication.
* If no operation is active, the function returns immediately.
*
* @param[in] counterLimit The limit of the wait counter.
* @param[in] errorHandling Define if error flags shall be cleared.
*
* @retval #MCUXCLELS_STATUS_OK if the last operation was successful, or no operation was active
* @retval #MCUXCLELS_STATUS_SW_COUNTER_EXPIRED if the counter expired while waiting for the operation to complete
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_LimitedWaitForOperation)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_LimitedWaitForOperation(
uint32_t counterLimit,
mcuxClEls_ErrorHandling_t errorHandling
);
/**
* @brief Resets all error flags that have been set by a previous operation.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ResetErrorFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ResetErrorFlags(
void);
/**
* @brief Get the last ELS error code and optionally clear the error status.
*
* @param[in] errorHandling Define if error flags shall be cleared.
*
* @retval #MCUXCLELS_STATUS_OK if the last operation was successful or no operation was active
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetErrorCode)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetErrorCode(
mcuxClEls_ErrorHandling_t errorHandling
);
/**
* @brief Get the last ELS error code and level and optionally clear the error status.
*
* @param[in] errorHandling Define if error flags shall be cleared.
* @param[out] errorLevel Pointer to the location that will receive the value of the error level.
*
* @retval #MCUXCLELS_STATUS_OK if the last operation was successful or no operation was active
* @retval #MCUXCLELS_STATUS_ if the last operation resulted in an error
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetErrorLevel)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetErrorLevel(
mcuxClEls_ErrorHandling_t errorHandling,
uint32_t *errorLevel
);
/**
* @brief Set the random start delay for AES based operations. This impacts mcuxClEls_Aead_*, mcuxClEls_Cipher_*, mcuxClEls_Cmac_*, ncpClEls_Ckdf_*, mcuxClEls_KeyImport_Async, mcuxClEls_KeyExport_Async
*
* @param[in] startDelay Define the max random start delay. Acceptable values are a power of 2 minus one, starting from 0 to 1023 (0, 1, 3, 7, ..., 1023).
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_SetRandomStartDelay)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetRandomStartDelay(
uint32_t startDelay
);
/**
* @brief Get the random start delay for AES based operations.
*
* @param[out] startDelay Pointer to store random start delay configuration.
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetRandomStartDelay)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetRandomStartDelay(
uint32_t * startDelay
);
#ifdef MCUXCL_FEATURE_ELS_LOCKING
/**
* @brief Lock ELS to a session
*
* This operation locks the ELS, when the lock is obtained a nonzero value will be stored in @p sessionId, and the PPROT and bus Master ID
* of the locking command will be recorded. Subsequent unlocking can only be done by one of the following:
* 1. ELS reset
* 2. Normal unlock: calling #mcuxClEls_ReleaseLock with the correct @p sessionId, from the same bus Master ID and using the same PPROT settings.
* 3. Privileged unlock: calling #mcuxClEls_ReleaseLock with any value of @p sessionId, from the bus Master ID set with the #mcuxClEls_SetMasterUnlock
* command and PPROT settings 'secure privileged'.
* While ELS is locked read access is only permitted to ELS_STATUS and ELS_SESSION_ID and writes are only permitted to ELS_RESET, except for accesses that
* have the same bus Master ID and PPROT settings.
*
* @param[out] pSessionId The session identifier assigned to the lock, it is required to unlock the session, it will be zero when a lock could not be obtained.
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful
* @retval #MCUXCLELS_STATUS_SW_LOCKING_FAILED if the operation was not successful
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetLock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetLock(
uint32_t * pSessionId
);
/**
* @brief Release ELS lock for the session
*
* This operation unlocks the ELS when following conditions are met:
* 1. Normal unlock: providing the correct @p sessionId, from the same bus Master ID and using the same PPROT settings.
* 2. Privileged unlock: providing any value of @p sessionId, from the bus Master ID set with the #mcuxClEls_SetMasterUnlock command
* and PPROT settings 'secure privileged'.
* Invalid attempts to unlock ELS will result in a bus error.
*
* @param[in] sessionId The session identifier obtained while locking ELS
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ReleaseLock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ReleaseLock(
uint32_t sessionId
);
/**
* @brief Check if ELS is locked
*
* This operation returns the locking status of ELS.
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful and ELS is not locked
* @retval #MCUXCLELS_STATUS_SW_STATUS_LOCKED if the operation was successful and ELS is locked
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_IsLocked)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_IsLocked(void);
/**
* @brief Set the bus master ID that can unlock ELS
*
* This operation sets the bus master ID of the master that can override ELS lock. This command can only be executed once after reset.
* Invalid attempts to set the bus master ID will result in a bus error.
*
* @param[in] masterId The bus master identifier that can override the ELS lock. Special value #MCUXCLELS_MASTER_UNLOCK_ANY allows any bus master identifier to override the ELS lock.
*
* @retval #MCUXCLELS_STATUS_OK if the operation was successful
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_SetMasterUnlock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetMasterUnlock(
uint32_t masterId
);
#endif /* MCUXCL_FEATURE_ELS_LOCKING */
#ifdef MCUXCL_FEATURE_ELS_DMA_ADDRESS_READBACK
/**
* @brief Reads back the last address processed by the ELS DMA (security feature)
*
* @param[out] pLastAddress Pointer to the last address read/written by the ELS DMA
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetLastDmaAddress)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetLastDmaAddress(
uint32_t* pLastAddress
);
#endif /* MCUXCL_FEATURE_ELS_DMA_ADDRESS_READBACK */
#ifdef MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK
/**
* @brief Compares the last address processed by the ELS DMA with the expected final address of the output buffer given to the last ELS command (security feature).
* The given address @p outputStartAddress and expected length @p expectedLength determine the expected final address.
* This function can be used to verify that the final DMA transfer of an ELS command has completed as expected.
*
* @param[in] outputStartAddress Pointer to the output buffer of the last ELS operation
* @param[in] expectedLength Expected length of the output buffer of the last ELS operation
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*
* @retval #MCUXCLELS_STATUS_SW_COMPARISON_FAILED if the comparison between the expected final address and the actual final address processed by ELS fails
* @retval #MCUXCLELS_STATUS_OK_WAIT if the comparison was successful
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_CompareDmaFinalOutputAddress)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_CompareDmaFinalOutputAddress(
uint8_t *outputStartAddress,
size_t expectedLength
);
#endif /* MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_COMMON_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Crc.h
+641
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@@ -0,0 +1,641 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Crc.h
* @brief ELS header for Command CRC functionality.
*
* This header exposes functions that support the usage of the Command CRC feature for ELS.
*/
/**
* @defgroup mcuxClEls_Crc mcuxClEls_Crc
* @brief This part of the @ref mcuxClEls driver defines the Command CRC functionality
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_CRC_H_
#define MCUXCLELS_CRC_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Types.h> // Common types
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Crc_Macros mcuxClEls_Crc_Macros
* @brief Defines all macros of @ref mcuxClEls_Crc
* @ingroup mcuxClEls_Crc
* @{
*/
/**
* @defgroup MCUXCLELS_CMD_CRC_ MCUXCLELS_CMD_CRC_
* @brief Constants for ELS Command CRC
* @ingroup mcuxClEls_Crc_Macros
* @{ */
#define MCUXCLELS_CMD_CRC_VALUE_RESET ((uint32_t) 0x1u) ///< Reset the Command CRC to initial value
#define MCUXCLELS_CMD_CRC_VALUE_ENABLE ((uint32_t) 0x2u) ///< Enable update of Command CRC value by executing commands
#define MCUXCLELS_CMD_CRC_VALUE_DISABLE ((uint32_t) 0x0u) ///< Disable update of Command CRC value by executing commands
#define MCUXCLELS_CMD_CRC_RESET ((uint32_t) 0x1u) ///< Reset the Command CRC to initial value
#define MCUXCLELS_CMD_CRC_ENABLE ((uint32_t) 0x1u) ///< Enable update of Command CRC value by executing commands
#define MCUXCLELS_CMD_CRC_DISABLE ((uint32_t) 0x0u) ///< Disable update of Command CRC value by executing commands
#define MCUXCLELS_CMD_CRC_POLYNOMIAL ((uint32_t) 0x04C11DB7u) ///< CRC polynomial for the Command CRC
#define MCUXCLELS_CMD_CRC_INITIAL_VALUE ((uint32_t) 0xA5A5A5A5u) ///< Initial value for the Command CRC
/** @} */
/**
* @defgroup MCUXCLELS_CMD_CRC_REFERENCE_ MCUXCLELS_CMD_CRC_REFERENCE_
* @brief Macros for reference ELS Command CRC
* @ingroup mcuxClEls_Crc_Macros
* @{
*/
/**
* @brief Initializes a reference CRC variable with the command CRC initial value.
* The new variable has the given name.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_INIT(crc) \
uint32_t (crc) = MCUXCLELS_CMD_CRC_INITIAL_VALUE
/**
* @brief Resets the given reference CRC variable to the command CRC initial value.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_RESET(crc) \
(crc) = MCUXCLELS_CMD_CRC_INITIAL_VALUE
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Aead_Init_Async.
*/
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_INIT(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_INIT; \
MCUX_CSSL_ANALYSIS_START_PATTERN_0U_1U_ARE_UNSIGNED() \
(options).bits.lastinit = MCUXCLELS_AEAD_LASTINIT_TRUE; \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_0U_1U_ARE_UNSIGNED() \
(options).bits.acpsie = MCUXCLELS_AEAD_STATE_IN_DISABLE; \
(options).bits.acpsoe = MCUXCLELS_AEAD_STATE_OUT_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_INIT(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_INIT; \
MCUX_CSSL_ANALYSIS_START_PATTERN_0U_1U_ARE_UNSIGNED() \
(options).bits.lastinit = MCUXCLELS_AEAD_LASTINIT_TRUE; \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_0U_1U_ARE_UNSIGNED() \
(options).bits.acpsie = MCUXCLELS_AEAD_STATE_IN_DISABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Aead_PartialInit_Async.
*/
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_PARTIALINIT(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_INIT; \
(options).bits.acpsoe = MCUXCLELS_AEAD_STATE_OUT_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_PARTIALINIT(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_INIT; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Aead_UpdateAad_Async.
*/
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEAAD(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_AADPROC \
(options).bits.acpsie = MCUXCLELS_AEAD_STATE_IN_ENABLE; \
(options).bits.acpsoe = MCUXCLELS_AEAD_STATE_OUT_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEAAD(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_AADPROC; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Aead_UpdateData_Async.
*/
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEDATA(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_MSGPROC \
(options).bits.acpsie = MCUXCLELS_AEAD_STATE_IN_ENABLE; \
(options).bits.acpsoe = MCUXCLELS_AEAD_STATE_OUT_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEDATA(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_MSGPROC; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Aead_Finalize_Async.
*/
#ifndef MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_FINALIZE(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_FINAL \
(options).bits.acpsie = MCUXCLELS_AEAD_STATE_IN_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_FINALIZE(crc, options) \
({ \
(options).bits.acpmod = MCUXCLELS_AEAD_ACPMOD_FINAL; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_NO_INTERNAL_STATE_FLAGS */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Cipher_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CIPHER(crc, options) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_CIPHER, (options).word.value, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Cmac_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CMAC(crc, options) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_CMAC, (options).word.value, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccKeyGen_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYGEN(crc, options) \
({ \
(options).bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_KEYGEN, (options).word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccKeyExchange_Async.
*/
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGE(crc) \
({ \
mcuxClEls_EccKeyExchOption_t options = {0u}; \
options.bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
options.bits.extkey = MCUXCLELS_ECC_EXTKEY_EXTERNAL; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECKXH, options.word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGE(crc) \
({ \
mcuxClEls_EccKeyExchOption_t options = {0u}; \
options.bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECKXH, options.word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT */
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccKeyExchangeInt_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGEINT(crc) \
({ \
mcuxClEls_EccKeyExchOption_t options = {0u}; \
options.bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
options.bits.extkey = MCUXCLELS_ECC_EXTKEY_INTERNAL; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECKXH, options.word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccSign_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCSIGN(crc, options) \
({ \
(options).bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECSIGN, (options).word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccVerify_Async.
*/
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFY(crc, options) \
({ \
(options).bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
(options).bits.extkey = MCUXCLELS_ECC_EXTKEY_EXTERNAL; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECVFY, (options).word.value, &(crc)); \
(retVal); \
})
#else
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFY(crc, options) \
({ \
(options).bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECVFY, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT */
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_EccVerifyInt_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFYINT(crc, options) \
({ \
(options).bits.revf = MCUXCLELS_ECC_REVERSEFETCH_ENABLE; \
(options).bits.extkey = MCUXCLELS_ECC_EXTKEY_INTERNAL; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_ECVFY, (options).word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_GlitchDetector_LoadConfig_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_LOADCONFIG(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_GDET_CFG_LOAD, 0u, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_GlitchDetector_Trim_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_TRIM(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_GDET_TRIM, 0u, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Hash_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HASH(crc, options) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_HASH, (options).word.value, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Hmac_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HMAC(crc, options) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_HMAC, (options).word.value, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Ckdf_Sp800108_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP800108(crc) \
({ \
mcuxClEls_CkdfOption_t options = {0u}; \
options.bits.ckdf_algo = MCUXCLELS_CKDF_ALGO_SP800108; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_CKDF, options.word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Hkdf_Rfc5869_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HKDF_RFC5869(crc, options) \
({ \
(options).bits.hkdf_algo = MCUXCLELS_HKDF_ALGO_RFC5869; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_HKDF, (options).word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Hkdf_Sp80056c_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HKDF_SP80056C(crc) \
({ \
mcuxClEls_HkdfOption_t options = {0u}; \
options.bits.hkdf_algo = MCUXCLELS_HKDF_ALGO_SP80056C; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_HKDF, options.word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATEMASTERKEYFROMPREMASTERKEY(crc) \
({ \
mcuxClEls_TlsOption_t options = {0u}; \
options.bits.mode = MCUXCLELS_TLS_INIT; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_TLS, options.word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATESESSIONKEYSFROMMASTERKEY(crc) \
({ \
mcuxClEls_TlsOption_t options = {0u}; \
options.bits.mode = MCUXCLELS_TLS_FINALIZE; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_TLS, options.word.value, &(crc)); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_KeyDelete_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYDELETE(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_KDELETE, 0u, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_KeyImport_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORT(crc, options) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_KEYIN, (options).word.value, &(crc))
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_KeyImportPuk_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORTPUK(crc) \
({ \
mcuxClEls_KeyImportOption_t options = {0u}; \
options.bits.revf = MCUXCLELS_KEYIMPORT_REVERSEFETCH_ENABLE; \
options.bits.kfmt = MCUXCLELS_KEYIMPORT_KFMT_PBK; \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_KEYIN, options.word.value, &(crc)); \
(retVal); \
})
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_KeyExport_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYEXPORT(crc) \
({ \
mcuxClEls_Status_t retVal = mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_KEYOUT, 0u, &(crc)); \
mcuxClEls_KeyImportOption_t import_options = {0u}; \
import_options.bits.kfmt = MCUXCLELS_KEYIMPORT_KFMT_RFC3394; \
retVal = MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYDELETE(crc); \
retVal = MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORT(crc, import_options); \
(retVal); \
})
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgRequest_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUEST(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_RND_REQ, 0u, &(crc))
#ifdef MCUXCL_FEATURE_ELS_RND_RAW
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgRequestRaw_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUESTRAW(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_RND_REQ, MCUXCLELS_RNG_RND_REQ_RND_RAW, &(crc))
#endif /* MCUXCL_FEATURE_ELS_RND_RAW */
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgTestInstantiate_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTINSTANTIATE(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST, MCUXCLELS_RNG_DRBG_TEST_MODE_INSTANTIATE, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgTestExtract_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTEXTRACT(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST, MCUXCLELS_RNG_DRBG_TEST_MODE_EXTRACT, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgTestAesEcb_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESECB(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST, MCUXCLELS_RNG_DRBG_TEST_MODE_AES_ECB, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_DrbgTestAesCtr_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESCTR(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST, MCUXCLELS_RNG_DRBG_TEST_MODE_AES_CTR, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_Dtrng_ConfigLoad_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGLOAD(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_CFG_LOAD, 0u, &(crc))
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGEVALUATE(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_EVAL, 0u, &(crc))
#ifdef MCUXCL_FEATURE_ELS_PRND_INIT
/**
* @brief Updates given reference command CRC with command @ref mcuxClEls_Prng_Init_Async.
*/
#define MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_PRNG_INIT(crc) \
mcuxClEls_UpdateRefCRC(MCUXCLELS_CMD_CRC_CMD_ID_RND_REQ, MCUXCLELS_RNG_RND_REQ_PRND_INIT, &(crc))
#endif /* MCUXCL_FEATURE_ELS_PRND_INIT */
/**
* @}
*/
/**
* @defgroup MCUXCLELS_CMD_CRC_CMD_ID_ MCUXCLELS_CMD_CRC_CMD_ID_
* @brief Constants for ELS Command IDs
* @ingroup mcuxClEls_Crc_Macros
* @{
*/
#define MCUXCLELS_CMD_CRC_CMD_ID_CIPHER 0 ///< ELS Command ID for CIPHER command
#define MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER 1 ///< ELS Command ID for AUTH_CIPHER command
#define MCUXCLELS_CMD_CRC_CMD_ID_CHAL_RESP_GEN 3 ///< ELS Command ID for CHAL_RESP_GEN command
#define MCUXCLELS_CMD_CRC_CMD_ID_ECSIGN 4 ///< ELS Command ID for ECSIGN command
#define MCUXCLELS_CMD_CRC_CMD_ID_ECVFY 5 ///< ELS Command ID for ECVFY command
#define MCUXCLELS_CMD_CRC_CMD_ID_ECKXH 6 ///< ELS Command ID for ECKXH command
#define MCUXCLELS_CMD_CRC_CMD_ID_KEYGEN 8 ///< ELS Command ID for KEYGEN command
#define MCUXCLELS_CMD_CRC_CMD_ID_KEYIN 9 ///< ELS Command ID for KEYIN command
#define MCUXCLELS_CMD_CRC_CMD_ID_KEYOUT 10 ///< ELS Command ID for KEYOUT command
#define MCUXCLELS_CMD_CRC_CMD_ID_KDELETE 11 ///< ELS Command ID for KDELETE command
#define MCUXCLELS_CMD_CRC_CMD_ID_KEYPROV 12 ///< ELS Command ID for KEYPROV command
#define MCUXCLELS_CMD_CRC_CMD_ID_CKDF 16 ///< ELS Command ID for CKDF command
#define MCUXCLELS_CMD_CRC_CMD_ID_HKDF 17 ///< ELS Command ID for HKDF command
#define MCUXCLELS_CMD_CRC_CMD_ID_TLS 18 ///< ELS Command ID for TLS command
#define MCUXCLELS_CMD_CRC_CMD_ID_HASH 20 ///< ELS Command ID for HASH command
#define MCUXCLELS_CMD_CRC_CMD_ID_HMAC 21 ///< ELS Command ID for HMAC command
#define MCUXCLELS_CMD_CRC_CMD_ID_CMAC 22 ///< ELS Command ID for CMAC command
#define MCUXCLELS_CMD_CRC_CMD_ID_RND_REQ 24 ///< ELS Command ID for RND_REQ command
#define MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST 25 ///< ELS Command ID for DRBG_TEST command
#define MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_CFG_LOAD 28 ///< ELS Command ID for DTRNG_CFG_LOAD command
#define MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_EVAL 29 ///< ELS Command ID for DTRNG_EVAL command
#define MCUXCLELS_CMD_CRC_CMD_ID_GDET_CFG_LOAD 30 ///< ELS Command ID for GDET_CFG_LOAD command
#define MCUXCLELS_CMD_CRC_CMD_ID_GDET_TRIM 31 ///< ELS Command ID for GDET_TRIM command
/**
* @}
*
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Crc_Types mcuxClEls_Crc_Types
* @brief Defines all types of @ref mcuxClEls_Crc
* @ingroup mcuxClEls_Crc
* @{
*/
/**
* @brief Type to control ELS Command CRC
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word;
struct
{
uint32_t reset :1; ///< Reset the Command CRC to initial value, set by #MCUXCLELS_CMD_CRC_RESET
uint32_t enable :1; ///< Enable/Disable update of Command CRC value by executing commands, set with #MCUXCLELS_CMD_CRC_ENABLE / #MCUXCLELS_CMD_CRC_DISABLE
uint32_t : 30; ///< RFU
} bits; ///< Access #mcuxClEls_CommandCrcConfig_t bit-wise
} mcuxClEls_CommandCrcConfig_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Crc_Functions mcuxClEls_Crc_Functions
* @brief Defines all functions of @ref mcuxClEls_Crc
* @ingroup mcuxClEls_Crc
* @{
*/
/**
* @brief Set command CRC flags.
*
* @param[in] options The command CRC options. For more information, see #mcuxClEls_CommandCrcConfig_t.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code is always #MCUXCLELS_STATUS_OK
* @else
* @return An error code that is always #MCUXCLELS_STATUS_OK
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ConfigureCommandCRC)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ConfigureCommandCRC(
mcuxClEls_CommandCrcConfig_t options
);
/**
* @brief Get the current command CRC value.
*
* @param[out] commandCrc The command CRC value.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection).
* @retval MCUXCLELS_STATUS_OK Operation successful
* @retval MCUXCLELS_STATUS_SW_INVALID_PARAM Parameter commandCRC points to NULL
* @else
* @return An error code
* @retval MCUXCLELS_STATUS_OK Operation successful
* @retval MCUXCLELS_STATUS_SW_INVALID_PARAM Parameter commandCRC points to NULL
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetCommandCRC)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetCommandCRC(
uint32_t* commandCrc
);
/**
* @brief Verifies a reference CRC against the computed ELS command CRC.
*
* @param[in] refCrc The reference CRC value.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_VerifyVsRefCRC)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_VerifyVsRefCRC(
uint32_t refCrc
);
/**
* @brief Updates a reference CRC with the parameters of an ELS command.
* This can be used to verify against the ELS command CRC.
*
* @param[in] command The ELS command ID.
* @param[in] options The command options for the given ELS command.
* @param[in,out] refCrc The current reference CRC value to update.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection).
* @retval MCUXCLELS_STATUS_OK Operation successful
* @retval MCUXCLELS_STATUS_SW_INVALID_PARAM Parameter crc points to NULL
* @else
* @return An error code
* @retval MCUXCLELS_STATUS_OK Operation successful
* @retval MCUXCLELS_STATUS_SW_INVALID_PARAM Parameter crc points to NULL
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_UpdateRefCRC)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_UpdateRefCRC(
uint8_t command,
uint32_t options,
uint32_t* refCrc
);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_CRC_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Ecc.h
+593
View File
@@ -0,0 +1,593 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Ecc.h
* @brief ELS header for elliptic curve cryptography
* This header exposes functions that enable using the ELS for elliptic curve cryptography.
* All functions operate on the NIST P-256 curve.
* The ECC operations supported are:
* - ECC key generation
* - ECC Diffie-Hellman key exchange
* - ECDSA signature generation/verification
*/
#ifndef MCUXCLELS_ECC_H_
#define MCUXCLELS_ECC_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common types & functionality
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup mcuxClEls_Ecc mcuxClEls_Ecc
* @brief This part of the @ref mcuxClEls driver supports functionality for elliptic curve cryptography
* @ingroup mcuxClEls
* @{
*/
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Ecc_Macros mcuxClEls_Ecc_Macros
* @brief Defines all macros of @ref mcuxClEls_Ecc
* @ingroup mcuxClEls_Ecc
* @{
*/
/**
* @defgroup MCUXCLELS_ECC_VALUE_ MCUXCLELS_ECC (Sign and Verify) option word values
* @brief Constants for #mcuxClEls_EccSignOption_t and #mcuxClEls_EccVerifyOption_t
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_ECC_VALUE_HASHED ((uint32_t) 0u<< 0u) ///< Set this option at #mcuxClEls_EccSignOption_t.value or #mcuxClEls_EccVerifyOption_t.value to specify input is the hash of the message
#define MCUXCLELS_ECC_VALUE_NOT_HASHED ((uint32_t) 1u<< 0u) ///< Set this option at #mcuxClEls_EccSignOption_t.value or #mcuxClEls_EccVerifyOption_t.value to specify input is the plain message
#define MCUXCLELS_ECC_VALUE_RTF ((uint32_t) 1u<< 1u) ///< Set this option at #mcuxClEls_EccSignOption_t.value to include the RTF in the signature, only for #mcuxClEls_EccSignOption_t
#define MCUXCLELS_ECC_VALUE_NO_RTF ((uint32_t) 0u<< 1u) ///< Set this option at #mcuxClEls_EccSignOption_t.value to not include the RTF in the signature, only for #mcuxClEls_EccSignOption_t
/**
* @}
*/
/**
* @defgroup MCUXCLELS_KEYGEN_VALUE_ MCUXCLELS_KEYGEN option word values
* @brief Constants for #mcuxClEls_EccKeyGenOption_t
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_KEYGEN_VALUE_SIGN_PUBLICKEY ((uint32_t) 1u<< 0u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to sign the public key
#define MCUXCLELS_KEYGEN_VALUE_TYPE_SIGN ((uint32_t) 0u<< 1u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to specify output key will be a signing key usable by #mcuxClEls_EccSign_Async
#define MCUXCLELS_KEYGEN_VALUE_TYPE_KEYEXCHANGE ((uint32_t) 1u<< 1u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to specify output key will be a Diffie Helman key usable by #mcuxClEls_EccKeyExchange_Async
#define MCUXCLELS_KEYGEN_VALUE_DETERMINISTIC ((uint32_t) 0u<< 2u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to specify output key is deterministic
#define MCUXCLELS_KEYGEN_VALUE_RANDOM ((uint32_t) 1u<< 2u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to specify output key is random
#define MCUXCLELS_KEYGEN_VALUE_GEN_PUB_KEY ((uint32_t) 0u<< 3u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to generate a public key
#define MCUXCLELS_KEYGEN_VALUE_NO_PUB_KEY ((uint32_t) 1u<< 3u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to not generate a public key
#define MCUXCLELS_KEYGEN_VALUE_NO_RANDOM_DATA ((uint32_t) 0u<< 5u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to not use random data for signing the public key
#define MCUXCLELS_KEYGEN_VALUE_USE_RANDOM_DATA ((uint32_t) 1u<< 5u) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.value to use random data for signing the public key
/**
* @}
*/
/**
* @defgroup MCUXCLELS_ECC_VALUE_BITS MCUXCLELS_ECC (Sign and Verify) option bit field values
* @brief Bit field constants for #mcuxClEls_EccSignOption_t and #mcuxClEls_EccVerifyOption_t
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_ECC_HASHED (0U) ///< Set this option at #mcuxClEls_EccSignOption_t.echashchl or #mcuxClEls_EccVerifyOption_t.echashchl to specify input is the hash of the message
#define MCUXCLELS_ECC_NOT_HASHED (1U) ///< Set this option at #mcuxClEls_EccSignOption_t.echashchl or #mcuxClEls_EccVerifyOption_t.echashchl to specify input is the plain message
#define MCUXCLELS_ECC_RTF (1U) ///< Set this option at #mcuxClEls_EccSignOption_t.signrtf to include the RTF in the signature
#define MCUXCLELS_ECC_NO_RTF (0U) ///< Set this option at #mcuxClEls_EccSignOption_t.signrtf to not include the RTF in the signature
/**
* @}
*/
/**
* @defgroup MCUXCLELS_KEYGEN_VALUE_BITS MCUXCLELS_KEYGEN option bit field values
* @brief Bit field constants for #mcuxClEls_EccKeyGenOption_t
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_ECC_PUBLICKEY_SIGN_ENABLE (1U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsign to sign the public key (signature will be concatenated to the output public key)
#define MCUXCLELS_ECC_PUBLICKEY_SIGN_DISABLE (0U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsign to not sign the public key
#define MCUXCLELS_ECC_OUTPUTKEY_SIGN (0U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgtypedh to specify output key will be a signing key usable by #mcuxClEls_EccSign_Async
#define MCUXCLELS_ECC_OUTPUTKEY_KEYEXCHANGE (1U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgtypedh to specify output key will be a Diffie Helman key usable by #mcuxClEls_EccKeyExchange_Async
#define MCUXCLELS_ECC_OUTPUTKEY_DETERMINISTIC (0U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsrc to specify output key is deterministic
#define MCUXCLELS_ECC_OUTPUTKEY_RANDOM (1U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsrc to specify output key is random
#define MCUXCLELS_ECC_GEN_PUBLIC_KEY (0U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.skip_pbk to generate a public key
#define MCUXCLELS_ECC_SKIP_PUBLIC_KEY (1U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.skip_pbk to not generate a public key.
///< If #MCUXCLELS_ECC_OUTPUTKEY_KEYEXCHANGE set, this option will be ignored and a public key will be generated.
#define MCUXCLELS_ECC_NO_RANDOM_DATA (0U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsign_rnd to not include user provided random data for the signature
#define MCUXCLELS_ECC_INCLUDE_RANDOM_DATA (1U) ///< Set this option at #mcuxClEls_EccKeyGenOption_t.kgsign_rnd to include user provided random data for the signature.
///< #MCUXCLELS_ECC_PUBLICKEY_SIGN_ENABLE must be set in this case.
/**
* @}
*/
/**
* @defgroup MCUXCLELS_INTERNAL_VALUE_BITS Option bit field values that are needed for internal use only
* @brief Internal bit field constants for several option types.
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_ECC_REVERSEFETCH_ENABLE (0x01U) ///< Reverse Fetch enabled. For internal use
#define MCUXCLELS_ECC_REVERSEFETCH_DISABLE (0x00U) ///< Reverse Fetch disabled. For internal use
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT
#define MCUXCLELS_ECC_EXTKEY_EXTERNAL (0x01U) ///< Public key is taken from system memory. For internal use
#define MCUXCLELS_ECC_EXTKEY_INTERNAL (0x00U) ///< Public key is taken from internal keystore. For internal use
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT */
/**
* @}
*/
/**
* @defgroup MCUXCLELS_ECC_SIZE MCUXCLELS_ECC_SIZE
* @brief Defines size of public key and signature in bytes
* @ingroup mcuxClEls_Ecc_Macros
* @{
*/
#define MCUXCLELS_ECC_PUBLICKEY_SIZE ((size_t) 64U) ///< Size of the public key
#define MCUXCLELS_ECC_SIGNATURE_SIZE ((size_t) 64U) ///< Size of the signature
#define MCUXCLELS_ECC_SIGNATURE_R_SIZE ((size_t) 32U) ///< Size of the signature part r
/**
* @}
*/
/**
* @}
*/ /* mcuxClEls_Ecc_Macros */
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Ecc_Types mcuxClEls_Ecc_Types
* @brief Defines all types of @ref mcuxClEls_Ecc
* @ingroup mcuxClEls_Ecc
* @{
*/
/**
* @brief Data type for ECC parameters in ELS format
* @deprecated All ELS ECC functions now operate on uint8_t. This type will be removed soon.
*/
typedef uint8_t mcuxClEls_EccByte_t;
/**
* @brief Command option bit field for #mcuxClEls_EccSign_Async
* Bit field to configure #mcuxClEls_EccSign_Async. See @ref MCUXCLELS_ECC_VALUE_BITS for possible options.
*/
typedef union
{
struct
{
uint32_t value; ///< Access the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_ECC_VALUE_
} word; ///< Access #mcuxClEls_EccSignOption_t word-wise
struct
{
uint32_t echashchl :1; ///< Define type of input, plain message or hash of message
uint32_t signrtf :1; ///< Define if signing the Run-Time Fingerprint
uint32_t :2; ///< RFU
uint32_t revf :1; ///< This field is managed internally
uint32_t :27; ///< RFU
} bits; ///< Access #mcuxClEls_EccSignOption_t bit-wise
} mcuxClEls_EccSignOption_t;
/**
* @brief Command option bit field for #mcuxClEls_EccVerify_Async
* Bit field to configure #mcuxClEls_EccVerifyOption_t. See @ref MCUXCLELS_ECC_VALUE_BITS for possible options.
*/
typedef union
{
struct
{
uint32_t value; ///< Access the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_ECC_VALUE_
} word; ///< Access #mcuxClEls_EccVerifyOption_t word-wise
struct
{
uint32_t echashchl :1; ///< Define type of input, plain message or hash of message
uint32_t :3; ///< RFU
uint32_t revf :1; ///< This field is managed internally
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT
uint32_t :8; ///< RFU
uint32_t extkey :1; ///< This field is managed internally
uint32_t :18; ///< RFU
#else
uint32_t :27; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL_BIT */
} bits; ///< Access #mcuxClEls_EccVerifyOption_t bit-wise
} mcuxClEls_EccVerifyOption_t;
/**
* @brief Command option bit field for #mcuxClEls_EccKeyGen_Async
* Bit field to configure #mcuxClEls_EccKeyGenOption_t. See @ref MCUXCLELS_KEYGEN_VALUE_BITS for possible options.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_KEYGEN_VALUE_
} word; ///< Access #mcuxClEls_EccKeyGenOption_t word-wise
struct
{
uint32_t kgsign :1; ///< Define if signing the output public key
uint32_t kgtypedh :1; ///< Define the usage of the output key
uint32_t kgsrc :1; ///< Define if the output key is deterministic or random
uint32_t skip_pbk :1; ///< Define if generating a public key
uint32_t revf :1; ///< This field is managed internally
uint32_t kgsign_rnd :1; ///< Define if using user provided random data for the signature.
uint32_t :26; ///< RFU
} bits; ///< Access #mcuxClEls_EccKeyGenOption_t bit-wise
} mcuxClEls_EccKeyGenOption_t;
/**
* @brief Command option bit field for #mcuxClEls_EccKeyExchange_Async, for internal use only.
* Bit field to configure #mcuxClEls_EccKeyExchOption_t.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_EccKeyExchOption_t word-wise
struct
{
uint32_t :4; ///< RFU
uint32_t revf :1; ///< This field is managed internally
uint32_t :8; ///< RFU
uint32_t extkey :1; ///< This field is managed internally
uint32_t :18; ///< RFU
} bits; ///< Access #mcuxClEls_EccKeyExchOption_t bit-wise
} mcuxClEls_EccKeyExchOption_t;
/**
* @}
*/ /* mcuxClEls_Ecc_Types */
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Ecc_Functions mcuxClEls_Ecc_Functions
* @brief Defines all functions of @ref mcuxClEls_Ecc
* @ingroup mcuxClEls_Ecc
* @{
*/
/**
* @brief Generates an ECC key pair on the NIST P-256 curve.
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_HIGH. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
* The public key will be stored in the standard ANSI X9.62 byte order (big-endian).
*
* @param[in] options The command options. For more information, see #mcuxClEls_EccKeyGenOption_t.
* @param[in] signingKeyIdx The index of the key to sign the generated public key.
* @param[in] privateKeyIdx Output key index.
* @param[in] generatedKeyProperties The desired key properties of the generated key.
* @param[in] pRandomData Random data provided by the user.
* @param[out] pPublicKey Pointer to the memory area which receives the public key and optionally the key signature.
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p options.kgsign == #MCUXCLELS_ECC_PUBLICKEY_SIGN_DISABLE</dt>
* <dd>@p signingKeyIdx is ignored.</dd>
* <dt>@p options.kgsrc == #MCUXCLELS_ECC_OUTPUTKEY_DETERMINISTIC</dt>
* <dd>@p privateKeyIdx also defines the key index of the source key material.
* The source key material will be overwritten by the output public key.</dd>
* <dt>@p options.kgsign_rnd == #MCUXCLELS_ECC_NO_RANDOM_DATA</dt>
* <dd>@p pRandomData is ignored.</dd>
* <dt>@p pPublicKey must be aligned on a 4-byte boundary.</dt>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccKeyGen_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccKeyGen_Async(
mcuxClEls_EccKeyGenOption_t options,
mcuxClEls_KeyIndex_t signingKeyIdx,
mcuxClEls_KeyIndex_t privateKeyIdx,
mcuxClEls_KeyProp_t generatedKeyProperties,
uint8_t const * pRandomData,
uint8_t * pPublicKey
);
/**
* @brief Performs a Diffie-Hellman key exchange with an internal ECC private key and an external ECC public key.
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
* The public key must be stored in the standard ANSI X9.62 byte order (big-endian).
*
* @param[in] privateKeyIdx The private key index.
* @param[in] pPublicKey Pointer to the public key of a third party.
* @param[in] sharedSecretIdx The index in the ELS keystore that receives the shared secret that is generated by the ECDH operation.
* @param[in] sharedSecretProperties The desired key properties of the shared secret.
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p pPublicKey </dt>
* <dd>The public key consists of the 256-bit X coordinate and the 256-bit Y coordinate.
* The point must lie on the NIST P-256 curve, be encoded in X9.62 format and aligned on a 4-byte boundary.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccKeyExchange_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccKeyExchange_Async(
mcuxClEls_KeyIndex_t privateKeyIdx,
uint8_t const * pPublicKey,
mcuxClEls_KeyIndex_t sharedSecretIdx,
mcuxClEls_KeyProp_t sharedSecretProperties
);
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/**
* @brief Performs a Diffie-Hellman key exchange with an internal ECC private key and an internal ECC public key.
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] privateKeyIdx The private key index.
* @param[in] publicKeyIdx The public key index.
* @param[in] sharedSecretIdx The index in the ELS keystore that receives the shared secret that is generated by the ECDH operation.
* @param[in] sharedSecretProperties The desired key properties of the shared secret.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccKeyExchangeInt_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccKeyExchangeInt_Async(
mcuxClEls_KeyIndex_t privateKeyIdx,
mcuxClEls_KeyIndex_t publicKeyIdx,
mcuxClEls_KeyIndex_t sharedSecretIdx,
mcuxClEls_KeyProp_t sharedSecretProperties
);
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @brief Generates an ECDSA signature of a given message.
*
* The curve is NIST P-256.
* The message hash, must be stored in the standard ANSI X9.62 format.
* If the message is provided in plain, no prior conversion is necessary.
* The signature will be stored in the standard ANSI X9.62 byte order (big-endian).
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* No matter the value of @p options.echashchl, it must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_HIGH. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The command options. For more information, see #mcuxClEls_EccSignOption_t.
* @param[in] keyIdx The private key index.
* @param[in] pInputHash The hash of the message to sign in X9.62 format.
* @param[in] pInputMessage The message to sign.
* @param[in] inputMessageLength Size of @p pInputMessage in bytes.
* @param[out] pOutput Pointer to the memory area which receives the generated signature in X9.62 format. (64 bytes)
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_HASHED</dt>
* <dd>@p pInputHash is used, and it must be aligned on a 4-byte boundary.
* @p pInputMessage is ignored.</dd>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_NOT_HASHED</dt>
* <dd>@p pInputHash is ignored.
* @p pInputMessage and @p inputMessageLength are used.</dd>
* <dt>@p pOptput must be aligned on a 4-byte boundary.</dt>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccSign_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccSign_Async(
mcuxClEls_EccSignOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pInputHash,
uint8_t const * pInputMessage,
size_t inputMessageLength,
uint8_t * pOutput
);
/**
* @brief Verifies an ECDSA signature of a given message.
*
* The curve is NIST P-256.
* The message hash, must be stored in the standard ANSI X9.62 format.
* If the message is provided in plain, no prior conversion is necessary.
* The signature and public key must be stored in the standard ANSI X9.62 byte order (big-endian).
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* No matter the value of @p options.echashchl, it must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The command options. For more information, see #mcuxClEls_EccVerifyOption_t.
* @param[in] pInputHash The hash of the signed message in X9.62 format.
* @param[in] pInputMessage The message to sign.
* @param[in] inputMessageLength Size of @p pInputMessage in bytes.
* @param[in] pSignatureAndPubKey Pointer to the memory area which contains the concatenation of the signature and the public key.
* @param[out] pOutput Pointer to the memory area which will receive the recalculated value of the R component in case of a successful
* signature verification.
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_HASHED</dt>
* <dd>@p pInputHash is used, and it must be aligned on a 4-byte boundary.
* @p pInputMessage is ignored.</dd>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_NOT_HASHED</dt>
* <dd>@p pInputHash is ignored.
* @p pInputMessage and @p inputMessageLength are used.</dd>
* <dt>@p pSignatureAndPubKey </dt>
* <dd>It must be aligned on a 4-byte boundary.
* The signature to be verified consists of the 256-bit R component and the 256-bit S component.
* The public key is the one for verification. (Uncompressed, X and Y components)
* The signature and the public key are in X9.62 format.</dd>
* <dt>@p pOutput </dt>
* <dd>It must be aligned on a 4-byte boundary.
* The output shall be compared to the first 32 bytes stored at @p pSignatureAndPublicKey.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccVerify_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccVerify_Async(
mcuxClEls_EccVerifyOption_t options,
uint8_t const * pInputHash,
uint8_t const * pInputMessage,
size_t inputMessageLength,
uint8_t const * pSignatureAndPubKey,
uint8_t * pOutput
);
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/**
* @brief Verifies an ECDSA signature of a given message.
*
* The curve is NIST P-256.
* The message hash, must be stored in the standard ANSI X9.62 format.
* If the message is provided in plain, no prior conversion is necessary.
* The signature must be stored in the standard ANSI X9.62 byte order (big-endian).
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* No matter the value of @p options.echashchl, it must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The command options. For more information, see #mcuxClEls_EccVerifyOption_t.
* @param[in] publicKeyIdx The public key index.
* @param[in] pInputHash The hash of the signed message in X9.62 format.
* @param[in] pInputMessage The message to sign.
* @param[in] inputMessageLength Size of @p pInputMessage in bytes.
* @param[in] pSignature Pointer to the memory area which contains the concatenation of the signature and the public key.
* @param[out] pOutput Pointer to the memory area which will receive the recalculated value of the R component in case of a successful
* signature verification.
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_HASHED</dt>
* <dd>@p pInputHash is used, and it must be aligned on a 4-byte boundary.
* @p pInputMessage is ignored.</dd>
* <dt>@p options.echashchl == #MCUXCLELS_ECC_NOT_HASHED</dt>
* <dd>@p pInputHash is ignored.
* @p pInputMessage and @p inputMessageLength are used.</dd>
* <dt>@p pSignature</dt>
* <dd>It must be aligned on a 4-byte boundary.
* The signature to be verified consists of the 256-bit R component and the 256-bit S component.
* The signature is in X9.62 format.</dd>
* <dt>@p pOutput </dt>
* <dd>It must be aligned on a 4-byte boundary.
* The output shall be compared to the first 32 bytes stored at @p pSignatureAndPublicKey.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_EccVerifyInt_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_EccVerifyInt_Async(
mcuxClEls_EccVerifyOption_t options,
mcuxClEls_KeyIndex_t publicKeyIdx,
uint8_t const * pInputHash,
uint8_t const * pInputMessage,
size_t inputMessageLength,
uint8_t const * pSignature,
uint8_t * pOutput
);
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @}
*/ /* mcuxClEls_Ecc_Functions */
/**
* @}
*/ /* mcuxClEls_Ecc */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_ECC_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_GlitchDetector.h
+157
View File
@@ -0,0 +1,157 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_GlitchDetector.h
* @brief ELS header for controlling the glitch detector.
*
* This header exposes functions that configure the ELS glitch detector.
*/
#ifndef MCUXCLELS_GLITCHDETECTOR_H_
#define MCUXCLELS_GLITCHDETECTOR_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common types & functionality
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup mcuxClEls_GlitchDetector mcuxClEls_GlitchDetector
* @brief This part of the @ref mcuxClEls driver supports glitch detector functionality
* @ingroup mcuxClEls
* @{
*/
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_GlitchDetector_Macros mcuxClEls_GlitchDetector_Macros
* @brief Defines all macros of @ref mcuxClEls_GlitchDetector
* @ingroup mcuxClEls_GlitchDetector
* @{
*/
#define MCUXCLELS_GLITCHDETECTOR_CFG_SIZE ((size_t) 0x18u) ///< Glitch detector configuration size
#define MCUXCLELS_GLITCHDETECTOR_TRIM_SIZE ((size_t) 0x04u) ///< Glitch detector trim value size
/**
* @}
*/ /* mcuxClEls_GlitchDetector_Macros */
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_GlitchDetector_Functions mcuxClEls_GlitchDetector_Functions
* @brief Defines all functions of @ref mcuxClEls_GlitchDetector
* @ingroup mcuxClEls_GlitchDetector
* @{
*/
/**
* @brief Loads a glitch detector configuration.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] Pointer to the memory area which contains the glitch detector configuration. The size is fixed at #MCUXCLELS_GLITCHDETECTOR_CFG_SIZE bytes.
*
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_LoadConfig_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_LoadConfig_Async(
uint8_t const * pInput
);
/**
* @brief Calculates optimal ELS glitch detector configuration and writes it to system memory.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[out] Pointer to the memory area which receives the glitch detector trim value. The size is fixed at #MCUXCLELS_GLITCHDETECTOR_TRIM_SIZE bytes.
*
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_Trim_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_Trim_Async(
uint8_t * pOutput
);
/**
* @brief Reads the glitch detector's event counter
*
* This function converts the event counter from Gray code to an unsigned number.
*
* @param[in] Pointer to the word where the counter value will be stored.
*
* @retval #MCUXCLELS_STATUS_OK on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_GetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_GetEventCounter(
uint8_t * pCount
);
/**
* @brief Resets the glitch detector's event counter
*
* @retval #MCUXCLELS_STATUS_OK on successful request
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GlitchDetector_ResetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_ResetEventCounter( void
);
/**
* @}
*/ /* mcuxClEls_GlitchDetector_Functions */
/**
* @}
*/ /* mcuxClEls_GlitchDetector */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_GLITCHDETECTOR_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Hash.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Hash.h
* @brief ELS header for hashing.
*
* This header exposes functions that enable using the ELS for hashing.
* There are two modes to hash a message: The asynchronous way as an ELS command, and the SHA-Direct mode which feeds
* data to the internal registers of the ELS and is synchronous (blocking).
* The SHA-Direct mode is meant to be used when another command should be executed in parallel on the ELS while the
* hash operation is still ongoing. For this, use the DMA callback option in #mcuxClEls_Hash_ShaDirect.
*/
/**
* @defgroup mcuxClEls_Hash mcuxClEls_Hash
* @brief This part of the @ref mcuxClEls driver supports hashing
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_HASH_H_
#define MCUXCLELS_HASH_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Hash_Macros mcuxClEls_Hash_Macros
* @brief Defines all macros of @ref mcuxClEls_Hash
* @ingroup mcuxClEls_Hash
* @{
*/
/**
* @defgroup MCUXCLELS_HASH_ MCUXCLELS_HASH_
* @brief Defines valid options to be used by #mcuxClEls_HashOption_t
* @ingroup mcuxClEls_Hash_Macros
* @{
*/
#define MCUXCLELS_HASH_INIT_ENABLE 1U ///< Set this option at #mcuxClEls_HashOption_t.hashini to initialize the hash
#define MCUXCLELS_HASH_INIT_DISABLE 0U ///< Set this option at #mcuxClEls_HashOption_t.hashini to continue the hash
#define MCUXCLELS_HASH_LOAD_ENABLE 1U ///< Set this option at #mcuxClEls_HashOption_t.hashld to load the hash state from @p pDigest
#define MCUXCLELS_HASH_LOAD_DISABLE 0U ///< Set this option at #mcuxClEls_HashOption_t.hashld to not load the hash state
#define MCUXCLELS_HASH_OUTPUT_ENABLE 1U ///< Set this option at #mcuxClEls_HashOption_t.hashoe to output the hash to @p pDigest
#define MCUXCLELS_HASH_OUTPUT_DISABLE 0U ///< Set this option at #mcuxClEls_HashOption_t.hashoe to not output the hash
#define MCUXCLELS_HASH_RTF_UPDATE_ENABLE 1U ///< Set this option at #mcuxClEls_HashOption_t.rtfupd to update the run-time fingerprint (only supported by #mcuxClEls_Hash_Async)
#define MCUXCLELS_HASH_RTF_UPDATE_DISABLE 0U ///< Set this option at #mcuxClEls_HashOption_t.rtfupd to not update the run-time fingerprint
#define MCUXCLELS_HASH_RTF_OUTPUT_ENABLE 1U ///< Set this option at #mcuxClEls_HashOption_t.rtfoe to output the run-time fingerprint (only supported by #mcuxClEls_Hash_Async)
#define MCUXCLELS_HASH_RTF_OUTPUT_DISABLE 0U ///< Set this option at #mcuxClEls_HashOption_t.rtfoe to not output the run-time fingerprint
#define MCUXCLELS_HASH_MODE_SHA_224 1U ///< Set this option at #mcuxClEls_HashOption_t.hashmd to use the hash algorithm SHA-224
#define MCUXCLELS_HASH_MODE_SHA_256 0U ///< Set this option at #mcuxClEls_HashOption_t.hashmd to use the hash algorithm SHA-256
#define MCUXCLELS_HASH_MODE_SHA_384 2U ///< Set this option at #mcuxClEls_HashOption_t.hashmd to use the hash algorithm SHA-384
#define MCUXCLELS_HASH_MODE_SHA_512 3U ///< Set this option at #mcuxClEls_HashOption_t.hashmd to use the hash algorithm SHA-512
#define MCUXCLELS_HASH_VALUE_MODE_SHA_224 ((uint32_t) MCUXCLELS_HASH_MODE_SHA_224 << 4) ///< Set this option at #mcuxClEls_HashOption_t.word.value to use the hash algorithm SHA-224
#define MCUXCLELS_HASH_VALUE_MODE_SHA_256 ((uint32_t) MCUXCLELS_HASH_MODE_SHA_256 << 4) ///< Set this option at #mcuxClEls_HashOption_t.word.value to use the hash algorithm SHA-256
#define MCUXCLELS_HASH_VALUE_MODE_SHA_384 ((uint32_t) MCUXCLELS_HASH_MODE_SHA_384 << 4) ///< Set this option at #mcuxClEls_HashOption_t.word.value to use the hash algorithm SHA-384
#define MCUXCLELS_HASH_VALUE_MODE_SHA_512 ((uint32_t) MCUXCLELS_HASH_MODE_SHA_512 << 4) ///< Set this option at #mcuxClEls_HashOption_t.word.value to use the hash algorithm SHA-512
/**
* @}
*/
/**
* @defgroup MCUXCLELS_HASH_BLOCK_SIZE_ MCUXCLELS_HASH_BLOCK_SIZE_
* @brief Defines block sizes used by the supported hash algorithms
* @ingroup mcuxClEls_Hash_Macros
* @{
*/
#define MCUXCLELS_HASH_BLOCK_SIZE_SHA_224 64U ///< SHA-224 output size: 512 bit (64 bytes)
#define MCUXCLELS_HASH_BLOCK_SIZE_SHA_256 64U ///< SHA-256 output size: 512 bit (64 bytes)
#define MCUXCLELS_HASH_BLOCK_SIZE_SHA_384 128U ///< SHA-384 output size: 1024 bit (128 bytes)
#define MCUXCLELS_HASH_BLOCK_SIZE_SHA_512 128U ///< SHA-512 output size: 1024 bit (128 bytes)
/**
* @}
*/
/**
* @defgroup MCUXCLELS_HASH_STATE_SIZE_ MCUXCLELS_HASH_STATE_SIZE_
* @brief Defines the intermediate state sizes of the supported hash algorithms
* @ingroup mcuxClEls_Hash_Macros
* @{
*/
#define MCUXCLELS_HASH_STATE_SIZE_SHA_224 32U ///< SHA-224 state size: 256 bit (32 bytes)
#define MCUXCLELS_HASH_STATE_SIZE_SHA_256 32U ///< SHA-256 state size: 256 bit (32 bytes)
#define MCUXCLELS_HASH_STATE_SIZE_SHA_384 64U ///< SHA-384 state size: 512 bit (64 bytes)
#define MCUXCLELS_HASH_STATE_SIZE_SHA_512 64U ///< SHA-512 state size: 512 bit (64 bytes)
/**
* @}
*/
/**
* @defgroup MCUXCLELS_HASH_OUTPUT_SIZE_ MCUXCLELS_HASH_OUTPUT_SIZE_
* @brief Defines the output sizes of the supported hash algorithms (do not use for allocation)
* @ingroup mcuxClEls_Hash_Macros
* @{
*/
#define MCUXCLELS_HASH_OUTPUT_SIZE_SHA_224 28U ///< SHA-224 output size: 224 bit (28 bytes)
#define MCUXCLELS_HASH_OUTPUT_SIZE_SHA_256 32U ///< SHA-256 output size: 256 bit (32 bytes)
#define MCUXCLELS_HASH_OUTPUT_SIZE_SHA_384 48U ///< SHA-384 output size: 384 bit (48 bytes)
#define MCUXCLELS_HASH_OUTPUT_SIZE_SHA_512 64U ///< SHA-512 output size: 512 bit (64 bytes)
/**
* @}
*/
/**
* @ingroup mcuxClEls_Hash_Macros
* @{
*/
#define MCUXCLELS_HASH_RTF_OUTPUT_SIZE ((size_t)32U) ///< Size of run-time fingerprint appended to the hash in @p pDigest in bytes, if #MCUXCLELS_HASH_RTF_OUTPUT_ENABLE was specified
/**
* @}
*
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Hash_Types mcuxClEls_Hash_Types
* @brief Defines all types of @ref mcuxClEls_Hash
* @ingroup mcuxClEls_Hash
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_Hash_Async and #mcuxClEls_Hash_ShaDirect.
*
* Bit field to configure #mcuxClEls_Hash_Async and #mcuxClEls_Hash_ShaDirect. See @ref MCUXCLELS_HASH_ for possible options.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_HashOption_t word-wise
struct
{
uint32_t :2; ///< RFU
uint32_t hashini :1; ///< Defines if the hash engine shall be initialized
uint32_t hashld :1; ///< Defines if the hash engine shall be initialized with an externally provided digest
uint32_t hashmd :2; ///< Defines which hash algorithm shall be used
uint32_t hashoe :1; ///< Defines if the hash digest shall be moved to the output buffer
uint32_t rtfupd :1; ///< RTF (Runtime Fingerprint) Update
uint32_t rtfoe :1; ///< RTF (Runtime Fingerprint) Output Enabled
uint32_t :23; ///< RFU
} bits; ///< Access #mcuxClEls_HashOption_t bit-wise
} mcuxClEls_HashOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Hash_Functions mcuxClEls_Hash_Functions
* @brief Defines all functions of @ref mcuxClEls_Hash
* @ingroup mcuxClEls_Hash
* @{
*/
/**
* @brief Computes the hash of a message.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* @param[in] options The command options. For more information, see #mcuxClEls_HashOption_t.
* @param[in] pInput Padded input data to be hashed
* @param[in] inputLength Size of @p pInput in bytes. Since the input is padded, the length must be a multiple of the block size, see @ref MCUXCLELS_HASH_BLOCK_SIZE_.
* @param[in, out] pDigest Pointer to the memory area that contains/receives the (intermediate) hash digest, allocated by the caller, see @ref MCUXCLELS_HASH_STATE_SIZE_.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.hashini == #MCUXCLELS_HASH_INIT_ENABLE</dt>
* <dd>@p options.hashld has no effect and shall be #MCUXCLELS_HASH_LOAD_DISABLE. No data is read from @p pDigest.</dd>
*
* <dt>@p options.hashld == #MCUXCLELS_HASH_LOAD_DISABLE</dt>
* <dd>@p pDigest is not expected to contain an initial state. No data is read from @p pDigest.</dd>
*
* <dt>@p options.rtfoe == #MCUXCLELS_HASH_RTF_UPDATE_ENABLE</dt>
* <dd>When this option is used the current runtime fingerprint (RTF) value will be appended to the output @p pDigest; an additional #MCUXCLELS_HASH_RTF_OUTPUT_SIZE bytes has to be allocated for @p pDigest.</dd>
*
* <dt>@p options.hashoe == #MCUXCLELS_HASH_OUTPUT_ENABLE</dt>
* <dd>The hash state is written to @p pDigest. The size varies depending on the choice of @p options.hashmd, for more information see @ref MCUXCLELS_HASH_STATE_SIZE_ . In cases where the state size and output size differ - see @ref MCUXCLELS_HASH_OUTPUT_SIZE_ -, the state must be truncated by the caller to obtain the final hash value.</dd>
*
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Hash_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Hash_Async(
mcuxClEls_HashOption_t options,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pDigest
);
#ifdef MCUXCL_FEATURE_ELS_SHA_DIRECT
/**
* @brief Enables SHA-direct mode.
*
* If this mode is enabled, it allows the application processor to access the ELS hash
* engine, but at the same time it stops ELS operations from using the hash engine.
*
* Therefore, in SHA-direct mode, hashing can only be done with #mcuxClEls_Hash_ShaDirect.
* When SHA-direct mode is active, ELS operations which internally use the ELS hash engine
* will result in an operational error (see #MCUXCLELS_STATUS_HW_OPERATIONAL). To use those
* operations, disable SHA-direct mode. Please consult function descriptions to check
* whether and under which circumstances they internally use the ELS hash engine.
*
* ELS operations which do not internally use the ELS hash engine can be performed in
* parallel with a SHA-direct hash operation.
*
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection)
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK on success
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ShaDirect_Enable)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ShaDirect_Enable(
void);
/**
* @brief Disables SHA-direct mode.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK on success
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_ShaDirect_Disable)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ShaDirect_Disable(
void);
/**
* @brief Calculates the hash of a message using SHA-Direct mode.
*
* SHA-Direct mode must be enabled before calling this function. For more information, see #mcuxClEls_ShaDirect_Enable.
*
* In order to perform a hash calculation in SHA-Direct mode, the CPU must feed the input data to a register in ELS's SHA core, or configure a DMA to copy the input data to that register. A DMA can be used because feeding input data to the SHA core while the SHA core is busy results in an AHB bus stall, and there is no need to check any further flags before copying further data.
* If a DMA shall be used to perform this copy, a callback function must be provided by the caller that will configure and start the DMA.
* If no callback function is specified, this function will resort to using the CPU.
*
* @param[in] options The command options. For more information, see #mcuxClEls_HashOption_t.
* @param[in] pInput Padded input data to be hashed.
* @param[in] inputLength Size of @p pInput in bytes. Since the input is padded, the length must be a multiple of the block size, see @ref MCUXCLELS_HASH_BLOCK_SIZE_.
* @param[in, out] pDigest Pointer to the memory area that contains/receives the (intermediate) hash digest, allocated by the caller, see @ref MCUXCLELS_HASH_STATE_SIZE_.
* @param[in] pCallback Callback function to load data into Sha core.
* @param[in, out] pCallerData Pointer forwarded by the operation to the callback function.
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.hashini == #MCUXCLELS_HASH_INIT_ENABLE</dt>
* <dd>@p options.hashld has no effect and shall be #MCUXCLELS_HASH_LOAD_DISABLE. No data is read from @p pDigest. </dd>
*
* <dt>@p options.hashld == #MCUXCLELS_HASH_LOAD_DISABLE</dt>
* <dd>@p pDigest is not expected to contain an initial state. No data is read from @p pDigest. </dd>
*
* <dt>@p options.hashoe == #MCUXCLELS_HASH_OUTPUT_ENABLE</dt>
* <dd>The hash state is written to @p pDigest. The size varies depending on the choice of @p options.hashmd, for more information see @ref MCUXCLELS_HASH_STATE_SIZE_ . In cases where the state size and output size differ - see @ref MCUXCLELS_HASH_OUTPUT_SIZE_ -, the state must be truncated by the caller to obtain the final hash value.</dd>
*
* <dt>@p pCallback != @c NULL </dt>
* <dd>The callback function referenced by @p pCallback is called. Otherwise, the function uses a default implementation for the copy.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_SW_FAULT if the callback returned an error
* @retval #MCUXCLELS_STATUS_OK on success
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Hash_ShaDirect)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Hash_ShaDirect(
mcuxClEls_HashOption_t options,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pDigest,
mcuxClEls_TransferToRegisterFunction_t pCallback,
void * pCallerData
);
#endif /* MCUXCL_FEATURE_ELS_SHA_DIRECT */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_HASH_H_ */
/**
* @}
*
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Hmac.h
* @brief ELS header for HMAC support.
*
* This header exposes functions that enable using the ELS for the generation of hashed-key message authentication
* codes (HMAC).
* The supported hash algorithm is SHA2-256.
*/
/**
* @defgroup mcuxClEls_Hmac mcuxClEls_Hmac
* @brief This part of the @ref mcuxClEls driver supports functionality for hashed-key message authentication codes.
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_HMAC_H_
#define MCUXCLELS_HMAC_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* MACROS
**********************************************/
/**
* @defgroup mcuxClEls_Hmac_Macros mcuxClEls_Hmac_Macros
* @brief Defines all macros of @ref mcuxClEls_Hmac
* @ingroup mcuxClEls_Hmac
* @{
*/
/**
* @defgroup MCUXCLELS_HMAC_EXTERNAL_KEY_ MCUXCLELS_HMAC_EXTERNAL_KEY_
* @brief Defines valid options to be used by #mcuxClEls_HmacOption_t
* @ingroup mcuxClEls_Hmac_Macros
* @{
*/
#define MCUXCLELS_HMAC_EXTERNAL_KEY_ENABLE 1U ///< Set #mcuxClEls_HmacOption_t.extkey to this value to use an external key
#define MCUXCLELS_HMAC_EXTERNAL_KEY_DISABLE 0U ///< Set #mcuxClEls_HmacOption_t.extkey to this value to use a key from the ELS keystore
/**
* @}
*/
#define MCUXCLELS_HMAC_PADDED_KEY_SIZE ((size_t) 64U) ///< HMAC Key size: 64 bytes
#define MCUXCLELS_HMAC_OUTPUT_SIZE ((size_t) 32U) ///< HMAC Output size: 32 bytes
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Hmac_Types mcuxClEls_Hmac_Types
* @brief Defines all types of @ref mcuxClEls_Hmac
* @ingroup mcuxClEls_Hmac
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_Hmac_Async.
*
* Valid option values can be found under @ref MCUXCLELS_HMAC_EXTERNAL_KEY_.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word
} word; ///< Access #mcuxClEls_CipherOption_t word-wise
struct
{
uint32_t :13; ///< RFU
uint32_t extkey :1; ///< Whether an external key should be used
uint32_t :18; ///< RFU
} bits; ///< Access #mcuxClEls_CipherOption_t word-wise
} mcuxClEls_HmacOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Hmac_Functions mcuxClEls_Hmac_Functions
* @brief Defines all functions of @ref mcuxClEls_Hmac
* @ingroup mcuxClEls_Hmac
* @{
*/
/**
* @brief Performs HMAC with SHA-256.
*
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options The command options. For more information, see #mcuxClEls_HmacOption_t.
* @param[in] keyIdx The HMAC key index, if an internal key shall be used
* @param[in] pPaddedKey Pointer to a memory location containing the padded HMAC key
* @param[in] pInput Pointer to a memory location which contains the data to be authenticated
* @param[in] inputLength Size of @p pInput in bytes
* @param [out] pOutput The output message authentication code
*
* The properties of some parameters change with respect to selected options.
*
* <dl>
* <dt>Parameter properties</dt>
*
* <dd><dl>
* <dt>@p options.extkey == #MCUXCLELS_HMAC_EXTERNAL_KEY_ENABLE</dt>
* <dd>@p keyIdx is ignored.
*
* @p pPaddedKey must contain the padded HMAC key, which can mean one of two things depending on the length of the original HMAC key, L<sub>kHMAC</sub>:
* <ul><li>If L<sub>kHMAC</sub> &le; #MCUXCLELS_HMAC_PADDED_KEY_SIZE, @p pPaddedKey must be the HMAC key padded with zero-bytes to fill the required length of #MCUXCLELS_HMAC_PADDED_KEY_SIZE bytes.</li>
*
* <li>If L<sub>kHMAC</sub> &gt; #MCUXCLELS_HMAC_PADDED_KEY_SIZE, @p pPaddedKey must contain the SHA-256 hash of the HMAC key, padded with zero-bytes to fill the required length of #MCUXCLELS_HMAC_PADDED_KEY_SIZE bytes.</li></ul></dd>
*
* <dt>@p options.extkey == #MCUXCLELS_HMAC_EXTERNAL_KEY_DISABLE</dt>
* <dd>@p keyIdx must be a valid key index with the correct usage rights for HMAC.
*
* @p pPaddedKey is ignored.</dd>
*
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Hmac_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Hmac_Async(
mcuxClEls_HmacOption_t options,
mcuxClEls_KeyIndex_t keyIdx,
uint8_t const * pPaddedKey,
uint8_t const * pInput,
size_t inputLength,
uint8_t * pOutput
);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_HMAC_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Kdf.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Kdf.h
* @brief ELS header for key derivation.
*
* This header exposes functions that enable using the ELS for various key derivation commands.
* The supported key derivation algorithms are CKDF, HKDF, TLS
*/
/**
* @defgroup mcuxClEls_Kdf mcuxClEls_Kdf
* @brief This part of the @ref mcuxClEls driver supports functionality for key derivation
* @ingroup mcuxClEls
* @{
*/
/**
* @defgroup mcuxClEls_Kdf_Macros mcuxClEls_Kdf_Macros
* @brief Defines all macros of @ref mcuxClEls_Kdf
* @ingroup mcuxClEls_Kdf
* @{
*/
#ifndef MCUXCLELS_KDF_H_
#define MCUXCLELS_KDF_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Kdf_Define mcuxClEls_Kdf_Define
* @brief constants
* @ingroup mcuxClEls_Kdf_Macros
* @{
*/
#define MCUXCLELS_CKDF_DERIVATIONDATA_SIZE 12u ///< Size of CKDF SP800-108 derivation data
#define MCUXCLELS_CKDF_ALGO_SP800108 0x0u ///< Use SP800-108 algorithm
#define MCUXCLELS_HKDF_RFC5869_DERIVATIONDATA_SIZE 32u ///< Size of HKDF derivation data
#define MCUXCLELS_HKDF_SP80056C_TARGETKEY_SIZE 32u ///< Size of HKDF SP800-56C derived key
#define MCUXCLELS_HKDF_VALUE_RTF_DERIV ((uint32_t) 1u<< 0u) ///< Use RTF as derivation input
#define MCUXCLELS_HKDF_VALUE_MEMORY_DERIV ((uint32_t) 0u<< 0u) ///< Use derivation input from system memory
#define MCUXCLELS_HKDF_ALGO_RFC5869 0x0u ///< Use RFC5869 algorithm
#define MCUXCLELS_HKDF_ALGO_SP80056C 0x1u ///< Use SP800-56C algorithm
#define MCUXCLELS_HKDF_RTF_DERIV 1U ///< Use RTF as derivation input
#define MCUXCLELS_HKDF_SYSTEM_MEMORY_DERIV 0U ///< Use derivation input from system memory
#define MCUXCLELS_TLS_DERIVATIONDATA_SIZE ((size_t) 80u) ///< Size of TLS derivation data
#define MCUXCLELS_TLS_RANDOM_SIZE ((size_t) 32u) ///< Size of random bytes for TLS
#define MCUXCLELS_TLS_INIT 0u ///< Perform master key generation
#define MCUXCLELS_TLS_FINALIZE 1u ///< Perform session key generation
/**
* @}
*/ /* mcuxClEls_Kdf_Define */
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Kdf_Types mcuxClEls_Kdf_Types
* @brief Defines all types of @ref mcuxClEls_Kdf
* @ingroup mcuxClEls_Kdf
* @{
*/
/** Internal command option bit field for CKDF functions. */
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_HKDF_VALUE_
} word;
struct
{
uint32_t :12;
uint32_t ckdf_algo :2; ///< Defines which algorithm and mode shall be used. This option is set internally and will be ignored:
///< #MCUXCLELS_CKDF_ALGO_SP800108 = Use SP800-108 algorithm
uint32_t :18;
} bits;
} mcuxClEls_CkdfOption_t;
/** Command option bit field for #mcuxClEls_Hkdf_Rfc5869_Async. */
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_HKDF_VALUE_
} word;
struct
{
uint32_t rtfdrvdat :1; ///< #MCUXCLELS_HKDF_SYSTEM_MEMORY_DERIV=use derivation input from system memory, #MCUXCLELS_HKDF_RTF_DERIV=use RTF (runtime fingerprint) as derivation input
uint32_t hkdf_algo :1; ///< Defines which algorithm shall be used. This option is set internally and will be ignored:
///< #MCUXCLELS_HKDF_ALGO_RFC5869 = Use RFC5869 algorithm
///< #MCUXCLELS_HKDF_ALGO_SP80056C = Use SP800-56C algorithm
uint32_t :30;
} bits;
} mcuxClEls_HkdfOption_t;
/** Internal command option bit field for #mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async, and #mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async. */
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_HKDF_VALUE_
} word;
struct
{
uint32_t :10;
uint32_t mode :1; ///< Defines which phase of the key generation is performed. This option is set internally and will be ignored:
///< #MCUXCLELS_TLS_INIT = Calculate master key from premaster key
///< #MCUXCLELS_TLS_FINALIZE = Calculate session keys from master key
uint32_t :21;
} bits;
} mcuxClEls_TlsOption_t;
/**
* @}
*/ /* mcuxClEls_Kdf_Types */
/**
* @}
*/ /* mcuxClEls_Kdf_Macros */
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Kdf_Functions mcuxClEls_Kdf_Functions
* @brief Defines all functions of @ref mcuxClEls_Kdf
* @ingroup mcuxClEls_Kdf
* @{
*/
/**
* @brief Derives a key using the HKDF (HMAC-based key derivation function) according to RFC5869.
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
* Call #mcuxClEls_WaitForOperation to complete the operation.
* @param[in] options The command options. For more information, see #mcuxClEls_HkdfOption_t.
* @param[in] derivationKeyIdx Key index used for derivation. Must be a 256-bit key with HKDF property bit set to 1.
* @param[in] targetKeyIdx Key bank number of the derived key. Will be a 256-bit key, the user must ensure there is enough space in the keystore to hold the derived key.
* @param[in] targetKeyProperties Requested properties for the derived key. The ksize field will be ignored.
* @param[in] pDerivationData The algorithm-specific derivation data, the length is #MCUXCLELS_HKDF_RFC5869_DERIVATIONDATA_SIZE bytes
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
*
*
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Hkdf_Rfc5869_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Hkdf_Rfc5869_Async(
mcuxClEls_HkdfOption_t options,
mcuxClEls_KeyIndex_t derivationKeyIdx,
mcuxClEls_KeyIndex_t targetKeyIdx,
mcuxClEls_KeyProp_t targetKeyProperties,
uint8_t const * pDerivationData
);
/** Derives a key using the HKDF (HMAC-based key derivation function) according to SP800-56C one-step approach with Sha2-256.
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] derivationKeyIdx Key index used for derivation. Must be a 256-bit key with HKDF property bit set to 1.
* @param[out] pTagetKey Memory area to store the derived key. Will be a 256-bit key, the user must ensure there is enough space in the keystore to hold the derived key.
* @param[in] pDerivationData The algorithm-specific derivation data
* @param[in] derivationDataLength Length of the derivation data
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
*
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Hkdf_Sp80056c_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Hkdf_Sp80056c_Async(
mcuxClEls_KeyIndex_t derivationKeyIdx,
uint8_t * pTagetKey,
uint8_t const * pDerivationData,
size_t derivationDataLength
);
/** Derives a key using the NIST SP 800-108 CMAC-based Extract-and-Expand Key Derivation Function.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] derivationKeyIdx Key index used for derivation
* @param[in] targetKeyIdx Key bank number of the derived key
* @param[in] targetKeyProperties Requested properties for the derived key. Only set usage bits.
* @param[in] pDerivationData The algorithm-specific derivation data, the length is #MCUXCLELS_CKDF_DERIVATIONDATA_SIZE bytes
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Ckdf_Sp800108_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Ckdf_Sp800108_Async(
mcuxClEls_KeyIndex_t derivationKeyIdx,
mcuxClEls_KeyIndex_t targetKeyIdx,
mcuxClEls_KeyProp_t targetKeyProperties,
uint8_t const * pDerivationData
);
/** Generates a TLS master key based on a pre-master key and derivation data, according to the TLS 1.2 specification.
* The pre-master key is overwritten in this operation.
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] pDerivationData The TLS derivation data, consisting of Label, Client Random and Server Random from the TLS 1.2 specification.
* Note: The order is different from #mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async.
* @param[in] keyProperties Desired key properties. Only #mcuxClEls_KeyProp_t::upprot_priv and #mcuxClEls_KeyProp_t::upprot_sec are used, the rest are ignored.
* @param[in] keyIdx The index of the TLS pre-master key, which is overwritten with the master key
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async(
uint8_t const * pDerivationData,
mcuxClEls_KeyProp_t keyProperties,
mcuxClEls_KeyIndex_t keyIdx
);
/** Generates TLS session keys based on a master key and derivation data, according to the TLS 1.2 specification.
* The master key and the following five key indices are overwritten in this operation.
* The keys are written in the following order:
* <ol>
* <li> Client Encryption Key
* <li> Client Message Authentication Key
* <li> Server Encryption Key
* <li> Server Message Authentication Key
* </ol>
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] pDerivationData The TLS derivation data, consisting of Label, Server Random and Client Random from the TLS 1.2 specification.
* Note: The order is different from #mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async.
* @param[in] keyProperties Desired key properties. Only #mcuxClEls_KeyProp_t::upprot_priv and #mcuxClEls_KeyProp_t::upprot_sec are used, the rest are ignored.
* @param[in] keyIdx The index of the TLS master key, which is overwritten with one of the session keys.
* There must be three further consecutive unoccupied key indices following this index.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async(
uint8_t const * pDerivationData,
mcuxClEls_KeyProp_t keyProperties,
mcuxClEls_KeyIndex_t keyIdx
);
/**
* @}
*/ /* mcuxClEls_Kdf_Functions */
/**
* @}
*/ /* mcuxClEls_Kdf */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_KDF_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_KeyManagement.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_KeyManagement.h
* @brief ELS header for key management.
*
* This header exposes functions that can be used to manage the keystore of ELS.
* This includes:
* - Importing keys
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_EXPORT
* - Exporting keys
* @endif
* @if MCUXCL_FEATURE_ELS_KEY_MGMT_DELETE
* - Deleting keys
* @endif
*/
/**
* @defgroup mcuxClEls_KeyManagement mcuxClEls_KeyManagement
* @brief This part of the @ref mcuxClEls driver supports functionality for keys management
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_KEYMANAGEMENT_H_
#define MCUXCLELS_KEYMANAGEMENT_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_KeyManagement_Macros mcuxClEls_KeyManagement_Macros
* @brief Defines all macros of @ref mcuxClEls_KeyManagement
* @ingroup mcuxClEls_KeyManagement
* @{
*/
/**
* @defgroup MCUXCLELS_KEYIMPORT_VALUE_KFMT_ MCUXCLELS_KEYIMPORT_VALUE_KFMT_
* @brief Defines valid options (word value) to be used by #mcuxClEls_KeyImport_Async
* @ingroup mcuxClEls_KeyManagement_Macros
*
* @{
*/
#define MCUXCLELS_KEYIMPORT_VALUE_KFMT_UDF ((uint32_t) 0u<< 6u) ///< Key format UDF with shares in RTL or memory
#define MCUXCLELS_KEYIMPORT_VALUE_KFMT_RFC3394 ((uint32_t) 1u<< 6u) ///< Key format RFC3394 with shares in memory
#define MCUXCLELS_KEYIMPORT_VALUE_KFMT_PUF ((uint32_t) 2u<< 6u) ///< Key from PUF
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYIMPORT_VALUE_KFMT_PBK ((uint32_t) 3u<< 6u) ///< Key from Public Key Certificate
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @}
*/
/**
* @defgroup MCUXCLELS_KEYIMPORT_KFMT_ MCUXCLELS_KEYIMPORT_KFMT_
* @brief Defines valid options (bit values) to be used by #mcuxClEls_KeyImport_Async
* @ingroup mcuxClEls_KeyManagement_Macros
*
* @{
*/
#define MCUXCLELS_KEYIMPORT_KFMT_UDF (0x00u) ///< Key format UDF with shares in RTL or memory
#define MCUXCLELS_KEYIMPORT_KFMT_RFC3394 (0x01u) ///< Key format RFC3394 with shares in memory
#define MCUXCLELS_KEYIMPORT_KFMT_PUF (0x02u) ///< Key from PUF
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYIMPORT_KFMT_PBK (0x03u) ///< Key from Public Key Certificate
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYIMPORT_REVERSEFETCH_ENABLE (0x01U) ///< Reverse fetch enabled. For internal use
#define MCUXCLELS_KEYIMPORT_REVERSEFETCH_DISABLE (0x00U) ///< Reverse fetch disabled. For internal use
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#define MCUXCLELS_RFC3394_OVERHEAD ((size_t) 16u) ///< Overhead between RFC3394 blob and key size
/**
* @}
*/
/**
* @defgroup MCUXCLELS_RFC3394_ MCUXCLELS_RFC3394_
* @brief Defines specifying the length of RFC3394 containers
* @ingroup mcuxClEls_KeyManagement_Macros
*
* @{
*/
#define MCUXCLELS_RFC3394_CONTAINER_SIZE_128 ((size_t) 256u/8u) ///< Size of RFC3394 container for 128 bit key
#define MCUXCLELS_RFC3394_CONTAINER_SIZE_256 ((size_t) 384u/8u) ///< Size of RFC3394 container for 256 bit key
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_RFC3394_CONTAINER_SIZE_P256 ((size_t) 640u/8u) ///< Size of RFC3394 container for P256 bit public key
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/**
* @}
*/
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_KeyManagement_Types mcuxClEls_KeyManagement_Types
* @brief Defines all types of @ref mcuxClEls_KeyManagement
* @ingroup mcuxClEls_KeyManagement
* @{
*/
/**
* @brief Command option bit field for #mcuxClEls_KeyImport_Async
*
* Bit field to configure #mcuxClEls_KeyImport_Async.
* See @ref MCUXCLELS_KEYIMPORT_KFMT_ for possible options in case the struct is accessed bit-wise.
* See @ref MCUXCLELS_KEYIMPORT_VALUE_KFMT_ for possible options in case the struct is accessed word-wise.
*/
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_KEYIMPORT_VALUE_KFMT_
} word; ///< Access #mcuxClEls_KeyImportOption_t word-wise
struct
{
uint32_t :4; ///< RFU
uint32_t revf :1; ///< This field is managed internally
uint32_t :1; ///< RFU
uint32_t kfmt :2; ///< Defines the key import format, one of @ref MCUXCLELS_KEYIMPORT_KFMT_
uint32_t :24; ///< RFU
} bits; ///< Access #mcuxClEls_KeyImportOption_t bit-wise
} mcuxClEls_KeyImportOption_t;
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_KeyManagement_Functions mcuxClEls_KeyManagement_Functions
* @brief Defines all functions of @ref mcuxClEls_KeyManagement
* @ingroup mcuxClEls_KeyManagement
* @{
*/
/**
* @brief Deletes a key from keystore at the given index.
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] keyIdx The index of the key to be deleted
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_SW_FAULT if a failure occurred
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_KeyDelete_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_KeyDelete_Async(
mcuxClEls_KeyIndex_t keyIdx
);
/** @brief Imports a key from external storage to an internal key register.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] options One of @ref MCUXCLELS_KEYIMPORT_KFMT_
* @param[in] pImportKey Pointer to the RFC3394 container of the key to be imported
* @param[in] importKeyLength Length of the RFC3394 container of the key to be imported
* @param[in] wrappingKeyIdx Index of the key wrapping key, if importing RFC3394 format
* @param[in] targetKeyIdx The desired key index of the imported key
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p options.kfmt != #MCUXCLELS_KEYIMPORT_KFMT_RFC3394</dt><dd>
* <ul style="list-style: none;">
* <li>@p pImportKey is ignored.</li>
* <li>@p importKeyLength is ignored.</li>
* <li>@p wrappingKeyIdx is ignored.</li>
* <li>@p targetKeyIdx is ignored. The unpacked key is automatically stored in key slots 0, 1.</li>
* </ul></dd>
* </dt>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_KeyImport_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_KeyImport_Async(
mcuxClEls_KeyImportOption_t options,
uint8_t const * pImportKey,
size_t importKeyLength,
mcuxClEls_KeyIndex_t wrappingKeyIdx,
mcuxClEls_KeyIndex_t targetKeyIdx
);
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
/** @brief Imports a public key to an internal key register if the signature verification of the provided public key against
* the provided signature is correct.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] pCertificate Pointer to the Certificate structure
* @param[in] certificateLength Length of the Certificate structure
* @param[in] publicKeyOffset Offset of the Public key to be imported within @p pCertificate
* @param[in] pSignature Signed challenge used to authenticate the imported key. Must be word aligned
* @param[in] verifyingKeyIdx The key index of the verifying public key
* @param[in] keyProperties The desired key properties of the imported key
* @param[in] targetKeyIdx The desired key index of the imported key
* @param[out] pOutput Pointer to the memory area which will receive the recalculated value of the R component in case of a successful
* certificate verification. Must be word aligned
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_KeyImportPuk_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_KeyImportPuk_Async(
uint8_t const * pCertificate,
size_t certificateLength,
size_t publicKeyOffset,
uint8_t const * pSignature,
mcuxClEls_KeyIndex_t verifyingKeyIdx,
mcuxClEls_KeyProp_t keyProperties,
mcuxClEls_KeyIndex_t targetKeyIdx,
uint8_t * pOutput
);
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
/** @brief Exports a key from an internal key register to external storage, using a wrapping key.
*
* @if ELS_AES_WITH_SIDE_CHANNEL_PROTECTION
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
* @endif
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] wrappingKeyIdx The key used for key wrapping
* @param[in] exportKeyIdx The key to export
* @param[out] pOutput The memory address of the exported key
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_INVALID_PARAM if invalid parameters were specified
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_KeyExport_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_KeyExport_Async(
mcuxClEls_KeyIndex_t wrappingKeyIdx, ///< [in] The key used for key wrapping
mcuxClEls_KeyIndex_t exportKeyIdx, ///< [in] The key to export
uint8_t * pOutput ///< [out] The memory address of the exported key
);
/** @brief Exports the properties of the keys stored in the ELS internal keystore
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[in] keyIdx Request key properties of the index defined here
* @param[out] pKeyProp Key properties of the index provided
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK on successful request */
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_GetKeyProperties)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetKeyProperties(
mcuxClEls_KeyIndex_t keyIdx,
mcuxClEls_KeyProp_t * pKeyProp
);
/**
* @}
*/
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_KEYMANAGEMENT_H_ */
/**
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Rng.h
+435
View File
@@ -0,0 +1,435 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Rng.h
* @brief ELS header for random number generation.
* This header exposes functions to configure the ELS RNGs (DRBG and DTRNG) and to generate random data.
*/
#ifndef MCUXCLELS_RNG_H_
#define MCUXCLELS_RNG_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClEls_Common.h> // Common functionality
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup mcuxClEls_Rng mcuxClEls_Rng
* @brief This part of the @ref mcuxClEls driver supports functionality for random number generation
* @ingroup mcuxClEls
* @{
*/
/**********************************************
* CONSTANTS
**********************************************/
/**
* @defgroup mcuxClEls_Rng_Macros mcuxClEls_Rng_Macros
* @brief Defines all macros of @ref mcuxClEls_Rng
* @ingroup mcuxClEls_Rng
* @{
*/
#define MCUXCLELS_RNG_DTRNG_CONFIG_SIZE ((uint8_t) 84) ///< Size of DTRNG configuration
#define MCUXCLELS_RNG_DTRNG_EVAL_CONFIG_SIZE ((uint8_t) 52) ///< Size of DTRNG characterization data
#define MCUXCLELS_RNG_DTRNG_EVAL_RESULT_SIZE ((uint8_t) 188) ///< Size of DTRNG characterization result
#define MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE 4U ///< Minimum output size of #mcuxClEls_Rng_DrbgTestExtract_Async
#define MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE ((uint32_t) 1U << 16U) ///< Maximum output size of #mcuxClEls_Rng_DrbgTestExtract_Async
#define MCUXCLELS_RNG_DRBG_TEST_MODE_INSTANTIATE ((uint32_t) 0U) ///< Command options value for DRBG Test Instantiate command. For internal use
#define MCUXCLELS_RNG_DRBG_TEST_MODE_EXTRACT ((uint32_t) 1U) ///< Command options value for DRBG Test Extract command. For internal use
#define MCUXCLELS_RNG_DRBG_TEST_MODE_AES_ECB ((uint32_t) 3U) ///< Command options value for DRBG Test AES-ECB command. For internal use
#define MCUXCLELS_RNG_DRBG_TEST_MODE_AES_CTR ((uint32_t) 2U) ///< Command options value for DRBG Test AES-CTR command. For internal use
#ifdef MCUXCL_FEATURE_ELS_RND_RAW
#define MCUXCLELS_RNG_RND_REQ_RND_RAW ((uint32_t) 1U << 1) ///< Command options value for RND_REQ command. For internal use
#define MCUXCLELS_RNG_RAW_ENTROPY_SIZE ((uint32_t) 32U) ///< Fixed size of raw entropy when using the DTRNG
#endif /* MCUXCL_FEATURE_ELS_RND_RAW */
#ifdef MCUXCL_FEATURE_ELS_PRND_INIT
#define MCUXCLELS_RNG_RND_REQ_PRND_INIT ((uint32_t) 1U << 0) ///< Command options value for PRND_INIT command. For internal use
#endif /* MCUXCL_FEATURE_ELS_PRND_INIT */
/**
* @}
*/
/**********************************************
* FUNCTIONS
**********************************************/
/**
* @defgroup mcuxClEls_Rng_Functions mcuxClEls_Rng_Functions
* @brief Defines all functions of @ref mcuxClEls_Rng
* @ingroup mcuxClEls_Rng
* @{
*/
/**
* @brief Writes random data from the ELS DRBG to the given buffer.
*
* This function fills a buffer with random values from the DRBG. The DRBG provides 128 bits of security strength.
*
* Before execution, ELS will wait until #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_HIGH. This can lead to a delay if the DRBG is in a state with less security strength at the time of the call.
*
* If the random values from the DRBG are later used as a cryptographic key, the security strength of the cryptographic operation using the generated key should not exceed that of the DRBG.
*
* To name a few examples, this means (as per NIST SP 800-57 Part 1 Rev. 5):
* - AES-192 or AES-256 keys generated with this function will provide only 128 bits of security strength
* - RSA keys longer than 3072 bits will provide only 128 bits of security strength
* - ECC keys longer than 383 bits will provide only 128 bits of security strength
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[out] pOutput Pointer to the beginning of the memory area to fill with random data
* @param[in] outputLength Number of requested random bytes
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p outputLength </dt>
* <dd>supported values are #MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE bytes up to
* #MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE bytes. The size must be a multiple of 4.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_SW_FAULT in case of an internal error
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgRequest_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgRequest_Async(
uint8_t * pOutput,
size_t outputLength
);
#ifdef MCUXCL_FEATURE_ELS_RND_RAW
/**
* @brief Writes 32 bytes of raw random data from the ELS TRNG to the given buffer.
*
* This function fills a buffer with raw (unprocessed) random values from the TRNG.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @param[out] pOutput Pointer to the beginning of the memory area to fill with random data
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgRequestRaw_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgRequestRaw_Async(
uint8_t * pOutput
);
#endif /* MCUXCL_FEATURE_ELS_RND_RAW */
/**
* @brief Instantiates the DRBG in test mode.
*
* This function is a support function for FIPS CAVP testing. This function turns the ELS internal DRBG in test mode by loading known entropy from system memory.
* Call #mcuxClEls_WaitForOperation to complete the operation.
* Note that this function will alter the ELS internal entropy state which needs to be updated by the TRNG to use the DRBG in normal mode.
* The update process is majorly impacted by the time the TRNG needs to provide fresh entropy.
*
* @param[in] pEntropy Pointer to the input entropy data
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgTestInstantiate_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgTestInstantiate_Async(
uint8_t const * pEntropy
);
/**
* @brief Performs a DRBG extraction.
*
* This function is a support function for FIPS CAVP testing. This function mimics the behavior of #mcuxClEls_Rng_DrbgRequest_Async and fills a buffer with random data when DRBG is in test mode.
* Call #mcuxClEls_WaitForOperation to complete the operation.
* Note that this function will alter the ELS internal entropy state which needs to be updated by the TRNG to use the DRBG in normal mode.
* The update process is majorly impacted by the time the TRNG needs to provide fresh entropy.
*
* @attention #mcuxClEls_Rng_DrbgTestInstantiate_Async must be called prior to this function.
*
* @param[out] pOutput Pointer to the output random number
* @param[in] outputLength Length of the random number
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p outputLength </dt>
* <dd>supported values are #MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE bytes up to
* #MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE bytes. The size must be a multiple of 4.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref MCUXCLELS_STATUS_ and @ref mcuxCsslFlowProtection)
* @else
* @return An error code (see @ref MCUXCLELS_STATUS_)
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgTestExtract_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgTestExtract_Async(
uint8_t * pOutput,
size_t outputLength
);
/**
* @brief Encrypts data using the AES-ECB engine of the DRBG.
*
* This function is a support function for FIPS CAVP testing. This function performs an AES-ECB encryption on system data to evaluate the encryption engine of the DRBG.
* Call #mcuxClEls_WaitForOperation to complete the operation.
* Note that this function will alter the ELS internal entropy state which needs to be updated by the TRNG to use the DRBG in normal mode.
* The update process is majorly impacted by the time the TRNG needs to provide fresh entropy.
*
* @param[in] pDataKey Pointer to the data and key
* @param[out] pOutput Pointer to the encrypted output
*
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgTestAesEcb_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgTestAesEcb_Async(
uint8_t const * pDataKey,
uint8_t * pOutput
);
/**
* @brief Encrypts data using the AES-CTR engine of the DRBG.
*
* This function is a support function for FIPS CAVP testing. This function performs an AES-CTR encryption on system data to evaluate the encryption engine of the DRBG in test mode.
* Call #mcuxClEls_WaitForOperation to complete the operation.
* Note that this function will alter the ELS internal entropy state which needs to be updated by the TRNG to use the DRBG in normal mode.
* The update process is majorly impacted by the time the TRNG needs to provide fresh entropy.
*
* @param[in] pData Pointer to the data to be encrypted
* @param[in] dataLength Length of the data to be encrypted
* @param[in] pIvKey Pointer to the IV and key
* @param[out] pOutput Pointer to the encrypted output
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_DrbgTestAesCtr_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_DrbgTestAesCtr_Async(
uint8_t const * pData,
size_t dataLength,
uint8_t const * pIvKey,
uint8_t * pOutput
);
/**
* @brief Loads a configuration of the ELS DTRNG.
*
* This function overwrites the default DTRNG configuration in order to optimize or fine tune the DTRNG entropy gathering process.
* Call #mcuxClEls_WaitForOperation to complete the operation.
* Note that the TRNG configuration set by this function is non-persistent and any reset of the ELS (e.g. a power-cycle or calling #mcuxClEls_Reset_Async) will resets the DTRNG configuration to its default value.
*
* @if MCUXCL_FEATURE_ELS_SHA_DIRECT
* It must be ensured that SHA-Direct mode is disabled when calling this function (see #mcuxClEls_ShaDirect_Disable).
* @endif
*
* @param[in] pInput The pointer to DTRNG initialization data
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p pInput </dt>
* <dd>The size is #MCUXCLELS_RNG_DTRNG_CONFIG_SIZE bytes.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_Dtrng_ConfigLoad_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_Dtrng_ConfigLoad_Async(
uint8_t const * pInput
);
/**
* @brief Performs characterization of the ELS DTRNG.
*
* This function evaluates a DTRNG configuration for device specific characterization. The configuration used for characterization has to be placed in system memory.
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @attention If this function is called once, all other ELS commands except #mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async are blocked until any reset of the ELS (e.g. a power-cycle or calling #mcuxClEls_Reset_Async) is triggered.
*
* @param[in] pInput The pointer to DTRNG initialization data
* @param[out] pOutput The pointer to the evaluation result
*
* <dl>
* <dt>Parameter properties</dt>
* <dd><dl>
* <dt>@p pInput </dt>
* <dd>The size is #MCUXCLELS_RNG_DTRNG_EVAL_CONFIG_SIZE bytes.</dd>
* <dt>@p pOutput </dt>
* <dd>The size is #MCUXCLELS_RNG_DTRNG_EVAL_RESULT_SIZE bytes.</dd>
* </dl></dd>
* </dl>
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async(
uint8_t const * pInput,
uint8_t * pOutput
);
#ifdef MCUXCL_FEATURE_ELS_PRND_INIT
/**
* @brief Initializes the ELS PRNG.
*
* This function initializes the PRNG. After this operation #mcuxClEls_HwState_t.drbgentlvl == #MCUXCLELS_STATUS_DRBGENTLVL_LOW. This can lead to a delay if the DRBG is in a state with lower security strength at the time of the call.
*
* Call #mcuxClEls_WaitForOperation to complete the operation.
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT if a running operation prevented the request
* @retval #MCUXCLELS_STATUS_OK_WAIT on successful request
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Prng_Init_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Prng_Init_Async(void);
#endif /* MCUXCL_FEATURE_ELS_PRND_INIT */
/**
* @brief Returns one random word from the ELS PRNG.
*
* This function returns one low-quality random CPU word gathered from the PRNG.
*
* @attention PRNG has to be initialized prior to the first time calling this function.
*
* @param[out] pWord The pointer to the random word
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_OK on successful request
* @retval #MCUXCLELS_STATUS_HW_PRNG in case of insufficient entropy
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Prng_GetRandomWord)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Prng_GetRandomWord(
uint32_t * pWord
);
/**
* @brief Writes random data from the ELS PRNG to the given buffer.
*
* This function fills a buffer with low-quality random values gathered from the PRNG.
*
* @attention PRNG has to be initialized prior to the first time calling this function.
*
* @param[out] pOutput Pointer to the beginning of the memory area to fill with random data from PRNG
* @param[in] outputLength Size of @p pOutput in bytes
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_OK on successful request
* @retval #MCUXCLELS_STATUS_HW_PRNG in case of insufficient entropy
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Prng_GetRandom)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Prng_GetRandom(
uint8_t * pOutput,
size_t outputLength
);
#ifdef MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING
/**
* @brief This function checks if a DRBG reseeding is needed and if so reseeds the ELS DRBG.
*
* This function checks if the ELS DRBG needs to be reseeded by the DTRNG, and if so, executes the iterative seeding process.
* The function internally disables ELS interrupts before (potentially) running the iterative seeding process and restores
* the original ELS interrupt enable flags afterwards, before returning to the caller. This allows to properly use the function
* in an ELS interrupt handler to reseed the ELS DRBG when needed.
*
* @param[in] pDtrngConfig Pointer to the beginning of the memory area which contains the ELS DTRNG config
*
* @if (MCUXCL_FEATURE_CSSL_FP_USE_SECURE_COUNTER && MCUXCL_FEATURE_CSSL_SC_USE_SW_LOCAL)
* @return A code-flow protected error code (see @ref mcuxCsslFlowProtection). The error code can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @else
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
* @endif
* @retval #MCUXCLELS_STATUS_OK on successful request
* @retval #MCUXCLELS_STATUS_SW_FAULT in case the iterative seeding failed
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClEls_Dtrng_IterativeReseeding_CheckAndReseed)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Dtrng_IterativeReseeding_CheckAndReseed(const uint8_t *pDtrngConfig);
#endif /* MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING */
/**
* @}
*/ /* mcuxClEls_Rng_Functions */
/**
* @}
*/ /* mcuxClEls_Rng */
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_RNG_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_Types.h
+306
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@@ -0,0 +1,306 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_Types.h
* @brief ELS type header.
*
* This header defines types that are used by other mcuxClEls headers.
*/
/**
* @defgroup mcuxClEls_Types mcuxClEls_Types
* @brief This part of the @ref mcuxClEls driver defines common types
* @ingroup mcuxClEls
* @{
*/
#ifndef MCUXCLELS_TYPES_H_
#define MCUXCLELS_TYPES_H_
#include <stdint.h>
#include <stddef.h>
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxCsslFlowProtection.h>
#include <mcuxClEls_mapping.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* MACROS
**********************************************/
/**
* @defgroup mcuxClEls_Types_Macros mcuxClEls_Types_Macros
* @brief Defines all macros of @ref mcuxClEls_Types
* @ingroup mcuxClEls_Types
* @{
*/
#define MCUXCLELS_KEY_SLOTS (20U) ///< Number of key slots in the ELS key store.
/** @defgroup MCUXCLELS_KEYPROPERTY_VALUE_ MCUXCLELS_KEYPROPERTY_VALUE_
* @brief Constants for initalizing #mcuxClEls_KeyProp_t.word
* @ingroup mcuxClEls_Types_Macros
* @{
*/
#define MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_128 ((uint32_t) 0u<< 0u) ///< 128-bit key
#define MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_256 ((uint32_t) 1u<< 0u) ///< 256-bit key
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_512 ((uint32_t) 3u<< 0u) ///< 512-bit key
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#define MCUXCLELS_KEYPROPERTY_VALUE_ACTIVE ((uint32_t) 1u<< 5u) ///< Key is active (loaded)
#define MCUXCLELS_KEYPROPERTY_VALUE_BASE_SLOT ((uint32_t) 1u<< 6u) ///< First part of multi-slot key
#define MCUXCLELS_KEYPROPERTY_VALUE_GENERAL_PURPOSE_SLOT ((uint32_t) 1u<< 7u) ///< General purpose key slot
#define MCUXCLELS_KEYPROPERTY_VALUE_RETENTION_SLOT ((uint32_t) 1u<< 8u) ///< Retention key slot
#define MCUXCLELS_KEYPROPERTY_VALUE_HW_OUT_SLOT ((uint32_t) 1u<< 9u) ///< Hardware output key slot
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYPROPERTY_VALUE_PUK ((uint32_t) 1u<<11u) ///< Trusted Public Key
#define MCUXCLELS_KEYPROPERTY_VALUE_TECDH ((uint32_t) 1u<<12u) ///< Private key that can only be used in ECDH with Trusted Public Key
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#define MCUXCLELS_KEYPROPERTY_VALUE_CMAC ((uint32_t) 1u<<13u) ///< CMAC key
#define MCUXCLELS_KEYPROPERTY_VALUE_KSK ((uint32_t) 1u<<14u) ///< Key signing key
#define MCUXCLELS_KEYPROPERTY_VALUE_RTF ((uint32_t) 1u<<15u) ///< RTF signing key
#define MCUXCLELS_KEYPROPERTY_VALUE_CKDF ((uint32_t) 1u<<16u) ///< CKDF signing key
#define MCUXCLELS_KEYPROPERTY_VALUE_HKDF ((uint32_t) 1u<<17u) ///< HKDF signing key
#define MCUXCLELS_KEYPROPERTY_VALUE_ECSGN ((uint32_t) 1u<<18u) ///< ECC signing key
#define MCUXCLELS_KEYPROPERTY_VALUE_ECDH ((uint32_t) 1u<<19u) ///< ECC Diffie Hellman private key
#define MCUXCLELS_KEYPROPERTY_VALUE_AES ((uint32_t) 1u<<20u) ///< AES key
#define MCUXCLELS_KEYPROPERTY_VALUE_HMAC ((uint32_t) 1u<<21u) ///< HMAC key
#define MCUXCLELS_KEYPROPERTY_VALUE_KWK ((uint32_t) 1u<<22u) ///< Key Wrapping Key
#define MCUXCLELS_KEYPROPERTY_VALUE_KUOK ((uint32_t) 1u<<23u) ///< Key Unwrapping Only Key
#define MCUXCLELS_KEYPROPERTY_VALUE_TLS_PREMASTER_SECRET ((uint32_t) 1u<<24u) ///< TLS Premaster Secret
#define MCUXCLELS_KEYPROPERTY_VALUE_TLS_MASTER_SECRET ((uint32_t) 1u<<25u) ///< TLS Master Secret
#define MCUXCLELS_KEYPROPERTY_VALUE_KGSRC ((uint32_t) 1u<<26u) ///< Can provide key material input for ECC key generation
#define MCUXCLELS_KEYPROPERTY_VALUE_HW_OUT ((uint32_t) 1u<<27u) ///< A key to be used in a hardware out key slot
#define MCUXCLELS_KEYPROPERTY_VALUE_WRPOK ((uint32_t) 1u<<28u) ///< The key can be wrapped
#define MCUXCLELS_KEYPROPERTY_VALUE_DUK ((uint32_t) 1u<<29u) ///< Device Unique Key
#define MCUXCLELS_KEYPROPERTY_VALUE_PRIVILEGED ((uint32_t) 1u<<30u) ///< Caller must be in privileged mode to use the key
#define MCUXCLELS_KEYPROPERTY_VALUE_NOTPRIVILEGED ((uint32_t) 0u<<30u) ///< Caller does not have to be in privileged mode to use the key
#define MCUXCLELS_KEYPROPERTY_VALUE_SECURE ((uint32_t) 0u<<31u) ///< Caller must be in secure mode to use the key
#define MCUXCLELS_KEYPROPERTY_VALUE_NOTSECURE ((uint32_t) 1u<<31u) ///< Caller does not have to be in secure mode to use the key
/**
* @}
*/
/** @defgroup MCUXCLELS_KEYPROPERTY_ MCUXCLELS_KEYPROPERTY_
* @brief Constants for initalizing #mcuxClEls_KeyProp_t.bits
* @ingroup mcuxClEls_Types_Macros
* @{
*/
#define MCUXCLELS_KEYPROPERTY_KEY_SIZE_128 (0U) ///< This value of #mcuxClEls_KeyProp_t.ksize indicates a 128 bit key
#define MCUXCLELS_KEYPROPERTY_KEY_SIZE_256 (1U) ///< This value of #mcuxClEls_KeyProp_t.ksize indicates a 256 bit key
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYPROPERTY_KEY_SIZE_512 (3U) ///< This value of #mcuxClEls_KeyProp_t.ksize indicates a 512 bit key
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#define MCUXCLELS_KEYPROPERTY_ACTIVE_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.kactv indicates that the slot contains an active key
#define MCUXCLELS_KEYPROPERTY_ACTIVE_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.kactv indicates that the slot does not contain active key
#define MCUXCLELS_KEYPROPERTY_BASE_SLOT (1U) ///< This value of #mcuxClEls_KeyProp_t.kbase indicates that the slot is the base slot of a 2-slot key
#define MCUXCLELS_KEYPROPERTY_SECOND_SLOT (0U) ///< This value of #mcuxClEls_KeyProp_t.kbase indicates that the slot is the second slot of a 2-slot key
#define MCUXCLELS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.fgp indicates that the slot is a retention key slot or a hardware out key slot
#define MCUXCLELS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.fgp indicates that the slot is a neither retention key slot nor hardware out key slot
#define MCUXCLELS_KEYPROPERTY_RETENTION_SLOT_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.frtn indicates that the slot is a retention key slot
#define MCUXCLELS_KEYPROPERTY_RETENTION_SLOT_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.frtn indicates that the slot is not a retention key slot
#define MCUXCLELS_KEYPROPERTY_HW_OUT_SLOT_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.fhwo indicates that the slot is a hardware out key slot
#define MCUXCLELS_KEYPROPERTY_HW_OUT_SLOT_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.fhwo indicates that the slot is not a hardware out key slot
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLELS_KEYPROPERTY_PUK_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.upuk indicates that the slot is a Trusted Public Key
#define MCUXCLELS_KEYPROPERTY_PUK_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.upuk indicates that the slot is not a Trusted Public Key
#define MCUXCLELS_KEYPROPERTY_TECDH_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.utecdh indicates that the slot is a Private key that can only be used in ECDH with Trusted Public Key
#define MCUXCLELS_KEYPROPERTY_TECDH_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.utecdh indicates that the slot is not a Private key that can only be used in ECDH with Trusted Public Key
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
#define MCUXCLELS_KEYPROPERTY_CMAC_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.ucmac indicates that the key can be used for CMAC
#define MCUXCLELS_KEYPROPERTY_CMAC_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.ucmac indicates that the key cannot be used for CMAC
#define MCUXCLELS_KEYPROPERTY_KSK_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uksk indicates that the key can be used for key signing
#define MCUXCLELS_KEYPROPERTY_KSK_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uksk indicates that the key cannot be used for key signing
#define MCUXCLELS_KEYPROPERTY_RTF_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.urtf indicates that the key can be used for RTF signing
#define MCUXCLELS_KEYPROPERTY_RTF_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.urtf indicates that the key cannot be used for RTF signing
#define MCUXCLELS_KEYPROPERTY_CKDF_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uckdf indicates that the key can be used for CKDF
#define MCUXCLELS_KEYPROPERTY_CKDF_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uckdf indicates that the key cannot be used for CKDF
#define MCUXCLELS_KEYPROPERTY_HKDF_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uhkdf indicates that the key can be used for HKDF
#define MCUXCLELS_KEYPROPERTY_HKDF_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uhkdf indicates that the key cannot be used for HKDF
#define MCUXCLELS_KEYPROPERTY_ECC_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uecsg indicates that the key can be used for ECC signing
#define MCUXCLELS_KEYPROPERTY_ECC_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uecsg indicates that the key cannot be used for ECC signing
#define MCUXCLELS_KEYPROPERTY_ECC_DH_PRIVATE_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uecdh indicates that the key is a ECC Diffie Hellman private key
#define MCUXCLELS_KEYPROPERTY_ECC_DH_PRIVATE_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uecdh indicates that the key is not an ECC Diffie Hellman private key
#define MCUXCLELS_KEYPROPERTY_AES_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uaes indicates that the key is an AES key
#define MCUXCLELS_KEYPROPERTY_AES_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uaes indicates that the key is not an AES key
#define MCUXCLELS_KEYPROPERTY_HMAC_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uhmac indicates that the key is an HMAC key
#define MCUXCLELS_KEYPROPERTY_HMAC_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uhmac indicates that the key is not an HMAC key
#define MCUXCLELS_KEYPROPERTY_KWK_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.ukwk indicates that the key is a Key Wrapping Key
#define MCUXCLELS_KEYPROPERTY_KWK_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.ukwk indicates that the key is not a Key Wrapping Key
#define MCUXCLELS_KEYPROPERTY_KUOK_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.ukuok indicates that the key is a Key Unwrapping Only Key
#define MCUXCLELS_KEYPROPERTY_KUOK_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.ukuok indicates that the key is not a Key Unwrapping Only Key
#define MCUXCLELS_KEYPROPERTY_TLS_PREMASTER_SECRET_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.utlspms indicates that the key is a TLS Premaster Secret
#define MCUXCLELS_KEYPROPERTY_TLS_PREMASTER_SECRET_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.utlspms indicates that the key is not a TLS Premaster Secret
#define MCUXCLELS_KEYPROPERTY_TLS_MASTER_SECRET_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.utlsms indicates that the key is a TLS Master Secret
#define MCUXCLELS_KEYPROPERTY_TLS_MASTER_SECRET_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.utlsms indicates that the key is not a TLS Master Secret
#define MCUXCLELS_KEYPROPERTY_INPUT_FOR_ECC_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.ukgsrc indicates that the key can be used as key material input for ECC key generation
#define MCUXCLELS_KEYPROPERTY_INPUT_FOR_ECC_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.ukgsrc indicates that the key cannot be used as key material input for ECC key generation
#define MCUXCLELS_KEYPROPERTY_HW_OUT_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.uhwo indicates that the key can be used in a hardware out key slot
#define MCUXCLELS_KEYPROPERTY_HW_OUT_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.uhwo indicates that the key cannot be used in a hardware out key slot
#define MCUXCLELS_KEYPROPERTY_WRAP_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.wrpok indicates that the key can be wrapped
#define MCUXCLELS_KEYPROPERTY_WRAP_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.wrpok indicates that the key cannot be wrapped
#define MCUXCLELS_KEYPROPERTY_DEVICE_UNIQUE_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.duk indicates that the key is a Device Unique Key
#define MCUXCLELS_KEYPROPERTY_DEVICE_UNIQUE_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.duk indicates that the key is not a Device Unique Key
#define MCUXCLELS_KEYPROPERTY_PRIVILEGED_TRUE (1U) ///< This value of #mcuxClEls_KeyProp_t.upprot_priv indicates that the caller must be in privileged mode to use the key
#define MCUXCLELS_KEYPROPERTY_PRIVILEGED_FALSE (0U) ///< This value of #mcuxClEls_KeyProp_t.upprot_priv indicates that the caller does not need to be in privileged mode to use the key
#define MCUXCLELS_KEYPROPERTY_SECURE_TRUE (0U) ///< This value of #mcuxClEls_KeyProp_t.upprot_sec indicates that the caller must be in secure mode to use the key
#define MCUXCLELS_KEYPROPERTY_SECURE_FALSE (1U) ///< This value of #mcuxClEls_KeyProp_t.upprot_sec indicates that the caller does not need to be in secure mode to use the key
/**
* @}
*/
/**
* @defgroup MCUXCLELS_STATUS_ MCUXCLELS_STATUS_
* @brief Return code definitions
* @ingroup mcuxClEls_Types_Macros
* @{
*/
#define MCUXCLELS_STATUS_OK ((mcuxClEls_Status_t) 0x05552E03u) ///< No error occurred
#define MCUXCLELS_STATUS_OK_WAIT ((mcuxClEls_Status_t) 0x05552E07u) ///< An <tt>_Async</tt> function successfully started an ELS command. Call #mcuxClEls_WaitForOperation to complete it
#define MCUXCLELS_STATUS_HW_FAULT ((mcuxClEls_Status_t) 0x05555330u) ///< ELS hardware detected a fault
#define MCUXCLELS_STATUS_HW_ALGORITHM ((mcuxClEls_Status_t) 0x05555334u) ///< An algorithm failed in hardware
#define MCUXCLELS_STATUS_HW_OPERATIONAL ((mcuxClEls_Status_t) 0x05555338u) ///< ELS was operated incorrectly
#define MCUXCLELS_STATUS_HW_BUS ((mcuxClEls_Status_t) 0x0555533Cu) ///< A bus access failed
#define MCUXCLELS_STATUS_HW_INTEGRITY ((mcuxClEls_Status_t) 0x05555370u) ///< An integrity check failed in hardware
#define MCUXCLELS_STATUS_HW_PRNG ((mcuxClEls_Status_t) 0x05555374u) ///< Read access to PRNG output while PRNG is not in ready state
#define MCUXCLELS_STATUS_HW_DTRNG ((mcuxClEls_Status_t) 0x05555378u) ///< Unable to get entropy from dTRNG with current configuration
#define MCUXCLELS_STATUS_SW_FAULT ((mcuxClEls_Status_t) 0x0555F0F0u) ///< Software detected a fault
#define MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT ((mcuxClEls_Status_t) 0x055553B0u) ///< an ELS command was started while the ELS was still busy, or a SHA-Direct command was started while the SHA kernel was still busy
#define MCUXCLELS_STATUS_SW_INVALID_PARAM ((mcuxClEls_Status_t) 0x055553F8u) ///< Incorrect parameters were supplied
#define MCUXCLELS_STATUS_SW_INVALID_STATE ((mcuxClEls_Status_t) 0x055553B8u) ///< This can happen when ELS is in a wrong state for the requested ELS command
#define MCUXCLELS_STATUS_SW_COUNTER_EXPIRED ((mcuxClEls_Status_t) 0x055553BCu) ///< A software counter expired while waiting for an ELS operation to finish
#define MCUXCLELS_STATUS_SW_COMPARISON_FAILED ((mcuxClEls_Status_t) 0x05558930u) ///< A comparison between an ELS flag and its expected value failed
#ifdef MCUXCL_FEATURE_ELS_LOCKING
#define MCUXCLELS_STATUS_SW_LOCKING_FAILED ((mcuxClEls_Status_t) 0x055553F4u) ///< Unable to obtain ELS lock
#define MCUXCLELS_STATUS_SW_STATUS_LOCKED ((mcuxClEls_Status_t) 0x05552E0Bu) ///< ELS status is locked
#endif /* MCUXCL_FEATURE_ELS_LOCKING */
/** @} */
#define MCUXCLELS_STATUS_IS_HW_ERROR(x_) ((((mcuxClEls_Status_t) (x_)) & 0x0000FF00U) == 0x0000E100U) ///< Checks whether an error code is a hardware error. Indicates that an error was reported by ELS hardware.
#define MCUXCLELS_STATUS_IS_SW_ERROR(x_) ((((mcuxClEls_Status_t) (x_)) & 0x0000FF00U) == 0x0000F000U) ///< Checks whether an error code is a software error. Indicates that the error was detected by the driver software and not by ELS hardware.
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxClEls_Types_Types mcuxClEls_Types_Types
* @brief Defines all types of @ref mcuxClEls_Types
* @ingroup mcuxClEls_Types
* @{
*/
/**
* @brief Type for ELS driver status codes
*/
typedef uint32_t mcuxClEls_Status_t;
/**
* @brief Deprecated type for ELS driver protected status codes
*/
typedef MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Status_Protected_t;
/**
* @brief Type for ELS keystore indices
*/
typedef uint32_t mcuxClEls_KeyIndex_t;
/** Type for ELS key store key properties */
typedef union
{
struct
{
uint32_t value; ///< Accesses the bit field as a full word; initialize with a combination of constants from @ref MCUXCLELS_KEYPROPERTY_VALUE_
} word; ///< Access #mcuxClEls_KeyProp_t word-wise
struct
{
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
uint32_t ksize :2; ///< Key size
uint32_t :3; ///< RFU
#else
uint32_t ksize :1; ///< Key size
uint32_t :4; ///< RFU
#endif
uint32_t kactv :1; ///< Status flag to indicate whether the key slot contains an active key or not
uint32_t kbase :1; ///< Status flag to indicate whether the key slot is a base slot or the second slot of a 256-bit key
uint32_t fgp :1; ///< Hardware feature flag: General purpose key slot
uint32_t frtn :1; ///< Hardware feature flag: Retention key slot
uint32_t fhwo :1; ///< Hardware feature flag: Hardware-out key slot
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
uint32_t :1; ///< RFU
uint32_t upuk :1; ///< Usage permission for Trusted Public Key
uint32_t utecdh :1; ///< Usage permission for Private key that can only be used in ECDH with Trusted Public Key
#else
uint32_t :3; ///< RFU
#endif /* MCUXCL_FEATURE_ELS_PUK_INTERNAL */
uint32_t ucmac :1; ///< Usage permission for CMAC
uint32_t uksk :1; ///< Usage permission for key signing
uint32_t urtf :1; ///< Usage permission for RTF signing
uint32_t uckdf :1; ///< Usage permission for CKDF
uint32_t uhkdf :1; ///< Usage permission for HKDF
uint32_t uecsg :1; ///< Usage permission for ECDSA signing
uint32_t uecdh :1; ///< Usage permission for Elliptic Curve Diffie-Hellman
uint32_t uaes :1; ///< Usage permission for AES
uint32_t uhmac :1; ///< Usage permission for HMAC
uint32_t ukwk :1; ///< Usage permission for key wrapping
uint32_t ukuok :1; ///< Usage permission for key unwrapping, but not for key wrapping
uint32_t utlspms :1; ///< Usage permission as a TLS premaster secret
uint32_t utlsms :1; ///< Usage permission as a TLS master secret
uint32_t ukgsrc :1; ///< Usage permission as input for ECC key generation
uint32_t uhwo :1; ///< Usage permission in a hardware-out key slot
uint32_t wrpok :1; ///< Usage permission to wrap
uint32_t duk :1; ///< Device-unique key flag
uint32_t upprot_priv :1; ///< Access restriction to privileged mode
uint32_t upprot_sec :1; ///< Access restriction to TrustZone secure mode
} bits; ///< Access #mcuxClEls_KeyProp_t bit-wise
} mcuxClEls_KeyProp_t;
#define utlpsms utlspms ///< Deprecated name for #mcuxClEls_KeyProp_t.utlspms
/**
* @brief Function type for transfer of data to a memory-mapped register
*
* This function type is used as a callback for handling data transfer from memory to a memory-mapped register.
* Such a function shall read data from the @c uint8_t array source, and write data via a sequence of writes to @p destRegister.
* Further specification of this function's behavior can be found in the documentation of the function that accepts this function as a callback parameter.
*
* @param [out] pDestRegister Memory-mapped register that the output data shall be written to
* @param [in] pSource Array containing the input data
* @param [in] sourceLength Size of @p source in bytes
* @param [in, out] pCallerData Custom pointer that is provided by the caller and forwarded to the callback function by the operation
* @return An error code that can be any error code in @ref MCUXCLELS_STATUS_, see individual documentation for more information
*/
typedef mcuxClEls_Status_t (*mcuxClEls_TransferToRegisterFunction_t)(
uint32_t volatile * pDestRegister,
uint8_t const * pSource,
size_t sourceLength,
void * pCallerData);
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLELS_TYPES_H_ */
/**
* @}
*
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/inc/mcuxClEls_mapping.h
+559
View File
@@ -0,0 +1,559 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClEls_mapping.h
* @brief Header providing mapping for legacy function/definition names (with CSS)
*/
#ifndef MCUXCLELS_MAPPING_H_
#define MCUXCLELS_MAPPING_H_
/* Public definitions */
/**
* MCUXCLCSS_CSS_((?:INTERRUPT_DISABLE|INTERRUPT_ENABLE|INTERRUPT_KEEP|INTERRUPT_SET|RESET_CLEAR|RESET_KEEP))(?!\w)
* -->
* MCUXCLELS_ELS_\1
*
* MCUXCLCSS_((?:API|AEAD_AAD_BLOCK_SIZE|AEAD_ACPMOD_AADPROC|AEAD_ACPMOD_FINAL|AEAD_ACPMOD_INIT|AEAD_ACPMOD_MSGPROC|AEAD_CONTEXT_SIZE|AEAD_DECRYPT|AEAD_ENCRYPT|AEAD_EXTERN_KEY|AEAD_INTERN_KEY|AEAD_IV_BLOCK_SIZE|AEAD_LASTINIT_FALSE|AEAD_LASTINIT_TRUE|AEAD_STATE_IN_DISABLE|AEAD_STATE_IN_ENABLE|AEAD_STATE_OUT_ENABLE|AEAD_TAG_SIZE|CIPHERPARAM_ALGORITHM_AES_CBC|CIPHERPARAM_ALGORITHM_AES_CTR|CIPHERPARAM_ALGORITHM_AES_ECB|CIPHER_BLOCK_SIZE_AES|CIPHER_DECRYPT|CIPHER_ENCRYPT|CIPHER_EXTERNAL_KEY|CIPHER_INTERNAL_KEY|CIPHER_KEY_SIZE_AES_128|CIPHER_KEY_SIZE_AES_192|CIPHER_KEY_SIZE_AES_256|CIPHER_STATE_IN_DISABLE|CIPHER_STATE_IN_ENABLE|CIPHER_STATE_OUT_DISABLE|CIPHER_STATE_OUT_ENABLE|CKDF_ALGO_SP800108|CKDF_ALGO_SP80056C_EXPAND|CKDF_ALGO_SP80056C_EXTRACT|CKDF_DERIVATIONDATA_SIZE|CKDF_RTF_DERIV|CKDF_SP80056C_DERIVATIONDATA_SIZE_16|CKDF_SP80056C_DERIVATIONDATA_SIZE_32|CKDF_SYSTEM_MEMORY_DERIV|CMAC_EXTERNAL_KEY_DISABLE|CMAC_EXTERNAL_KEY_ENABLE|CMAC_FINALIZE_DISABLE|CMAC_FINALIZE_ENABLE|CMAC_INITIALIZE_DISABLE|CMAC_INITIALIZE_ENABLE|CMAC_KEY_SIZE_128|CMAC_KEY_SIZE_256|CMAC_OUT_SIZE))(?!\w)
* MCUXCLCSS_((?:CMD_CRC_CMD_ID_AUTH_CIPHER|CMD_CRC_CMD_ID_CHAL_RESP_GEN|CMD_CRC_CMD_ID_CIPHER|CMD_CRC_CMD_ID_CKDF|CMD_CRC_CMD_ID_CMAC|CMD_CRC_CMD_ID_DRBG_TEST|CMD_CRC_CMD_ID_DTRNG_CFG_LOAD|CMD_CRC_CMD_ID_DTRNG_EVAL|CMD_CRC_CMD_ID_ECKXH|CMD_CRC_CMD_ID_ECSIGN|CMD_CRC_CMD_ID_ECVFY|CMD_CRC_CMD_ID_GDET_CFG_LOAD|CMD_CRC_CMD_ID_GDET_TRIM|CMD_CRC_CMD_ID_HASH|CMD_CRC_CMD_ID_HKDF|CMD_CRC_CMD_ID_HMAC|CMD_CRC_CMD_ID_KDELETE|CMD_CRC_CMD_ID_KEYGEN|CMD_CRC_CMD_ID_KEYIN|CMD_CRC_CMD_ID_KEYOUT|CMD_CRC_CMD_ID_KEYPROV|CMD_CRC_CMD_ID_RND_REQ|CMD_CRC_CMD_ID_TLS|CMD_CRC_DISABLE|CMD_CRC_ENABLE|CMD_CRC_INITIAL_VALUE|CMD_CRC_POLYNOMIAL|CMD_CRC_REFERENCE_INIT|CMD_CRC_REFERENCE_RESET|CMD_CRC_REFERENCE_UPDATE_AEAD_FINALIZE|CMD_CRC_REFERENCE_UPDATE_AEAD_INIT|CMD_CRC_REFERENCE_UPDATE_AEAD_PARTIALINIT|CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEAAD|CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEDATA|CMD_CRC_REFERENCE_UPDATE_CIPHER|CMD_CRC_REFERENCE_UPDATE_CKDF_SP800108|CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXPAND|CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXTRACT|CMD_CRC_REFERENCE_UPDATE_CMAC))(?!\w)
* MCUXCLCSS_((?:CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGE|CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGEINT|CMD_CRC_REFERENCE_UPDATE_ECCKEYGEN|CMD_CRC_REFERENCE_UPDATE_ECCSIGN|CMD_CRC_REFERENCE_UPDATE_ECCVERFIFY|CMD_CRC_REFERENCE_UPDATE_ECCVERFIFYINT|CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_LOADCONFIG|CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_TRIM|CMD_CRC_REFERENCE_UPDATE_HASH|CMD_CRC_REFERENCE_UPDATE_HKDF_RFC5869|CMD_CRC_REFERENCE_UPDATE_HKDF_SP80056C|CMD_CRC_REFERENCE_UPDATE_HMAC|CMD_CRC_REFERENCE_UPDATE_KEYDELETE|CMD_CRC_REFERENCE_UPDATE_KEYEXPORT|CMD_CRC_REFERENCE_UPDATE_KEYIMPORT|CMD_CRC_REFERENCE_UPDATE_KEYIMPORTPUK|CMD_CRC_REFERENCE_UPDATE_KEYPROVISION|CMD_CRC_REFERENCE_UPDATE_KEYPROVISIONROM|CMD_CRC_REFERENCE_UPDATE_PRNG_INIT|CMD_CRC_REFERENCE_UPDATE_RESPGEN|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUEST|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUESTRAW|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESCTR|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESECB|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTEXTRACT|CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTINSTANTIATE|CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGEVALUATE))(?!\w)
* MCUXCLCSS_((?:CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGLOAD|CMD_CRC_REFERENCE_UPDATE_TLSGENERATEMASTERKEYFROMPREMASTERKEY|CMD_CRC_REFERENCE_UPDATE_TLSGENERATESESSIONKEYSFROMMASTERKEY|CMD_CRC_RESET|CMD_CRC_VALUE_DISABLE|CMD_CRC_VALUE_ENABLE|CMD_CRC_VALUE_RESET|DMA_READBACK_PROTECTION_TOKEN|ECC_EXTKEY_EXTERNAL|ECC_EXTKEY_INTERNAL|ECC_GEN_PUBLIC_KEY|ECC_HASHED|ECC_INCLUDE_RANDOM_DATA|ECC_NOT_HASHED|ECC_NO_RANDOM_DATA|ECC_NO_RTF|ECC_OUTPUTKEY_DETERMINISTIC|ECC_OUTPUTKEY_KEYEXCHANGE|ECC_OUTPUTKEY_RANDOM|ECC_OUTPUTKEY_SIGN|ECC_PUBLICKEY_SIGN_DISABLE|ECC_PUBLICKEY_SIGN_ENABLE|ECC_PUBLICKEY_SIZE|ECC_REVERSEFETCH_DISABLE|ECC_REVERSEFETCH_ENABLE|ECC_RTF|ECC_SIGNATURE_R_SIZE|ECC_SIGNATURE_SIZE|ECC_SKIP_PUBLIC_KEY|ECC_VALUE_HASHED|ECC_VALUE_NOT_HASHED|ECC_VALUE_NO_RTF|ECC_VALUE_RTF|ERROR_FLAGS_CLEAR|ERROR_FLAGS_KEEP|GLITCHDETECTOR_CFG_SIZE|GLITCHDETECTOR_TRIM_SIZE|GLITCH_DETECTOR_INTERRUPT_DISABLE|GLITCH_DETECTOR_INTERRUPT_ENABLE|GLITCH_DETECTOR_NEG_KEEP))(?!\w)
* MCUXCLCSS_((?:GLITCH_DETECTOR_NEG_SET|GLITCH_DETECTOR_POS_KEEP|GLITCH_DETECTOR_POS_SET|GLITCH_DETECTOR_RESET_CLEAR|GLITCH_DETECTOR_RESET_KEEP|HASH_BLOCK_SIZE_SHA_224|HASH_BLOCK_SIZE_SHA_256|HASH_BLOCK_SIZE_SHA_384|HASH_BLOCK_SIZE_SHA_512|HASH_INIT_DISABLE|HASH_INIT_ENABLE|HASH_LOAD_DISABLE|HASH_LOAD_ENABLE|HASH_MODE_SHA_224|HASH_MODE_SHA_256|HASH_MODE_SHA_384|HASH_MODE_SHA_512|HASH_OUTPUT_DISABLE|HASH_OUTPUT_ENABLE|HASH_OUTPUT_SIZE_SHA_224|HASH_OUTPUT_SIZE_SHA_256|HASH_OUTPUT_SIZE_SHA_384|HASH_OUTPUT_SIZE_SHA_512|HASH_RTF_OUTPUT_DISABLE|HASH_RTF_OUTPUT_ENABLE|HASH_RTF_OUTPUT_SIZE|HASH_RTF_UPDATE_DISABLE|HASH_RTF_UPDATE_ENABLE|HASH_STATE_SIZE_SHA_224|HASH_STATE_SIZE_SHA_256|HASH_STATE_SIZE_SHA_384|HASH_STATE_SIZE_SHA_512|HASH_VALUE_MODE_SHA_224|HASH_VALUE_MODE_SHA_256|HASH_VALUE_MODE_SHA_384|HASH_VALUE_MODE_SHA_512|HKDF_ALGO_RFC5869|HKDF_ALGO_SP80056C|HKDF_RFC5869_DERIVATIONDATA_SIZE|HKDF_SP80056C_TARGETKEY_SIZE|HKDF_VALUE_MEMORY_DERIV|HKDF_VALUE_RTF_DERIV|HMAC_EXTERNAL_KEY_DISABLE|HMAC_EXTERNAL_KEY_ENABLE|HMAC_OUTPUT_SIZE|HMAC_PADDED_KEY_SIZE|HW_VERSION))(?!\w)
* MCUXCLCSS_((?:KEYGEN_VALUE_DETERMINISTIC|KEYGEN_VALUE_GEN_PUB_KEY|KEYGEN_VALUE_NO_PUB_KEY|KEYGEN_VALUE_NO_RANDOM_DATA|KEYGEN_VALUE_RANDOM|KEYGEN_VALUE_SIGN_PUBLICKEY|KEYGEN_VALUE_TYPE_KEYEXCHANGE|KEYGEN_VALUE_TYPE_SIGN|KEYGEN_VALUE_USE_RANDOM_DATA|KEYIMPORT_KFMT_PBK|KEYIMPORT_KFMT_PUF|KEYIMPORT_KFMT_RFC3394|KEYIMPORT_KFMT_UDF|KEYIMPORT_REVERSEFETCH_DISABLE|KEYIMPORT_REVERSEFETCH_ENABLE|KEYIMPORT_VALUE_KFMT_PBK|KEYIMPORT_VALUE_KFMT_PUF|KEYIMPORT_VALUE_KFMT_RFC3394|KEYIMPORT_VALUE_KFMT_UDF|KEYPROPERTY_ACTIVE_FALSE|KEYPROPERTY_ACTIVE_TRUE|KEYPROPERTY_AES_FALSE|KEYPROPERTY_AES_TRUE|KEYPROPERTY_BASE_SLOT|KEYPROPERTY_CKDF_FALSE|KEYPROPERTY_CKDF_TRUE|KEYPROPERTY_CMAC_FALSE|KEYPROPERTY_CMAC_TRUE|KEYPROPERTY_DEVICE_UNIQUE_FALSE|KEYPROPERTY_DEVICE_UNIQUE_TRUE|KEYPROPERTY_ECC_DH_PRIVATE_FALSE|KEYPROPERTY_ECC_DH_PRIVATE_TRUE|KEYPROPERTY_ECC_FALSE|KEYPROPERTY_ECC_TRUE|KEYPROPERTY_GENERAL_PURPOSE_SLOT_FALSE|KEYPROPERTY_GENERAL_PURPOSE_SLOT_TRUE|KEYPROPERTY_HKDF_FALSE|KEYPROPERTY_HKDF_TRUE|KEYPROPERTY_HMAC_FALSE|KEYPROPERTY_HMAC_TRUE|KEYPROPERTY_HW_OUT_FALSE|KEYPROPERTY_HW_OUT_SLOT_FALSE))(?!\w)
* MCUXCLCSS_((?:KEYPROPERTY_HW_OUT_SLOT_TRUE|KEYPROPERTY_HW_OUT_TRUE|KEYPROPERTY_INPUT_FOR_ECC_FALSE|KEYPROPERTY_INPUT_FOR_ECC_TRUE|KEYPROPERTY_KEY_SIZE_128|KEYPROPERTY_KEY_SIZE_256|KEYPROPERTY_KEY_SIZE_512|KEYPROPERTY_KSK_FALSE|KEYPROPERTY_KSK_TRUE|KEYPROPERTY_KUOK_FALSE|KEYPROPERTY_KUOK_TRUE|KEYPROPERTY_KWK_FALSE|KEYPROPERTY_KWK_TRUE|KEYPROPERTY_PRIVILEGED_FALSE|KEYPROPERTY_PRIVILEGED_TRUE|KEYPROPERTY_PUK_FALSE|KEYPROPERTY_PUK_TRUE|KEYPROPERTY_RETENTION_SLOT_FALSE|KEYPROPERTY_RETENTION_SLOT_TRUE|KEYPROPERTY_RTF_FALSE|KEYPROPERTY_RTF_TRUE|KEYPROPERTY_SECOND_SLOT|KEYPROPERTY_SECURE_FALSE|KEYPROPERTY_SECURE_TRUE|KEYPROPERTY_TECDH_FALSE|KEYPROPERTY_TECDH_TRUE|KEYPROPERTY_TLS_MASTER_SECRET_FALSE|KEYPROPERTY_TLS_MASTER_SECRET_TRUE|KEYPROPERTY_TLS_PREMASTER_SECRET_FALSE|KEYPROPERTY_TLS_PREMASTER_SECRET_TRUE|KEYPROPERTY_VALUE_ACTIVE|KEYPROPERTY_VALUE_AES|KEYPROPERTY_VALUE_BASE_SLOT|KEYPROPERTY_VALUE_CKDF|KEYPROPERTY_VALUE_CMAC|KEYPROPERTY_VALUE_DUK|KEYPROPERTY_VALUE_ECDH|KEYPROPERTY_VALUE_ECSGN|KEYPROPERTY_VALUE_GENERAL_PURPOSE_SLOT|KEYPROPERTY_VALUE_HKDF|KEYPROPERTY_VALUE_HMAC))(?!\w)
* MCUXCLCSS_((?:KEYPROPERTY_VALUE_HW_OUT|KEYPROPERTY_VALUE_HW_OUT_SLOT|KEYPROPERTY_VALUE_KEY_SIZE_128|KEYPROPERTY_VALUE_KEY_SIZE_256|KEYPROPERTY_VALUE_KEY_SIZE_512|KEYPROPERTY_VALUE_KGSRC|KEYPROPERTY_VALUE_KSK|KEYPROPERTY_VALUE_KUOK|KEYPROPERTY_VALUE_KWK|KEYPROPERTY_VALUE_NOTPRIVILEGED|KEYPROPERTY_VALUE_NOTSECURE|KEYPROPERTY_VALUE_PRIVILEGED|KEYPROPERTY_VALUE_PUK|KEYPROPERTY_VALUE_RETENTION_SLOT|KEYPROPERTY_VALUE_RTF|KEYPROPERTY_VALUE_SECURE|KEYPROPERTY_VALUE_TECDH|KEYPROPERTY_VALUE_TLS_MASTER_SECRET|KEYPROPERTY_VALUE_TLS_PREMASTER_SECRET|KEYPROPERTY_VALUE_WRPOK|KEYPROPERTY_WRAP_FALSE|KEYPROPERTY_WRAP_TRUE|KEYPROV_DUK_UPDATE_DISABLE|KEYPROV_DUK_UPDATE_ENABLE|KEYPROV_KEYSHARE_TABLE_SIZE|KEYPROV_KEY_PART_1_SIZE|KEYPROV_NOIC_DISABLE|KEYPROV_NOIC_ENABLE|KEYPROV_TESTERSHARE_SIZE|KEYPROV_VALUE_NOIC|KEY_SLOTS|MASTER_UNLOCK_ANY|RESET_CANCEL|RESET_DO_NOT_CANCEL|RESP_GEN_AVAILABLE_SLOT_0|RESP_GEN_AVAILABLE_SLOT_1|RESP_GEN_AVAILABLE_SLOT_2|RESP_GEN_SLOTS|RFC3394_CONTAINER_SIZE_128|RFC3394_CONTAINER_SIZE_256|RFC3394_CONTAINER_SIZE_P256|RFC3394_OVERHEAD|RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE))(?!\w)
* MCUXCLCSS_((?:RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE|RNG_DRBG_TEST_MODE_AES_CTR|RNG_DRBG_TEST_MODE_AES_ECB|RNG_DRBG_TEST_MODE_EXTRACT|RNG_DRBG_TEST_MODE_INSTANTIATE|RNG_DTRNG_CONFIG_SIZE|RNG_DTRNG_EVAL_CONFIG_SIZE|RNG_DTRNG_EVAL_RESULT_SIZE|RNG_RAW_ENTROPY_SIZE|RNG_RND_REQ_PRND_INIT|RNG_RND_REQ_RND_RAW|STATUS_DRBGENTLVL_HIGH|STATUS_DRBGENTLVL_LOW|STATUS_DRBGENTLVL_NONE|STATUS_ECDSAVFY_ERROR|STATUS_ECDSAVFY_FAIL|STATUS_ECDSAVFY_NORUN|STATUS_ECDSAVFY_OK|STATUS_HW_ALGORITHM|STATUS_HW_BUS|STATUS_HW_DTRNG|STATUS_HW_FAULT|STATUS_HW_INTEGRITY|STATUS_HW_OPERATIONAL|STATUS_HW_PRNG|STATUS_IS_HW_ERROR|STATUS_IS_SW_ERROR|STATUS_OK|STATUS_OK_WAIT|STATUS_PPROT_PRIVILEGED_NONSECURE|STATUS_PPROT_PRIVILEGED_SECURE|STATUS_PPROT_UNPRIVILEGED_NONSECURE|STATUS_PPROT_UNPRIVILEGED_SECURE|STATUS_SW_CANNOT_INTERRUPT|STATUS_SW_COMPARISON_FAILED|STATUS_SW_COUNTER_EXPIRED|STATUS_SW_FAULT|STATUS_SW_INVALID_PARAM|STATUS_SW_INVALID_STATE|STATUS_SW_LOCKING_FAILED|STATUS_SW_STATUS_LOCKED|TLS_DERIVATIONDATA_SIZE|TLS_FINALIZE|TLS_INIT|TLS_RANDOM_SIZE))(?!\w)
* -->
* MCUXCLELS_\1
*/
#define MCUXCLCSS_API MCUXCLELS_API
#define MCUXCLCSS_AEAD_AAD_BLOCK_SIZE MCUXCLELS_AEAD_AAD_BLOCK_SIZE
#define MCUXCLCSS_AEAD_ACPMOD_AADPROC MCUXCLELS_AEAD_ACPMOD_AADPROC
#define MCUXCLCSS_AEAD_ACPMOD_FINAL MCUXCLELS_AEAD_ACPMOD_FINAL
#define MCUXCLCSS_AEAD_ACPMOD_INIT MCUXCLELS_AEAD_ACPMOD_INIT
#define MCUXCLCSS_AEAD_ACPMOD_MSGPROC MCUXCLELS_AEAD_ACPMOD_MSGPROC
#define MCUXCLCSS_AEAD_CONTEXT_SIZE MCUXCLELS_AEAD_CONTEXT_SIZE
#define MCUXCLCSS_AEAD_DECRYPT MCUXCLELS_AEAD_DECRYPT
#define MCUXCLCSS_AEAD_ENCRYPT MCUXCLELS_AEAD_ENCRYPT
#define MCUXCLCSS_AEAD_EXTERN_KEY MCUXCLELS_AEAD_EXTERN_KEY
#define MCUXCLCSS_AEAD_INTERN_KEY MCUXCLELS_AEAD_INTERN_KEY
#define MCUXCLCSS_AEAD_IV_BLOCK_SIZE MCUXCLELS_AEAD_IV_BLOCK_SIZE
#define MCUXCLCSS_AEAD_LASTINIT_FALSE MCUXCLELS_AEAD_LASTINIT_FALSE
#define MCUXCLCSS_AEAD_LASTINIT_TRUE MCUXCLELS_AEAD_LASTINIT_TRUE
#define MCUXCLCSS_AEAD_STATE_IN_DISABLE MCUXCLELS_AEAD_STATE_IN_DISABLE
#define MCUXCLCSS_AEAD_STATE_IN_ENABLE MCUXCLELS_AEAD_STATE_IN_ENABLE
#define MCUXCLCSS_AEAD_STATE_OUT_ENABLE MCUXCLELS_AEAD_STATE_OUT_ENABLE
#define MCUXCLCSS_AEAD_TAG_SIZE MCUXCLELS_AEAD_TAG_SIZE
#define MCUXCLCSS_CIPHERPARAM_ALGORITHM_AES_CBC MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CBC
#define MCUXCLCSS_CIPHERPARAM_ALGORITHM_AES_CTR MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_CTR
#define MCUXCLCSS_CIPHERPARAM_ALGORITHM_AES_ECB MCUXCLELS_CIPHERPARAM_ALGORITHM_AES_ECB
#define MCUXCLCSS_CIPHER_BLOCK_SIZE_AES MCUXCLELS_CIPHER_BLOCK_SIZE_AES
#define MCUXCLCSS_CIPHER_DECRYPT MCUXCLELS_CIPHER_DECRYPT
#define MCUXCLCSS_CIPHER_ENCRYPT MCUXCLELS_CIPHER_ENCRYPT
#define MCUXCLCSS_CIPHER_EXTERNAL_KEY MCUXCLELS_CIPHER_EXTERNAL_KEY
#define MCUXCLCSS_CIPHER_INTERNAL_KEY MCUXCLELS_CIPHER_INTERNAL_KEY
#define MCUXCLCSS_CIPHER_KEY_SIZE_AES_128 MCUXCLELS_CIPHER_KEY_SIZE_AES_128
#define MCUXCLCSS_CIPHER_KEY_SIZE_AES_192 MCUXCLELS_CIPHER_KEY_SIZE_AES_192
#define MCUXCLCSS_CIPHER_KEY_SIZE_AES_256 MCUXCLELS_CIPHER_KEY_SIZE_AES_256
#define MCUXCLCSS_CIPHER_STATE_IN_DISABLE MCUXCLELS_CIPHER_STATE_IN_DISABLE
#define MCUXCLCSS_CIPHER_STATE_IN_ENABLE MCUXCLELS_CIPHER_STATE_IN_ENABLE
#define MCUXCLCSS_CIPHER_STATE_OUT_DISABLE MCUXCLELS_CIPHER_STATE_OUT_DISABLE
#define MCUXCLCSS_CIPHER_STATE_OUT_ENABLE MCUXCLELS_CIPHER_STATE_OUT_ENABLE
#define MCUXCLCSS_CKDF_ALGO_SP800108 MCUXCLELS_CKDF_ALGO_SP800108
#define MCUXCLCSS_CKDF_DERIVATIONDATA_SIZE MCUXCLELS_CKDF_DERIVATIONDATA_SIZE
#define MCUXCLCSS_CMAC_EXTERNAL_KEY_DISABLE MCUXCLELS_CMAC_EXTERNAL_KEY_DISABLE
#define MCUXCLCSS_CMAC_EXTERNAL_KEY_ENABLE MCUXCLELS_CMAC_EXTERNAL_KEY_ENABLE
#define MCUXCLCSS_CMAC_FINALIZE_DISABLE MCUXCLELS_CMAC_FINALIZE_DISABLE
#define MCUXCLCSS_CMAC_FINALIZE_ENABLE MCUXCLELS_CMAC_FINALIZE_ENABLE
#define MCUXCLCSS_CMAC_INITIALIZE_DISABLE MCUXCLELS_CMAC_INITIALIZE_DISABLE
#define MCUXCLCSS_CMAC_INITIALIZE_ENABLE MCUXCLELS_CMAC_INITIALIZE_ENABLE
#define MCUXCLCSS_CMAC_KEY_SIZE_128 MCUXCLELS_CMAC_KEY_SIZE_128
#define MCUXCLCSS_CMAC_KEY_SIZE_256 MCUXCLELS_CMAC_KEY_SIZE_256
#define MCUXCLCSS_CMAC_OUT_SIZE MCUXCLELS_CMAC_OUT_SIZE
#ifdef MCUXCL_FEATURE_ELS_CMD_CRC
#define MCUXCLCSS_CMD_CRC_CMD_ID_AUTH_CIPHER MCUXCLELS_CMD_CRC_CMD_ID_AUTH_CIPHER
#define MCUXCLCSS_CMD_CRC_CMD_ID_CHAL_RESP_GEN MCUXCLELS_CMD_CRC_CMD_ID_CHAL_RESP_GEN
#define MCUXCLCSS_CMD_CRC_CMD_ID_CIPHER MCUXCLELS_CMD_CRC_CMD_ID_CIPHER
#define MCUXCLCSS_CMD_CRC_CMD_ID_CKDF MCUXCLELS_CMD_CRC_CMD_ID_CKDF
#define MCUXCLCSS_CMD_CRC_CMD_ID_CMAC MCUXCLELS_CMD_CRC_CMD_ID_CMAC
#define MCUXCLCSS_CMD_CRC_CMD_ID_DRBG_TEST MCUXCLELS_CMD_CRC_CMD_ID_DRBG_TEST
#define MCUXCLCSS_CMD_CRC_CMD_ID_DTRNG_CFG_LOAD MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_CFG_LOAD
#define MCUXCLCSS_CMD_CRC_CMD_ID_DTRNG_EVAL MCUXCLELS_CMD_CRC_CMD_ID_DTRNG_EVAL
#define MCUXCLCSS_CMD_CRC_CMD_ID_ECKXH MCUXCLELS_CMD_CRC_CMD_ID_ECKXH
#define MCUXCLCSS_CMD_CRC_CMD_ID_ECSIGN MCUXCLELS_CMD_CRC_CMD_ID_ECSIGN
#define MCUXCLCSS_CMD_CRC_CMD_ID_ECVFY MCUXCLELS_CMD_CRC_CMD_ID_ECVFY
#define MCUXCLCSS_CMD_CRC_CMD_ID_GDET_CFG_LOAD MCUXCLELS_CMD_CRC_CMD_ID_GDET_CFG_LOAD
#define MCUXCLCSS_CMD_CRC_CMD_ID_GDET_TRIM MCUXCLELS_CMD_CRC_CMD_ID_GDET_TRIM
#define MCUXCLCSS_CMD_CRC_CMD_ID_HASH MCUXCLELS_CMD_CRC_CMD_ID_HASH
#define MCUXCLCSS_CMD_CRC_CMD_ID_HKDF MCUXCLELS_CMD_CRC_CMD_ID_HKDF
#define MCUXCLCSS_CMD_CRC_CMD_ID_HMAC MCUXCLELS_CMD_CRC_CMD_ID_HMAC
#define MCUXCLCSS_CMD_CRC_CMD_ID_KDELETE MCUXCLELS_CMD_CRC_CMD_ID_KDELETE
#define MCUXCLCSS_CMD_CRC_CMD_ID_KEYGEN MCUXCLELS_CMD_CRC_CMD_ID_KEYGEN
#define MCUXCLCSS_CMD_CRC_CMD_ID_KEYIN MCUXCLELS_CMD_CRC_CMD_ID_KEYIN
#define MCUXCLCSS_CMD_CRC_CMD_ID_KEYOUT MCUXCLELS_CMD_CRC_CMD_ID_KEYOUT
#define MCUXCLCSS_CMD_CRC_CMD_ID_KEYPROV MCUXCLELS_CMD_CRC_CMD_ID_KEYPROV
#define MCUXCLCSS_CMD_CRC_CMD_ID_RND_REQ MCUXCLELS_CMD_CRC_CMD_ID_RND_REQ
#define MCUXCLCSS_CMD_CRC_CMD_ID_TLS MCUXCLELS_CMD_CRC_CMD_ID_TLS
#define MCUXCLCSS_CMD_CRC_DISABLE MCUXCLELS_CMD_CRC_DISABLE
#define MCUXCLCSS_CMD_CRC_ENABLE MCUXCLELS_CMD_CRC_ENABLE
#define MCUXCLCSS_CMD_CRC_INITIAL_VALUE MCUXCLELS_CMD_CRC_INITIAL_VALUE
#define MCUXCLCSS_CMD_CRC_POLYNOMIAL MCUXCLELS_CMD_CRC_POLYNOMIAL
#define MCUXCLCSS_CMD_CRC_REFERENCE_INIT MCUXCLELS_CMD_CRC_REFERENCE_INIT
#define MCUXCLCSS_CMD_CRC_REFERENCE_RESET MCUXCLELS_CMD_CRC_REFERENCE_RESET
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_AEAD_FINALIZE MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_FINALIZE
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_AEAD_INIT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_INIT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_AEAD_PARTIALINIT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_PARTIALINIT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEAAD MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEAAD
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEDATA MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_AEAD_UPDATEDATA
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_CIPHER MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CIPHER
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP800108 MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP800108
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXPAND MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXPAND
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXTRACT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CKDF_SP80056C_EXTRACT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_CMAC MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_CMAC
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGE MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGE
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGEINT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYEXCHANGEINT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCKEYGEN MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCKEYGEN
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCSIGN MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCSIGN
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFY MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFY
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFYINT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_ECCVERFIFYINT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_LOADCONFIG MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_LOADCONFIG
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_TRIM MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_GLITCHDETECTOR_TRIM
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_HASH MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HASH
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_HKDF_RFC5869 MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HKDF_RFC5869
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_HKDF_SP80056C MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HKDF_SP80056C
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_HMAC MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_HMAC
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYDELETE MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYDELETE
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYEXPORT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYEXPORT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORTPUK MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYIMPORTPUK
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYPROVISION MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYPROVISION
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_KEYPROVISIONROM MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_KEYPROVISIONROM
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_PRNG_INIT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_PRNG_INIT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RESPGEN MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RESPGEN
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUEST MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUEST
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUESTRAW MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGREQUESTRAW
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESCTR MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESCTR
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESECB MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTAESECB
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTEXTRACT MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTEXTRACT
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTINSTANTIATE MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DRBGTESTINSTANTIATE
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGEVALUATE MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGEVALUATE
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGLOAD MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_RNG_DTRNG_CONFIGLOAD
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATEMASTERKEYFROMPREMASTERKEY MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATEMASTERKEYFROMPREMASTERKEY
#define MCUXCLCSS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATESESSIONKEYSFROMMASTERKEY MCUXCLELS_CMD_CRC_REFERENCE_UPDATE_TLSGENERATESESSIONKEYSFROMMASTERKEY
#define MCUXCLCSS_CMD_CRC_RESET MCUXCLELS_CMD_CRC_RESET
#define MCUXCLCSS_CMD_CRC_VALUE_DISABLE MCUXCLELS_CMD_CRC_VALUE_DISABLE
#define MCUXCLCSS_CMD_CRC_VALUE_ENABLE MCUXCLELS_CMD_CRC_VALUE_ENABLE
#define MCUXCLCSS_CMD_CRC_VALUE_RESET MCUXCLELS_CMD_CRC_VALUE_RESET
#endif
#define MCUXCLCSS_CSS_INTERRUPT_DISABLE MCUXCLELS_ELS_INTERRUPT_DISABLE
#define MCUXCLCSS_CSS_INTERRUPT_ENABLE MCUXCLELS_ELS_INTERRUPT_ENABLE
#define MCUXCLCSS_CSS_INTERRUPT_KEEP MCUXCLELS_ELS_INTERRUPT_KEEP
#define MCUXCLCSS_CSS_INTERRUPT_SET MCUXCLELS_ELS_INTERRUPT_SET
#define MCUXCLCSS_CSS_RESET_CLEAR MCUXCLELS_ELS_RESET_CLEAR
#define MCUXCLCSS_CSS_RESET_KEEP MCUXCLELS_ELS_RESET_KEEP
#define MCUXCLCSS_DMA_READBACK_PROTECTION_TOKEN MCUXCLELS_DMA_READBACK_PROTECTION_TOKEN
#define MCUXCLCSS_ECC_EXTKEY_EXTERNAL MCUXCLELS_ECC_EXTKEY_EXTERNAL
#define MCUXCLCSS_ECC_EXTKEY_INTERNAL MCUXCLELS_ECC_EXTKEY_INTERNAL
#define MCUXCLCSS_ECC_GEN_PUBLIC_KEY MCUXCLELS_ECC_GEN_PUBLIC_KEY
#define MCUXCLCSS_ECC_HASHED MCUXCLELS_ECC_HASHED
#define MCUXCLCSS_ECC_INCLUDE_RANDOM_DATA MCUXCLELS_ECC_INCLUDE_RANDOM_DATA
#define MCUXCLCSS_ECC_NOT_HASHED MCUXCLELS_ECC_NOT_HASHED
#define MCUXCLCSS_ECC_NO_RANDOM_DATA MCUXCLELS_ECC_NO_RANDOM_DATA
#define MCUXCLCSS_ECC_NO_RTF MCUXCLELS_ECC_NO_RTF
#define MCUXCLCSS_ECC_OUTPUTKEY_DETERMINISTIC MCUXCLELS_ECC_OUTPUTKEY_DETERMINISTIC
#define MCUXCLCSS_ECC_OUTPUTKEY_KEYEXCHANGE MCUXCLELS_ECC_OUTPUTKEY_KEYEXCHANGE
#define MCUXCLCSS_ECC_OUTPUTKEY_RANDOM MCUXCLELS_ECC_OUTPUTKEY_RANDOM
#define MCUXCLCSS_ECC_OUTPUTKEY_SIGN MCUXCLELS_ECC_OUTPUTKEY_SIGN
#define MCUXCLCSS_ECC_PUBLICKEY_SIGN_DISABLE MCUXCLELS_ECC_PUBLICKEY_SIGN_DISABLE
#define MCUXCLCSS_ECC_PUBLICKEY_SIGN_ENABLE MCUXCLELS_ECC_PUBLICKEY_SIGN_ENABLE
#define MCUXCLCSS_ECC_PUBLICKEY_SIZE MCUXCLELS_ECC_PUBLICKEY_SIZE
#define MCUXCLCSS_ECC_REVERSEFETCH_DISABLE MCUXCLELS_ECC_REVERSEFETCH_DISABLE
#define MCUXCLCSS_ECC_REVERSEFETCH_ENABLE MCUXCLELS_ECC_REVERSEFETCH_ENABLE
#define MCUXCLCSS_ECC_RTF MCUXCLELS_ECC_RTF
#define MCUXCLCSS_ECC_SIGNATURE_R_SIZE MCUXCLELS_ECC_SIGNATURE_R_SIZE
#define MCUXCLCSS_ECC_SIGNATURE_SIZE MCUXCLELS_ECC_SIGNATURE_SIZE
#define MCUXCLCSS_ECC_SKIP_PUBLIC_KEY MCUXCLELS_ECC_SKIP_PUBLIC_KEY
#define MCUXCLCSS_ECC_VALUE_HASHED MCUXCLELS_ECC_VALUE_HASHED
#define MCUXCLCSS_ECC_VALUE_NOT_HASHED MCUXCLELS_ECC_VALUE_NOT_HASHED
#define MCUXCLCSS_ECC_VALUE_NO_RTF MCUXCLELS_ECC_VALUE_NO_RTF
#define MCUXCLCSS_ECC_VALUE_RTF MCUXCLELS_ECC_VALUE_RTF
#define MCUXCLCSS_ERROR_FLAGS_CLEAR MCUXCLELS_ERROR_FLAGS_CLEAR
#define MCUXCLCSS_ERROR_FLAGS_KEEP MCUXCLELS_ERROR_FLAGS_KEEP
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define MCUXCLCSS_GLITCHDETECTOR_CFG_SIZE MCUXCLELS_GLITCHDETECTOR_CFG_SIZE
#define MCUXCLCSS_GLITCHDETECTOR_TRIM_SIZE MCUXCLELS_GLITCHDETECTOR_TRIM_SIZE
#define MCUXCLCSS_GLITCH_DETECTOR_INTERRUPT_DISABLE MCUXCLELS_GLITCH_DETECTOR_INTERRUPT_DISABLE
#define MCUXCLCSS_GLITCH_DETECTOR_INTERRUPT_ENABLE MCUXCLELS_GLITCH_DETECTOR_INTERRUPT_ENABLE
#define MCUXCLCSS_GLITCH_DETECTOR_NEG_KEEP MCUXCLELS_GLITCH_DETECTOR_NEG_KEEP
#define MCUXCLCSS_GLITCH_DETECTOR_NEG_SET MCUXCLELS_GLITCH_DETECTOR_NEG_SET
#define MCUXCLCSS_GLITCH_DETECTOR_POS_KEEP MCUXCLELS_GLITCH_DETECTOR_POS_KEEP
#define MCUXCLCSS_GLITCH_DETECTOR_POS_SET MCUXCLELS_GLITCH_DETECTOR_POS_SET
#define MCUXCLCSS_GLITCH_DETECTOR_RESET_CLEAR MCUXCLELS_GLITCH_DETECTOR_RESET_CLEAR
#define MCUXCLCSS_GLITCH_DETECTOR_RESET_KEEP MCUXCLELS_GLITCH_DETECTOR_RESET_KEEP
#endif
#define MCUXCLCSS_HASH_BLOCK_SIZE_SHA_224 MCUXCLELS_HASH_BLOCK_SIZE_SHA_224
#define MCUXCLCSS_HASH_MODE_SHA_224 MCUXCLELS_HASH_MODE_SHA_224
#define MCUXCLCSS_HASH_OUTPUT_SIZE_SHA_224 MCUXCLELS_HASH_OUTPUT_SIZE_SHA_224
#define MCUXCLCSS_HASH_STATE_SIZE_SHA_224 MCUXCLELS_HASH_STATE_SIZE_SHA_224
#define MCUXCLCSS_HASH_VALUE_MODE_SHA_224 MCUXCLELS_HASH_VALUE_MODE_SHA_224
#define MCUXCLCSS_HASH_BLOCK_SIZE_SHA_256 MCUXCLELS_HASH_BLOCK_SIZE_SHA_256
#define MCUXCLCSS_HASH_MODE_SHA_256 MCUXCLELS_HASH_MODE_SHA_256
#define MCUXCLCSS_HASH_OUTPUT_SIZE_SHA_256 MCUXCLELS_HASH_OUTPUT_SIZE_SHA_256
#define MCUXCLCSS_HASH_STATE_SIZE_SHA_256 MCUXCLELS_HASH_STATE_SIZE_SHA_256
#define MCUXCLCSS_HASH_VALUE_MODE_SHA_256 MCUXCLELS_HASH_VALUE_MODE_SHA_256
#define MCUXCLCSS_HASH_BLOCK_SIZE_SHA_384 MCUXCLELS_HASH_BLOCK_SIZE_SHA_384
#define MCUXCLCSS_HASH_MODE_SHA_384 MCUXCLELS_HASH_MODE_SHA_384
#define MCUXCLCSS_HASH_OUTPUT_SIZE_SHA_384 MCUXCLELS_HASH_OUTPUT_SIZE_SHA_384
#define MCUXCLCSS_HASH_STATE_SIZE_SHA_384 MCUXCLELS_HASH_STATE_SIZE_SHA_384
#define MCUXCLCSS_HASH_VALUE_MODE_SHA_384 MCUXCLELS_HASH_VALUE_MODE_SHA_384
#define MCUXCLCSS_HASH_BLOCK_SIZE_SHA_512 MCUXCLELS_HASH_BLOCK_SIZE_SHA_512
#define MCUXCLCSS_HASH_STATE_SIZE_SHA_512 MCUXCLELS_HASH_STATE_SIZE_SHA_512
#define MCUXCLCSS_HASH_OUTPUT_SIZE_SHA_512 MCUXCLELS_HASH_OUTPUT_SIZE_SHA_512
#define MCUXCLCSS_HASH_MODE_SHA_512 MCUXCLELS_HASH_MODE_SHA_512
#define MCUXCLCSS_HASH_VALUE_MODE_SHA_512 MCUXCLELS_HASH_VALUE_MODE_SHA_512
#define MCUXCLCSS_HASH_INIT_DISABLE MCUXCLELS_HASH_INIT_DISABLE
#define MCUXCLCSS_HASH_INIT_ENABLE MCUXCLELS_HASH_INIT_ENABLE
#define MCUXCLCSS_HASH_LOAD_DISABLE MCUXCLELS_HASH_LOAD_DISABLE
#define MCUXCLCSS_HASH_LOAD_ENABLE MCUXCLELS_HASH_LOAD_ENABLE
#define MCUXCLCSS_HASH_OUTPUT_DISABLE MCUXCLELS_HASH_OUTPUT_DISABLE
#define MCUXCLCSS_HASH_OUTPUT_ENABLE MCUXCLELS_HASH_OUTPUT_ENABLE
#define MCUXCLCSS_HASH_RTF_OUTPUT_DISABLE MCUXCLELS_HASH_RTF_OUTPUT_DISABLE
#define MCUXCLCSS_HASH_RTF_OUTPUT_ENABLE MCUXCLELS_HASH_RTF_OUTPUT_ENABLE
#define MCUXCLCSS_HASH_RTF_OUTPUT_SIZE MCUXCLELS_HASH_RTF_OUTPUT_SIZE
#define MCUXCLCSS_HASH_RTF_UPDATE_DISABLE MCUXCLELS_HASH_RTF_UPDATE_DISABLE
#define MCUXCLCSS_HASH_RTF_UPDATE_ENABLE MCUXCLELS_HASH_RTF_UPDATE_ENABLE
#define MCUXCLCSS_HKDF_RTF_DERIV MCUXCLELS_HKDF_RTF_DERIV
#define MCUXCLCSS_HKDF_SYSTEM_MEMORY_DERIV MCUXCLELS_HKDF_SYSTEM_MEMORY_DERIV
#define MCUXCLCSS_HKDF_ALGO_RFC5869 MCUXCLELS_HKDF_ALGO_RFC5869
#define MCUXCLCSS_HKDF_ALGO_SP80056C MCUXCLELS_HKDF_ALGO_SP80056C
#define MCUXCLCSS_HKDF_RFC5869_DERIVATIONDATA_SIZE MCUXCLELS_HKDF_RFC5869_DERIVATIONDATA_SIZE
#define MCUXCLCSS_HKDF_SP80056C_TARGETKEY_SIZE MCUXCLELS_HKDF_SP80056C_TARGETKEY_SIZE
#define MCUXCLCSS_HKDF_VALUE_MEMORY_DERIV MCUXCLELS_HKDF_VALUE_MEMORY_DERIV
#define MCUXCLCSS_HKDF_VALUE_RTF_DERIV MCUXCLELS_HKDF_VALUE_RTF_DERIV
#define MCUXCLCSS_HMAC_EXTERNAL_KEY_DISABLE MCUXCLELS_HMAC_EXTERNAL_KEY_DISABLE
#define MCUXCLCSS_HMAC_EXTERNAL_KEY_ENABLE MCUXCLELS_HMAC_EXTERNAL_KEY_ENABLE
#define MCUXCLCSS_HMAC_OUTPUT_SIZE MCUXCLELS_HMAC_OUTPUT_SIZE
#define MCUXCLCSS_HMAC_PADDED_KEY_SIZE MCUXCLELS_HMAC_PADDED_KEY_SIZE
#define MCUXCLCSS_HW_VERSION MCUXCLELS_HW_VERSION
#define MCUXCLCSS_KEYGEN_VALUE_DETERMINISTIC MCUXCLELS_KEYGEN_VALUE_DETERMINISTIC
#define MCUXCLCSS_KEYGEN_VALUE_GEN_PUB_KEY MCUXCLELS_KEYGEN_VALUE_GEN_PUB_KEY
#define MCUXCLCSS_KEYGEN_VALUE_NO_PUB_KEY MCUXCLELS_KEYGEN_VALUE_NO_PUB_KEY
#define MCUXCLCSS_KEYGEN_VALUE_NO_RANDOM_DATA MCUXCLELS_KEYGEN_VALUE_NO_RANDOM_DATA
#define MCUXCLCSS_KEYGEN_VALUE_RANDOM MCUXCLELS_KEYGEN_VALUE_RANDOM
#define MCUXCLCSS_KEYGEN_VALUE_SIGN_PUBLICKEY MCUXCLELS_KEYGEN_VALUE_SIGN_PUBLICKEY
#define MCUXCLCSS_KEYGEN_VALUE_TYPE_KEYEXCHANGE MCUXCLELS_KEYGEN_VALUE_TYPE_KEYEXCHANGE
#define MCUXCLCSS_KEYGEN_VALUE_TYPE_SIGN MCUXCLELS_KEYGEN_VALUE_TYPE_SIGN
#define MCUXCLCSS_KEYGEN_VALUE_USE_RANDOM_DATA MCUXCLELS_KEYGEN_VALUE_USE_RANDOM_DATA
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLCSS_KEYIMPORT_KFMT_PBK MCUXCLELS_KEYIMPORT_KFMT_PBK
#endif
#define MCUXCLCSS_KEYIMPORT_KFMT_PUF MCUXCLELS_KEYIMPORT_KFMT_PUF
#define MCUXCLCSS_KEYIMPORT_KFMT_RFC3394 MCUXCLELS_KEYIMPORT_KFMT_RFC3394
#define MCUXCLCSS_KEYIMPORT_KFMT_UDF MCUXCLELS_KEYIMPORT_KFMT_UDF
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLCSS_KEYIMPORT_REVERSEFETCH_DISABLE MCUXCLELS_KEYIMPORT_REVERSEFETCH_DISABLE
#define MCUXCLCSS_KEYIMPORT_REVERSEFETCH_ENABLE MCUXCLELS_KEYIMPORT_REVERSEFETCH_ENABLE
#define MCUXCLCSS_KEYIMPORT_VALUE_KFMT_PBK MCUXCLELS_KEYIMPORT_VALUE_KFMT_PBK
#endif
#define MCUXCLCSS_KEYIMPORT_VALUE_KFMT_PUF MCUXCLELS_KEYIMPORT_VALUE_KFMT_PUF
#define MCUXCLCSS_KEYIMPORT_VALUE_KFMT_RFC3394 MCUXCLELS_KEYIMPORT_VALUE_KFMT_RFC3394
#define MCUXCLCSS_KEYIMPORT_VALUE_KFMT_UDF MCUXCLELS_KEYIMPORT_VALUE_KFMT_UDF
#define MCUXCLCSS_KEYPROPERTY_ACTIVE_FALSE MCUXCLELS_KEYPROPERTY_ACTIVE_FALSE
#define MCUXCLCSS_KEYPROPERTY_ACTIVE_TRUE MCUXCLELS_KEYPROPERTY_ACTIVE_TRUE
#define MCUXCLCSS_KEYPROPERTY_AES_FALSE MCUXCLELS_KEYPROPERTY_AES_FALSE
#define MCUXCLCSS_KEYPROPERTY_AES_TRUE MCUXCLELS_KEYPROPERTY_AES_TRUE
#define MCUXCLCSS_KEYPROPERTY_BASE_SLOT MCUXCLELS_KEYPROPERTY_BASE_SLOT
#define MCUXCLCSS_KEYPROPERTY_CKDF_FALSE MCUXCLELS_KEYPROPERTY_CKDF_FALSE
#define MCUXCLCSS_KEYPROPERTY_CKDF_TRUE MCUXCLELS_KEYPROPERTY_CKDF_TRUE
#define MCUXCLCSS_KEYPROPERTY_CMAC_FALSE MCUXCLELS_KEYPROPERTY_CMAC_FALSE
#define MCUXCLCSS_KEYPROPERTY_CMAC_TRUE MCUXCLELS_KEYPROPERTY_CMAC_TRUE
#define MCUXCLCSS_KEYPROPERTY_DEVICE_UNIQUE_FALSE MCUXCLELS_KEYPROPERTY_DEVICE_UNIQUE_FALSE
#define MCUXCLCSS_KEYPROPERTY_DEVICE_UNIQUE_TRUE MCUXCLELS_KEYPROPERTY_DEVICE_UNIQUE_TRUE
#define MCUXCLCSS_KEYPROPERTY_ECC_DH_PRIVATE_FALSE MCUXCLELS_KEYPROPERTY_ECC_DH_PRIVATE_FALSE
#define MCUXCLCSS_KEYPROPERTY_ECC_DH_PRIVATE_TRUE MCUXCLELS_KEYPROPERTY_ECC_DH_PRIVATE_TRUE
#define MCUXCLCSS_KEYPROPERTY_ECC_FALSE MCUXCLELS_KEYPROPERTY_ECC_FALSE
#define MCUXCLCSS_KEYPROPERTY_ECC_TRUE MCUXCLELS_KEYPROPERTY_ECC_TRUE
#define MCUXCLCSS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_FALSE MCUXCLELS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_FALSE
#define MCUXCLCSS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_TRUE MCUXCLELS_KEYPROPERTY_GENERAL_PURPOSE_SLOT_TRUE
#define MCUXCLCSS_KEYPROPERTY_HKDF_FALSE MCUXCLELS_KEYPROPERTY_HKDF_FALSE
#define MCUXCLCSS_KEYPROPERTY_HKDF_TRUE MCUXCLELS_KEYPROPERTY_HKDF_TRUE
#define MCUXCLCSS_KEYPROPERTY_HMAC_FALSE MCUXCLELS_KEYPROPERTY_HMAC_FALSE
#define MCUXCLCSS_KEYPROPERTY_HMAC_TRUE MCUXCLELS_KEYPROPERTY_HMAC_TRUE
#define MCUXCLCSS_KEYPROPERTY_HW_OUT_FALSE MCUXCLELS_KEYPROPERTY_HW_OUT_FALSE
#define MCUXCLCSS_KEYPROPERTY_HW_OUT_SLOT_FALSE MCUXCLELS_KEYPROPERTY_HW_OUT_SLOT_FALSE
#define MCUXCLCSS_KEYPROPERTY_HW_OUT_SLOT_TRUE MCUXCLELS_KEYPROPERTY_HW_OUT_SLOT_TRUE
#define MCUXCLCSS_KEYPROPERTY_HW_OUT_TRUE MCUXCLELS_KEYPROPERTY_HW_OUT_TRUE
#define MCUXCLCSS_KEYPROPERTY_INPUT_FOR_ECC_FALSE MCUXCLELS_KEYPROPERTY_INPUT_FOR_ECC_FALSE
#define MCUXCLCSS_KEYPROPERTY_INPUT_FOR_ECC_TRUE MCUXCLELS_KEYPROPERTY_INPUT_FOR_ECC_TRUE
#define MCUXCLCSS_KEYPROPERTY_KEY_SIZE_128 MCUXCLELS_KEYPROPERTY_KEY_SIZE_128
#define MCUXCLCSS_KEYPROPERTY_KEY_SIZE_256 MCUXCLELS_KEYPROPERTY_KEY_SIZE_256
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLCSS_KEYPROPERTY_KEY_SIZE_512 MCUXCLELS_KEYPROPERTY_KEY_SIZE_512
#define MCUXCLCSS_KEYPROPERTY_VALUE_KEY_SIZE_512 MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_512
#define MCUXCLCSS_KEYPROPERTY_PUK_FALSE MCUXCLELS_KEYPROPERTY_PUK_FALSE
#define MCUXCLCSS_KEYPROPERTY_PUK_TRUE MCUXCLELS_KEYPROPERTY_PUK_TRUE
#define MCUXCLCSS_KEYPROPERTY_TECDH_FALSE MCUXCLELS_KEYPROPERTY_TECDH_FALSE
#define MCUXCLCSS_KEYPROPERTY_TECDH_TRUE MCUXCLELS_KEYPROPERTY_TECDH_TRUE
#endif
#define MCUXCLCSS_KEYPROPERTY_KSK_FALSE MCUXCLELS_KEYPROPERTY_KSK_FALSE
#define MCUXCLCSS_KEYPROPERTY_KSK_TRUE MCUXCLELS_KEYPROPERTY_KSK_TRUE
#define MCUXCLCSS_KEYPROPERTY_KUOK_FALSE MCUXCLELS_KEYPROPERTY_KUOK_FALSE
#define MCUXCLCSS_KEYPROPERTY_KUOK_TRUE MCUXCLELS_KEYPROPERTY_KUOK_TRUE
#define MCUXCLCSS_KEYPROPERTY_KWK_FALSE MCUXCLELS_KEYPROPERTY_KWK_FALSE
#define MCUXCLCSS_KEYPROPERTY_KWK_TRUE MCUXCLELS_KEYPROPERTY_KWK_TRUE
#define MCUXCLCSS_KEYPROPERTY_PRIVILEGED_FALSE MCUXCLELS_KEYPROPERTY_PRIVILEGED_FALSE
#define MCUXCLCSS_KEYPROPERTY_PRIVILEGED_TRUE MCUXCLELS_KEYPROPERTY_PRIVILEGED_TRUE
#define MCUXCLCSS_KEYPROPERTY_RETENTION_SLOT_FALSE MCUXCLELS_KEYPROPERTY_RETENTION_SLOT_FALSE
#define MCUXCLCSS_KEYPROPERTY_RETENTION_SLOT_TRUE MCUXCLELS_KEYPROPERTY_RETENTION_SLOT_TRUE
#define MCUXCLCSS_KEYPROPERTY_RTF_FALSE MCUXCLELS_KEYPROPERTY_RTF_FALSE
#define MCUXCLCSS_KEYPROPERTY_RTF_TRUE MCUXCLELS_KEYPROPERTY_RTF_TRUE
#define MCUXCLCSS_KEYPROPERTY_SECOND_SLOT MCUXCLELS_KEYPROPERTY_SECOND_SLOT
#define MCUXCLCSS_KEYPROPERTY_SECURE_FALSE MCUXCLELS_KEYPROPERTY_SECURE_FALSE
#define MCUXCLCSS_KEYPROPERTY_SECURE_TRUE MCUXCLELS_KEYPROPERTY_SECURE_TRUE
#define MCUXCLCSS_KEYPROPERTY_TLS_MASTER_SECRET_FALSE MCUXCLELS_KEYPROPERTY_TLS_MASTER_SECRET_FALSE
#define MCUXCLCSS_KEYPROPERTY_TLS_MASTER_SECRET_TRUE MCUXCLELS_KEYPROPERTY_TLS_MASTER_SECRET_TRUE
#define MCUXCLCSS_KEYPROPERTY_TLS_PREMASTER_SECRET_FALSE MCUXCLELS_KEYPROPERTY_TLS_PREMASTER_SECRET_FALSE
#define MCUXCLCSS_KEYPROPERTY_TLS_PREMASTER_SECRET_TRUE MCUXCLELS_KEYPROPERTY_TLS_PREMASTER_SECRET_TRUE
#define MCUXCLCSS_KEYPROPERTY_VALUE_ACTIVE MCUXCLELS_KEYPROPERTY_VALUE_ACTIVE
#define MCUXCLCSS_KEYPROPERTY_VALUE_AES MCUXCLELS_KEYPROPERTY_VALUE_AES
#define MCUXCLCSS_KEYPROPERTY_VALUE_BASE_SLOT MCUXCLELS_KEYPROPERTY_VALUE_BASE_SLOT
#define MCUXCLCSS_KEYPROPERTY_VALUE_CKDF MCUXCLELS_KEYPROPERTY_VALUE_CKDF
#define MCUXCLCSS_KEYPROPERTY_VALUE_CMAC MCUXCLELS_KEYPROPERTY_VALUE_CMAC
#define MCUXCLCSS_KEYPROPERTY_VALUE_DUK MCUXCLELS_KEYPROPERTY_VALUE_DUK
#define MCUXCLCSS_KEYPROPERTY_VALUE_ECDH MCUXCLELS_KEYPROPERTY_VALUE_ECDH
#define MCUXCLCSS_KEYPROPERTY_VALUE_ECSGN MCUXCLELS_KEYPROPERTY_VALUE_ECSGN
#define MCUXCLCSS_KEYPROPERTY_VALUE_GENERAL_PURPOSE_SLOT MCUXCLELS_KEYPROPERTY_VALUE_GENERAL_PURPOSE_SLOT
#define MCUXCLCSS_KEYPROPERTY_VALUE_HKDF MCUXCLELS_KEYPROPERTY_VALUE_HKDF
#define MCUXCLCSS_KEYPROPERTY_VALUE_HMAC MCUXCLELS_KEYPROPERTY_VALUE_HMAC
#define MCUXCLCSS_KEYPROPERTY_VALUE_HW_OUT MCUXCLELS_KEYPROPERTY_VALUE_HW_OUT
#define MCUXCLCSS_KEYPROPERTY_VALUE_HW_OUT_SLOT MCUXCLELS_KEYPROPERTY_VALUE_HW_OUT_SLOT
#define MCUXCLCSS_KEYPROPERTY_VALUE_KEY_SIZE_128 MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_128
#define MCUXCLCSS_KEYPROPERTY_VALUE_KEY_SIZE_256 MCUXCLELS_KEYPROPERTY_VALUE_KEY_SIZE_256
#define MCUXCLCSS_KEYPROPERTY_VALUE_KGSRC MCUXCLELS_KEYPROPERTY_VALUE_KGSRC
#define MCUXCLCSS_KEYPROPERTY_VALUE_KSK MCUXCLELS_KEYPROPERTY_VALUE_KSK
#define MCUXCLCSS_KEYPROPERTY_VALUE_KUOK MCUXCLELS_KEYPROPERTY_VALUE_KUOK
#define MCUXCLCSS_KEYPROPERTY_VALUE_KWK MCUXCLELS_KEYPROPERTY_VALUE_KWK
#define MCUXCLCSS_KEYPROPERTY_VALUE_NOTPRIVILEGED MCUXCLELS_KEYPROPERTY_VALUE_NOTPRIVILEGED
#define MCUXCLCSS_KEYPROPERTY_VALUE_NOTSECURE MCUXCLELS_KEYPROPERTY_VALUE_NOTSECURE
#define MCUXCLCSS_KEYPROPERTY_VALUE_PRIVILEGED MCUXCLELS_KEYPROPERTY_VALUE_PRIVILEGED
#define MCUXCLCSS_KEYPROPERTY_VALUE_PUK MCUXCLELS_KEYPROPERTY_VALUE_PUK
#define MCUXCLCSS_KEYPROPERTY_VALUE_RETENTION_SLOT MCUXCLELS_KEYPROPERTY_VALUE_RETENTION_SLOT
#define MCUXCLCSS_KEYPROPERTY_VALUE_RTF MCUXCLELS_KEYPROPERTY_VALUE_RTF
#define MCUXCLCSS_KEYPROPERTY_VALUE_SECURE MCUXCLELS_KEYPROPERTY_VALUE_SECURE
#define MCUXCLCSS_KEYPROPERTY_VALUE_TECDH MCUXCLELS_KEYPROPERTY_VALUE_TECDH
#define MCUXCLCSS_KEYPROPERTY_VALUE_TLS_MASTER_SECRET MCUXCLELS_KEYPROPERTY_VALUE_TLS_MASTER_SECRET
#define MCUXCLCSS_KEYPROPERTY_VALUE_TLS_PREMASTER_SECRET MCUXCLELS_KEYPROPERTY_VALUE_TLS_PREMASTER_SECRET
#define MCUXCLCSS_KEYPROPERTY_VALUE_WRPOK MCUXCLELS_KEYPROPERTY_VALUE_WRPOK
#define MCUXCLCSS_KEYPROPERTY_WRAP_FALSE MCUXCLELS_KEYPROPERTY_WRAP_FALSE
#define MCUXCLCSS_KEYPROPERTY_WRAP_TRUE MCUXCLELS_KEYPROPERTY_WRAP_TRUE
#define MCUXCLCSS_KEY_SLOTS MCUXCLELS_KEY_SLOTS
#define MCUXCLCSS_MASTER_UNLOCK_ANY MCUXCLELS_MASTER_UNLOCK_ANY
#define MCUXCLCSS_RESET_CANCEL MCUXCLELS_RESET_CANCEL
#define MCUXCLCSS_RESET_DO_NOT_CANCEL MCUXCLELS_RESET_DO_NOT_CANCEL
#define MCUXCLCSS_RESP_GEN_AVAILABLE_SLOT_0 MCUXCLELS_RESP_GEN_AVAILABLE_SLOT_0
#define MCUXCLCSS_RESP_GEN_AVAILABLE_SLOT_1 MCUXCLELS_RESP_GEN_AVAILABLE_SLOT_1
#define MCUXCLCSS_RESP_GEN_AVAILABLE_SLOT_2 MCUXCLELS_RESP_GEN_AVAILABLE_SLOT_2
#define MCUXCLCSS_RESP_GEN_SLOTS MCUXCLELS_RESP_GEN_SLOTS
#define MCUXCLCSS_RFC3394_CONTAINER_SIZE_128 MCUXCLELS_RFC3394_CONTAINER_SIZE_128
#define MCUXCLCSS_RFC3394_CONTAINER_SIZE_256 MCUXCLELS_RFC3394_CONTAINER_SIZE_256
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define MCUXCLCSS_RFC3394_CONTAINER_SIZE_P256 MCUXCLELS_RFC3394_CONTAINER_SIZE_P256
#endif
#define MCUXCLCSS_RFC3394_OVERHEAD MCUXCLELS_RFC3394_OVERHEAD
#define MCUXCLCSS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MAX_SIZE
#define MCUXCLCSS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE MCUXCLELS_RNG_DRBG_TEST_EXTRACT_OUTPUT_MIN_SIZE
#define MCUXCLCSS_RNG_DRBG_TEST_MODE_AES_CTR MCUXCLELS_RNG_DRBG_TEST_MODE_AES_CTR
#define MCUXCLCSS_RNG_DRBG_TEST_MODE_AES_ECB MCUXCLELS_RNG_DRBG_TEST_MODE_AES_ECB
#define MCUXCLCSS_RNG_DRBG_TEST_MODE_EXTRACT MCUXCLELS_RNG_DRBG_TEST_MODE_EXTRACT
#define MCUXCLCSS_RNG_DRBG_TEST_MODE_INSTANTIATE MCUXCLELS_RNG_DRBG_TEST_MODE_INSTANTIATE
#define MCUXCLCSS_RNG_DTRNG_CONFIG_SIZE MCUXCLELS_RNG_DTRNG_CONFIG_SIZE
#define MCUXCLCSS_RNG_DTRNG_EVAL_CONFIG_SIZE MCUXCLELS_RNG_DTRNG_EVAL_CONFIG_SIZE
#define MCUXCLCSS_RNG_DTRNG_EVAL_RESULT_SIZE MCUXCLELS_RNG_DTRNG_EVAL_RESULT_SIZE
#define MCUXCLCSS_RNG_RND_REQ_PRND_INIT MCUXCLELS_RNG_RND_REQ_PRND_INIT
#ifdef MCUXCL_FEATURE_ELS_RND_RAW
#define MCUXCLCSS_RNG_RAW_ENTROPY_SIZE MCUXCLELS_RNG_RAW_ENTROPY_SIZE
#define MCUXCLCSS_RNG_RND_REQ_RND_RAW MCUXCLELS_RNG_RND_REQ_RND_RAW
#endif
#define MCUXCLCSS_STATUS_DRBGENTLVL_HIGH MCUXCLELS_STATUS_DRBGENTLVL_HIGH
#define MCUXCLCSS_STATUS_DRBGENTLVL_LOW MCUXCLELS_STATUS_DRBGENTLVL_LOW
#define MCUXCLCSS_STATUS_DRBGENTLVL_NONE MCUXCLELS_STATUS_DRBGENTLVL_NONE
#define MCUXCLCSS_STATUS_ECDSAVFY_ERROR MCUXCLELS_STATUS_ECDSAVFY_ERROR
#define MCUXCLCSS_STATUS_ECDSAVFY_FAIL MCUXCLELS_STATUS_ECDSAVFY_FAIL
#define MCUXCLCSS_STATUS_ECDSAVFY_NORUN MCUXCLELS_STATUS_ECDSAVFY_NORUN
#define MCUXCLCSS_STATUS_ECDSAVFY_OK MCUXCLELS_STATUS_ECDSAVFY_OK
#define MCUXCLCSS_STATUS_HW_ALGORITHM MCUXCLELS_STATUS_HW_ALGORITHM
#define MCUXCLCSS_STATUS_HW_BUS MCUXCLELS_STATUS_HW_BUS
#define MCUXCLCSS_STATUS_HW_DTRNG MCUXCLELS_STATUS_HW_DTRNG
#define MCUXCLCSS_STATUS_HW_FAULT MCUXCLELS_STATUS_HW_FAULT
#define MCUXCLCSS_STATUS_HW_INTEGRITY MCUXCLELS_STATUS_HW_INTEGRITY
#define MCUXCLCSS_STATUS_HW_OPERATIONAL MCUXCLELS_STATUS_HW_OPERATIONAL
#define MCUXCLCSS_STATUS_HW_PRNG MCUXCLELS_STATUS_HW_PRNG
#define MCUXCLCSS_STATUS_IS_HW_ERROR(x) MCUXCLELS_STATUS_IS_HW_ERROR(x)
#define MCUXCLCSS_STATUS_IS_SW_ERROR(x) MCUXCLELS_STATUS_IS_SW_ERROR(x)
#define MCUXCLCSS_STATUS_OK MCUXCLELS_STATUS_OK
#define MCUXCLCSS_STATUS_OK_WAIT MCUXCLELS_STATUS_OK_WAIT
#define MCUXCLCSS_STATUS_PPROT_PRIVILEGED_NONSECURE MCUXCLELS_STATUS_PPROT_PRIVILEGED_NONSECURE
#define MCUXCLCSS_STATUS_PPROT_PRIVILEGED_SECURE MCUXCLELS_STATUS_PPROT_PRIVILEGED_SECURE
#define MCUXCLCSS_STATUS_PPROT_UNPRIVILEGED_NONSECURE MCUXCLELS_STATUS_PPROT_UNPRIVILEGED_NONSECURE
#define MCUXCLCSS_STATUS_PPROT_UNPRIVILEGED_SECURE MCUXCLELS_STATUS_PPROT_UNPRIVILEGED_SECURE
#define MCUXCLCSS_STATUS_SW_CANNOT_INTERRUPT MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT
#define MCUXCLCSS_STATUS_SW_COMPARISON_FAILED MCUXCLELS_STATUS_SW_COMPARISON_FAILED
#define MCUXCLCSS_STATUS_SW_COUNTER_EXPIRED MCUXCLELS_STATUS_SW_COUNTER_EXPIRED
#define MCUXCLCSS_STATUS_SW_FAULT MCUXCLELS_STATUS_SW_FAULT
#define MCUXCLCSS_STATUS_SW_INVALID_PARAM MCUXCLELS_STATUS_SW_INVALID_PARAM
#define MCUXCLCSS_STATUS_SW_INVALID_STATE MCUXCLELS_STATUS_SW_INVALID_STATE
#ifdef MCUXCL_FEATURE_ELS_LOCKING
#define MCUXCLCSS_STATUS_SW_LOCKING_FAILED MCUXCLELS_STATUS_SW_LOCKING_FAILED
#define MCUXCLCSS_STATUS_SW_STATUS_LOCKED MCUXCLELS_STATUS_SW_STATUS_LOCKED
#endif
#define MCUXCLCSS_TLS_DERIVATIONDATA_SIZE MCUXCLELS_TLS_DERIVATIONDATA_SIZE
#define MCUXCLCSS_TLS_FINALIZE MCUXCLELS_TLS_FINALIZE
#define MCUXCLCSS_TLS_INIT MCUXCLELS_TLS_INIT
#define MCUXCLCSS_TLS_RANDOM_SIZE MCUXCLELS_TLS_RANDOM_SIZE
/* Public types */
/**
* mcuxClCss_((?:AeadOption_t|CipherOption_t|CkdfOption_t|CmacOption_t|CommandCrcConfig_t|EccByte_t|EccKeyExchOption_t|EccKeyGenOption_t|EccSignOption_t|EccVerifyOption_t|ErrorHandling_t|HashOption_t|HkdfOption_t|HmacOption_t|HwConfig_t|HwState_t|HwVersion_t|InterruptOptionEn_t|InterruptOptionRst_t|InterruptOptionSet_t|KeyImportOption_t|KeyIndex_t|KeyProp_t|KeyProvisionOption_t|ResetOption_t|Status_Protected_t|Status_t|TlsOption_t|TransferToRegisterFunction_t))(?!\w)
* -->
* mcuxClEls_\1
*/
#define mcuxClCss_AeadOption_t mcuxClEls_AeadOption_t
#define mcuxClCss_CipherOption_t mcuxClEls_CipherOption_t
#define mcuxClCss_CkdfOption_t mcuxClEls_CkdfOption_t
#define mcuxClCss_CmacOption_t mcuxClEls_CmacOption_t
#ifdef MCUXCL_FEATURE_ELS_CMD_CRC
#define mcuxClCss_CommandCrcConfig_t mcuxClEls_CommandCrcConfig_t
#endif
#define mcuxClCss_EccByte_t mcuxClEls_EccByte_t
#define mcuxClCss_EccKeyExchOption_t mcuxClEls_EccKeyExchOption_t
#define mcuxClCss_EccKeyGenOption_t mcuxClEls_EccKeyGenOption_t
#define mcuxClCss_EccSignOption_t mcuxClEls_EccSignOption_t
#define mcuxClCss_EccVerifyOption_t mcuxClEls_EccVerifyOption_t
#define mcuxClCss_ErrorHandling_t mcuxClEls_ErrorHandling_t
#define mcuxClCss_HashOption_t mcuxClEls_HashOption_t
#define mcuxClCss_HkdfOption_t mcuxClEls_HkdfOption_t
#define mcuxClCss_HmacOption_t mcuxClEls_HmacOption_t
#define mcuxClCss_HwConfig_t mcuxClEls_HwConfig_t
#define mcuxClCss_HwState_t mcuxClEls_HwState_t
#define mcuxClCss_HwVersion_t mcuxClEls_HwVersion_t
#define mcuxClCss_InterruptOptionEn_t mcuxClEls_InterruptOptionEn_t
#define mcuxClCss_InterruptOptionRst_t mcuxClEls_InterruptOptionRst_t
#define mcuxClCss_InterruptOptionSet_t mcuxClEls_InterruptOptionSet_t
#define mcuxClCss_KeyImportOption_t mcuxClEls_KeyImportOption_t
#define mcuxClCss_KeyIndex_t mcuxClEls_KeyIndex_t
#define mcuxClCss_KeyProp_t mcuxClEls_KeyProp_t
#define mcuxClCss_ResetOption_t mcuxClEls_ResetOption_t
#define mcuxClCss_Status_Protected_t mcuxClEls_Status_Protected_t
#define mcuxClCss_Status_t mcuxClEls_Status_t
#define mcuxClCss_TlsOption_t mcuxClEls_TlsOption_t
#define mcuxClCss_TransferToRegisterFunction_t mcuxClEls_TransferToRegisterFunction_t
/* Public functions */
/**
* mcuxClCss_((?:Aead_Finalize_Async|Aead_Init_Async|Aead_PartialInit_Async|Aead_UpdateAad_Async|Aead_UpdateData_Async|Cipher_Async|Ckdf_Sp800108_Async|Ckdf_Sp80056c_Expand_Async|Ckdf_Sp80056c_Extract_Async|Cmac_Async|CompareDmaFinalOutputAddress|ConfigureCommandCRC|Disable|EccKeyExchangeInt_Async|EccKeyExchange_Async|EccKeyGen_Async|EccSign_Async|EccVerifyInt_Async|EccVerify_Async|Enable_Async|GetCommandCRC|GetErrorCode|GetErrorLevel|GetHwConfig|GetHwState|GetHwVersion|GetIntEnableFlags|GetKeyProperties|GetLastDmaAddress|GetLock|GetRandomStartDelay|GlitchDetector_GetEventCounter|GlitchDetector_LoadConfig_Async|GlitchDetector_ResetEventCounter|GlitchDetector_Trim_Async|Hash_Async|Hash_ShaDirect|Hkdf_Rfc5869_Async|Hkdf_Sp80056c_Async|Hmac_Async|IsLocked|KeyDelete_Async|KeyExport_Async|KeyImportPuk_Async|KeyImport_Async|KeyProvisionRom_Async|KeyProvision_Async|LimitedWaitForOperation|Prng_GetRandom|Prng_GetRandomWord|Prng_Init_Async|ReleaseLock|ResetErrorFlags|ResetIntFlags|Reset_Async|RespGen_Async|Rng_DrbgRequestRaw_Async|Rng_DrbgRequest_Async|Rng_DrbgTestAesCtr_Async|Rng_DrbgTestAesEcb_Async|Rng_DrbgTestExtract_Async|Rng_DrbgTestInstantiate_Async|Rng_Dtrng_ConfigEvaluate_Async|Rng_Dtrng_ConfigLoadPrv_Async|Rng_Dtrng_ConfigLoad_Async|SetIntEnableFlags|SetIntFlags|SetMasterUnlock|SetRandomStartDelay|ShaDirect_Disable|ShaDirect_Enable|TlsGenerateMasterKeyFromPreMasterKey_Async|TlsGenerateSessionKeysFromMasterKey_Async|UpdateRefCRC|VerifyVsRefCRC|WaitForOperation))(?!\w)
* -->
* mcuxClEls_\1
*/
#define mcuxClCss_Aead_Finalize_Async mcuxClEls_Aead_Finalize_Async
#define mcuxClCss_Aead_Init_Async mcuxClEls_Aead_Init_Async
#define mcuxClCss_Aead_PartialInit_Async mcuxClEls_Aead_PartialInit_Async
#define mcuxClCss_Aead_UpdateAad_Async mcuxClEls_Aead_UpdateAad_Async
#define mcuxClCss_Aead_UpdateData_Async mcuxClEls_Aead_UpdateData_Async
#define mcuxClCss_Cipher_Async mcuxClEls_Cipher_Async
#define mcuxClCss_Ckdf_Sp800108_Async mcuxClEls_Ckdf_Sp800108_Async
#define mcuxClCss_Ckdf_Sp80056c_Expand_Async mcuxClEls_Ckdf_Sp80056c_Expand_Async
#define mcuxClCss_Ckdf_Sp80056c_Extract_Async mcuxClEls_Ckdf_Sp80056c_Extract_Async
#define mcuxClCss_Cmac_Async mcuxClEls_Cmac_Async
#define mcuxClCss_CompareDmaFinalOutputAddress mcuxClEls_CompareDmaFinalOutputAddress
#define mcuxClCss_Disable mcuxClEls_Disable
#define mcuxClCss_EccKeyExchangeInt_Async mcuxClEls_EccKeyExchangeInt_Async
#define mcuxClCss_EccKeyExchange_Async mcuxClEls_EccKeyExchange_Async
#define mcuxClCss_EccKeyGen_Async mcuxClEls_EccKeyGen_Async
#define mcuxClCss_EccSign_Async mcuxClEls_EccSign_Async
#define mcuxClCss_EccVerifyInt_Async mcuxClEls_EccVerifyInt_Async
#define mcuxClCss_EccVerify_Async mcuxClEls_EccVerify_Async
#define mcuxClCss_Enable_Async mcuxClEls_Enable_Async
#define mcuxClCss_GetErrorCode mcuxClEls_GetErrorCode
#define mcuxClCss_GetErrorLevel mcuxClEls_GetErrorLevel
#define mcuxClCss_GetHwConfig mcuxClEls_GetHwConfig
#define mcuxClCss_GetHwState mcuxClEls_GetHwState
#define mcuxClCss_GetHwVersion mcuxClEls_GetHwVersion
#define mcuxClCss_GetIntEnableFlags mcuxClEls_GetIntEnableFlags
#define mcuxClCss_GetKeyProperties mcuxClEls_GetKeyProperties
#define mcuxClCss_GetLastDmaAddress mcuxClEls_GetLastDmaAddress
#define mcuxClCss_GetLock mcuxClEls_GetLock
#define mcuxClCss_GetRandomStartDelay mcuxClEls_GetRandomStartDelay
#ifdef MCUXCL_FEATURE_ELS_GLITCHDETECTOR
#define mcuxClCss_GlitchDetector_GetEventCounter mcuxClEls_GlitchDetector_GetEventCounter
#define mcuxClCss_GlitchDetector_LoadConfig_Async mcuxClEls_GlitchDetector_LoadConfig_Async
#define mcuxClCss_GlitchDetector_ResetEventCounter mcuxClEls_GlitchDetector_ResetEventCounter
#define mcuxClCss_GlitchDetector_Trim_Async mcuxClEls_GlitchDetector_Trim_Async
#endif
#define mcuxClCss_Hash_Async mcuxClEls_Hash_Async
#define mcuxClCss_Hkdf_Rfc5869_Async mcuxClEls_Hkdf_Rfc5869_Async
#define mcuxClCss_Hkdf_Sp80056c_Async mcuxClEls_Hkdf_Sp80056c_Async
#define mcuxClCss_Hmac_Async mcuxClEls_Hmac_Async
#define mcuxClCss_IsLocked mcuxClEls_IsLocked
#define mcuxClCss_KeyDelete_Async mcuxClEls_KeyDelete_Async
#define mcuxClCss_KeyExport_Async mcuxClEls_KeyExport_Async
#ifdef MCUXCL_FEATURE_ELS_PUK_INTERNAL
#define mcuxClCss_KeyImportPuk_Async mcuxClEls_KeyImportPuk_Async
#endif
#define mcuxClCss_KeyImport_Async mcuxClEls_KeyImport_Async
#define mcuxClCss_LimitedWaitForOperation mcuxClEls_LimitedWaitForOperation
#define mcuxClCss_Prng_GetRandom mcuxClEls_Prng_GetRandom
#define mcuxClCss_Prng_GetRandomWord mcuxClEls_Prng_GetRandomWord
#define mcuxClCss_Prng_Init_Async mcuxClEls_Prng_Init_Async
#define mcuxClCss_ReleaseLock mcuxClEls_ReleaseLock
#define mcuxClCss_ResetErrorFlags mcuxClEls_ResetErrorFlags
#define mcuxClCss_ResetIntFlags mcuxClEls_ResetIntFlags
#define mcuxClCss_Reset_Async mcuxClEls_Reset_Async
#define mcuxClCss_RespGen_Async mcuxClEls_RespGen_Async
#define mcuxClCss_Rng_DrbgRequestRaw_Async mcuxClEls_Rng_DrbgRequestRaw_Async
#define mcuxClCss_Rng_DrbgRequest_Async mcuxClEls_Rng_DrbgRequest_Async
#define mcuxClCss_Rng_DrbgTestAesCtr_Async mcuxClEls_Rng_DrbgTestAesCtr_Async
#define mcuxClCss_Rng_DrbgTestAesEcb_Async mcuxClEls_Rng_DrbgTestAesEcb_Async
#define mcuxClCss_Rng_DrbgTestExtract_Async mcuxClEls_Rng_DrbgTestExtract_Async
#define mcuxClCss_Rng_DrbgTestInstantiate_Async mcuxClEls_Rng_DrbgTestInstantiate_Async
#define mcuxClCss_Rng_Dtrng_ConfigEvaluate_Async mcuxClEls_Rng_Dtrng_ConfigEvaluate_Async
#define mcuxClCss_Rng_Dtrng_ConfigLoadPrv_Async mcuxClEls_Rng_Dtrng_ConfigLoadPrv_Async
#define mcuxClCss_Rng_Dtrng_ConfigLoad_Async mcuxClEls_Rng_Dtrng_ConfigLoad_Async
#define mcuxClCss_SetIntEnableFlags mcuxClEls_SetIntEnableFlags
#define mcuxClCss_SetIntFlags mcuxClEls_SetIntFlags
#define mcuxClCss_SetMasterUnlock mcuxClEls_SetMasterUnlock
#define mcuxClCss_SetRandomStartDelay mcuxClEls_SetRandomStartDelay
#ifdef MCUXCL_FEATURE_ELS_SHA_DIRECT
#define mcuxClCss_Hash_ShaDirect mcuxClEls_Hash_ShaDirect
#define mcuxClCss_ShaDirect_Disable mcuxClEls_ShaDirect_Disable
#define mcuxClCss_ShaDirect_Enable mcuxClEls_ShaDirect_Enable
#endif
#define mcuxClCss_TlsGenerateMasterKeyFromPreMasterKey_Async mcuxClEls_TlsGenerateMasterKeyFromPreMasterKey_Async
#define mcuxClCss_TlsGenerateSessionKeysFromMasterKey_Async mcuxClEls_TlsGenerateSessionKeysFromMasterKey_Async
#ifdef MCUXCL_FEATURE_ELS_CMD_CRC
#define mcuxClCss_ConfigureCommandCRC mcuxClEls_ConfigureCommandCRC
#define mcuxClCss_GetCommandCRC mcuxClEls_GetCommandCRC
#define mcuxClCss_UpdateRefCRC mcuxClEls_UpdateRefCRC
#define mcuxClCss_VerifyVsRefCRC mcuxClEls_VerifyVsRefCRC
#endif
#define mcuxClCss_WaitForOperation mcuxClEls_WaitForOperation
/**
* There are also corresponding changes in other components:
* mcuxClMac_Mode_HMAC_SHA2_256_CSS -> mcuxClMac_Mode_HMAC_SHA2_256_ELS
* mcuxClRandomModes_Mode_CSS_Drbg -> mcuxClRandomModes_Mode_ELS_Drbg
*/
#endif /* MCUXCLELS_MAPPING_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/src/mcuxClEls_Common.c
+405
View File
@@ -0,0 +1,405 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_Common.c
* @brief ELS implementation for common functionality.
* This file implements the functions declared in mcuxClEls_Common.h and adds helper functions used by other implementation headers. */
#include <stdbool.h>
#include <platform_specific_headers.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <mcuxClEls.h>
#include <internal/mcuxClEls_Internal.h>
#include <internal/mcuxClEls_Internal_Common.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetHwVersion)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwVersion(
mcuxClEls_HwVersion_t * result)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetHwVersion);
result->word.value = MCUXCLELS_SFR_READ(ELS_VERSION);
uint32_t minorVersion = result->bits.minor;
/* Encode in decimal representation */
minorVersion = (minorVersion & 0xFu) + (((minorVersion >> 4u) & 0xFu) * 10u);
result->bits.minor = (uint8_t)minorVersion;
#ifdef MCUXCL_FEATURE_ELS_GET_FW_VERSION
uint32_t fwMinorVersion = result->bits.fw_minor;
/* Encode in decimal representation */
fwMinorVersion = (fwMinorVersion & 0xFu) + (((fwMinorVersion >> 4u) & 0xFu) * 10u);
result->bits.fw_minor = (uint8_t)fwMinorVersion;
#endif // MCUXCL_FEATURE_ELS_GET_FW_VERSION
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetHwVersion, MCUXCLELS_STATUS_OK);
}
#ifdef MCUXCL_FEATURE_ELS_HWCONFIG
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetHwConfig)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwConfig(
mcuxClEls_HwConfig_t * result)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetHwConfig);
result->word.value = MCUXCLELS_SFR_READ(ELS_CONFIG);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetHwConfig, MCUXCLELS_STATUS_OK);
}
#endif /* MCUXCL_FEATURE_ELS_HWCONFIG */
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetHwState)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetHwState(
mcuxClEls_HwState_t * result)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetHwState);
result->word.value = MCUXCLELS_SFR_READ(ELS_STATUS);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetHwState, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_Enable_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Enable_Async(
void)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_Enable_Async);
const uint32_t sfrVal = MCUXCLELS_SFR_FIELD_FORMAT(ELS_CTRL, ELS_EN, 1u);
MCUXCLELS_SFR_WRITE(ELS_CTRL, sfrVal);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_Enable_Async, MCUXCLELS_STATUS_OK_WAIT);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_Disable)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Disable(
void)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_Disable);
MCUXCLELS_SET_CTRL_FIELD(MCUXCLELS_SFR_CTRL_ELS_EN, 0u);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_Disable, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetErrorCode)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetErrorCode(
mcuxClEls_ErrorHandling_t errorHandling)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetErrorCode);
mcuxClEls_Status_t result = MCUXCLELS_STATUS_SW_FAULT;
if (1U == MCUXCLELS_GET_STATUS_FIELD(MCUXCLELS_SFR_STATUS_ELS_ERR))
{
if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_FLT_ERR))
{
result = MCUXCLELS_STATUS_HW_FAULT;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_ITG_ERR))
{
result = MCUXCLELS_STATUS_HW_INTEGRITY;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_OPN_ERR))
{
result = MCUXCLELS_STATUS_HW_OPERATIONAL;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_ALG_ERR))
{
result = MCUXCLELS_STATUS_HW_ALGORITHM;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_BUS_ERR))
{
result = MCUXCLELS_STATUS_HW_BUS;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_PRNG_ERR))
{
result = MCUXCLELS_STATUS_HW_PRNG;
}
else if (MCUXCLELS_IS_ERROR_BIT_SET(MCUXCLELS_SFR_ERR_STATUS_DTRNG_ERR))
{
result = MCUXCLELS_STATUS_HW_DTRNG;
}
else
{
result = MCUXCLELS_STATUS_SW_FAULT;
}
}
else
{
/* Double check, should result in addition of zero in normal case. */
MCUX_CSSL_SC_ADD(MCUXCLELS_GET_STATUS_FIELD(MCUXCLELS_SFR_STATUS_ELS_ERR));
result = MCUXCLELS_STATUS_OK;
}
if (MCUXCLELS_ERROR_FLAGS_CLEAR == errorHandling){
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClEls_ResetErrorFlags()); /* always returns MCUXCLELS_STATUS_OK. */
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetErrorCode, result,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_ResetErrorFlags));
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetErrorCode, result);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetErrorLevel)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetErrorLevel(
mcuxClEls_ErrorHandling_t errorHandling,
uint32_t *errorLevel)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetErrorLevel);
*errorLevel = MCUXCLELS_GET_ERROR_STATUS_FIELD(MCUXCLELS_SFR_ERR_STATUS_ERR_LVL);
MCUX_CSSL_FP_FUNCTION_CALL(result, mcuxClEls_GetErrorCode(errorHandling));
/* Exit function with expectation: mcuxClEls_GetErrorCode was called unconditionally */
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetErrorLevel, result,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_GetErrorCode));
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_WaitForOperation)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_WaitForOperation(
mcuxClEls_ErrorHandling_t errorHandling)
{
/* Enter flow-protected function with expectation: mcuxClEls_GetErrorCode will be called (unconditionally) */
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_WaitForOperation,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_GetErrorCode));
while (mcuxClEls_isBusy())
{
// Do nothing
}
/* Double check, should result in addition of zero in normal case. */
MCUX_CSSL_SC_ADD(MCUXCLELS_GET_STATUS_FIELD(MCUXCLELS_SFR_STATUS_ELS_BUSY));
MCUX_CSSL_FP_FUNCTION_CALL(result, mcuxClEls_GetErrorCode(errorHandling));
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_WaitForOperation, result);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_LimitedWaitForOperation)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_LimitedWaitForOperation(
uint32_t counterLimit,
mcuxClEls_ErrorHandling_t errorHandling)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_LimitedWaitForOperation);
bool counterExpired = true;
while (0U != counterLimit)
{
if (!mcuxClEls_isBusy())
{
counterExpired = false;
break;
}
counterLimit--;
}
if (true == counterExpired)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_LimitedWaitForOperation, MCUXCLELS_STATUS_SW_COUNTER_EXPIRED);
}
/* Double check, should result in addition of zero in normal case. */
MCUX_CSSL_SC_ADD(MCUXCLELS_SFR_BITREAD(ELS_STATUS, ELS_BUSY));
MCUX_CSSL_FP_FUNCTION_CALL(result, mcuxClEls_GetErrorCode(errorHandling));
/* Exit function with expectation: mcuxClEls_GetErrorCode was called */
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_LimitedWaitForOperation, result,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_GetErrorCode));
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_ResetErrorFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ResetErrorFlags(
void)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_ResetErrorFlags);
const uint32_t sfrVal = MCUXCLELS_SFR_FIELD_FORMAT(ELS_ERR_STATUS, CLR_ERR_CLR, MCUXCLELS_ERROR_FLAGS_CLEAR);
MCUXCLELS_SFR_WRITE(ELS_ERR_STATUS_CLR, sfrVal);
// Poll error bit to be sure that error bits has been cleared. Required by HW spec.
while(0u != MCUXCLELS_GET_STATUS_FIELD(MCUXCLELS_SFR_STATUS_ELS_ERR))
{
// Do nothing
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_ResetErrorFlags, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_Reset_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_Reset_Async(
mcuxClEls_ResetOption_t options)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_Reset_Async);
if (mcuxClEls_isBusy() && (MCUXCLELS_RESET_DO_NOT_CANCEL == options))
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_Reset_Async, MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT);
}
#ifdef MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING
/* Set the drbg_block_counter to a value triggering a reseed after the upcoming RESET operation via interrupt */
mcuxClEls_rng_drbg_block_counter = MCUXCLELS_RNG_DRBG_BLOCK_COUNTER_THRESHOLD;
#endif /* MCUXCL_FEATURE_ELS_ITERATIVE_SEEDING */
MCUXCLELS_SET_CTRL_FIELD(MCUXCLELS_SFR_CTRL_RESET, 1u);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_Reset_Async, MCUXCLELS_STATUS_OK_WAIT);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_SetIntEnableFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetIntEnableFlags(
mcuxClEls_InterruptOptionEn_t options)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_SetIntEnableFlags);
MCUXCLELS_SFR_WRITE(ELS_INT_ENABLE, options.word.value);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_SetIntEnableFlags, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetIntEnableFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetIntEnableFlags(
mcuxClEls_InterruptOptionEn_t * result)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetIntEnableFlags);
result->word.value = MCUXCLELS_SFR_READ(ELS_INT_ENABLE);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetIntEnableFlags, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_ResetIntFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ResetIntFlags(
mcuxClEls_InterruptOptionRst_t options)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_ResetIntFlags);
MCUXCLELS_SFR_WRITE(ELS_INT_STATUS_CLR, options.word.value);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_ResetIntFlags, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_SetIntFlags)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetIntFlags(
mcuxClEls_InterruptOptionSet_t options)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_SetIntFlags);
MCUXCLELS_SFR_WRITE(ELS_INT_STATUS_SET, options.word.value);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_SetIntFlags, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_SetRandomStartDelay)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetRandomStartDelay(
uint32_t startDelay)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_SetRandomStartDelay);
MCUXCLELS_INPUT_PARAM_CHECK_PROTECTED(mcuxClEls_SetRandomStartDelay, 1024u < startDelay);
if (mcuxClEls_isBusy())
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_SetRandomStartDelay, MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT);
}
MCUXCLELS_SET_CFG_FIELD(MCUXCLELS_SFR_CFG_ADCTRL, startDelay);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_SetRandomStartDelay, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetRandomStartDelay)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetRandomStartDelay(
uint32_t *startDelay)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetRandomStartDelay);
*startDelay = MCUXCLELS_GET_CFG_FIELD(MCUXCLELS_SFR_CFG_ADCTRL);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetRandomStartDelay, MCUXCLELS_STATUS_OK);
}
#ifdef MCUXCL_FEATURE_ELS_LOCKING
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetLock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetLock(
uint32_t * pSessionId)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetLock);
*pSessionId = MCUXCLELS_SFR_READ(ELS_SESSION_ID);
if(0u == *pSessionId)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetLock, MCUXCLELS_STATUS_SW_LOCKING_FAILED);
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetLock, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_ReleaseLock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_ReleaseLock(
uint32_t sessionId)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_ReleaseLock);
MCUXCLELS_SFR_WRITE(ELS_SESSION_ID, sessionId);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_ReleaseLock, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_IsLocked)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_IsLocked(
void)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_IsLocked);
if(1u == MCUXCLELS_GET_STATUS_FIELD(MCUXCLELS_SFR_STATUS_ELS_LOCKED))
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_IsLocked, MCUXCLELS_STATUS_SW_STATUS_LOCKED);
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_IsLocked, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_SetMasterUnlock)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_SetMasterUnlock(
uint32_t masterId)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_SetMasterUnlock);
MCUXCLELS_SFR_WRITE(ELS_MASTER_ID, masterId);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_SetMasterUnlock, MCUXCLELS_STATUS_OK);
}
#endif /* MCUXCL_FEATURE_ELS_LOCKING */
#ifdef MCUXCL_FEATURE_ELS_DMA_ADDRESS_READBACK
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GetLastDmaAddress)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GetLastDmaAddress(uint32_t* pLastAddress)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GetLastDmaAddress);
*pLastAddress = MCUXCLELS_SFR_READ(ELS_DMA_FIN_ADDR);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GetLastDmaAddress, MCUXCLELS_STATUS_OK);
}
#endif /* MCUXCL_FEATURE_ELS_DMA_ADDRESS_READBACK */
#ifdef MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_CompareDmaFinalOutputAddress)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_CompareDmaFinalOutputAddress(
uint8_t *outputStartAddress,
size_t expectedLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_CompareDmaFinalOutputAddress,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClEls_GetLastDmaAddress));
/* Calculate the expected final address from the input */
uint8_t* expectedFinalAddress = (uint8_t *)MCUXCL_HW_DMA_WORKAROUND(outputStartAddress) + expectedLength;
/* Get the actual final address from ELS - no result check as function always returns OK */
uint32_t finalAddress;
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClEls_GetLastDmaAddress(&finalAddress));
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Adresses are represented as integer objects when read from SFR registers")
uint8_t *pFinalAddress = (uint8_t *)finalAddress;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
/* Compare the expected address to the actual one */
if(pFinalAddress != expectedFinalAddress)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_CompareDmaFinalOutputAddress, MCUXCLELS_STATUS_SW_COMPARISON_FAILED);
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_CompareDmaFinalOutputAddress, MCUXCLELS_STATUS_OK);
}
#endif /* MCUXCL_FEATURE_ELS_DMA_FINAL_ADDRESS_READBACK */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClEls/src/mcuxClEls_GlitchDetector.c
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2022, 2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClEls_GlitchDetector.c
* @brief ELS implementation for key management.
* This file implements the functions declared in mcuxClEls_GlitchDetector.h. */
#include <mcuxClEls_GlitchDetector.h>
#include <stdbool.h>
#include <mcuxClEls.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <internal/mcuxClEls_Internal.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GlitchDetector_LoadConfig_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_LoadConfig_Async(
uint8_t const * pInput)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GlitchDetector_LoadConfig_Async);
/* ELS SFRs are not cached => Tell SW to wait for ELS to come back from BUSY state before modifying the SFRs */
if (mcuxClEls_isBusy())
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_LoadConfig_Async, MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT);
}
mcuxClEls_setInput0_fixedSize(pInput);
mcuxClEls_startCommand(ID_CFG_ELS_CMD_GDET_CFG_LOAD, 0U, ELS_CMD_BIG_ENDIAN);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_LoadConfig_Async, MCUXCLELS_STATUS_OK_WAIT);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GlitchDetector_Trim_Async)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_Trim_Async(
uint8_t * pOutput)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GlitchDetector_Trim_Async);
/* ELS SFRs are not cached => Tell SW to wait for ELS to come back from BUSY state before modifying the SFRs */
if (mcuxClEls_isBusy())
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_Trim_Async, MCUXCLELS_STATUS_SW_CANNOT_INTERRUPT);
}
mcuxClEls_setOutput_fixedSize(pOutput);
mcuxClEls_startCommand(ID_CFG_ELS_CMD_GDET_TRIM, 0U, ELS_CMD_BIG_ENDIAN);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_Trim_Async, MCUXCLELS_STATUS_OK_WAIT);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GlitchDetector_GetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_GetEventCounter(
uint8_t * pCount)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GlitchDetector_GetEventCounter);
// Decode from Gray coding
uint8_t count8 = (uint8_t) (MCUXCLELS_GET_GDET_EVTCNT_FIELD(MCUXCLELS_SFR_GDET_EVTCNT_GDET_EVTCNT) & 0xffU);
count8 ^= count8 >> 4u;
count8 ^= count8 >> 2u;
count8 ^= count8 >> 1u;
// Assign to the result variable
*pCount = count8;
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_GetEventCounter, MCUXCLELS_STATUS_OK);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClEls_GlitchDetector_ResetEventCounter)
MCUXCLELS_API MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClEls_Status_t) mcuxClEls_GlitchDetector_ResetEventCounter(
void)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClEls_GlitchDetector_ResetEventCounter);
// Start GDET Event Counter reset
MCUXCLELS_SFR_WRITE(ELS_GDET_EVTCNT_CLR, 1u);
// The actual reset occurs in a different clock domain from the ELS core clock, so we have to wait for synchroni-
// zation. The spec states that this takes on the order of 2 cycles of the ELS core clock plus 2 cycles of the
// Glitch Detector reference clock.
while(1u != MCUXCLELS_GET_GDET_EVTCNT_FIELD(MCUXCLELS_SFR_GDET_EVTCNT_GDET_EVTCNT_CLR_DONE))
{
// Do nothing
}
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxClEls_GlitchDetector_ResetEventCounter, MCUXCLELS_STATUS_OK);
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/internal/mcuxClMemory_Internal.h
+28
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClMemory_Internal.h
* @brief Top-level include file for the internal memory operations.
*/
#ifndef MCUXCLMEMORY_INTERNAL_H
#define MCUXCLMEMORY_INTERNAL_H
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <mcuxClMemory_Constants.h>
#include <mcuxClMemory_Types.h>
#endif /* MCUXCLMEMORY_INTERNAL_H */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/mcuxClMemory.h
+44
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxClMemory.h
* @brief Top-level include file for the memory operations.
*
* @defgroup mcuxClMemory mcuxClMemory
* @brief Basic memory operations
*
* This component provides memory functions similar to the ones found in the C standard library.
*
* @{
*/
#ifndef MCUXCLMEMORY_H
#define MCUXCLMEMORY_H
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <mcuxClMemory_Constants.h>
#include <mcuxClMemory_Types.h>
#include <mcuxClMemory_Endianness.h>
#include <mcuxClMemory_Clear.h>
#include <mcuxClMemory_Copy.h>
#include <mcuxClMemory_Copy_Reversed.h>
#include <mcuxClMemory_Set.h>
#include <mcuxClMemory_Xor.h>
/**
* @}
*/
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/mcuxClMemory_Clear.h
+80
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@@ -0,0 +1,80 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Clear.h
* @brief Memory header for clear functions.
* This header exposes functions that enable using memory clear function.
*/
/**
* @defgroup mcuxClMemory_Clear mcuxClMemory_Clear
* @brief This function clears a memory region.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_CLEAR_H_
#define MCUXCLMEMORY_CLEAR_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClMemory_Types.h>
#include <mcuxCsslAnalysis.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* FUNCTIONS
**********************************************/
/**
* Overwrites a memory buffer with null bytes.
*
* If the destination buffer is too small, i.e. if bufLength < length,
* (length-bufLength) is added to the Flow Protection token (see @ref mcuxCsslFlowProtection).
*
* @param[out] pDst Pointer to the buffer to be cleared.
* @param[in] length size (in bytes) to be cleared.
* @param[in] bufLength buffer size (if bufLength < length, only bufLength bytes are cleared).
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClMemory_clear)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_clear (uint8_t *pDst, size_t length, size_t bufLength);
/**********************************************
* MACROS
**********************************************/
/** Helper macro to call #mcuxClMemory_clear with flow protection. */
#define MCUXCLMEMORY_FP_MEMORY_CLEAR(pTarget, byteLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_clear((uint8_t *) (pTarget), byteLen, byteLen))
/** Helper macro to call #mcuxClMemory_clear with flow protection with buffer. */
#define MCUXCLMEMORY_FP_MEMORY_CLEAR_WITH_BUFF(pTarget, byteLen, buffLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_clear((uint8_t *) (pTarget), byteLen, buffLen))
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLMEMORY_CLEAR_H_ */
/**
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/mcuxClMemory_Constants.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Constants.h
* @brief Memory constant header.
* This header exposes constants used by the @ref mcuxClMemory functions. */
/**
* @defgroup mcuxClMemory_Constants mcuxClMemory_Constants
* @brief Defines all constants used by the @ref mcuxClMemory functions.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_CONSTANTS_H
#define MCUXCLMEMORY_CONSTANTS_H
/**********************************************
* CONSTANTS
**********************************************/
#define MCUXCLMEMORY_COMPONENT_MASK 0x09990000u ///< Component mask value
/**
* @defgroup MCUXCLMEMORY_STATUS_ MCUXCLMEMORY_STATUS_
* @brief Defines valid mcuxClMemory function return codes
* @ingroup mcuxClMemory_Types_Macros
* @{
*/
#define MCUXCLMEMORY_STATUS_OK ((mcuxClMemory_Status_t) 0x09992E03u) ///< Memory operation successful
#define MCUXCLMEMORY_STATUS_EQUAL ((mcuxClMemory_Status_t) 0x09992E47u) ///< The two contents of the Memory Compare are equal
#define MCUXCLMEMORY_STATUS_NOT_EQUAL ((mcuxClMemory_Status_t) 0x099989B8u) ///< The two contents of the Memory Compare are not equal
#define MCUXCLMEMORY_STATUS_INVALID_PARAMETER ((mcuxClMemory_Status_t) 0x0999533Cu) ///< A parameter was invalid
#define MCUXCLMEMORY_STATUS_FAULT ((mcuxClMemory_Status_t) 0x0999F0F0u) ///< A fault occurred in the execution
/**
* @}
*/
#define MCUXCLMEMORY_ERRORCODE_OK MCUXCLMEMORY_STATUS_OK ///< Memory operation successful
///< @deprecated Please use #MCUXCLMEMORY_STATUS_OK instead
#endif /* MCUXCLMEMORY_CONSTANTS_H */
/**
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Copy.h
* @brief Memory header for copy functions.
* This header exposes functions that enable using memory copy function.
*/
/**
* @defgroup mcuxClMemory_Copy mcuxClMemory_Copy
* @brief This function copies a memory region from @p src to @p dst.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_COPY_H_
#define MCUXCLMEMORY_COPY_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClMemory_Types.h>
#include <mcuxCsslAnalysis.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* FUNCTIONS
**********************************************/
/**
* Copies a memory buffer to another location.
*
* The two buffers must not overlap.
*
* If the destination buffer is too small, i.e. if bufLength < length,
* (length-bufLength) is added to the Flow Protection token (see @ref mcuxCsslFlowProtection).
*
* @param[out] pDst pointer to the buffer to be copied to.
* @param[in] pSrc pointer to the buffer to copy.
* @param[in] length size (in bytes) to be copied.
* @param[in] bufLength buffer size (if bufLength < length, only bufLength bytes are copied).
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClMemory_copy)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_copy (uint8_t *pDst, uint8_t const *pSrc, size_t length, size_t bufLength);
/**********************************************
* MACROS
**********************************************/
/** Helper macro to call #mcuxClMemory_copy with flow protection. */
#define MCUXCLMEMORY_FP_MEMORY_COPY(pTarget, pSource, byteLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_copy((uint8_t *) (pTarget), (const uint8_t *) (pSource), byteLen, byteLen))
/** Helper macro to call #mcuxClMemory_copy with flow protection with buffer. */
#define MCUXCLMEMORY_FP_MEMORY_COPY_WITH_BUFF(pTarget, pSource, byteLen, buffLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_copy((uint8_t *) (pTarget), (const uint8_t *) (pSource), byteLen, buffLen))
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLMEMORY_COPY_H_ */
/**
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/mcuxClMemory_Copy_Reversed.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Copy_Reversed.h
* @brief Memory header for reversed copy functions.
* This header exposes functions that enable using memory reversed copy function.
*/
/**
* @defgroup mcuxClMemory_Copy_Reversed mcuxClMemory_Copy_Reversed
* @brief This function copies a memory region from @p src to @p dst reversely.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_COPY_REVERSED_H_
#define MCUXCLMEMORY_COPY_REVERSED_H_
#include <mcuxClCore_Platform.h>
#include <mcuxClMemory_Types.h>
#include <mcuxCsslAnalysis.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* FUNCTIONS
**********************************************/
/**
* Copies a memory buffer to another location reversely.
*
* If the destination buffer is too small, i.e. if bufLength < length,
* then only bufLength bytes are copied reversely.
*
* @param[out] pDst pointer to the buffer to be copied to.
* @param[in] pSrc pointer to the buffer to copy.
* @param[in] length size (in bytes) to be copied.
* @param[in] bufLength buffer size (if bufLength < length, only bufLength bytes are copied reversely).
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClMemory_copy_reversed)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_copy_reversed (uint8_t *pDst, uint8_t const *pSrc, size_t length, size_t bufLength);
/**********************************************
* MACROS
**********************************************/
/** Helper macro to call #mcuxClMemory_copy_reversed with flow protection. */
#define MCUXCLMEMORY_FP_MEMORY_COPY_REVERSED(pTarget, pSource, byteLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_copy_reversed((uint8_t *) (pTarget), (const uint8_t *) (pSource), byteLen, byteLen))
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLMEMORY_COPY_REVERSED_H_ */
/**
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Endianness.h
* @brief Memory header for endianness support functions.
* This header exposes macros that enable using endianness support functions.
*/
/**
* @defgroup mcuxClMemory_Endianness mcuxClMemory_Endianness
* @brief These macros implement endianess management on integers
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_ENDIANNESS_H_
#define MCUXCLMEMORY_ENDIANNESS_H_
#include <mcuxClMemory_Types.h>
#include <mcuxClConfig.h> // Exported features flags header
/**********************************************
* MACROS
**********************************************/
/**
* @brief Converts a 32-bit unsigned integer to a little-endian order @c uint8_t array .
*
* @note Implementation is platform independent.
*
* @param[out] destination pointer to a 4 byte buffer were 32-bit integer in little-endian will be encoded.
* @param[in] value pointer to the 32-bit integer to be encoded.
*
*/
#define mcuxClMemory_StoreLittleEndian32( destination, value ) \
do \
{ \
uint32_t local_value = (uint32_t)(value); \
((uint8_t*)(destination))[0] = (uint8_t) (((local_value) & 0x000000FFU) >> 0u);\
((uint8_t*)(destination))[1] = (uint8_t) (((local_value) & 0x0000FF00U) >> 8u);\
((uint8_t*)(destination))[2] = (uint8_t) (((local_value) & 0x00FF0000U) >> 16u);\
((uint8_t*)(destination))[3] = (uint8_t) (((local_value) & 0xFF000000U) >> 24u);\
} while (false)
/**
* @brief Converts a 32-bit unsigned integer to a big-endian order @c uint8_t array.
*
* @note Implementation is platform independent.
*
* @param[in] source pointer to a 4 byte big-endian order @c uint8_t buffer that will be converted to an unsigned integer
*
*/
#define mcuxClMemory_StoreBigEndian32( destination, value ) \
do \
{ \
uint32_t local_value = (uint32_t)(value); \
((uint8_t*)(destination))[0] = (uint8_t) (((local_value) & 0xFF000000U) >> 24u);\
((uint8_t*)(destination))[1] = (uint8_t) (((local_value) & 0x00FF0000U) >> 16u);\
((uint8_t*)(destination))[2] = (uint8_t) (((local_value) & 0x0000FF00U) >> 8u);\
((uint8_t*)(destination))[3] = (uint8_t) (((local_value) & 0x000000FFU) >> 0u);\
} while (false)
/**
* @brief Converts a little-endian order @c uint8_t array to a 32-bit unsigned integer.
*
* @note Implementation is platform independent.
*
* @param[in] source pointer to a 4 byte little-endian order @c uint8_t buffer that will be converted to an unsigned integer
*
*/
#define mcuxClMemory_LoadLittleEndian32( source ) \
( (((uint32_t) ((const uint8_t*)(source))[0]) << 0u) | \
(((uint32_t) ((const uint8_t*)(source))[1]) << 8u) | \
(((uint32_t) ((const uint8_t*)(source))[2]) << 16u) | \
(((uint32_t) ((const uint8_t*)(source))[3]) << 24u) )
/**
* @brief Converts a big-endian order @c uint8_t array to a 32-bit unsigned integer.
*
* @param[in] destination pointer to a 4 byte buffer were 32-bit integer in big-endian will be decoded.
*
* @return a 32-bit unsigned integer
*/
#define mcuxClMemory_LoadBigEndian32( source ) \
( (((uint32_t) ((const uint8_t*)(source))[0]) << 24u) | \
(((uint32_t) ((const uint8_t*)(source))[1]) << 16u) | \
(((uint32_t) ((const uint8_t*)(source))[2]) << 8u) | \
(((uint32_t) ((const uint8_t*)(source))[3]) << 0u) )
/**
* @brief MACRO that switches byte endianness of given CPU word.
*
* @param[in] input a 32-bit unsigned integer whose endianness will be reversed.
*
*/
#ifdef __REV
#define MCUXCLMEMORY_SWITCH_4BYTE_ENDIANNESS(input) __REV(input)
#else
#define MCUXCLMEMORY_SWITCH_4BYTE_ENDIANNESS(input) ((((input) & 0xffu) << 24u) | (((input) & 0xff00u) << 8u) | (((input) & 0xff0000u) >> 8u) | (((input) & 0xff000000u) >> 24u))
#endif
#endif /* MCUXCLMEMORY_ENDIANNESS_H_ */
/**
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Set.h
* @brief Memory header for set function.
* This header exposes functions that enable using memory set functions.
*/
/**
* @defgroup mcuxClMemory_Set mcuxClMemory_Set
* @brief This function sets all bytes in a memory region to a specified value.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_SET_H_
#define MCUXCLMEMORY_SET_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClMemory_Types.h>
#include <mcuxCsslAnalysis.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* FUNCTIONS
**********************************************/
/**
* Sets all bytes of a memory buffer to a specified value.
*
* If the destination buffer is too small, i.e. if bufLength < length,
* (length-bufLength) is added to the Flow Protection token (see @ref mcuxCsslFlowProtection).
*
* @param[out] pDst pointer to the buffer to be set.
* @param[in] val byte value to be set.
* @param[in] length size (in bytes) to be set.
* @param[in] bufLength buffer size (if bufLength < length, only bufLength bytes are set).
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClMemory_set)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_set (uint8_t *pDst, uint8_t val, size_t length, size_t bufLength);
/**********************************************
* MACROS
**********************************************/
/** Helper macro to call #mcuxClMemory_set with flow protection. */
#define MCUXCLMEMORY_FP_MEMORY_SET(pTarget, val, byteLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_set((uint8_t *) (pTarget), val, byteLen, byteLen))
/** Helper macro to call #mcuxClMemory_set with flow protection with buffer. */
#define MCUXCLMEMORY_FP_MEMORY_SET_WITH_BUFF(pTarget, val, byteLen, buffLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_set((uint8_t *) (pTarget), val, byteLen, buffLen))
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLMEMORY_SET_H_ */
/**
* @}
*/
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxClMemory/inc/mcuxClMemory_Types.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Types.h
* @brief Memory type header.
* This header exposes types used by the @ref mcuxClMemory functions. */
/**
* @defgroup mcuxClMemory_Types mcuxClMemory_Types
* @brief Defines all types used by the @ref mcuxClMemory functions.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_TYPES_H
#define MCUXCLMEMORY_TYPES_H
#include <stdint.h>
#include <stddef.h>
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
/**********************************************
* MACROS
**********************************************/
/**
* @defgroup mcuxClMemory_Types_Macros mcuxClMemory_Types_Macros
* @brief Defines all macros of @ref mcuxClMemory_Types
* @ingroup mcuxClMemory_Types
* @{
*/
#define MCUXCLMEMORY_API extern ///< Marks a function as a public API function of the mcuxClMemory component
/**
* @}
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @brief Type for error codes of mcuxClMemory component functions.
*
* Type returned by mcuxClMemory functions. See @ref MCUXCLMEMORY_STATUS_ for possible options.
*/
typedef uint32_t mcuxClMemory_Status_t;
/**
* @brief Deprecated type for error codes used by code-flow protected mcuxClMemory component functions.
*/
typedef MCUX_CSSL_FP_PROTECTED_TYPE(mcuxClMemory_Status_t) mcuxClMemory_Status_Protected_t;
#endif /* #MCUXCLMEMORY_TYPES_H */
/**
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/** @file mcuxClMemory_Xor.h
* @brief Memory header for xor functions.
* This header exposes functions that enable using memory xor function.
*/
/**
* @defgroup mcuxClMemory_xor mcuxClMemory_xor
* @brief This function performs xor between @p src1 and @p src2, and saves result to @p dst.
* @ingroup mcuxClMemory
* @{
*/
#ifndef MCUXCLMEMORY_XOR_H_
#define MCUXCLMEMORY_XOR_H_
#include <mcuxClConfig.h> // Exported features flags header
#include <mcuxClMemory_Types.h>
#include <mcuxCsslAnalysis.h>
#ifdef __cplusplus
extern "C" {
#endif
/**********************************************
* FUNCTIONS
**********************************************/
/**
* Perform xor for 2 memory buffers.
*
* Operation in place is allowed - one of the input buffer can also be the output buffer.
*
*
* @param[out] pDst pointer to the destination buffer.
* @param[in] pSrc1 pointer to the first source buffer.
* @param[in] pSrc2 pointer to the second source buffer.
* @param[in] length size (in bytes) to be operated
* @param[in] bufLength buffer size (if bufLength < length, only bufLength bytes are operated).
*
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxClMemory_xor)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_xor(uint8_t *pDst, const uint8_t *pSrc1, const uint8_t *pSrc2, uint32_t length, size_t bufLength);
/**********************************************
* MACROS
**********************************************/
/** Helper macro to call #mcuxClMemory_xor with flow protection. */
#define MCUXCLMEMORY_FP_MEMORY_XOR(pDst, pSrc1, pSrc2, length) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_xor(pDst, pSrc1, pSrc2, length, length))
/** Helper macro to call #mcuxClMemory_xor with flow protection with buffer. */
#define MCUXCLMEMORY_FP_MEMORY_XOR_WITH_BUFF(pDst, pSrc1, pSrc2, length, bufLen) \
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_xor(pDst, pSrc1, pSrc2, length, bufLen))
#ifdef __cplusplus
} /* extern "C" */
#endif
#endif /* MCUXCLMEMORY_XOR_H_ */
/**
* @}
*/
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021, 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#include <mcuxClMemory.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxClCore_FunctionIdentifiers.h>
#include <mcuxClToolchain.h>
#include <mcuxCsslAnalysis.h>
#define WORDSIZE (sizeof(uint32_t))
/**
* [DESIGN]
*
* This function considers the following cases of alignment of source and
* destination addresses and length:
*
* Src Addr. | Des Addr. | Length |
* ----------+-----------+-----------+-------------------------------
* aligned | aligned | aligned | Case A: read word, write word
* ----------+-----------+-----------+-------------------------------
* aligned | unaligned | aligned | Case B: read word, write byte
* ----------+-----------+-----------+-------------------------------
* unaligned | aligned | aligned | Case C: read byte, write word
* ----------+-----------+-----------+-------------------------------
* unaligned | unaligned | aligned | Case D: read byte,
* any | any | unaligned | write byte-word-byte
*
* Since SFR address and length shall be aligned,
* Cases A and B cover the usecases of SFR reading; and
* Cases A and C cover the useceses of SFR writing.
*
* If length > bufLength, and bufLength is not aligned, in cases A and B,
* the word containing last byte(s) is read in word, and last byte(s) is written byte-wisely.
* Ps, since length is aligned, last word in source shall be in valid address range.
*
* Case C is a special case of Case D, because the byte-wisely writing will be ignored.
*/
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClMemory_copy)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_copy (uint8_t *pDst, uint8_t const *pSrc, size_t length, size_t bufLength)
{
/* This function assumes caller providing valid addresses and length. */
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClMemory_copy);
MCUX_CSSL_FP_LOOP_DECL(mcuxClMemory_copy_loop);
uint8_t *pDstX = pDst;
const uint8_t *pSrcX = pSrc;
uint32_t copiedLength = 0u;
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("casting pointer to integer to check alignment.");
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
const uint32_t srcAddress = (uint32_t) pSrc;
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
const uint32_t dstAddress = (uint32_t) pDst;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER();
const uint32_t srcAddrOrLength = srcAddress | length;
const uint32_t minLength = (length <= bufLength) ? length : bufLength;
if (0u == (srcAddrOrLength % WORDSIZE)) /* source address and length are both aligned. */
{
uint32_t temp = 0u;
if (0u == (dstAddress % WORDSIZE)) /* destination address is aligned. */
{
/* Case A: copy word-wisely. */
while ((copiedLength + WORDSIZE) <= minLength)
{
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffer pSrc[] of length.")
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("source pointer is aligned in Case A.")
temp = *(const uint32_t *) pSrcX;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
pSrcX += WORDSIZE;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
copiedLength += WORDSIZE;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffer pDst[] of bufLength.")
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("destination pointer is aligned in Case A.")
*(uint32_t *) pDstX = temp;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
pDstX += WORDSIZE;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
}
}
/* Case A: remaining byte(s) when (length < bufLength). */
/* Case B: read word-wisely, write byte-wisely. */
while (copiedLength < minLength)
{
if (0u == (copiedLength % WORDSIZE))
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffer pSrc[] of length.")
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("source pointer is aligned in Cases A and B.")
temp = *(const uint32_t *) pSrcX;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
pSrcX += WORDSIZE;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
}
else
{
temp >>= 8u;
}
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffer pDst[] of bufLength.")
*pDstX = (uint8_t) (temp & 0xFFu);
pDstX++;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
copiedLength++;
}
}
else
{
/* Cases C & D: read byte-wisely, write (byte-word-byte)-wisely. */
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("modular arithmetic, mod 4")
const uint32_t unalignedBytes = (0u - dstAddress) % WORDSIZE;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
// Loop on unaligned bytes if any.
// Loop on words
// Start at first aligned address, increment by 4 bytes. To understand the loop condition, consider without loss of generality a
// byte array b_i of length=4 and bufLength=4.
//
// |0 3|4 4|
// +-------+-------+-------+-------+-------+
// | b_0 | b_1 | b_2 | b_3 | |
// +-------+-------+-------+-------+-------+
//
// In order to determine whether a full word can be copied, check with regard to the copying position i:
// * Starting from i=0, a full word can be copied. i+4 is the first position that is outside of the valid range,
// and it is equal to length.
// Therefore, checking that i+4 <= length and i+4 <= bufLength is a valid condition to check whether a full word can be
// copied.
// Loop on remaining bytes.
//copy unaligned bytes first, if any
for (; (copiedLength < minLength) && (copiedLength < unalignedBytes); copiedLength++)
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffers pSrc[] of length and pDst[] of bufLength.")
*pDstX = *pSrcX;
pDstX++;
pSrcX++;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
}
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("The pointer is CPU word aligned after the byte-loop above.");
uint32_t* p32Dst = (uint32_t *) pDstX;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING();
//loop on words
for (; (copiedLength + WORDSIZE) <= minLength; copiedLength += WORDSIZE)
{
/* Volatile keyword is added to avoid any chance of optimization (i.e. full word read) */
/* The idea is to read byte-wise from SRC to avoid unaligned word reads, but write aligned and word-wise to DST */
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffers pSrc[] of length and pDst[] of bufLength.")
uint32_t crtWordVal = (uint32_t)*(volatile const uint8_t *)pSrcX;
pSrcX++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
crtWordVal |= (uint32_t)*(volatile const uint8_t *)pSrcX << 8u;
pSrcX++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
crtWordVal |= (uint32_t)*(volatile const uint8_t *)pSrcX << 16u;
pSrcX++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
crtWordVal |= (uint32_t)*(volatile const uint8_t *)pSrcX << 24u;
pSrcX++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_INCOMPATIBLE("The pointer is CPU word aligned after the byte-loop above.");
*p32Dst = crtWordVal;
p32Dst++;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_INCOMPATIBLE();
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
}
pDstX = (uint8_t *) p32Dst;
//loop on remaining bytes
for (; (copiedLength < minLength); copiedLength++)
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller shall provide valid buffers pSrc[] of length and pDst[] of bufLength.")
*pDstX = *pSrcX;
pDstX++;
pSrcX++;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_loop);
}
}
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxClMemory_copy,
((length <= bufLength) ? length : bufLength) - copiedLength,
MCUX_CSSL_FP_LOOP_ITERATIONS(mcuxClMemory_copy_loop,
((length <= bufLength) ? length : bufLength)) );
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClMemory_copy_reversed)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_copy_reversed (uint8_t *pDst, uint8_t const *pSrc, size_t length, size_t bufLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClMemory_copy_reversed);
uint32_t len = length;
uint32_t diff;
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("diff is non-negative distance between pSrc and pDst, caculated according to platform architecture.")
if (pDst > pSrc)
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Casting pSrc and pDst to unsigned integer to calculate difference");
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
diff = (uint32_t)pDst - (uint32_t)pSrc;
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER();
}
else
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Casting pSrc and pDst to unsigned integer to calculate difference");
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
diff = (uint32_t)pSrc - (uint32_t)pDst;
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER();
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
if (bufLength < length)
{
length = bufLength;
len = bufLength;
}
MCUX_CSSL_FP_LOOP_DECL(mcuxClMemory_copy_reversed_loop);
//non-overlap case
if (diff >= length)
{
diff = length;
}
uint8_t *pDstBt;
const uint8_t *pSrcBt;
if (pSrc > pDst)
{
// first copy the non-overlop part
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("pDstBt will be in the valid range pDst[0 ~ bufLength] and pSrc will be in the valid range pSrc[0 ~ length].")
pSrcBt = pSrc + len - 1U;
pDstBt = (uint8_t *)pDst;
while (len > length - diff)
{
*pDstBt = *pSrcBt;
pDstBt++;
pSrcBt--;
len--;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
//then swap the overlap part
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("pDstBt2 will be in the valid range pDst[0 ~ bufLength].")
uint8_t *pDstBt2 = pDstBt + len - 1u;
while (len > 1U)
{
uint8_t tempByte = *pDstBt2;
*pDstBt2 = *pDstBt;
pDstBt2--;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
*pDstBt = tempByte;
pDstBt++;
len -= 2U;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
}
else
{
// first copy the non-overlop part
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("pDstBt will be in the valid range pDst[0 ~ bufLength].")
pDstBt = (uint8_t *)pDst + len - 1U;
pSrcBt = pSrc;
while (len > length - diff)
{
*pDstBt = *pSrcBt;
pDstBt--;
pSrcBt++;
len--;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
//then swap the overlap part
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("pDstBt2 will be in the valid range pDst[0 ~ bufLength], pDstBt will be in the valid range pDst[0 ~ bufLength].")
uint8_t *pDstBt2 = pDstBt - len + 1u;
while (len > 1U)
{
uint8_t tempByte = *pDstBt2;
*pDstBt2 = *pDstBt;
pDstBt2++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
*pDstBt = tempByte;
pDstBt--;
len -= 2U;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_copy_reversed_loop);
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
}
/* update SC and return */
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxClMemory_copy_reversed,
MCUX_CSSL_FP_LOOP_ITERATIONS(mcuxClMemory_copy_reversed_loop, (length - len)));
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClMemory_set)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_set (uint8_t *pDst, uint8_t val, size_t length, size_t bufLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClMemory_set);
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "modular arithmetic, mod 4")
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("casting to unsigned integer to calculate unaligned bytes");
uint32_t unalignedBytes = (0u - (uint32_t)pDst) % (sizeof(uint32_t));
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER();
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
MCUX_CSSL_FP_LOOP_DECL(mcuxClMemory_set_loop);
uint32_t wordVal = ((uint32_t)val << 24) | ((uint32_t)val << 16) | ((uint32_t)val << 8) | (uint32_t)val;
//clear unaligned bytes first, if any
size_t i = 0u;
for(i = 0u; (i < length) && (i < bufLength) && (i < unalignedBytes); i++)
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "pDst will be in the valid range pDst[0 ~ bufLength].")
*pDst = val;
pDst++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("The pointer is CPU word aligned. So, it's safe to cast it to uint32_t*");
uint32_t* p32Dst = (uint32_t *) pDst;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING();
//loop on words. See mcuxClMemory_copy for an explanation of the condition
while(((i + sizeof(uint32_t)) <= length) && ((i + sizeof(uint32_t)) <= bufLength))
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "p32Dst will be in the valid range pDst[0 ~ bufLength] and pSrc will be in the valid range pSrc[0 ~ length].")
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_INCOMPATIBLE("This assignment never overflows because the pointer p32Dst points to pDst[i] where i <= length - 4");
*p32Dst = wordVal;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_INCOMPATIBLE();
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
p32Dst++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
i += sizeof(uint32_t);
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
pDst = (uint8_t *) p32Dst;
//loop on remaining bytes
for(; (i < length) && (i < bufLength); i++)
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "pDst will be in the valid range pDst[0 ~ bufLength].")
*pDst = val;
pDst++;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_set_loop);
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxClMemory_set,
((length <= bufLength) ? length : bufLength) - i,
MCUX_CSSL_FP_LOOP_ITERATIONS(mcuxClMemory_set_loop,
((length <= bufLength) ? length : bufLength)));
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClMemory_clear)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_clear (uint8_t *pDst, size_t length, size_t bufLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClMemory_clear, MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_set));
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_set(pDst, 0U, length, bufLength));
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxClMemory_clear);
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxClMemory_xor)
MCUX_CSSL_FP_PROTECTED_TYPE(void) mcuxClMemory_xor(uint8_t *pDst, const uint8_t *pSrc1, const uint8_t *pSrc2, uint32_t length, size_t bufLength)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxClMemory_xor);
uint32_t remainingLen = length;
if (bufLength < remainingLen)
{
remainingLen = bufLength;
}
MCUX_CSSL_FP_LOOP_DECL(mcuxClMemory_xor_loop);
/* xor by word if aligned */
MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED()
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Typecasting pointer to integer is intentional")
if ((remainingLen >= WORDSIZE) && (0u == ((uint32_t)pDst & (WORDSIZE - 1u)))
&& (0u == ((uint32_t)pSrc1 & (WORDSIZE - 1u)))
&& (0u == ((uint32_t)pSrc2 & (WORDSIZE - 1u))))
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED()
{
do
{
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_xor_loop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("pSrc1, pSrc2 and pDst are word aligned.")
const uint32_t temp1 = *(const uint32_t *)pSrc1;
const uint32_t temp2 = *(const uint32_t *)pSrc2;
*(uint32_t *)pDst = temp1 ^ temp2;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_xor_loop);
pSrc1 += WORDSIZE;
pSrc2 += WORDSIZE;
pDst += WORDSIZE;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_xor_loop);
remainingLen -= WORDSIZE;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_xor_loop);
} while (remainingLen >= WORDSIZE);
}
/* xor the remaining bytes */
while (remainingLen > 0u)
{
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Caller should set length and bufLength properly to make sure not to overflow.")
const uint8_t temp1 = *pSrc1++;
const uint8_t temp2 = *pSrc2++;
*pDst++ = temp1 ^ temp2;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
remainingLen--;
MCUX_CSSL_FP_LOOP_ITERATION(mcuxClMemory_xor_loop);
}
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxClMemory_xor,
MCUX_CSSL_FP_LOOP_ITERATIONS(mcuxClMemory_xor_loop,
((length <= bufLength) ? length : bufLength)));
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslCPreProcessor/inc/mcuxCsslAnalysis.h
+965
View File
@@ -0,0 +1,965 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2022-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef MCUX_CSSL_ANALYSIS_H_
#define MCUX_CSSL_ANALYSIS_H_
#define MCUX_CSSL_ANALYSIS_STR(a) #a
#define MCUX_CSSL_ANALYSIS_EMPTY()
#define MCUX_CSSL_ANALYSIS_DEFER(id) id MCUX_CSSL_ANALYSIS_EMPTY()
#define MCUX_CSSL_ANALYSIS_EXPAND(...) __VA_ARGS__
#define MCUX_CSSL_ANALYSIS_PRAGMA(x) _Pragma(#x)
/* Compiler defines TODO: decide proper placement for those */
#if defined ( __CC_ARM )
/* Arm Compiler 4/5 */
#define MCUX_CSSL_COMPILER_ARMCC
#define MCUX_CSSL_COMPILER_ARM_COMPILER
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
/* Arm Compiler 6.6 LTM (armclang) */
#define MCUX_CSSL_COMPILER_ARMCLANG_LTM
#define MCUX_CSSL_COMPILER_ARM_COMPILER
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
/* Arm Compiler above 6.10.1 (armclang) */
#define MCUX_CSSL_COMPILER_ARMCLANG
#define MCUX_CSSL_COMPILER_ARM_COMPILER
#elif defined (_clang_)
#define MCUX_CSSL_COMPILER_ARM_COMPILER /* i.e. Version 6.01 build 0019 */
#endif // defined ( __CC_ARM )
#if defined(__riscv) && defined(__clang__)
#define MCUX_CSSL_COMPILER_RISCV_LLVM
#endif
/* Example of common patterns, with either just predefined rationale, or a combination of discards. */
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HW_READ() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_VOLATILE("Read from a HW peripheral")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_HW_READ() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_VOLATILE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HW_WRITE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_VOLATILE("Write to a HW peripheral")
/*MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_TO_OBJECT("Write to a HW peripheral")*/
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_HW_WRITE() \
/*MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_TO_OBJECT()*/ \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_VOLATILE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_FALSE_POSITIVE_CAST_TYPES_WITH_SAME_ALIGNMENT() \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(CERT_EXP36_C, "Both types have the same alignment (32-bit)")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_FALSE_POSITIVE_CAST_TYPES_WITH_SAME_ALIGNMENT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(CERT_EXP36_C)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_0U_1U_ARE_UNSIGNED() \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_10_3, "0u and 1u are unsigned values and not boolean") \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_10_5, "0u and 1u are unsigned values and not boolean")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_0U_1U_ARE_UNSIGNED() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_10_5) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_10_3)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_EXTERNAL_API_DECLARATIONS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_DECLARED_BUT_NEVER_REFERENCED("Consumed by user, it is declared but never referenced. ")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXTERNAL_API_DECLARATIONS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DECLARED_BUT_NEVER_REFERENCED()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_DESCRIPTIVE_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_AMBIGUOUS_IDENTIFIER("Identifiers longer than 31 characters are allowed for more descriptive naming")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_DESCRIPTIVE_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_AMBIGUOUS_IDENTIFIER()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_REINTERPRET_MEMORY_OF_OPAQUE_TYPES() \
MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_VOID() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY("explicit pointer casts reinterpreting opaque types of workarea-like buffer objects are allowed.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_REINTERPRET_MEMORY_OF_OPAQUE_TYPES() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_VOID()
/* NOTE: this STOP macro doesn't match the START macro in name */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_REINTERPRET_MEMORY() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_VOID() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY()
/* Applies to casts between ctx/WA structs
* e.g. cast from Aead_Context_t to more specific type AeadModes_Context_t
*/
#define MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_TO_MORE_SPECIFIC_TYPE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY("Cast to a more specific type is allowed")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_TO_MORE_SPECIFIC_TYPE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY()
/* Applies to casts between ctx structs where the new alignment is seemingly more strict
* e.g. cast from mcuxClRandom_Context_t to more specific type mcuxClOsccaRandomModes_Context_RNG_t.
* This macro shall only be used for context structures where the memory in question is aligned on the stricter boundary.
*/
#define MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_TO_MORE_SPECIFIC_ALIGNED_TYPE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY("Cast to a more specific type is allowed") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP36_C, "Callers have the guidance to provide a 32-bit aligned context")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_TO_MORE_SPECIFIC_ALIGNED_TYPE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP36_C) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_EXTERNAL_HEADER() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_C11_EXTENSION("External header outside our control") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNDEFINED_VALUE("External header outside our control") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_RESERVED_MACRO_IDENTIFIER("External header outside our control") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_PADDED_TO_ALIGNMENT_BOUNDARY("External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_INT30_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_INT31_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_INT08_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_INT36_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_INT02_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_STR31_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(CERT_ARR30_C, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(OVERRUN, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(INTEGER_OVERFLOW, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_11_4, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_5_4, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_21_2, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_21_1, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_10_4, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_10_3, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_4_10, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_15_6, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_18_1, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_14_4, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_14_3, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_3_1, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_11_6, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_1_1, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_7_2, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_5_5, "External header outside our control") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Directive_4_10, "External header outside our control")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXTERNAL_HEADER() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Directive_4_10) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_5_5) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_7_2) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_1_1) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_11_6) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_3_1) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_14_3) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_14_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_18_1) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_15_6) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_4_10) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_10_3) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_10_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_21_1) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_21_2) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_5_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(MISRA_C_2012_Rule_11_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(INTEGER_OVERFLOW) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(OVERRUN) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_ARR30_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_STR31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_INT02_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_INT36_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_INT08_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_INT31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(CERT_INT30_C) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_PADDED_TO_ALIGNMENT_BOUNDARY() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_RESERVED_MACRO_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNDEFINED_VALUE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_C11_EXTENSION()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SFR_ACCESS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Address and offset calculations in a hardware's address range do not wrap/overflow.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY("SFRs are 32-bit aligned.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("Necessary for HW access") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Necessary for HW access")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SFR_ACCESS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HW_ACCESS() \
MCUX_CSSL_ANALYSIS_START_PATTERN_SFR_ACCESS()
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_HW_ACCESS() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SFR_ACCESS()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SYMBOL_DEFINED_MORE_THAN_ONCE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_DEFINED_MORE_THAN_ONCE("This symbol is defined only once.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SYMBOL_DEFINED_MORE_THAN_ONCE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DEFINED_MORE_THAN_ONCE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_EXTERNAL_MACRO() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("External macro outside our control, operation is safe on target platform given correct arguments according to an API are provided") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE("External macro outside our control, operation is safe on target platform given correct arguments according to an API are provided") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONVERSIONS_WITH_INAPPROPRIATE_TYPE("External macro outside our control, operation is safe on target platform given correct arguments according to an API are provided") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_EXPLICIT_PARANTHESIS("External macro outside our control, operation is safe on target platform given correct arguments according to an API are provided") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INVALID_WIDTH_IN_SHIFT_OPERATIONS("External macro outside our control, operation is safe on target platform given correct arguments according to an API are provided")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXTERNAL_MACRO() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INVALID_WIDTH_IN_SHIFT_OPERATIONS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_EXPLICIT_PARANTHESIS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONVERSIONS_WITH_INAPPROPRIATE_TYPE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_OBJ_SIZES() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNUSED_VARIABLE("Variables used to determine object sizes") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_VARIABLE_DECLARATION("Variables used to determine object sizes")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_OBJ_SIZES() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_VARIABLE_DECLARATION() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNUSED_VARIABLE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_FUP() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_VARIABLE_DECLARATION("External declarations are generated by the FUP processing tool") \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_5_8, "The FUP processing tool generates a second declaration")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_FUP() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_5_8) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_VARIABLE_DECLARATION()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_FUP_PROGRAM() \
MCUX_CSSL_ANALYSIS_START_PATTERN_EXTERNAL_LINKAGE_FUP() \
MCUX_CSSL_ANALYSIS_START_PATTERN_DEFINITION_IN_TEMP_FILE_FUP()
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_FUP_PROGRAM() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DEFINITION_IN_TEMP_FILE_FUP() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXTERNAL_LINKAGE_FUP()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_EXTERNAL_LINKAGE_FUP() \
MCUX_CSSL_ANALYSIS_START_PATTERN_DESCRIPTIVE_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_5_8, "The FUP processing tool generates a second external declaration")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXTERNAL_LINKAGE_FUP() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_5_8) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DESCRIPTIVE_IDENTIFIER()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_DEFINITION_IN_TEMP_FILE_FUP() \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_8_6, "The FUP processing tool generates definitions in temporary build files")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_DEFINITION_IN_TEMP_FILE_FUP() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_8_6)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Integer overflows are allowed/expected for security counter variables per design")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SWITCH_STATEMENT_RETURN_TERMINATION() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_SWITCH_STATEMENT_NOT_WELL_FORMED("Return instead of break statement as terminator is allowed")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SWITCH_STATEMENT_RETURN_TERMINATION() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_SWITCH_STATEMENT_NOT_WELL_FORMED()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_INVARIANT_EXPRESSION_WORKAREA_CALCULATIONS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("Invariant expression is allowed in workarea calculation macros")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_INVARIANT_EXPRESSION_WORKAREA_CALCULATIONS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_ADDRESS_IN_SFR_IS_NOT_REUSED_OUTSIDE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_ESCAPING_LOCAL_ADDRESS("Address in SFR is for internal use only and does not escape")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_ADDRESS_IN_SFR_IS_NOT_REUSED_OUTSIDE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_ESCAPING_LOCAL_ADDRESS()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_DI_INTEGER_OVERFLOW() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("Integer overflows are allowed/expected for DI variables per design")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_DI_INTEGER_OVERFLOW() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_DI_CAST_POINTERS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Typecast pointer to integer for DI record/expunge")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_DI_CAST_POINTERS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SC_CAST_POINTERS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Typecast pointer (void *) to integer for SC add/sub")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_CAST_POINTERS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_EXAMPLE_FUNCTION() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_FUNCTION_DECLARATION("Declaration is not needed for release package. Cant be static as it is declared and used by testing framweork.") \
MCUX_CSSL_ANALYSIS_START_PATTERN_DESCRIPTIVE_IDENTIFIER()
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_EXAMPLE_FUNCTION() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DESCRIPTIVE_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_FUNCTION_DECLARATION()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_RETURN_IN_SWITCH_STATEMENT() \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_1, "Return instead of break in switch statements is allowed") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_3, "Return instead of break in switch statements is allowed") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_6, "Return instead of break is allowed as conforming switch clause")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_RETURN_IN_SWITCH_STATEMENT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_6) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_3) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_1)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_VOID() \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_5, "Typecast pointer (void *) for correct representation to use pointer")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_VOID() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_5)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HW_REGISTER_INDEXING() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_OUT_OF_BOUNDS_ACCESS("Apply an index to the base address of a HW peripheral to access the correct SFR-word. The caller is responsible for ensuring that the index is valid.") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(ARRAY_VS_SINGLETON, "Apply an index to the base address of a HW peripheral to access the correct SFR-word. The caller is responsible for ensuring that the index is valid.")
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HW_REGISTER_INDEXING_WITH_OFFSETOF() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_OUT_OF_BOUNDS_ACCESS("Apply an index to the base address of a HW peripheral, where index was computed with 'offsetof' macro to ensure a correct offset.") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(ARRAY_VS_SINGLETON, "Apply an index to the base address of a HW peripheral, where index was computed with 'offsetof' macro to ensure a correct offset.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_HW_REGISTER_INDEXING() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(ARRAY_VS_SINGLETON) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OUT_OF_BOUNDS_ACCESS()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_ERROR_HANDLING_STATE() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_RETURN_CODE_NOT_CHECKED("Already in error handling state")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_ERROR_HANDLING_STATE() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_RETURN_CODE_NOT_CHECKED()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_HYPERLINK_IN_COMMENTS() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TEXT_IN_COMMENTS("Hyperlinks in comments are allowed for documentation purposes")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_HYPERLINK_IN_COMMENTS() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TEXT_IN_COMMENTS()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_NULL_POINTER_CONSTANT() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_NULL_POINTER_CONSTANT("NULL is used in code")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_NULL_POINTER_CONSTANT() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_NULL_POINTER_CONSTANT()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_STRING_NOT_MODIFIED() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_MODIFY_STRING_LITERALS("The constant string literal is not being modified")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_STRING_NOT_MODIFIED() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MODIFY_STRING_LITERALS()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION() \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(MISRA_C_2012_Rule_14_4, "Conditional expression does have a boolean type.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(MISRA_C_2012_Rule_14_4)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_FUNCTIONS_CONSUMED_BY_CUSTOMER() \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_DCL15_C, "can not make function static as it is consumed by customers.") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_DCL19_C, "can not make function static as it is consumed by customers.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_FUNCTIONS_CONSUMED_BY_CUSTOMER() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_DCL19_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_DCL15_C)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_TYPE_NAME_DOESNT_NEED_TO_BE_WRAPPED_BY_PARANTHESIS() \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_20_7, " Not wrapping a macro parameter in parentheses is allowed, if the parameter represents a type name")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_TYPE_NAME_DOESNT_NEED_TO_BE_WRAPPED_BY_PARANTHESIS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_20_7)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_IMPLICIT_CAST_FROM_CHAR() \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_3, "Implicit cast between char and uint8_t in examples is allowed for readability purposes")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_IMPLICIT_CAST_FROM_CHAR() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_3)
#if defined(MCUX_CSSL_COMPILER_ARM_COMPILER)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_TRUNCATION() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA("Truncated upper bits are not needed. Operation is implementation defined and documented in arm compiler user guide. If a value of integral type is truncated to a shorter signed integral type, the result is obtained by discarding an appropriate number of most significant bits. If the original number is too large, positive or negative, for the new type, there is no guarantee that the sign of the result is going to be the same as the original. On target ARM architecture two's complement representation is used and a sign will be derived from most significant bit of data remaining after truncation. This operation allows efficient implementation of signed numbers modular arithmetic.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_TRUNCATION() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_SHIFT() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE("Shift operation on signed numbers is implementation defined and documented in arm compiler user guide. Right shifts on signed quantities are arithmetic (sign extension is performed). Left shifs are logical. This operation allows sign extensions and efficient implementation of signed numbers arithmetic.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_SIGNED_SHIFT_AMOUNT("Shift operation on signed numbers is implementation defined and documented in arm compiler user guide. Right shifts on signed quantities are arithmetic (sign extension is performed). Left shifs are logical. This operation allows sign extensions and efficient implementation of signed numbers arithmetic.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_SHIFT() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_SIGNED_SHIFT_AMOUNT() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA("Algoritihm works correctly assuming two's complement representation of signed numbers. This is true for target ARM platform.")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA()
#elif defined(MCUX_CSSL_COMPILER_RISCV_LLVM)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_TRUNCATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_TRUNCATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_SHIFT() \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE("Shift operation on signed numbers is implementation defined and documented in RISC-V compiler user guide. Right shifts on signed quantities are arithmetic (sign extension is performed).") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_SIGNED_SHIFT_AMOUNT("Shift operation on signed numbers is implementation defined and documented in RISC-V compiler user guide. Right shifts on signed quantities are arithmetic (sign extension is performed).")
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_SHIFT() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_SIGNED_SHIFT_AMOUNT() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE()
#define MCUX_CSSL_ANALYSIS_START_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
/* Intentionally empty */
#else //defined(MCUX_CSSL_COMPILER_ARM_COMPILER) || defined(MCUX_CSSL_COMPILER_RISCV_LLVM)
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_TRUNCATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_TRUNCATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_START_PATTERN_SIGNED_SHIFT() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_SIGNED_SHIFT() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_START_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
/* Intentionally empty */
#define MCUX_CSSL_ANALYSIS_STOP_PATTERN_TWOS_COMPLEMENT_REPRESENTATION() \
/* Intentionally empty */
#endif
#define MCUX_CSSL_ANALYSIS_ASSERT_PARAMETER(value, min_value, max_value, return_code) \
MCUX_CSSL_ANALYSIS_COVERITY_ASSERT(value, min_value, max_value, return_code)
#define MCUX_CSSL_ANALYSIS_ASSERT_PARAMETER_FP_VOID(value, min_value, max_value) \
MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_FP_VOID(value, min_value, max_value)
#define MCUX_CSSL_ANALYSIS_ASSERT_PARAMETER_VOID(value, min_value, max_value) \
MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_VOID(value, min_value, max_value)
#define MCUX_CSSL_ANALYSIS_ASSERT_PARAMETER_WITH_DATA_TYPE(value,data_type, min_value, max_value, return_code) \
MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_WITH_DATA_TYPE(value, data_type, min_value, max_value, return_code)
/* Example of basic violation suppression */
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNREACHABLE_CODE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_2_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNREACHABLE_CODE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_2_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNUSED_MACRO(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_2_5, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNUSED_MACRO() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_2_5)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_TEXT_IN_COMMENTS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_3_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TEXT_IN_COMMENTS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_3_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_3, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP36_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP39_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP39_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP36_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_3)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_SIGNED_TO_UNSIGNED_MAY_RESULT_TO_MISINTERPRETED_DATA(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT02_C, rationale)\
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT31_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_SIGNED_TO_UNSIGNED_MAY_RESULT_TO_MISINTERPRETED_DATA() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT02_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT02_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT31_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT00_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_MAY_RESULT_IN_MISINTERPRETED_DATA() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT00_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT02_C) \
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_VOLATILE(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wcast-qual, rationale) \
MCUX_CSSL_ANALYSIS_GHS_START_SUPPRESS_WARNING(1836, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_8, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_VOLATILE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_8) \
MCUX_CSSL_ANALYSIS_GHS_STOP_SUPPRESS_WARNING(1836) \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wcast-qual)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONVERSION_BETWEEN_ENUM_AND_INTEGER_TYPES(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_5, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONVERSION_BETWEEN_ENUM_AND_INTEGER_TYPES() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_5)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_EXPLICIT_PARANTHESIS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_12_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_EXPLICIT_PARANTHESIS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_12_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_OUT_OF_BOUNDS_ACCESS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_18_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OUT_OF_BOUNDS_ACCESS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_18_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_NOT_ELEMENTS_OF_THE_SAME_ARRAY(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_18_2, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_NOT_ELEMENTS_OF_THE_SAME_ARRAY() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_18_2)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_CONST(rationale) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_CONST_QUALIFIER(rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_CONST() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_CONST_QUALIFIER()
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DISCARD_CONST_QUALIFIER(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wcast-qual, rationale) \
MCUX_CSSL_ANALYSIS_GHS_START_SUPPRESS_WARNING(1836, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_8, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP05_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DISCARD_CONST_QUALIFIER() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP05_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_8) \
MCUX_CSSL_ANALYSIS_GHS_STOP_SUPPRESS_WARNING(1836) \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wcast-qual)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_NULL_POINTER_CONSTANT(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_9, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_NULL_POINTER_CONSTANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_9)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY_BETWEEN_INAPT_ESSENTIAL_TYPES(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_3, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP39_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY_BETWEEN_INAPT_ESSENTIAL_TYPES() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP39_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_3)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_3, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP39_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP39_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_3)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_ARRAY_OUT_OF_BOUNDS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_STR31_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_ARR30_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_ARR31_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(OVERRUN, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_ARRAY_OUT_OF_BOUNDS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(OVERRUN) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_ARR31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_ARR30_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_STR31_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_4, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_6, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT36_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_MSC15_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_MSC15_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT36_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_6) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_4)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_INTEGER_TO_POINTER(rationale) \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER(rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_INTEGER_TO_POINTER() \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_AMBIGUOUS_IDENTIFIER(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_5_1, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_5_4, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_5_5, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_AMBIGUOUS_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_5_5) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_5_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_5_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_STRUCT(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_STRUCT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DECLARED_BUT_NEVER_DEFINED(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_8_6, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DECLARED_BUT_NEVER_DEFINED() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_8_6)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DEFINED_MORE_THAN_ONCE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_8_5, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DEFINED_MORE_THAN_ONCE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_8_5)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DEAD_CODE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_2_2, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DEAD_CODE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_2_2)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DECLARED_BUT_NEVER_REFERENCED(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_2_2, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DECLARED_BUT_NEVER_REFERENCED() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_2_2)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_FALSE_POSITIVE_INTEGER_CONVERSION_MISINTERPRETS_DATA(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(CERT_INT31_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_FALSE_POSITIVE_INTEGER_CONVERSION_MISINTERPRETS_DATA() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(CERT_INT31_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(INTEGER_OVERFLOW, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT30_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT32_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT08_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_12_4, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_12_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT08_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT32_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT30_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(INTEGER_OVERFLOW)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_WRAP(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT30_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT08_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_WRAP() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT08_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT30_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_WRAP_AND_CONVERSION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT30_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT31_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT08_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_WRAP_AND_CONVERSION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT08_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT31_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT30_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_INCOMPATIBLE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP39_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_INCOMPATIBLE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP39_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_USE_UNINITIALIZED_VALUE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP33_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(UNINIT, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_USE_UNINITIALIZED_VALUE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(UNINIT) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP33_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_DEREFERENCE_NULL_POINTER(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_EXP34_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(FORWARD_NULL, rationale) \
MCUX_CSSL_ANALYSIS_START_PATTERN_NULL_POINTER_CONSTANT()
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_DEREFERENCE_NULL_POINTER() \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_NULL_POINTER_CONSTANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(FORWARD_NULL) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_EXP34_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_SWITCH_STATEMENT_NOT_WELL_FORMED(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_1, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_3, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_16_6, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_SWITCH_STATEMENT_NOT_WELL_FORMED() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_1) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_3) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_16_6)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_14_3, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_14_3)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_ESCAPING_LOCAL_ADDRESS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_18_6, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_DCL30_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_ESCAPING_LOCAL_ADDRESS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_DCL30_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_18_6)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_C11_EXTENSION(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wc11-extensions, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_C11_EXTENSION() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wc11-extensions)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNDEFINED_VALUE(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wundef, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNDEFINED_VALUE() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wundef)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_RESERVED_IDENTIFIER(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wreserved-identifier, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_RESERVED_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wreserved-identifier)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_RESERVED_MACRO_IDENTIFIER(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wreserved-macro-identifier, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_RESERVED_MACRO_IDENTIFIER() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wreserved-macro-identifier)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_FUNCTION_DECLARATION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_8_4, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_FUNCTION_DECLARATION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_8_4)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_MISSING_VARIABLE_DECLARATION(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wmissing-variable-declarations, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_8_4, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MISSING_VARIABLE_DECLARATION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_8_4) \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wmissing-variable-declarations)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_OF_COMPOSITE_EXPRESSION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_8, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_OF_COMPOSITE_EXPRESSION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_8)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_UNUSED_VARIABLE(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wunused-variable, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_UNUSED_VARIABLE() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wunused-variable)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_PADDED_TO_ALIGNMENT_BOUNDARY(rationale) \
MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(-Wpadded, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_PADDED_TO_ALIGNMENT_BOUNDARY() \
MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(-Wpadded)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_HARDWARE_ACCESS(rationale) \
MCUX_CSSL_ANALYSIS_GCC_START_SUPPRESS_WARNING(-Warray-bounds, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_ARR37_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_HARDWARE_ACCESS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_ARR37_C) \
MCUX_CSSL_ANALYSIS_GCC_STOP_SUPPRESS_WARNING(-Warray-bounds)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_TAINTED_EXPRESSION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Directive_4_14, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(TAINTED_SCALAR, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TAINTED_EXPRESSION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(TAINTED_SCALAR) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Directive_4_14)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_INVALID_WIDTH_IN_SHIFT_OPERATIONS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Directive_12_2, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INVALID_WIDTH_IN_SHIFT_OPERATIONS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Directive_12_2)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONVERSIONS_WITH_INAPPROPRIATE_TYPE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_4, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONVERSIONS_WITH_INAPPROPRIATE_TYPE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_4)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_OPERATIONS_ON_INAPPROPRIATE_TYPE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_FLEXIBLE_ARRAY(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_18_7, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_FLEXIBLE_ARRAY() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_18_7)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_ASSIGNING_COMPOSITE_EXPRESSION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_6, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_ASSIGNING_COMPOSITE_EXPRESSION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_6)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_STDARG_USAGE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_17_1, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_STDARG_USAGE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_17_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_VA_ARGS_USAGE(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_1, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_10_4, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_20_7, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_VA_ARGS_USAGE() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_20_7) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_4) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_10_1)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_VOIDPTR_TO_FUNCTION(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_5, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_VOIDPTR_TO_FUNCTION() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_5)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONCATENATION_PREPROCESSOR(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_20_10, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONCATENATION_PREPROCESSOR() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_20_10)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_SIGNED_SHIFT_AMOUNT(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT13_C, rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT14_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_SIGNED_SHIFT_AMOUNT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT14_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT13_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_MODIFY_STRING_LITERALS(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(CERT_STR30_C, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_MODIFY_STRING_LITERALS() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(CERT_STR30_C)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_RETURN_CODE_NOT_CHECKED(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Directive_4_7, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_RETURN_CODE_NOT_CHECKED() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Directive_4_7)
#define MCUX_CSSL_ANALYSIS_START_SUPPRESS_CAST_TO_VOIDPTR(rationale) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_6, rationale)
#define MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CAST_TO_VOIDPTR() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_6)
/* Tool specific handling: Coverity checkers */
#if defined(__SECURITY_COVERITY__) || defined(__QUALITY_COVERITY__)
#define MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(checker_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance block deviate checker_identifier rationale))
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(checker_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance end_block checker_identifier))
#define MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(checker_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance block(include) deviate checker_identifier rationale))
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(checker_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance end_block(include) checker_identifier))
#define MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(checker_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance block fp checker_identifier rationale))
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(checker_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(coverity compliance end_block checker_identifier))
/**
* @brief Invalid function ID for MCUX_CSSL_FP_FUNCTION_EXIT_VOID macro
*/
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_Invalid_Function (0xFFFFu)
#else
#define MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(checker_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(checker_identifier)
#define MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE_INCLUDE_BLOCK(checker_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE_INCLUDE_BLOCK(checker_identifier)
#define MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(checker_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(checker_identifier)
#endif
#if defined(__SECURITY_COVERITY__)
/**
* @brief Coverity assert macro for flow protected void functions
*/
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_FP_VOID(value, min_value, max_value) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(NO_EFFECT, "The minimum or the maximum value may have no effect for the condition.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("The minimum or the maximum value may have no effect for the condition.") \
if(((min_value) <= (value)) && ((value) <= (max_value))) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(NO_EFFECT) \
{\
/* Do Nothing*/ \
}\
else \
{\
MCUX_CSSL_FP_FUNCTION_EXIT_VOID(mcuxCssl_Invalid_Function); \
}
/**
* @brief Coverity assert macro for void functions
*/
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_VOID(value, min_value, max_value) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(NO_EFFECT, "The minimum or the maximum value may have no effect for the condition.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("The minimum or the maximum value may have no effect for the condition.") \
if(((min_value) <= (value)) && ((value) <= (max_value))) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(NO_EFFECT) \
{\
/* Do Nothing*/ \
}\
else \
{\
return; \
}
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT(value, min_value, max_value, return_code) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(NO_EFFECT, "The minimum or the maximum value may have no effect for the condition.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("The minimum or the maximum value may have no effect for the condition.") \
if(((min_value) <= (value)) && ((value) <= (max_value))) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(NO_EFFECT) \
{\
/* Do Nothing*/ \
}\
else \
{\
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_17_4, "For void return, don't need to return a value at the end of function")\
return return_code;\
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_17_4)\
}
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_WITH_DATA_TYPE(value, data_type, min_value, max_value, return_code) \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(NO_EFFECT, "The minimum or the maximum value may have no effect for the condition.") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(CERT_INT36_C, "The minimum or the maximum value may have no effect for the condition.") \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT("This is for the case where value is unsigned and min_value is unsigned zero.") \
MCUX_CSSL_ANALYSIS_COVERITY_START_DEVIATE(MISRA_C_2012_Rule_11_4, "The minimum or the maximum value may have no effect for the condition.") \
if((((data_type)(min_value)) <= ((data_type)(value))) && (((data_type)(value)) <= ((data_type)(max_value)))) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(MISRA_C_2012_Rule_11_4) \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_CONTROLLING_EXPRESSION_IS_INVARIANT() \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(CERT_INT36_C) \
MCUX_CSSL_ANALYSIS_COVERITY_STOP_DEVIATE(NO_EFFECT) \
{\
/* Do Nothing*/ \
}\
else \
{\
return return_code;\
}
#else
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_FP_VOID(value, min_value, max_value)
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_VOID(value, min_value, max_value)
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT(value, min_value, max_value, return_code)
#define MCUX_CSSL_ANALYSIS_COVERITY_ASSERT_WITH_DATA_TYPE(value, data_type, min_value, max_value, return_code)
#endif
/* Tool specific handling: Clang warnings */
#if defined(__clang__)
#define MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(warning_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic push)) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic ignored MCUX_CSSL_ANALYSIS_STR(warning_identifier)))
#define MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(warning_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic pop))
#else
#define MCUX_CSSL_ANALYSIS_CLANG_START_SUPPRESS_WARNING(warning_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_CLANG_STOP_SUPPRESS_WARNING(warning_identifier)
#endif
/* Tool specific handling: GHS warnings */
#if defined(__ghs__)
#define MCUX_CSSL_ANALYSIS_GHS_START_SUPPRESS_WARNING(warning_identifier, rationale) \
MCUX_CSSL_ANALYSIS_PRAGMA(ghs nowarning warning_identifier)
#define MCUX_CSSL_ANALYSIS_GHS_STOP_SUPPRESS_WARNING(warning_identifier) \
MCUX_CSSL_ANALYSIS_PRAGMA(ghs endnowarning warning_identifier)
#else
#define MCUX_CSSL_ANALYSIS_GHS_START_SUPPRESS_WARNING(warning_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_GHS_STOP_SUPPRESS_WARNING(warning_identifier)
#endif
/* Tool specific handling: GCC warnings */
#if defined(__GNUC__)
#define MCUX_CSSL_ANALYSIS_GCC_START_SUPPRESS_WARNING(warning_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(GCC diagnostic push)) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(GCC diagnostic ignored MCUX_CSSL_ANALYSIS_STR(warning_identifier)))
#define MCUX_CSSL_ANALYSIS_GCC_STOP_SUPPRESS_WARNING(warning_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(GCC diagnostic pop))
#else
#define MCUX_CSSL_ANALYSIS_GCC_START_SUPPRESS_WARNING(warning_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_GCC_STOP_SUPPRESS_WARNING(warning_identifier)
#endif
/* Arm Compiler 4/5 */
#if defined(MCUX_CSSL_COMPILER_ARMCC)
#define MCUX_CSSL_ANALYSIS_ARMCC_START_SUPPRESS_WARNING(warning_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(push)) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(diag_suppress MCUX_CSSL_ANALYSIS_STR(warning_identifier)))
#define MCUX_CSSL_ANALYSIS_ARMCC_STOP_SUPPRESS_WARNING(warning_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(pop))
#else
#define MCUX_CSSL_ANALYSIS_ARMCC_START_SUPPRESS_WARNING(warning_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_ARMCC_STOP_SUPPRESS_WARNING(warning_identifier)
#endif
/* Arm Compiler 6 / Arm Compiler for Embedded 6 */
#if defined(MCUX_CSSL_COMPILER_ARMCLANG) || defined(MCUX_CSSL_COMPILER_ARMCLANG_LTM)
#define MCUX_CSSL_ANALYSIS_ARMCLANG_START_SUPPRESS_WARNING(warning_identifier, rationale) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic push)) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic ignored MCUX_CSSL_ANALYSIS_STR(warning_identifier)))
#define MCUX_CSSL_ANALYSIS_ARMCLANG_STOP_SUPPRESS_WARNING(warning_identifier) \
MCUX_CSSL_ANALYSIS_EXPAND(MCUX_CSSL_ANALYSIS_DEFER(MCUX_CSSL_ANALYSIS_PRAGMA)(clang diagnostic pop))
#else
#define MCUX_CSSL_ANALYSIS_ARMCLANG_START_SUPPRESS_WARNING(warning_identifier, rationale)
#define MCUX_CSSL_ANALYSIS_ARMCLANG_STOP_SUPPRESS_WARNING(warning_identifier)
#endif
#endif /* MCUX_CSSL_ANALYSIS_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslCPreProcessor/inc/mcuxCsslCPreProcessor.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2019-2020, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#ifndef MCUX_CSSL_C_PRE_PROCESSOR_H_
#define MCUX_CSSL_C_PRE_PROCESSOR_H_
/**
* @file mcuxCsslCPreProcessor.h
* @brief The default implementation is based on standard C preprocessor
* functionality
*/
#define MCUX_CSSL_CPP_STR(a) #a
#define MCUX_CSSL_CPP_ADD(a) + (a)
#define MCUX_CSSL_CPP_CAT_IMPL(a, b) a##b
#define MCUX_CSSL_CPP_CAT(a, b) \
MCUX_CSSL_CPP_CAT_IMPL(a, b)
#define MCUX_CSSL_CPP_CAT3(a, b, c) \
MCUX_CSSL_CPP_CAT(MCUX_CSSL_CPP_CAT(a, b), c)
#define MCUX_CSSL_CPP_CAT4(a, b, c, d) \
MCUX_CSSL_CPP_CAT(MCUX_CSSL_CPP_CAT(a, b), MCUX_CSSL_CPP_CAT(c, d))
#define MCUX_CSSL_CPP_CAT6(a, b, c, d, e, f) \
MCUX_CSSL_CPP_CAT3( \
MCUX_CSSL_CPP_CAT(a, b), \
MCUX_CSSL_CPP_CAT(c, d), \
MCUX_CSSL_CPP_CAT(e, f))
#define MCUX_CSSL_CPP_SEQUENCE_64TO0() \
64, 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, 50, 49, \
48, 47, 46, 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, 33, \
32, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, \
16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
#define MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_5TO0() \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, 5, 4, 3, 2, 1, 0
#define MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_4TO0() \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, 4, 3, 2, 1, 0
#define MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_3TO0() \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, 3, 2, 1, 0
#define MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_2TO0() \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, n, \
n, n, n, n, n, n, n, n, n, n, n, n, n, n, 2, 1, 0
#define MCUX_CSSL_CPP_ARG_N( \
_1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _11, _12, _13, _14, _15, _16, \
_17, _18, _19, _20, _21, _22, _23, _24, _25, _26, _27, _28, _29, _30, _31, _32, \
_33, _34, _35, _36, _37, _38, _39, _40, _41, _42, _43, _44, _45, _46, _47, _48, \
_49, _50, _51, _52, _53, _54, _55, _56, _57, _58, _59, _60, _61, _62, _63, _64, \
N, ...) \
N
#define MCUX_CSSL_CPP_ARGCOUNT_IMPL(...) \
MCUX_CSSL_CPP_ARG_N(__VA_ARGS__)
#define MCUX_CSSL_CPP_ARGCOUNT(...) \
MCUX_CSSL_CPP_ARGCOUNT_IMPL(__VA_ARGS__,MCUX_CSSL_CPP_SEQUENCE_64TO0())
#define MCUX_CSSL_CPP_ARGCOUNT_2N(...) \
MCUX_CSSL_CPP_ARGCOUNT_IMPL(__VA_ARGS__,MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_2TO0())
#define MCUX_CSSL_CPP_ARGCOUNT_3N(...) \
MCUX_CSSL_CPP_ARGCOUNT_IMPL(__VA_ARGS__,MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_3TO0())
#define MCUX_CSSL_CPP_ARGCOUNT_4N(...) \
MCUX_CSSL_CPP_ARGCOUNT_IMPL(__VA_ARGS__,MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_4TO0())
#define MCUX_CSSL_CPP_ARGCOUNT_5N(...) \
MCUX_CSSL_CPP_ARGCOUNT_IMPL(__VA_ARGS__,MCUX_CSSL_CPP_SEQUENCE_N_UNTIL_5TO0())
#define MCUX_CSSL_CPP_OVERLOADED_IMPL(name, n) MCUX_CSSL_CPP_CAT_IMPL(name, n)
#define MCUX_CSSL_CPP_OVERLOADED(name, ...) \
MCUX_CSSL_CPP_DEFER2(MCUX_CSSL_CPP_OVERLOADED_IMPL)()(name, MCUX_CSSL_CPP_ARGCOUNT(__VA_ARGS__))
#define MCUX_CSSL_CPP_OVERLOADED1(name, ...) \
MCUX_CSSL_CPP_IF_ELSE(MCUX_CSSL_CPP_HAS_ONE_ARG(__VA_ARGS__))( \
/* If only one arg, use the 1 version */ \
MCUX_CSSL_CPP_CAT(name,1)(MCUX_CSSL_CPP_FIRST(__VA_ARGS__, /* ensure extra argument: */ 0)) \
)( \
/* Otherwise the n version */ \
MCUX_CSSL_CPP_CAT(name,n)(__VA_ARGS__) \
)
#define MCUX_CSSL_CPP_OVERLOADED2(name, ...) \
MCUX_CSSL_CPP_OVERLOADED_IMPL(name, MCUX_CSSL_CPP_ARGCOUNT_2N(__VA_ARGS__))(__VA_ARGS__)
#define MCUX_CSSL_CPP_OVERLOADED3(name, ...) \
MCUX_CSSL_CPP_OVERLOADED_IMPL(name, MCUX_CSSL_CPP_ARGCOUNT_3N(__VA_ARGS__))(__VA_ARGS__)
#define MCUX_CSSL_CPP_OVERLOADED4(name, ...) \
MCUX_CSSL_CPP_OVERLOADED_IMPL(name, MCUX_CSSL_CPP_ARGCOUNT_4N(__VA_ARGS__))(__VA_ARGS__)
#define MCUX_CSSL_CPP_OVERLOADED5(name, ...) \
MCUX_CSSL_CPP_OVERLOADED_IMPL(name, MCUX_CSSL_CPP_ARGCOUNT_5N(__VA_ARGS__))(__VA_ARGS__)
/*****************************************************************************
* Helper macros *
*****************************************************************************/
/* Apply a macro to all arguments */
#define MCUX_CSSL_CPP_MAP(__macro, ...) \
MCUX_CSSL_CPP_EVAL(MCUX_CSSL_CPP_MAP_IMPL(__macro, __VA_ARGS__))
/* Evaluate a complex macro (which needs multiple expansions to be processed) */
#define MCUX_CSSL_CPP_EVAL(...) MCUX_CSSL_CPP_EVAL1024(__VA_ARGS__)
#define MCUX_CSSL_CPP_EVAL1024(...) MCUX_CSSL_CPP_EVAL512(MCUX_CSSL_CPP_EVAL512(__VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL512(...) MCUX_CSSL_CPP_EVAL256(MCUX_CSSL_CPP_EVAL256(__VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL256(...) MCUX_CSSL_CPP_EVAL128(MCUX_CSSL_CPP_EVAL128(__VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL128(...) MCUX_CSSL_CPP_EVAL64( MCUX_CSSL_CPP_EVAL64( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL64(...) MCUX_CSSL_CPP_EVAL32( MCUX_CSSL_CPP_EVAL32( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL32(...) MCUX_CSSL_CPP_EVAL16( MCUX_CSSL_CPP_EVAL16( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL16(...) MCUX_CSSL_CPP_EVAL8( MCUX_CSSL_CPP_EVAL8( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL8(...) MCUX_CSSL_CPP_EVAL4( MCUX_CSSL_CPP_EVAL4( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL4(...) MCUX_CSSL_CPP_EVAL2( MCUX_CSSL_CPP_EVAL2( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL2(...) MCUX_CSSL_CPP_EVAL1( MCUX_CSSL_CPP_EVAL1( __VA_ARGS__))
#define MCUX_CSSL_CPP_EVAL1(...) __VA_ARGS__
/* Recursive definition of map macro, assumes at least one argument */
#define MCUX_CSSL_CPP_MAP_IMPL(__macro, ...) \
/* Apply the macro to the first argument from the list */\
__macro(MCUX_CSSL_CPP_FIRST(__VA_ARGS__, /* ensure second argument: */ 0)) \
/* Only proceed if there are additional arguments */\
MCUX_CSSL_CPP_IF(MCUX_CSSL_CPP_HAS_MORE_ARGS(__VA_ARGS__))( \
/* Recursive call for remaining arguments */\
MCUX_CSSL_CPP_DEFER2(MCUX_CSSL_CPP_MAP_IMPL_)()(__macro, \
MCUX_CSSL_CPP_NEXT(__VA_ARGS__)) \
)
#define MCUX_CSSL_CPP_MAP_IMPL_() MCUX_CSSL_CPP_MAP_IMPL
/* Extract first argument (requires at least two arguments to be present) */
#define MCUX_CSSL_CPP_FIRST(a, ...) a
/* Extract second argument (requires at least three arguments to be present) */
#define MCUX_CSSL_CPP_SECOND(a, b, ...) b
/* Extract third argument (requires at least four arguments to be present) */
#define MCUX_CSSL_CPP_THIRD(a, b, c, ...) c
/* Extract fourth argument (requires at least five arguments to be present) */
#define MCUX_CSSL_CPP_FOURTH(a, b, c, d, ...) d
/* Remove the first argument from the list (requires at least two arguments to be present) */
#define MCUX_CSSL_CPP_NEXT(...) MCUX_CSSL_CPP_NEXT_()(__VA_ARGS__)
#define MCUX_CSSL_CPP_NEXT_() MCUX_CSSL_CPP_NEXT__
#define MCUX_CSSL_CPP_NEXT__(x, ...) __VA_ARGS__
/* Check whether there is more then one argument */
#define MCUX_CSSL_CPP_HAS_MORE_ARGS(...) \
MCUX_CSSL_CPP_NOT(MCUX_CSSL_CPP_IS_MARKER(MCUX_CSSL_CPP_SECOND(__VA_ARGS__, MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER())))
#define MCUX_CSSL_CPP_HAS_ONE_ARG(...) \
MCUX_CSSL_CPP_IS_MARKER(MCUX_CSSL_CPP_SECOND(__VA_ARGS__, MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER()))
#define MCUX_CSSL_CPP_HAS_TWO_ARGS(...) \
MCUX_CSSL_CPP_IS_MARKER(MCUX_CSSL_CPP_THIRD(__VA_ARGS__, MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER()))
#define MCUX_CSSL_CPP_HAS_THREE_ARGS(...) \
MCUX_CSSL_CPP_IS_MARKER(MCUX_CSSL_CPP_FOURTH(__VA_ARGS__, MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER(), MCUX_CSSL_CPP_MARKER()))
/* Check whether the argument is MCUX_CSSL_CPP_MARKER(), return 1 if it is */
#define MCUX_CSSL_CPP_IS_MARKER(...) \
MCUX_CSSL_CPP_SECOND(__VA_ARGS__, 0, 0)
#define MCUX_CSSL_CPP_MARKER() \
~, 1
/* Convert any argument into a bool (either 0 or 1), by double negation */
#define MCUX_CSSL_CPP_BOOL(x) MCUX_CSSL_CPP_NOT(MCUX_CSSL_CPP_NOT(x))
/* Boolean negation (map value 0 to the marker, and check if we have the marker) */
#define MCUX_CSSL_CPP_NOT(x) MCUX_CSSL_CPP_IS_MARKER(MCUX_CSSL_CPP_CAT(MCUX_CSSL_CPP_NOT_BOOL_, x))
#define MCUX_CSSL_CPP_NOT_BOOL_0 MCUX_CSSL_CPP_MARKER()
/* Convert condition to bool */
#define MCUX_CSSL_CPP_IF(condition) MCUX_CSSL_CPP_IF_(MCUX_CSSL_CPP_BOOL(condition))
/* Convert bool to decision defines */
#define MCUX_CSSL_CPP_IF_(condition) MCUX_CSSL_CPP_CAT(MCUX_CSSL_CPP_IF_BOOL_, condition)
/* If 0, do nothing*/
#define MCUX_CSSL_CPP_IF_BOOL_0(...)
/* If 1, perform action */
#define MCUX_CSSL_CPP_IF_BOOL_1(...) __VA_ARGS__
/* Convert condition to bool */
#define MCUX_CSSL_CPP_IF_ELSE(condition) MCUX_CSSL_CPP_IF_ELSE_IMPL(MCUX_CSSL_CPP_BOOL(condition))
/* Convert bool to decision defines */
#define MCUX_CSSL_CPP_IF_ELSE_IMPL(condition) MCUX_CSSL_CPP_CAT(MCUX_CSSL_CPP_IFE_BOOL_, condition)
/* If 0, ignore action */
#define MCUX_CSSL_CPP_IFE_BOOL_0(...) MCUX_CSSL_CPP_IFE_BOOL_0_ELSE
/* Else 0, perform action */
#define MCUX_CSSL_CPP_IFE_BOOL_0_ELSE(...) __VA_ARGS__
/* If 1, perform action */
#define MCUX_CSSL_CPP_IFE_BOOL_1(...) __VA_ARGS__ MCUX_CSSL_CPP_IFE_BOOL_1_ELSE
/* Else 1, ignore action */
#define MCUX_CSSL_CPP_IFE_BOOL_1_ELSE(...)
/* Defer macro expansion */
#define MCUX_CSSL_CPP_EMPTY()
#define MCUX_CSSL_CPP_DEFER1(macro) macro MCUX_CSSL_CPP_EMPTY()
#define MCUX_CSSL_CPP_DEFER2(macro) macro MCUX_CSSL_CPP_EMPTY MCUX_CSSL_CPP_EMPTY()()
#endif /* MCUX_CSSL_C_PRE_PROCESSOR_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslDataIntegrity/inc/mcuxCsslDataIntegrity.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslDataIntegrity.h
* @brief Provides the API for the CSSL data integrity mechanism.
*/
#ifndef MCUXCSSLDATAINTEGRITY_H_
#define MCUXCSSLDATAINTEGRITY_H_
/* Include the Secure Counter definitions */
#include <mcuxCsslSecureCounter.h>
/* Include the actual implementation of the data integrity mechanism. */
#include <mcuxCsslDataIntegrity_Impl.h>
/**
* @addtogroup mcuxCsslAPI MCUX CSSL -- API
*
* @defgroup mcuxCsslDataIntegrity Data Integrity API
* @brief Data integrity mechanism.
* @ingroup mcuxCsslAPI
*/
/**
* @defgroup diCore Data integrity core functionality
* @brief Data integrity handling core functionality.
* @ingroup mcuxCsslDataIntegrity
*/
/****************************************************************************/
/* Constants */
/****************************************************************************/
/**
* @def MCUX_CSSL_DI_CHECK_PASSED
* @brief Positive comparison result value.
* @api
* @ingroup diCore
*/
#define MCUX_CSSL_DI_CHECK_PASSED \
MCUX_CSSL_DI_CHECK_PASSED_IMPL
/**
* @def MCUX_CSSL_DI_CHECK_FAILED
* @brief Negative comparison result value.
* @api
* @ingroup diCore
*/
#define MCUX_CSSL_DI_CHECK_FAILED \
MCUX_CSSL_DI_CHECK_FAILED_IMPL
/****************************************************************************/
/* Initialization */
/****************************************************************************/
/**
* @def MCUX_CSSL_DI_INIT
* @brief Backup of the current data integrity value, that will be checked later
* on with MCUX_CSSL_SC_CHECK.
* Note that in case the Security Counter back-end requires allocation, it
* is expected that this will be handled by the Flow Protection mechanism
* before the initialization of the Data Integrity.
* @api
* @ingroup diCore
*
* @param backupValue Fresh variable name to store the current DI value.
*/
#define MCUX_CSSL_DI_INIT(backupValue) \
MCUX_CSSL_DI_INIT_IMPL(backupValue)
/****************************************************************************/
/* Check */
/****************************************************************************/
/**
* @def MCUX_CSSL_DI_CHECK
* @brief Comparison operation for the data integrity.
* @api
* @ingroup diCore
*
* @param reference Reference initial value to compare the data integrity value against.
* @return Either #MCUX_CSSL_DI_CHECK_PASSED, if the value matches, or
* #MCUX_CSSL_DI_CHECK_FAILED if the value is different.
*/
#define MCUX_CSSL_DI_CHECK(reference) \
MCUX_CSSL_DI_CHECK_IMPL(reference)
/**
* @def MCUX_CSSL_DI_CHECK_EXIT
* @brief Comparison operation for the data integrity.
* It compares the data integrity value to reference initial value,
* and exits with the given fault status code if the comparison fails.
* The reference value shall be the initial value that was backed up
* with MCUX_CSSL_DI_INIT.
* If the comparison succeeds, the normal execution will continue.
* @api
* @ingroup diCore
*
* @param id Identifier of the function from which we will exit.
* @param reference Reference initial value to compare the data integrity value against.
* @param fail Result that should be returned if the data integrity check failed.
*/
#define MCUX_CSSL_DI_CHECK_EXIT(id, reference, fail) \
MCUX_CSSL_DI_CHECK_EXIT_IMPL(id, reference, fail)
/****************************************************************************/
/* Updates */
/****************************************************************************/
/**
* @defgroup diUpdate Data integrity record
* @brief Support for recording a value in the data integrity register
* @ingroup mcuxCsslDataIntegrity
*/
/**
* @def MCUX_CSSL_DI_RECORD
* @brief Record the @p value for data integrity checking.
* @api
* @ingroup diUpdate
*
* @param identifier Identifier for the @p value that will be recorded.
* @param value Value which needs to be recorded for the given @p identifier.
*/
#define MCUX_CSSL_DI_RECORD(identifier, value) \
MCUX_CSSL_DI_RECORD_IMPL(identifier, value)
/**
* @def MCUX_CSSL_DI_EXPUNGE
* @brief Expunge the record for @p value.
* @api
* @ingroup diUpdate
*
* @param identifier Identifier for the @p value that will be expunged.
* @param value Expected value that was recorded for the given @p identifier.
*/
#define MCUX_CSSL_DI_EXPUNGE(identifier, value) \
MCUX_CSSL_DI_EXPUNGE_IMPL(identifier, value)
#endif /* MCUXCSSLDATAINTEGRITY_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslDataIntegrity/inc/mcuxCsslDataIntegrity_Cfg.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslDataIntegrity_Cfg.h
* \brief Configuration of the implementation for the data integrity mechanism.
*/
#ifndef MCUXCSSLDATAINTEGRITY_CFG_H_
#define MCUXCSSLDATAINTEGRITY_CFG_H_
/**
* \addtogroup mcuxCsslCFG MCUX CSSL -- Configurations
*
* \defgroup mcuxCsslDataIntegrity_CFG Data Integrity Configuration
* \brief Configuration options for the data integrity mechanism.
* \ingroup mcuxCsslCFG
*/
/**
* \def MCUX_CSSL_DI_USE_SECURE_COUNTER
* \brief If set to 1, use the data integrity mechanism implementation based on
* the CSSL secure counter mechanism.
* \ingroup mcuxCsslDataIntegrity_CFG
*/
#define MCUX_CSSL_DI_USE_SECURE_COUNTER 0
/**
* \def MCUX_CSSL_DI_USE_NONE
* \brief If set to 1, do not use the data integrity mechanism.
* \ingroup mcuxCsslDataIntegrity_CFG
*/
#define MCUX_CSSL_DI_USE_NONE 1
/* Basic configuration sanity check */
#endif /* MCUXCSSLDATAINTEGRITY_CFG_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslDataIntegrity/inc/mcuxCsslDataIntegrity_Impl.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslDataIntegrity_Impl.h
* \brief Selection of the implementation for the data integrity mechanism.
*/
#ifndef MCUXCSSLDATAINTEGRITY_IMPL_H_
#define MCUXCSSLDATAINTEGRITY_IMPL_H_
/* Include the configuration for the data integrity mechanism. */
#include <mcuxCsslDataIntegrity_Cfg.h>
/* Include the selected implementation of the data integrity mechanism. */
#if defined(MCUX_CSSL_DI_USE_SECURE_COUNTER) && (1 == MCUX_CSSL_DI_USE_SECURE_COUNTER)
# include <mcuxCsslDataIntegrity_SecureCounter.h>
#elif defined(MCUX_CSSL_DI_USE_NONE) && (1 == MCUX_CSSL_DI_USE_NONE)
# include <mcuxCsslDataIntegrity_None.h>
#else
#error "No data integrity implementation found/configured."
#endif
#endif /* MCUXCSSLDATAINTEGRITY_IMPL_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslDataIntegrity/inc/mcuxCsslDataIntegrity_None.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslDataIntegrity_None.h
* \brief Implementation that disables the CSSL data integrity mechanism.
*/
#ifndef MCUXCSSLDATAINTEGRITY_NONE_H_
#define MCUXCSSLDATAINTEGRITY_NONE_H_
/**
* \addtogroup mcuxCsslIMPL MCUX CSSL -- Implementations
*
* \defgroup mcuxCsslDataIntegrity_None Data Integrity: Disabled
* \brief Disable the data integrity mechanism.
* \ingroup mcuxCsslIMPL
*/
/**
* \defgroup diNoneCore Data integrity core functionality
* \brief Data integrity handling core functionality, when data integrity is disabled.
* \ingroup mcuxCsslDataIntegrity_None
*/
/****************************************************************************/
/* Constants */
/****************************************************************************/
/**
* \def MCUX_CSSL_DI_CHECK_PASSED_IMPL
* \brief Positive comparison result value.
* \ingroup diNoneCore
*/
#define MCUX_CSSL_DI_CHECK_PASSED_IMPL (MCUX_CSSL_SC_CHECK_PASSED)
/**
* \def MCUX_CSSL_DI_CHECK_FAILED_IMPL
* \brief Negative comparison result value.
* \ingroup diNoneCore
*/
#define MCUX_CSSL_DI_CHECK_FAILED_IMPL (MCUX_CSSL_SC_CHECK_FAILED)
/****************************************************************************/
/* Initialization */
/****************************************************************************/
/**
* \def MCUX_CSSL_DI_INIT_IMPL
* \brief Initialize the backup of the data integrity value to zero.
* \ingroup diNoneCore
*
* @param backupValue Fresh variable name to store the current DI value.
*/
#define MCUX_CSSL_DI_INIT_IMPL(backupValue) \
uint32_t backupValue = 0u
/****************************************************************************/
/* Check */
/****************************************************************************/
/**
* \def MCUX_CSSL_DI_CHECK_IMPL
* \brief Comparison operation implementation for the data integrity.
* \ingroup diNoneCore
*
* \param reference Reference initial value to compare the data integrity value against (ignored).
* \return Always #MCUX_CSSL_DI_CHECK_PASSED.
*/
#define MCUX_CSSL_DI_CHECK_IMPL(reference) \
(MCUX_CSSL_DI_CHECK_PASSED_IMPL)
/**
* \def MCUX_CSSL_DI_CHECK_EXIT_IMPL
* \brief Comparison operation implementation for the data integrity.
* It has no impact on the normal execution of the calling function.
* \ingroup diNoneCore
*
* \param id Identifier of the function from which we will exit (ignored).
* \param reference Reference initial value to compare the data integrity value against.
* \param fail Result that should be returned if the data integrity check failed (ignored).
*/
#define MCUX_CSSL_DI_CHECK_EXIT_IMPL(id, reference, fail) \
(void)(reference)
/****************************************************************************/
/* Updates */
/****************************************************************************/
/**
* \defgroup diNoneUpdate Data integrity record
* \brief Support for recording a value in the data integrity register, when data integrity is disabled.
* \ingroup mcuxCsslDataIntegrity_None
*/
/**
* \def MCUX_CSSL_DI_RECORD_IMPL
* \brief Implementation: Record the value for data integrity checking.
* \ingroup diNoneUpdate
*
* \param identifier Identifier for the value that will be recorded.
* \param value Value which needs to be recorded for the given identifier.
*/
#define MCUX_CSSL_DI_RECORD_IMPL(identifier, value) \
MCUX_CSSL_ANALYSIS_START_PATTERN_DI_CAST_POINTERS() \
(void)(value) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DI_CAST_POINTERS()
/**
* \def MCUX_CSSL_DI_EXPUNGE_IMPL
* \brief Implementation: Expunge the record for value.
* \ingroup diNoneUpdate
*
* \param identifier Identifier for the value that will be expunged.
* \param value Expected value that was recorded for the given identifier.
*/
#define MCUX_CSSL_DI_EXPUNGE_IMPL(identifier, value) \
MCUX_CSSL_ANALYSIS_START_PATTERN_DI_CAST_POINTERS() \
(void)(value) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_DI_CAST_POINTERS()
#endif /* MCUXCSSLDATAINTEGRITY_NONE_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslFlowProtection_Cfg.h
* \brief Configuration of the implementation for the flow protection mechanism.
*/
#ifndef MCUX_CSSL_FLOW_PROTECTION_CFG_H_
#define MCUX_CSSL_FLOW_PROTECTION_CFG_H_
/**
* \addtogroup mcuxCsslCFG MCUX CSSL -- Configurations
*
* \defgroup mcuxCsslFlowProtection_CFG Flow Protection Configuration
* \brief Configuration options for the flow protection mechanism.
* \ingroup mcuxCsslCFG
*/
/**
* \def MCUX_CSSL_FP_USE_CODE_SIGNATURE
* \brief If set to 1, use the flow protection mechanism implementation based on
* the Zen-V code signature HW mechanism.
* \ingroup mcuxCsslFlowProtection_CFG
*/
#define MCUX_CSSL_FP_USE_CODE_SIGNATURE 0
/**
* \def MCUX_CSSL_FP_USE_SECURE_COUNTER
* \brief If set to 1, use the flow protection mechanism implementation based on
* the CSSL secure counter mechanism.
* \ingroup mcuxCsslFlowProtection_CFG
*/
#define MCUX_CSSL_FP_USE_SECURE_COUNTER 1
/**
* \def MCUX_CSSL_FP_USE_NONE
* \brief If set to 1, do not use the flow protection mechanism.
* \ingroup mcuxCsslFlowProtection_CFG
*/
#define MCUX_CSSL_FP_USE_NONE 0
/* Basic configuration sanity check */
#endif /* MCUX_CSSL_FLOW_PROTECTION_CFG_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslFlowProtection/inc/mcuxCsslFlowProtection_FunctionIdentifiers.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslFlowProtection_FunctionIdentifiers.h
* @brief Definition of function identifiers for the flow protection mechanism.
*
* @note This file might be post-processed to update the identifier values to
* proper/secure values.
*/
#ifndef MCUX_CSSL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_
#define MCUX_CSSL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_
/* Flow Protection example values: */
#define MCUX_CSSL_FP_FUNCID_functionOnly0 (0x50DDu)
#define MCUX_CSSL_FP_FUNCID_functionOnly1 (0x5595u)
#define MCUX_CSSL_FP_FUNCID_functionOnly2 (0x6B52u)
#define MCUX_CSSL_FP_FUNCID_functionCall (0x50BBu)
#define MCUX_CSSL_FP_FUNCID_functionCalls (0x4E71u)
#define MCUX_CSSL_FP_FUNCID_functionLoop (0x4AF2u)
#define MCUX_CSSL_FP_FUNCID_functionBranch (0x0D3Bu)
#define MCUX_CSSL_FP_FUNCID_functionSwitch (0x22AFu)
#define MCUX_CSSL_FP_FUNCID_functionComplex (0x781Bu)
#define MCUX_CSSL_FP_FUNCID_data_invariant_memory_compare (0x562Bu)
#define MCUX_CSSL_FP_FUNCID_data_invariant_memory_copy (0x4AA7u)
#define MCUX_CSSL_FP_FUNCID_functionAssert (0x21DEu)
/* Values for production use: */
#define MCUX_CSSL_FP_FUNCID_mcuxCsslParamIntegrity_Validate (0x1AA7u)
#define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Compare (0x696Cu)
#define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Copy (0x7D21u)
#define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Clear (0x42D7u)
#define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Set (0x44F9u)
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureClear (0x29BCu) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureCopy (0x27AAu) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureSet (0x5B58u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureCompare (0x79C2u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_DPASecureCompare (0x5AF0u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_DPASecComp (0x629Du) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_CopyPow2 (0x53C3u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_CopyWords (0x3761u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_SecCopyPow2 (0x4A5Du) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_SecComp (0x187Eu) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_SecClear (0x2C3Bu) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_Int_SecSet (0x6655u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureXOR (0x3366u) // No longer used
// #define MCUX_CSSL_FP_FUNCID_mcuxCsslMemory_SecureXORWithConst (0x4A97u) // No longer used
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_14 (0x17C5u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_15 (0x1E8Eu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_16 (0x26A7u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_17 (0x14F9u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_18 (0x43E9u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_19 (0x533Cu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_20 (0x2EC5u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_21 (0x7D44u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_22 (0x2AE3u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_23 (0x7274u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_24 (0x7CE0u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_25 (0x4DC5u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_26 (0x3E94u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_27 (0x75A4u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_28 (0x35E4u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_29 (0x63F0u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_30 (0x62BAu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_31 (0x7549u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_32 (0x77C0u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_33 (0x662Eu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_34 (0x521Fu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_35 (0x6671u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_36 (0x711Du)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_37 (0x684Fu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_38 (0x52EAu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_39 (0x1EACu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_40 (0x4D66u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_41 (0x4557u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_42 (0x25F2u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_43 (0x278Bu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_44 (0x3C55u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_45 (0x1796u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_46 (0x6732u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_47 (0x67D0u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_48 (0x5627u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_49 (0x6AB1u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_50 (0x5927u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_51 (0x51CEu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_52 (0x7585u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_53 (0x78B1u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_54 (0x0B5Du)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_55 (0x6A87u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_56 (0x19ABu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_57 (0x57C1u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_58 (0x589Du)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_59 (0x61E3u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_60 (0x0D2Fu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_61 (0x5B1Cu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_62 (0x3CD4u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_63 (0x0C6Fu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_64 (0x21BDu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_65 (0x1D9Cu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_66 (0x5674u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_67 (0x60DDu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_68 (0x78AAu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_69 (0x0F36u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_70 (0x6B2Au)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_71 (0x2D63u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_72 (0x2F16u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_73 (0x4F1Cu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_74 (0x5B83u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_75 (0x7833u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_76 (0x3B26u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_77 (0x34DCu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_78 (0x6E46u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_79 (0x6F21u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_80 (0x2937u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_81 (0x1BE2u)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_82 (0x2A9Bu)
#define MCUX_CSSL_FP_FUNCID_mcuxCssl_unused_83 (0x78A3u)
#endif /* MCUX_CSSL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslFlowProtection/inc/mcuxCsslFlowProtection_Impl.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslFlowProtection_Impl.h
* \brief Selection of the implementation for the flow protection mechanism.
*/
#ifndef MCUX_CSSL_FLOW_PROTECTION_IMPL_H_
#define MCUX_CSSL_FLOW_PROTECTION_IMPL_H_
/* Include the configuration for the flow protection mechanism. */
#include <mcuxCsslFlowProtection_Cfg.h>
/* Include the selected implementation of the flow protection mechanism. */
#if defined(MCUX_CSSL_FP_USE_CODE_SIGNATURE) && (1 == MCUX_CSSL_FP_USE_CODE_SIGNATURE)
# include <mcuxCsslFlowProtection_CodeSignature.h>
#elif defined(MCUX_CSSL_FP_USE_SECURE_COUNTER) \
&& (1 == MCUX_CSSL_FP_USE_SECURE_COUNTER)
# include <mcuxCsslSecureCounter_Cfg.h>
# include <mcuxCsslFlowProtection_SecureCounter_Common.h>
# if defined(MCUX_CSSL_SC_USE_SW_LOCAL) && (1 == MCUX_CSSL_SC_USE_SW_LOCAL)
# include <mcuxCsslFlowProtection_SecureCounter_Local.h>
# else
# include <mcuxCsslFlowProtection_SecureCounter_Global.h>
# endif
#elif defined(MCUX_CSSL_FP_USE_NONE) && (1 == MCUX_CSSL_FP_USE_NONE)
# include <mcuxCsslFlowProtection_None.h>
#else
#error "No flow protection implementation found/configured."
#endif
#endif /* MCUX_CSSL_FLOW_PROTECTION_IMPL_H_ */
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* \file mcuxCsslFlowProtection_SecureCounter_Local.h
* \brief Counter based implementation for the flow protection mechanism, for a local security counter.
*/
#ifndef MCUX_CSSL_FLOW_PROTECTION_SECURE_COUNTER_LOCAL_H_
#define MCUX_CSSL_FLOW_PROTECTION_SECURE_COUNTER_LOCAL_H_
/* Include the CSSL C pre-processor support functionality. */
#include <mcuxCsslCPreProcessor.h>
/* Include the CSSL secure counter mechanism as basic building block. */
#include <mcuxCsslSecureCounter.h>
/* Include the C99 standard integer types. */
#include <stdint.h>
/* Include standard boolean types */
#include <stdbool.h>
/**
* \def MCUX_CSSL_FP_PROTECTED_TYPE_IMPL
* \brief Based on a given base type, builds a return type with flow
* protection.
* \ingroup csslFpCntFunction
*
* \see MCUX_CSSL_FP_FUNCTION_DEF_IMPL
*
* \param resultType The type to be converted into a protected type.
*/
#define MCUX_CSSL_FP_PROTECTED_TYPE_IMPL(resultType) \
uint64_t
/**
* \def MCUX_CSSL_FP_FUNCTION_ENTRY_IMPLn
* \brief Flow protection handler implementation for the function entry point.
* \ingroup csslFpCntFunction
*
* Initialize the counter with the entry part of the function identifier, and
* include expectations in the initialization value.
*
* \see MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL
*
* \param id Identifier of the function that has just been entered.
* \param expect One or more (comma separated) declarations of expected code
* flow behavior.
*/
#define MCUX_CSSL_FP_FUNCTION_ENTRY_IMPLn(function, ...) \
MCUX_CSSL_SC_INIT( \
MCUX_CSSL_FP_FUNCTION_ID_ENTRY_PART(function) \
- (MCUX_CSSL_FP_EXPECTATIONS(__VA_ARGS__)) \
)
/**
* \def MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL1
* \brief Flow protection handler implementation for the function entry point.
* \ingroup csslFpCntFunction
*
* Initialize the counter with the entry part of the function identifier,
* without any potential expectations.
*
* \see MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL
*
* \param id Identifier of the function that has just been entered.
*/
#define MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL1(function) \
MCUX_CSSL_FP_FUNCTION_ENTRY_IMPLn(function, 0u)
/**
* \def MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL
* \brief Flow protection handler implementation for the function entry point.
* \ingroup csslFpCntFunction
*
* Initialize the counter with entry part of the function identifier, and
* include potential expectations in the initialization value.
*
* Implemented as an overloaded macro to simplify the use of the API.
*
* \see MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL1
* \see MCUX_CSSL_FP_FUNCTION_ENTRY_IMPLn
*
* \param id Identifier of the function that has just been entered.
* \param expect Zero or more (comma separated) declarations of expected code
* flow behavior.
*/
#define MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL(...) \
MCUX_CSSL_CPP_OVERLOADED1(MCUX_CSSL_FP_FUNCTION_ENTRY_IMPL, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn
* \brief Flow protection handler implementation for the function exit point.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, and
* include potential expectations in the adjustment value. Return the counter
* value together with the \p result via the function return value.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPL
*
* \param id Identifier of the function from which we will exit.
* \param result Result that should be encoded in the return value.
* \param expect One or more (comma separated) declarations of expected code
* flow behavior.
* \return A value in which both \p result and a flow protection token
* are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn(id, result, ...) \
MCUX_CSSL_SC_ADD( \
MCUX_CSSL_FP_FUNCTION_ID_EXIT_PART(id) \
- MCUX_CSSL_FP_EXPECTATIONS(__VA_ARGS__) \
); \
return (MCUX_CSSL_FP_RESULT_VALUE(result) \
| MCUX_CSSL_FP_PROTECTION_TOKEN_VALUE(MCUX_CSSL_FP_COUNTER_COMPRESSED()))
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_IMPL1
* \brief Flow protection handler implementation for the function exit point.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, without
* any potential expectations in the adjustment value. Return the counter value
* via the function return value.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPL
*
* \param id Identifier of the function from which we will exit.
* \return A value in which a flow protection token is encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_IMPL1(id) \
MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn(id, 0u, 0u)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_IMPL2
* \brief Flow protection handler implementation for the function exit point.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, without
* any potential expectations in the adjustment value. Return the counter value
* together with the \p result via the function return value.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPL
*
* \param id Identifier of the function from which we will exit.
* \param result Result that should be encoded in the return value.
* \return A value in which both \p result and a flow protection token
* are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_IMPL2(id, result) \
MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn(id, result, 0u)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_IMPL
* \brief Flow protection handler implementation for the function exit point.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, and
* include potential expectations in the adjustment value. Return the counter
* value together with the \p result via the function return value.
*
* Implemented as an overloaded macro to simplify the use of the API.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPL1
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPL2
* \see MCUX_CSSL_FP_FUNCTION_EXIT_IMPLn
*
* \param id Identifier of the function from which we will exit.
* \param result Result that should be encoded in the return value.
* \param expect Zero or more (comma separated) declarations of expected code
* flow behavior.
* \return A value in which both \p result and a flow protection token
* are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_IMPL(...) \
MCUX_CSSL_CPP_OVERLOADED2(MCUX_CSSL_FP_FUNCTION_EXIT_IMPL, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn
* \brief Flow protection handler implementation for the function exit point
* which includes an actual check of the code flow.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, and
* include potential expectations in the adjustment value. Check whether the
* counter matches the expected value, and choose the result from \p pass and
* \p fail and return it together with the counter value via the function
* return value.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL3
* \see MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn
*
* \param id Identifier of the function from which we will exit.
* \param pass Result that should be encoded in the return value if the flow
* protection check passed.
* \param fail Result that should be encoded in the return value if the flow
* protection check failed.
* \param expect One or more (comma separated) declarations of expected code
* flow behavior.
* \return A value in which both the result (either \p pass or \p fail)
* and a flow protection token are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn(id, pass, fail, ...) \
MCUX_CSSL_SC_ADD( \
MCUX_CSSL_FP_FUNCTION_ID_EXIT_PART(id) \
- MCUX_CSSL_FP_EXPECTATIONS(__VA_ARGS__) \
); \
return (MCUX_CSSL_FP_RESULT_VALUE( \
(MCUX_CSSL_SC_CHECK_PASSED == \
MCUX_CSSL_SC_CHECK(MCUX_CSSL_FP_FUNCTION_VALUE(id))) \
? pass : fail) \
| MCUX_CSSL_FP_PROTECTION_TOKEN_VALUE(MCUX_CSSL_FP_COUNTER_COMPRESSED()))
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL3
* \brief Flow protection handler implementation for the function exit point
* which includes an actual check of the code flow.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier. Check
* whether the counter matches the expected value, and choose the result from
* \p pass and \p fail and return it together with the counter value via the
* function return value.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL
*
* \param id Identifier of the function from which we will exit.
* \param pass Result that should be encoded in the return value if the flow
* protection check passed.
* \param fail Result that should be encoded in the return value if the flow
* protection check failed.
* \return A value in which both the result (either \p pass or \p fail)
* and a flow protection token are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL3(id, pass, fail) \
MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn(id, pass, fail, 0u)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL
* \brief Flow protection handler implementation for the function exit point
* which includes an actual check of the code flow.
* \ingroup csslFpCntFunction
*
* Adjust the counter with the exit part of the function identifier, and
* include potential expectations in the adjustment value. Check whether the
* counter matches the expected value, and choose the result from \p pass and
* \p fail and return it together with the counter value via the function
* return value.
*
* Implemented as an overloaded macro to simplify the use of the API.
*
* \see MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL3
* \see MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPLn
*
* \param id Identifier of the function from which we will exit.
* \param pass Result that should be encoded in the return value if the flow
* protection check passed.
* \param fail Result that should be encoded in the return value if the flow
* protection check failed.
* \param expect Zero or more (comma separated) declarations of expected code
* flow behavior.
* \return A value in which both the result (either \p pass or \p fail)
* and a flow protection token are encoded.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL(...) \
MCUX_CSSL_CPP_OVERLOADED3(MCUX_CSSL_FP_FUNCTION_EXIT_WITH_CHECK_IMPL, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL1
* \brief Flow protection handler for the exit point of functions with the
* return type \c void.
* \ingroup csslFpCntFunction
*
* \param id Identifier of the function from which we will exit.
* \return A protected return value of type void.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL1(id) \
MCUX_CSSL_FP_FUNCTION_EXIT_IMPL(id, 0U)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL2
* \brief Flow protection handler for the exit point of functions with the
* return type \c void.
* \ingroup csslFpCntFunction
*
* \param id Identifier of the function from which we will exit.
* \param expect One or more (comma separated) declarations of expected code
* flow behavior.
* \return A protected return value of type void.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPLn(id, ...) \
MCUX_CSSL_FP_FUNCTION_EXIT_IMPL(id, 0U, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL
* \brief Flow protection handler for the exit point of functions with the
* return type \c void.
* \ingroup csslFpCntFunction
*
* \param id Identifier of the function from which we will exit.
* \param expect Zero or more (comma separated) declarations of expected code
* flow behavior.
* \return A protected return value of type void.
*/
#define MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL(...) \
MCUX_CSSL_CPP_OVERLOADED1(MCUX_CSSL_FP_FUNCTION_EXIT_VOID_IMPL, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_IMPL3
* \brief Event implementation of a flow protected function call.
* \ingroup csslFpCntFunction
*
* \param type Type of the \p result variable.
* \param result Fresh variable name to store the result of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_IMPL3(type, result, call) \
const uint64_t MCUX_CSSL_CPP_CAT(result, _protected) = (call); \
MCUX_CSSL_SC_ADD_ON_CALL( \
MCUX_CSSL_FP_PROTECTION_TOKEN(MCUX_CSSL_CPP_CAT(result, _protected))); \
type const result = MCUX_CSSL_FP_RESULT(type, \
MCUX_CSSL_CPP_CAT(result, _protected))
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_IMPL2
* \brief Event implementation of a flow protected function call.
* \ingroup csslFpCntFunction
*
* \param result Fresh variable name to store the result of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_IMPL2(result, call) \
MCUX_CSSL_FP_FUNCTION_CALL_IMPL3(uint32_t, result, call)
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_IMPL
* \brief Event implementation of a flow protected function call.
* \ingroup csslFpCntFunction
*
* \declaration{MCUX_CSSL_FP_FUNCTION_DECL_IMPL}
* \expectation{MCUX_CSSL_FP_FUNCTION_CALLED_IMPL}
*
* \param type Optional, type of the \p result variable.
* \param result Fresh variable name to store the result of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_IMPL(...) \
MCUX_CSSL_CPP_OVERLOADED3(MCUX_CSSL_FP_FUNCTION_CALL_IMPL, __VA_ARGS__)
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_VOID_IMPL
* \brief Event implementation of a flow protected void function call.
* \ingroup csslFpCntFunction
*
* \declaration{MCUX_CSSL_FP_FUNCTION_DECL_IMPL}
* \expectation{MCUX_CSSL_FP_FUNCTION_CALLED_IMPL}
*
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_VOID_IMPL(call) \
{ \
const uint64_t MCUX_CSSL_CPP_CAT(result, _protected) = (call); \
MCUX_CSSL_SC_ADD_ON_CALL( \
MCUX_CSSL_FP_PROTECTION_TOKEN(MCUX_CSSL_CPP_CAT(result, _protected))); \
}
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_PROTECTED_IMPL
* \brief Implementation of a flow protected function call meant to be used
* from within an unprotected function
* \ingroup csslFpCntFunction
*
*
* \param result Fresh variable name to store the result of \p call.
* \param token Fresh variable name to store the protection token of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_PROTECTED_IMPL(result, token, call) \
const uint64_t MCUX_CSSL_CPP_CAT(result, _protected) = (call); \
const uint32_t token = MCUX_CSSL_FP_PROTECTION_TOKEN( \
MCUX_CSSL_CPP_CAT(result, _protected)); \
const uint32_t result = MCUX_CSSL_FP_RESULT( \
MCUX_CSSL_CPP_CAT(result, _protected))
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_VOID_PROTECTED_IMPL
* \brief Implementation of a flow protected void function call meant to be
* used from within an unprotected function
* \ingroup csslFpCntFunction
*
*
* \param token Fresh variable name to store the protection token of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_VOID_PROTECTED_IMPL(token, call) \
const uint64_t MCUX_CSSL_CPP_CAT(token, _protected) = (call); \
const uint32_t token = MCUX_CSSL_FP_PROTECTION_TOKEN( \
MCUX_CSSL_CPP_CAT(token, _protected));
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_BEGIN_IMPL
* \brief Implementation of a flow protected function call meant to be used
* from within an unprotected function, that must be terminated by
* #MCUX_CSSL_FP_FUNCTION_CALL_END_IMPL.
* \ingroup csslFpCntFunction
*
*
* \param result Fresh variable name to store the result of \p call.
* \param token Fresh variable name to store the protection token of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_BEGIN_IMPL(result, token, call) \
do \
{ \
MCUX_CSSL_FP_FUNCTION_CALL_PROTECTED_IMPL(result, token, call)
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_END_IMPL
* \brief Implementation of the end of a section started by
* #MCUX_CSSL_FP_FUNCTION_CALL_BEGIN_IMPL.
* \ingroup csslFpCntFunction
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_END_IMPL() \
MCUX_CSSL_ANALYSIS_START_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION() \
} while (false) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION()
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_VOID_BEGIN_IMPL
* \brief Implementation of a flow protected void function call meant to be used
* from within an unprotected function, that must be terminated by
* #MCUX_CSSL_FP_FUNCTION_CALL_VOID_END_IMPL.
* \ingroup csslFpCntFunction
*
*
* \param token Fresh variable name to store the protection token of \p call.
* \param call The (protected) function call that must be performed.
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_VOID_BEGIN_IMPL(token, call) \
do \
{ \
MCUX_CSSL_FP_FUNCTION_CALL_VOID_PROTECTED_IMPL(token, call)
/**
* \def MCUX_CSSL_FP_FUNCTION_CALL_VOID_END_IMPL
* \brief Implementation of the end of a section started by
* #MCUX_CSSL_FP_FUNCTION_CALL_VOID_BEGIN_IMPL.
* \ingroup csslFpCntFunction
*/
#define MCUX_CSSL_FP_FUNCTION_CALL_VOID_END_IMPL() \
MCUX_CSSL_ANALYSIS_START_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION() \
} while (false) \
MCUX_CSSL_ANALYSIS_STOP_PATTERN_BOOLEAN_TYPE_FOR_CONDITIONAL_EXPRESSION()
/**
* @def MCUX_CSSL_FP_ASSERT_IMPL
* @brief Assert an expected state of the code flow.
* @api
* @ingroup csslFpCntExpect
*
* This macro can be used to check whether the code flow up to this point
* matches the expected state. Unlike the #MCUX_CSSL_FP_EXPECT macro, it will
* not update the expectations, but merely perform a check on the recorded
* events against the already recorded expectations plus the ones provided as
* parameters.
*
* If the check fails, the code defined in MCUX_CSSL_FP_ASSERT_CALLBACK will be
* executed.
*
* \see MCUX_CSSL_FP_EXPECTATIONS
*
* \param expect One or more (comma separated) declarations of expected code
* flow behavior.
*/
#define MCUX_CSSL_FP_ASSERT_IMPL(...) \
if (MCUX_CSSL_SC_CHECK_PASSED != \
MCUX_CSSL_SC_CHECK(MCUX_CSSL_FP_EXPECTATIONS(__VA_ARGS__))) \
{ \
MCUX_CSSL_FP_ASSERT_CALLBACK(); \
} \
else if (MCUX_CSSL_SC_CHECK_PASSED != \
MCUX_CSSL_SC_CHECK(MCUX_CSSL_FP_EXPECTATIONS(__VA_ARGS__))) \
{ \
MCUX_CSSL_FP_ASSERT_CALLBACK(); \
} \
else {/*empty*/}
#endif /* MCUX_CSSL_FLOW_PROTECTION_SECURE_COUNTER_LOCAL_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/internal/mcuxCsslMemory_Internal_Compare_asm.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2022 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Internal_Compare_asm.h
* @brief Internal header of mcuxCsslMemory_Compare inline-asm macro
*/
#ifndef MCUXCSSLMEMORY_INTERNAL_COMPARE_ASM_H_
#define MCUXCSSLMEMORY_INTERNAL_COMPARE_ASM_H_
#include <stdint.h>
#include <stdbool.h>
#if defined(__ghs__) || defined( __ICCARM__ ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || (defined(__GNUC__) && defined(__arm__))
#define MCUXCSSLMEMORY_COMPARE_ASM_COMPARISON(retval_, cur_lhs_, cur_rhs_, nwords_, cnt_, notValid_, result_) \
do{ \
uint32_t dat_lhs, dat_rhs; \
__asm volatile ( \
"EOR %[_retval], %[_result], %[_notValid]\n" /* retval should now be 0xFFFFFFFF */\
"LSRS %[_nwords], %[_cnt], #2\n" \
"CMP %[_nwords], #0\n" \
"BGT mcuxCsslMemory_Compare_word_loop\n" \
"BEQ mcuxCsslMemory_Compare_word_loop_end\n" \
"B mcuxCsslMemory_Compare_fault\n" \
"mcuxCsslMemory_Compare_word_loop:\n" \
"LDR %[_dat_lhs], [%[_cur_lhs]], #+4\n" \
"LDR %[_dat_rhs], [%[_cur_rhs]], #+4\n" \
"SUBS %[_cnt], %[_cnt], #+4\n" \
"EORS %[_dat_lhs], %[_dat_lhs], %[_dat_rhs]\n" \
"BICS %[_retval], %[_retval], %[_dat_lhs]\n" \
"SUBS %[_nwords], %[_nwords], #+1\n" \
"MVN %[_dat_rhs], %[_dat_lhs]\n" \
"AND %[_retval], %[_retval], %[_dat_rhs]\n" \
"BNE mcuxCsslMemory_Compare_word_loop\n" \
"mcuxCsslMemory_Compare_word_loop_end:\n" \
"MOVS %[_dat_lhs], #0\n" \
"MOVS %[_dat_rhs], #0\n" \
"CMP %[_cnt], #0\n" \
"BGT mcuxCsslMemory_Compare_byte_loop\n" \
"BEQ mcuxCsslMemory_Compare_fault\n" \
"mcuxCsslMemory_Compare_byte_loop:\n" \
"LDRB %[_dat_lhs], [%[_cur_lhs]], #+1\n" \
"LDRB %[_dat_rhs], [%[_cur_rhs]], #+1\n" \
"EORS %[_dat_lhs], %[_dat_lhs], %[_dat_rhs]\n" \
"BICS %[_retval], %[_retval], %[_dat_lhs]\n" \
"SUBS %[_cnt], %[_cnt], #+1\n" \
"MVN %[_dat_rhs], %[_dat_lhs]\n" \
"AND %[_retval], %[_retval], %[_dat_rhs]\n" \
"BNE mcuxCsslMemory_Compare_byte_loop\n" \
"mcuxCsslMemory_Compare_fault:\n" \
: [_retval] "=r" (retval_), \
[_cur_lhs] "+r" (cur_lhs_), \
[_cur_rhs] "+r" (cur_rhs_), \
[_cnt] "+r" (cnt_), \
[_nwords] "+r" (nwords_), \
[_dat_lhs] "=r" (dat_lhs), \
[_dat_rhs] "=r" (dat_rhs) \
: [_notValid] "r" (notValid_), \
[_result] "r" (result_) \
); \
(void)dat_lhs; \
(void)dat_rhs; \
(void)cnt_; \
(void)notValid_; \
}while(false)
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
#define MCUXCSSLMEMORY_COMPARE_ASM_COMPARISON(retval_, cur_lhs_, cur_rhs_, nwords_, cnt_, notValid_, result_) \
do{ \
uint32_t dat_lhs, dat_rhs; \
__asm { \
EOR retval_, result_, notValid_; \
LSRS nwords_, cnt_, 2; \
CMP nwords_, 0; \
BGT mcuxCsslMemory_Compare_word_loop; \
BEQ mcuxCsslMemory_Compare_word_loop_end; \
B mcuxCsslMemory_Compare_fault; \
mcuxCsslMemory_Compare_word_loop: \
LDR dat_lhs, [cur_lhs_], +4; \
LDR dat_rhs, [cur_rhs_], +4; \
SUBS cnt_, cnt_, 4; \
EORS dat_lhs, dat_lhs, dat_rhs; \
BICS retval_, retval_, dat_lhs; \
SUBS nwords_, nwords_, 1; \
MVN dat_rhs, dat_lhs; \
AND retval_, retval_, dat_rhs; \
BNE mcuxCsslMemory_Compare_word_loop; \
mcuxCsslMemory_Compare_word_loop_end: \
MOVS dat_lhs, 0; \
MOVS dat_rhs, 0; \
CMP cnt_, 0; \
BGT mcuxCsslMemory_Compare_byte_loop; \
BEQ mcuxCsslMemory_Compare_fault; \
mcuxCsslMemory_Compare_byte_loop: \
LDRB dat_lhs, [cur_lhs_], +1; \
LDRB dat_rhs, [cur_rhs_], +1; \
EORS dat_lhs, dat_lhs, dat_rhs; \
BICS retval_, retval_, dat_lhs; \
SUBS cnt_, cnt_, 1; \
MVN dat_rhs, dat_lhs; \
AND retval_, retval_, dat_rhs; \
BNE mcuxCsslMemory_Compare_byte_loop; \
mcuxCsslMemory_Compare_fault: \
} \
(void)dat_lhs; \
(void)dat_rhs; \
(void)cnt_; \
(void)notValid_; \
}while(false)
#else
#error Unsupported compiler. The above section must be manually adapted to support your compiler inline assembly syntax.
#endif
/* If the binary representation of retval contains a zero,
* this sequence of instructions will turn retval to zero completely.
* If retval is 0xFFFFFFFF, it will remain untouched.
*/
#if defined(__ghs__) || defined( __ICCARM__ ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) || (defined(__GNUC__) && defined(__arm__))
#define MCUXCSSLMEMORY_COMPARE_ASM_CALC_RETVAL(retval_, errCode_) \
do{ \
__asm volatile ( \
"and %[_retval], %[_retval], %[_retval], ror #1\n" \
"and %[_retval], %[_retval], %[_retval], ror #2\n" \
"and %[_retval], %[_retval], %[_retval], ror #4\n" \
"and %[_retval], %[_retval], %[_retval], ror #8\n" \
"and %[_retval], %[_retval], %[_retval], ror #16\n" \
"eor %[_retval], %[_retval], %[_errCode]\n" \
: [_retval] "+r" (retval_) \
: [_errCode] "r" (errCode_) \
); \
(void)errCode_; \
}while(false)
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
#define MCUXCSSLMEMORY_COMPARE_ASM_CALC_RETVAL(retval_, errCode_) \
do{ \
__asm { \
AND retval_, retval_, retval_, ror 1; \
AND retval_, retval_, retval_, ror 2; \
AND retval_, retval_, retval_, ror 4; \
AND retval_, retval_, retval_, ror 8; \
AND retval_, retval_, retval_, ror 16; \
EOR retval_, retval_, errCode_; \
} \
(void)errCode_; \
}while(false)
#else
#error Unsupported compiler. The above section must be manually adapted to support your compiler inline assembly syntax.
#endif
#endif /* MCUXCSSLMEMORY_INTERNAL_COMPARE_ASM_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/internal/mcuxCsslMemory_Internal_Copy_asm.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Internal_Copy_asm.h
* @brief Internal header of mcuxCsslMemory_Copy inline-asm macro
*/
#ifndef MCUXCSSLMEMORY_INTERNAL_COPY_ASM_H_
#define MCUXCSSLMEMORY_INTERNAL_COPY_ASM_H_
#if defined( __ICCARM__ ) || (defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
#define MCUXCSSLMEMORY_COPY_ASM(word, byte, cha, chb, xorword, retval, datareg, src, dst, nwords, cnt, success) \
do{ \
__asm ( \
"MOV %[_word], #0\n" \
"MOV %[_datareg], #0\n" \
"MOV %[_xorword], #0\n" \
"CMP %[_word], %[_nwords]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"BGE mcuxCsslMemory_Copy_word_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_word_loop:\n" \
"LDR %[_datareg], [%[_src], %[_word], LSL #2]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
"STR %[_datareg], [%[_dst], %[_word], LSL #2]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_word], %[_word], #+1\n" \
"EORS %[_xorword], %[_xorword], %[_word]\n" \
"CMP %[_word], %[_nwords]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"mcuxCsslMemory_Copy_word_loop_end:\n" \
"LSLS %[_byte], %[_word], #2\n" \
"MOV %[_datareg], #0\n" \
"CMP %[_byte], %[_nbytes]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"BGE mcuxCsslMemory_Copy_byte_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_byte_loop:\n" \
"LDRB %[_datareg], [%[_src], %[_byte]]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
"STRB %[_datareg], [%[_dst], %[_byte]]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_byte], %[_byte], #+1\n" \
"CMP %[_byte], %[_nbytes]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"mcuxCsslMemory_Copy_byte_loop_end:\n" \
"MOV %[_datareg], #0\n" \
"EORS %[_retval], %[_retval], %[_success]\n" \
"mcuxCsslMemory_Copy_fault:\n" \
: [_word] "+&r" (word) \
, [_byte] "+&r" (byte) \
, [_cha] "+&r" (cha) \
, [_chb] "+&r" (chb) \
, [_xorword] "+&r" (xorword) \
, [_retval] "+r" (retval) \
, [_datareg] "+&r" (datareg) \
: [_src] "r" (src) \
, [_dst] "r" (dst) \
, [_nwords] "r" (nwords) \
, [_nbytes] "r" (cnt) \
, [_success] "r" (success) \
: "cc", "memory" \
); \
(void)datareg; \
(void)success; \
}while(false)
#elif defined (__ghs__)
#define MCUXCSSLMEMORY_COPY_ASM(word, byte, cha, chb, xorword, retval, datareg, src, dst, nwords, cnt, success) \
do{ \
/* GHS compiler can only handle 10 registers for the usecase of this inline asm block. */ \
/* Store retval and success in registers of word and datareg. */ \
(word) = (retval); \
(datareg) = (success); \
__asm ( \
/* store retval and success on stack. */ \
"SUB sp, #8\n" \
"STR %[_word], [sp, #0]\n" \
"STR %[_datareg], [sp, #4]\n" \
/* original asm macro. */ \
"MOV %[_word], #0\n" \
"MOV %[_datareg], #0\n" \
"MOV %[_xorword], #0\n" \
"CMP %[_word], %[_nwords]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"BGE mcuxCsslMemory_Copy_word_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_word_loop:\n" \
"LDR %[_datareg], [%[_src], %[_word], LSL #2]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
"STR %[_datareg], [%[_dst], %[_word], LSL #2]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_word], %[_word], #+1\n" \
"EORS %[_xorword], %[_xorword], %[_word]\n" \
"CMP %[_word], %[_nwords]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"mcuxCsslMemory_Copy_word_loop_end:\n" \
"LSLS %[_byte], %[_word], #2\n" \
"MOV %[_datareg], #0\n" \
"CMP %[_byte], %[_nbytes]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"BGE mcuxCsslMemory_Copy_byte_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_byte_loop:\n" \
"LDRB %[_datareg], [%[_src], %[_byte]]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
"STRB %[_datareg], [%[_dst], %[_byte]]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_byte], %[_byte], #+1\n" \
"CMP %[_byte], %[_nbytes]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"mcuxCsslMemory_Copy_byte_loop_end:\n" \
/* load retval and success from stack. */ \
"LDR %[_datareg], [sp, #0]\n" \
/* use byte as temp. */ \
"STR %[_byte], [sp, #0]\n" \
"LDR %[_byte], [sp, #4]\n" \
/* set datareg = retval ^ success, instead of datareg = 0 in the original design. */ \
"EORS %[_datareg], %[_datareg], %[_byte]\n" \
"LDR %[_byte], [sp, #0]\n" \
"mcuxCsslMemory_Copy_fault:\n" \
"ADD sp, #8\n" \
: [_word] "+&r" (word) \
, [_byte] "+&r" (byte) \
, [_cha] "+&r" (cha) \
, [_chb] "+&r" (chb) \
, [_xorword] "+&r" (xorword) \
, [_datareg] "+&r" (datareg) \
: [_src] "r" (src) \
, [_dst] "r" (dst) \
, [_nwords] "r" (nwords) \
, [_nbytes] "r" (cnt) \
: "cc", "memory" \
); \
(retval) = (datareg); \
}while(false)
#elif (defined (__GNUC__) && defined(__arm__))
#define MCUXCSSLMEMORY_COPY_SUCCESS_IMPL ((uint32_t)MCUXCSSLMEMORY_STATUS_OK ^ (uint32_t)MCUXCSSLMEMORY_STATUS_FAULT)
#define MCUXCSSLMEMORY_COPY_DST_STACK_OFFSET (0)
#define MCUXCSSLMEMORY_COPY_SRC_STACK_OFFSET (4)
#define MCUXCSSLMEMORY_COPY_RETVAL_STACK_OFFSET (8)
#define MCUXCSSLMEMORY_COPY_CNT_STACK_OFFSET (12)
#define MCUXCSSLMEMORY_COPY_ASM(word, byte, cha, chb, xorword, retval, datareg, src, dst, nwords, cnt, success) \
do{ \
/* [DESIGN]
* GNU compiler can only handle 7 registers for the usecase of this inline asm block, when building with optimization level 0.
* Thus, 5 registers need to be saved compared to the original asm macro.
* success is a constant, so it is defined as an immediatte instead of an input register.
* 4 registers can be used as temporary registers to push data to the stack: store retval, cnt, src, dst in registers of word, datareg, xorword, byte. */ \
uint32_t nwords_cnt = (nwords); \
(word) = (retval); \
(datareg) = (cnt); \
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Typecast needed for specialized assembly routine") \
(xorword) = (uint32_t)(src); \
(byte) = (uint32_t)(dst); \
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER() \
__asm ( \
/* [DESIGN] store retval, success, src, dst on stack. */ \
"SUB sp, #16\n" \
"STR %[_word], [sp, %[_RETVAL_OFFSET]]\n" \
"STR %[_datareg], [sp, %[_CNT_OFFSET]]\n" \
"STR %[_byte], [sp, %[_DST_OFFSET]]\n" \
"STR %[_xorword], [sp, %[_SRC_OFFSET]]\n" \
/* [DESIGN] original asm macro. */ \
"MOV %[_word], #0\n" \
"MOV %[_datareg], #0\n" \
"MOV %[_xorword], #0\n" \
"CMP %[_word], %[_nwords_cnt]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"BGE mcuxCsslMemory_Copy_word_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_word_loop:\n" \
/* [DESIGN] get src from the stack, _datareg is used as a temporary register */ \
"LDR %[_datareg], [sp, %[_SRC_OFFSET]]\n" \
"LDR %[_datareg], [%[_datareg], %[_word], LSL #2]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
/* [DESIGN] _byte already contains the value of dst */ \
"STR %[_datareg], [%[_byte], %[_word], LSL #2]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_word], %[_word], #+1\n" \
"EORS %[_xorword], %[_xorword], %[_word]\n" \
"CMP %[_word], %[_nwords_cnt]\n" \
"BLT mcuxCsslMemory_Copy_word_loop\n" \
"mcuxCsslMemory_Copy_word_loop_end:\n" \
"LSLS %[_byte], %[_word], #2\n" \
"MOV %[_datareg], #0\n" \
"LDR %[_nwords_cnt], [sp, %[_CNT_OFFSET]]\n" \
/* [DESIGN] store word to the stack, at the offset of cnt which is not needed on stack anymore */ \
"STR %[_word], [sp, %[_CNT_OFFSET]]\n" \
/* [DESIGN] get dst from the stack, _word is used as a temporary register */ \
"LDR %[_word], [sp, %[_DST_OFFSET]]\n" \
"CMP %[_byte], %[_nwords_cnt]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"BGE mcuxCsslMemory_Copy_byte_loop_end\n" \
"B mcuxCsslMemory_Copy_fault\n" \
"mcuxCsslMemory_Copy_byte_loop:\n" \
/* [DESIGN] get src from the stack, _datareg is used as a temporary register */ \
"LDR %[_datareg], [sp, %[_SRC_OFFSET]]\n" \
"LDRB %[_datareg], [%[_datareg], %[_byte]]\n" \
"EORS %[_cha], %[_cha], %[_datareg]\n" \
/* [DESIGN] _word already contains the value of dst */ \
"STRB %[_datareg], [%[_word], %[_byte]]\n" \
"EORS %[_chb], %[_chb], %[_datareg]\n" \
"ADDS %[_byte], %[_byte], #+1\n" \
"CMP %[_byte], %[_nwords_cnt]\n" \
"BLT mcuxCsslMemory_Copy_byte_loop\n" \
"mcuxCsslMemory_Copy_byte_loop_end:\n" \
/* [DESIGN] load retval from stack. */ \
"LDR %[_datareg], [sp, %[_RETVAL_OFFSET]]\n" \
/* [DESIGN] use _byte as temp. */ \
"STR %[_byte], [sp, %[_RETVAL_OFFSET]]\n" \
"LDR %[_byte], =%[_SUCCESS]\n" \
/* [DESIGN] set datareg = retval ^ success, instead of datareg = 0 in the original design. */ \
"EORS %[_datareg], %[_datareg], %[_byte]\n" \
"LDR %[_byte], [sp, %[_RETVAL_OFFSET]]\n" \
"LDR %[_word], [sp, %[_CNT_OFFSET]]\n" \
"mcuxCsslMemory_Copy_fault:\n" \
"ADD sp, #16\n" \
: [_word] "+&r" (word) \
, [_byte] "+&r" (byte) \
, [_cha] "+&r" (cha) \
, [_chb] "+&r" (chb) \
, [_xorword] "+&r" (xorword) \
, [_datareg] "+&r" (datareg) \
, [_nwords_cnt] "+&r" (nwords_cnt) \
: [_SUCCESS] "i" MCUXCSSLMEMORY_COPY_SUCCESS_IMPL \
, [_DST_OFFSET] "i" MCUXCSSLMEMORY_COPY_DST_STACK_OFFSET \
, [_SRC_OFFSET] "i" MCUXCSSLMEMORY_COPY_SRC_STACK_OFFSET \
, [_RETVAL_OFFSET] "i" MCUXCSSLMEMORY_COPY_RETVAL_STACK_OFFSET \
, [_CNT_OFFSET] "i" MCUXCSSLMEMORY_COPY_CNT_STACK_OFFSET \
: "cc", "memory" \
); \
(retval) = (datareg); \
(void) success; \
}while(false)
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION < 6010050)
#define MCUXCSSLMEMORY_COPY_ASM(word, byte, cha, chb, xorword, retval, datareg, src, dst, nwords, cnt, success) \
do{ \
__asm { \
MOV word, 0; \
MOV datareg, 0; \
MOV xorword, 0; \
CMP word, nwords; \
BLT mcuxCsslMemory_Copy_word_loop; \
BGE mcuxCsslMemory_Copy_word_loop_end; \
B mcuxCsslMemory_Copy_fault; \
mcuxCsslMemory_Copy_word_loop: \
LDR datareg, [src, word, LSL 2]; \
EORS cha, cha, datareg; \
STR datareg, [dst, word, LSL 2]; \
EORS chb, chb, datareg; \
ADDS word, word, +1; \
EORS xorword, xorword, word; \
CMP word, nwords; \
BLT mcuxCsslMemory_Copy_word_loop; \
mcuxCsslMemory_Copy_word_loop_end: \
LSLS byte, word, 2; \
MOV datareg, 0; \
CMP byte, cnt; \
BLT mcuxCsslMemory_Copy_byte_loop; \
BGE mcuxCsslMemory_Copy_byte_loop_end; \
B mcuxCsslMemory_Copy_fault; \
mcuxCsslMemory_Copy_byte_loop: \
LDRB datareg, [src, byte]; \
EORS cha, cha, datareg; \
STRB datareg, [dst, byte]; \
EORS chb, chb, datareg; \
ADDS byte, byte, +1; \
CMP byte, cnt; \
BLT mcuxCsslMemory_Copy_byte_loop; \
mcuxCsslMemory_Copy_byte_loop_end: \
MOV datareg, 0; \
EORS retval, retval, success; \
mcuxCsslMemory_Copy_fault: \
} \
(void)datareg; \
(void)success; \
}while(false)
#else
#error Unsupported compiler. The above section must be manually adapted to support your compiler inline assembly syntax.
#endif /* Compiler selection */
#endif /* MCUXCSSLMEMORY_INTERNAL_COPY_ASM_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory.h
* @brief Top-level include file for the CSSL memory functions
*/
#ifndef MCUXCSSLMEMORY_H
#define MCUXCSSLMEMORY_H
/**
* @defgroup mcuxCsslMemory mcuxCssl Memory API
* @brief Control Flow Protected Memory Functions
*
* @ingroup mcuxCsslAPI
*/
#include <mcuxCsslMemory_Constants.h>
#include <mcuxCsslMemory_Types.h>
#include <mcuxCsslMemory_Compare.h>
#include <mcuxCsslMemory_Clear.h>
#include <mcuxCsslMemory_Copy.h>
#include <mcuxCsslMemory_Set.h>
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Clear.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Clear.h
* @brief header file of memory clear function
*/
#ifndef MCUXCSSLMEMORY_CLEAR_H_
#define MCUXCSSLMEMORY_CLEAR_H_
#include <stdint.h>
#include <stddef.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslParamIntegrity.h>
/**
* @defgroup mcuxCsslMemory_Clear mcuxCssl Memory Clear
* @brief Control Flow Protected Memory Clear Function
*
* @ingroup mcuxCsslMemory
* @{
*/
/**
* @defgroup mcuxCsslMemory_Clear_Functions mcuxCsslMemory_Clear Function Definitions
* @brief mcuxCsslMemory_Clear Function Definitions
*
* @ingroup mcuxCsslMemory_Clear
* @{
*/
/**
* @brief Clear @p length bytes of data at @p pDst
*
* The implementation is secure in the following aspects:
* Parameter integrity protection: the function returns immediately in case of an incorrect parameter checksum.
* Code flow protection: the function call is protected.
* Buffer overflow protection: no data is written to @p pDst beyond @p dstLength bytes.
*
* @param[in] chk The parameter checksum, generated with #mcuxCsslParamIntegrity_Protect.
* @param[in] pDst The destination pointer to buffer to be cleared. Must not be NULL.
* @param[in] dstLength The size of the destination data buffer in bytes.
* @param[in] length The number of bytes to clear.
*
* @return A status code encapsulated in a flow-protection type.
* @retval #MCUXCSSLMEMORY_STATUS_OK If the contents in buffer at @p pDst is cleared.
* @retval #MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER If one of the parameters is invalid.
* @retval #MCUXCSSLMEMORY_STATUS_FAULT If a fault was detected, included invalid checksum @p chk.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslMemory_Clear)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Clear
(
mcuxCsslParamIntegrity_Checksum_t chk,
void * pDst,
size_t dstLength,
size_t length
);
/**
* @}
*/
/**
* @}
*/
#endif /* MCUXCSSLMEMORY_CLEAR_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Compare.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Compare.h
* @brief Include file for constant time memory compare function
*/
#ifndef MCUXCSSLMEMORY_COMPARE_H
#define MCUXCSSLMEMORY_COMPARE_H
#include <stdint.h>
#include <mcuxCsslParamIntegrity.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
/**
* @defgroup mcuxCsslMemory_Compare mcuxCssl Memory Compare
* @brief Control Flow Protected Memory Compare Function
*
* @ingroup mcuxCsslMemory
* @{
*/
/**
* @defgroup mcuxCsslMemory_Compare_Functions mcuxCsslMemory_Compare Function Definitions
* @brief mcuxCsslMemory_Compare Function Definitions
*
* @ingroup mcuxCsslMemory_Compare
* @{
*/
/**
* @brief Compares the two memory regions @p lhs and @p rhs
*
* The implementation is secure in the following aspects:
*
* * Constant execution time: The execution sequence of the code is always identical for equal @p length parameters,
* i.e. no branches are performed based on the data in @p pLhs or @p pRhs.
* * Parameter integrity protection: An incorrect parameter checksum makes the function return immediately.
* * Code flow protection: The function call is protected. Additionally, the result depends on all steps of the calculation.
*
* @param chk The parameter checksum, generated with #mcuxCsslParamIntegrity_Protect.
* @param pLhs The left-hand side data to compare. Must not be NULL.
* @param pRhs The right-hand side data to compare. Must not be NULL.
* @param length The number of bytes to compare.
* @return A status code encapsulated in a flow-protection type.
* @retval #MCUXCSSLMEMORY_STATUS_EQUAL If the contents of @p lhs and @p rhs are equal or if @p length is zero.
* @retval #MCUXCSSLMEMORY_STATUS_NOT_EQUAL If the contents of @p lhs and @p rhs are not equal.
* @retval #MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER If one of the parameters was invalid (i.e. @p lhs or @p rhs was NULL).
* @retval #MCUXCSSLMEMORY_STATUS_FAULT If a fault was detected.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslMemory_Compare)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Compare
(
mcuxCsslParamIntegrity_Checksum_t chk,
void const * pLhs,
void const * pRhs,
size_t length
);
/**
* @}
*/
/**
* @}
*/
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Constants.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Constants.h
* @brief Constants definitions for the mcuxCsslMemory component
*/
#ifndef MCUXCSSLMEMORY_CONSTANTS_H
#define MCUXCSSLMEMORY_CONSTANTS_H
#include <stdint.h>
#include <mcuxCsslMemory_Types.h>
/**********************************************
* CONSTANTS
**********************************************/
/**
* @brief CSSL Memory Component mask value.
*/
#define MCUXCSSLMEMORY_COMPONENT_MASK 0x04240000u ///< Component mask value
/**
* @defgroup MCUXCSSLMEMORY_STATUS_ MCUXCSSLMEMORY_STATUS_
* @brief Defines valid mcuxCsslMemory function return codes
* @ingroup mcuxCsslMemory_Constants
* @{
*/
#define MCUXCSSLMEMORY_STATUS_OK ((mcuxCsslMemory_Status_t) 0x04242E03u) ///< The operation was successful
#define MCUXCSSLMEMORY_STATUS_EQUAL ((mcuxCsslMemory_Status_t) 0x04242E47u) ///< The two contents of the Memory Compare are equal
#define MCUXCSSLMEMORY_STATUS_NOT_EQUAL ((mcuxCsslMemory_Status_t) 0x042489B8u) ///< The two contents of the Memory Compare are not equal
#define MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER ((mcuxCsslMemory_Status_t) 0x0424533Cu) ///< A parameter was invalid
#define MCUXCSSLMEMORY_STATUS_FAULT ((mcuxCsslMemory_Status_t) 0x0424F0F0u) ///< A fault occurred in the execution
#define MCUXCSSLMEMORY_KEEP_ORDER ((uint32_t) 0x042439A5u) ///< Data storing in destination buffer in original order.
#define MCUXCSSLMEMORY_REVERSE_ORDER ((uint32_t) 0x0424395Au) ///< Data storing in destination buffer with reversed order.
/**
* @}
*/
#endif /* MCUXCSSLMEMORY_CONSTANTS_H */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Copy.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Copy.h
* @brief Include file for memory copy function
*/
#ifndef MCUXCSSLMEMORY_COPY_H_
#define MCUXCSSLMEMORY_COPY_H_
/**
* @defgroup mcuxCsslMemory_Copy mcuxCssl Memory Copy
* @brief Control Flow Protected Memory Copy Function
*
* @ingroup mcuxCsslMemory
* @{
*/
/**
* @defgroup mcuxCsslMemory_Copy_Functions mcuxCsslMemory_Copy Function Definitions
* @brief mcuxCsslMemory_Copy Function Definitions
*
* @ingroup mcuxCsslMemory_Copy
* @{
*/
/**
* @brief Copies @p length bytes of data from @p pSrc to @p pDst
*
* The implementation is secure in the following aspects:
*
* * Constant execution time: If @p pSrc and @p pDst have the same offset to the nearest 16-byte boundary, and if @p length
* is the same, the execution sequence of the code is always identical.
* * Parameter integrity protection: An incorrect parameter checksum makes the function return immediately.
* * Code flow protection: The function call is protected. Additionally, the result depends on all steps of the calculation.
* * Buffer overflow protection: No data is written to @p pDst beyond @p dstLength bytes.
*
* @param[in] chk The parameter checksum, generated with #mcuxCsslParamIntegrity_Protect.
* @param[in] pSrc The data to be copied. Must not be NULL. Must not overlap with @p pDst.
* @param[out] pDst The destination pointer. Must not be NULL. Must not overlap with @p pSrc.
* @param[in] dstLength The size of the destination data buffer in bytes.
* @param[in] length The number of bytes to copy.
* @return A status code encapsulated in a flow-protection type.
* @retval #MCUXCSSLMEMORY_STATUS_OK If the operation was successful.
* @retval #MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER If one of the parameters was invalid (i.e. @p pSrc or @p pDst was NULL or @p length was zero).
* @retval #MCUXCSSLMEMORY_STATUS_FAULT If a fault was detected.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslMemory_Copy)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Copy
(
mcuxCsslParamIntegrity_Checksum_t chk,
void const * pSrc,
void * pDst,
size_t dstLength,
size_t length
);
/**
* @}
*/
/**
* @}
*/
#endif /* MCUXCSSLMEMORY_COPY_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Set.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021, 2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Set.h
* @brief header file of memory set function
*/
#ifndef MCUXCSSLMEMORY_SET_H_
#define MCUXCSSLMEMORY_SET_H_
#include <stdint.h>
#include <stddef.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslParamIntegrity.h>
/**
* @defgroup mcuxCsslMemory_Set mcuxCssl Memory Set
* @brief Control Flow Protected Memory Set Function
*
* @ingroup mcuxCsslMemory
* @{
*/
/**
* @defgroup mcuxCsslMemory_Set_Functions mcuxCsslMemory_Set Function Definitions
* @brief mcuxCsslMemory_Set Function Definitions
*
* @ingroup mcuxCsslMemory_Set
* @{
*/
/**
* @brief Set @p length bytes of data at @p pDst
*
* The implementation is secure in the following aspects:
* Parameter integrity protection: the function returns immediately in case of an incorrect parameter checksum.
* Code flow protection: the function call is protected.
* Buffer overflow protection: no data is written to @p pDst beyond @p bufLength bytes.
*
* @param[in] chk The parameter checksum, generated with #mcuxCsslParamIntegrity_Protect.
* @param[in] pDst The destination pointer to buffer to be set. Must not be NULL.
* @param[in] val The byte value to be set.
* @param[in] length The size in bytes to set.
* @param[in] bufLength The buffer size (if bufLength < length, only bufLength bytes are set).
*
* @return A status code encapsulated in a flow-protection type.
* @retval #MCUXCSSLMEMORY_STATUS_OK If @p val set @p length times at @p pDst.
* @retval #MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER If one of the parameters is invalid.
* @retval #MCUXCSSLMEMORY_STATUS_FAULT If a fault was detected, included invalid checksum @p chk.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslMemory_Set)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Set
(
mcuxCsslParamIntegrity_Checksum_t chk,
void * pDst,
uint8_t val,
size_t length,
size_t bufLength
);
/**
* @}
*/
/**
* @}
*/
#endif /* MCUXCSSLMEMORY_SET_H_ */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/inc/mcuxCsslMemory_Types.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Types.h
* @brief Type definitions for the mcuxCsslMemory component
*/
#ifndef MCUXCSSLMEMORY_TYPES_H
#define MCUXCSSLMEMORY_TYPES_H
#include <stdint.h>
/**
* @defgroup mcuxCsslMemory_Types mcuxCsslMemory_Types
* @brief Defines common macros and types of @ref mcuxCsslMemory
* @ingroup mcuxCsslMemory
* @{
*/
/**********************************************
* TYPEDEFS
**********************************************/
/**
* @defgroup mcuxCsslMemory_Types_Types mcuxCsslMemory_Types_Types
* @brief Defines all types of @ref mcuxCsslMemory_Types
* @ingroup mcuxCsslMemory_Types
* @{
*/
/**
* @brief Type for CSSL Memory status codes.
*/
typedef uint32_t mcuxCsslMemory_Status_t;
/**
* @}
*
* @}
*/
#endif /* MCUXCSSLMEMORY_TYPES_H */
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/src/mcuxCsslMemory_Clear.c
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Clear.c
* @brief mcuxCsslMemory: implementation of memory clear function
*/
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslSecureCounter.h>
#include <mcuxCsslParamIntegrity.h>
#include <mcuxCsslMemory.h>
#include <mcuxCsslMemory_Clear.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslMemory_Clear)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Clear
(
mcuxCsslParamIntegrity_Checksum_t chk,
void * pDst,
size_t dstLength,
size_t length
)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxCsslMemory_Clear,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslParamIntegrity_Validate) );
MCUX_CSSL_FP_FUNCTION_CALL(retCode_paramIntegrityValidate, mcuxCsslParamIntegrity_Validate(chk, 3u, pDst, dstLength, length));
if ((retCode_paramIntegrityValidate != MCUXCSSLPARAMINTEGRITY_CHECK_VALID))
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Clear, MCUXCSSLMEMORY_STATUS_FAULT);
}
if (length > dstLength)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Clear, MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER);
}
MCUX_CSSL_FP_FUNCTION_CALL(retCode_memSet, mcuxCsslMemory_Set(mcuxCsslParamIntegrity_Protect(4u, pDst, 0u, length, dstLength), pDst, 0u, length, dstLength) );
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Clear, retCode_memSet,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslMemory_Set ));
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/src/mcuxCsslMemory_Compare.c
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#include <mcuxCsslMemory.h>
#include <mcuxCsslSecureCounter.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslAnalysis.h>
#include <internal/mcuxCsslMemory_Internal_Compare_asm.h>
#define CLS_NORMAL 0x2E00u
#define CLS_MISMATCH 0x8900u
#define LSB_NOT_EQUAL 0xB8u
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslMemory_Compare)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Compare
(
mcuxCsslParamIntegrity_Checksum_t chk,
void const * pLhs,
void const * pRhs,
size_t length
)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxCsslMemory_Compare,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslParamIntegrity_Validate)
);
MCUX_CSSL_FP_FUNCTION_CALL(result, mcuxCsslParamIntegrity_Validate(chk, 3u, pLhs, pRhs, length));
if( (result != MCUXCSSLPARAMINTEGRITY_CHECK_VALID)) {
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Compare, MCUXCSSLMEMORY_STATUS_FAULT);
}
if((NULL == pLhs) || (NULL == pRhs)) {
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Compare, MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER);
}
uint32_t nwords = 0u;
uint32_t retval = 0u;
MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_VOID()
uint8_t const * cur_lhs = (uint8_t const *)pLhs;
uint8_t const * cur_rhs = (uint8_t const *)pRhs;
MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_VOID()
uint32_t const notValid = ~(MCUXCSSLPARAMINTEGRITY_CHECK_VALID);
uint32_t const errCode = (uint32_t)MCUXCSSLMEMORY_STATUS_NOT_EQUAL;
/* Pre-calculate end pointers */
uint8_t const * end_lhs = &cur_lhs[length];
uint8_t const * end_rhs = &cur_rhs[length];
MCUX_CSSL_ANALYSIS_START_SUPPRESS_REINTERPRET_MEMORY_BETWEEN_INAPT_ESSENTIAL_TYPES("Exception 9: re-interpreting the memory for word access")
MCUXCSSLMEMORY_COMPARE_ASM_COMPARISON(retval, cur_lhs, cur_rhs, nwords, length, notValid, result);
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_REINTERPRET_MEMORY_BETWEEN_INAPT_ESSENTIAL_TYPES()
MCUXCSSLMEMORY_COMPARE_ASM_CALC_RETVAL(retval, errCode);
retval &= 0x000000FFu; /* Isolate the byte value that we are interested in */
retval |= MCUXCSSLMEMORY_COMPONENT_MASK | CLS_MISMATCH; /* Defines the value to what is expected */
retval ^= (CLS_MISMATCH ^ CLS_NORMAL) & ((retval ^ LSB_NOT_EQUAL) << 8); /* If equal, then change the class to match the equal case */
/* Check that the pointers reached the end */
if((end_lhs != cur_lhs) || (end_rhs != cur_rhs)) {
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Compare, MCUXCSSLMEMORY_STATUS_FAULT);
}
MCUX_CSSL_SC_ADD(nwords); // -> should be 0
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Compare, retval);
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/src/mcuxCsslMemory_Copy.c
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2024 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#include <mcuxCsslMemory.h>
#include <mcuxCsslSecureCounter.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslAnalysis.h>
#include <mcuxClMemory_Copy.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslMemory_Copy)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Copy
(
mcuxCsslParamIntegrity_Checksum_t chk,
void const * pSrc,
void * pDst,
size_t dstLength,
size_t length
)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxCsslMemory_Copy);
if((NULL == pSrc) || (NULL == pDst) || (length > dstLength))
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Copy, MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER);
}
mcuxCsslParamIntegrity_Checksum_t cmpChk = mcuxCsslParamIntegrity_Protect(3u, pSrc, pDst, length);
MCUX_CSSL_FP_FUNCTION_CALL(integrityResult, mcuxCsslParamIntegrity_Validate(chk, 4u, pSrc, pDst, dstLength, length));
if(MCUXCSSLPARAMINTEGRITY_CHECK_VALID != integrityResult)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Copy, MCUXCSSLMEMORY_STATUS_FAULT);
}
MCUX_CSSL_FP_FUNCTION_CALL_VOID(mcuxClMemory_copy(pDst, pSrc, length, dstLength));
MCUX_CSSL_FP_FUNCTION_CALL(compareResult, mcuxCsslMemory_Compare(cmpChk, pSrc, pDst, length));
if((MCUXCSSLMEMORY_STATUS_EQUAL == compareResult))
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Copy, MCUXCSSLMEMORY_STATUS_OK,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxClMemory_copy),
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslMemory_Compare),
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslParamIntegrity_Validate));
}
else
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Copy, MCUXCSSLMEMORY_STATUS_FAULT);
}
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslMemory/src/mcuxCsslMemory_Set.c
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/*--------------------------------------------------------------------------*/
/* Copyright 2021-2023 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/**
* @file mcuxCsslMemory_Set.c
* @brief mcuxCsslMemory: implementation of memory set function
*/
#include <stddef.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslSecureCounter.h>
#include <mcuxCsslParamIntegrity.h>
#include <mcuxCsslMemory.h>
#include <mcuxCsslAnalysis.h>
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslMemory_Set)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslMemory_Status_t) mcuxCsslMemory_Set
(
mcuxCsslParamIntegrity_Checksum_t chk,
void * pDst,
uint8_t val,
size_t length,
size_t bufLength
)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxCsslMemory_Set,
MCUX_CSSL_FP_FUNCTION_CALLED(mcuxCsslParamIntegrity_Validate));
MCUX_CSSL_FP_FUNCTION_CALL(retCode_paramIntegrityValidate, mcuxCsslParamIntegrity_Validate(chk, 4u, pDst, val, length, bufLength));
if (MCUXCSSLPARAMINTEGRITY_CHECK_VALID != retCode_paramIntegrityValidate)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Set, MCUXCSSLMEMORY_STATUS_FAULT);
}
if (NULL == pDst)
{
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Set, MCUXCSSLMEMORY_STATUS_INVALID_PARAMETER);
}
size_t copyLen = bufLength < length ? bufLength : length;
uint32_t remainLength = (uint32_t) copyLen;
uint32_t wordVal = ((uint32_t)val << 24) | ((uint32_t)val << 16) | ((uint32_t)val << 8) | (uint32_t)val;
const uint32_t cpuWordSize = sizeof(uint32_t);
MCUX_CSSL_ANALYSIS_START_PATTERN_CAST_VOID()
volatile uint8_t *p8Dst = (volatile uint8_t *) pDst; // needs to be aligned
MCUX_CSSL_ANALYSIS_STOP_PATTERN_CAST_VOID()
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_CAST_POINTERS()
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "pDst will be in the valid range pDst[0 ~ copyLen].")
MCUX_CSSL_SC_ADD((uint32_t) pDst + copyLen);
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_CAST_POINTERS()
MCUX_CSSL_FP_LOOP_DECL(FirstByteLoop);
MCUX_CSSL_FP_LOOP_DECL(SecondByteLoop);
MCUX_CSSL_FP_LOOP_DECL(WordLoop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER("Typecast pointer to integer to check address for alignment")
while ((0u != ((uint32_t) p8Dst & (cpuWordSize - 1u))) && (0u != remainLength))
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_TYPECAST_BETWEEN_INTEGER_AND_POINTER()
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "p8Dst will be in the valid range pDst[0 ~ copyLen].")
MCUX_CSSL_FP_LOOP_ITERATION(FirstByteLoop);
*p8Dst = val;
p8Dst++;
remainLength--;
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("p8Dst is CPU word-aligned after the previous loop")
volatile uint32_t *p32Dst = (volatile uint32_t *) p8Dst; /* p8Dst is CPU word-aligned after the previous loop. */
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
while (cpuWordSize <= remainLength)
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "p32Dst will be in the valid range pDst[0 ~ copyLen].")
MCUX_CSSL_FP_LOOP_ITERATION(WordLoop);
MCUX_CSSL_ANALYSIS_START_SUPPRESS_POINTER_CASTING("p8Dst is CPU word-aligned after the previous loop")
*p32Dst = wordVal;
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_POINTER_CASTING()
p32Dst++;
remainLength -= cpuWordSize;
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
p8Dst = (volatile uint8_t *) p32Dst;
while (0u != remainLength)
{
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "p8Dst will be in the valid range pDst[0 ~ copyLen].")
MCUX_CSSL_FP_LOOP_ITERATION(SecondByteLoop);
*p8Dst = val;
p8Dst++;
remainLength--;
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
}
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_CAST_POINTERS()
MCUX_CSSL_SC_SUB((uint32_t) p8Dst);
MCUX_CSSL_ANALYSIS_COVERITY_START_FALSE_POSITIVE(INTEGER_OVERFLOW, "modular arithmetic, mod 4")
MCUX_CSSL_FP_COUNTER_STMT(uint32_t noOfBytesToAlignment = ((0u - ((uint32_t) pDst)) % cpuWordSize));
MCUX_CSSL_ANALYSIS_COVERITY_STOP_FALSE_POSITIVE(INTEGER_OVERFLOW)
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_CAST_POINTERS()
MCUX_CSSL_FP_COUNTER_STMT(uint32_t firstByteIteration = (copyLen > noOfBytesToAlignment)
? noOfBytesToAlignment
: copyLen);
MCUX_CSSL_FP_COUNTER_STMT(uint32_t wordIteration = (copyLen > firstByteIteration)
? ((copyLen - firstByteIteration) / cpuWordSize)
: 0u);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslMemory_Set, MCUXCSSLMEMORY_STATUS_OK,
MCUX_CSSL_FP_LOOP_ITERATIONS(FirstByteLoop, firstByteIteration),
MCUX_CSSL_FP_LOOP_ITERATIONS(WordLoop, wordIteration),
MCUX_CSSL_FP_LOOP_ITERATIONS(SecondByteLoop, copyLen - (wordIteration * cpuWordSize) - firstByteIteration));
}
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslParamIntegrity/inc/mcuxCsslParamIntegrity.h
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/*--------------------------------------------------------------------------*/
/* Copyright 2020-2021 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
/// @file mcuxCsslParamIntegrity.h
/// @brief Top-level include file for the parameter integrity protection mechanism
///
/// The library exposes the following functions:
/// <ol>
/// <li> Generation of parameter checksums: #mcuxCsslParamIntegrity_Protect
/// <li> Validation of parameter checksums: #mcuxCsslParamIntegrity_Validate
/// </ol>
#ifndef MCUXCSSLPARAMINTEGRITY_H
#define MCUXCSSLPARAMINTEGRITY_H
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
/**
* @defgroup mcuxCsslParamIntegrity Parameter Integrity API
* @brief Functionality to ensure parameter integrity during function calls
*
* @ingroup mcuxCsslAPI
* @{
*/
/**
* @defgroup mcuxCsslParamIntegrity_Macros mcuxCsslParamIntegrity Macro Definitions
* @brief Macros of mcuxCsslParamIntegrity component
* @ingroup mcuxCsslParamIntegrity
* @{
*/
#define MCUXCSSLPARAMINTEGRITY_BASE_CHECKSUM ((mcuxCsslParamIntegrity_Checksum_t)0xb7151628u) ///< First eight hex digits of Eulers number
#define MCUXCSSLPARAMINTEGRITY_CHECK_VALID ((mcuxCsslParamIntegrity_Checksum_t)0x6969u) ///< Return value of #mcuxCsslParamIntegrity_Validate if the parameter checksum was correct
#define MCUXCSSLPARAMINTEGRITY_CHECK_INVALID ((mcuxCsslParamIntegrity_Checksum_t)0x9696u) ///< Return value of #mcuxCsslParamIntegrity_Validate if the parameter checksum was incorrect
/**
* @}
*/
/**
* @defgroup mcuxCsslParamIntegrity_Types mcuxCsslParamIntegrity Type Definitions
* @brief Types of mcuxCsslParamIntegrity component
* @ingroup mcuxCsslParamIntegrity
* @{
*/
#ifdef MCUXCL_FEATURE_CSSL_PI_64BIT
/**
* @brief Build time assertion to ensure CPU word size of 64 bit
*/
typedef void * mcuxCsslParamIntegrity_AssertionCpuWordSize_t[(8u == sizeof(size_t)) ? (+1) : (-1)];
#else
/**
* @brief Build time assertion to ensure CPU word size of 32 bit
*/
typedef void * mcuxCsslParamIntegrity_AssertionCpuWordSize_t[(4u == sizeof(size_t)) ? (+1) : (-1)];
#endif
/**
* @brief Type of a parameter checksum.
*/
typedef uint32_t mcuxCsslParamIntegrity_Checksum_t;
/**
* @}
*/
/**
* @defgroup mcuxCsslParamIntegrity_Functions mcuxCsslParamIntegrity Function Definitions
* @brief Functions of mcuxCsslParamIntegrity component
* @ingroup mcuxCsslParamIntegrity
* @{
*/
/**
* @brief Calculates a parameter checksum.
*
* @param nargs The number of parameters to be protected.
* @param ... The parameters that should be protected. Note that parameters bigger than a single machine word are not supported.
* @return checksum over the input parameters to be protected
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslParamIntegrity_Protect)
mcuxCsslParamIntegrity_Checksum_t mcuxCsslParamIntegrity_Protect(size_t nargs, ...);
/**
* @brief Verifies the correctness of a parameter checksum.
*
* @param chk The parameter checksum.
* @param nargs The number of parameters to be protected.
* @param ... The parameters that were used to calculate the parameter checksum. Note that parameters bigger than a single machine word are not supported.
* @return A status code encapsulated in a flow-protection type.
* @retval #MCUXCSSLPARAMINTEGRITY_CHECK_VALID The parameter checksum was correct.
* @retval #MCUXCSSLPARAMINTEGRITY_CHECK_INVALID The parameter checksum was incorrect.
*/
MCUX_CSSL_FP_FUNCTION_DECL(mcuxCsslParamIntegrity_Validate)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslParamIntegrity_Checksum_t) mcuxCsslParamIntegrity_Validate(mcuxCsslParamIntegrity_Checksum_t chk, size_t nargs, ...);
/**
* @}
*/
/**
* @}
*/
#endif
tutorials/nxp/frdm-rw612-xpresso-freertos-lwip/component/els_pkc/src/comps/mcuxCsslParamIntegrity/src/mcuxCsslParamIntegrity32.c
+83
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@@ -0,0 +1,83 @@
/*--------------------------------------------------------------------------*/
/* Copyright 2020 NXP */
/* */
/* NXP Proprietary. This software is owned or controlled by NXP and may */
/* only be used strictly in accordance with the applicable license terms. */
/* By expressly accepting such terms or by downloading, installing, */
/* activating and/or otherwise using the software, you are agreeing that */
/* you have read, and that you agree to comply with and are bound by, such */
/* license terms. If you do not agree to be bound by the applicable */
/* license terms, then you may not retain, install, activate or otherwise */
/* use the software. */
/*--------------------------------------------------------------------------*/
#include <mcuxCsslParamIntegrity.h>
#include <mcuxCsslFlowProtection.h>
#include <mcuxCsslFlowProtection_FunctionIdentifiers.h>
#include <mcuxCsslAnalysis.h>
#include <stdarg.h>
#include <stddef.h>
MCUX_CSSL_ANALYSIS_START_SUPPRESS_STDARG_USAGE("Usage of stdarg.h feature has been analyzed and approved, compiler error has been added for exceptions (when CPU word size > 32 bit)")
MCUX_CSSL_FP_FUNCTION_DEF(rotate_right)
static uint32_t rotate_right(uint32_t val, uint32_t shift_amt) {
MCUX_CSSL_ANALYSIS_START_SUPPRESS_INTEGER_OVERFLOW("shift_amt will be always less than 32.")
return ((val) >> (shift_amt) % 32u) | ((val) << (32u - (shift_amt)) % 32u);
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_INTEGER_OVERFLOW()
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslParamIntegrity_InternalProtect)
static mcuxCsslParamIntegrity_Checksum_t mcuxCsslParamIntegrity_InternalProtect(size_t nargs, va_list args) {
mcuxCsslParamIntegrity_Checksum_t result = MCUXCSSLPARAMINTEGRITY_BASE_CHECKSUM;
for(size_t i = 0; i < nargs; i++) {
MCUX_CSSL_ANALYSIS_START_SUPPRESS_VA_ARGS_USAGE("This is third party code. va_arg macro from stdarg.h contains two violations to MISRA rule 10.1, two violations to MISRA rule 10.4 and a violation to MISRA rule 20.7")
MCUX_CSSL_ANALYSIS_START_PATTERN_SC_INTEGER_OVERFLOW()
result += rotate_right(va_arg(args, uint32_t), i);
MCUX_CSSL_ANALYSIS_STOP_PATTERN_SC_INTEGER_OVERFLOW()
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_VA_ARGS_USAGE()
}
return result;
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslParamIntegrity_Protect)
mcuxCsslParamIntegrity_Checksum_t mcuxCsslParamIntegrity_Protect
(
size_t nargs,
...
)
{
va_list args;
MCUX_CSSL_ANALYSIS_START_SUPPRESS_VA_ARGS_USAGE("This is third party code. va_start macro from stdarg.h contains a violation to MISRA rule 20.7")
va_start(args, nargs);
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_VA_ARGS_USAGE()
mcuxCsslParamIntegrity_Checksum_t result = mcuxCsslParamIntegrity_InternalProtect(nargs, args);
va_end(args);
return result;
}
MCUX_CSSL_FP_FUNCTION_DEF(mcuxCsslParamIntegrity_Validate)
MCUX_CSSL_FP_PROTECTED_TYPE(mcuxCsslParamIntegrity_Checksum_t) mcuxCsslParamIntegrity_Validate
(
mcuxCsslParamIntegrity_Checksum_t chk,
size_t nargs,
...
)
{
MCUX_CSSL_FP_FUNCTION_ENTRY(mcuxCsslParamIntegrity_Validate);
va_list args;
MCUX_CSSL_ANALYSIS_START_SUPPRESS_VA_ARGS_USAGE("This is third party code. va_start macro from stdarg.h contains a violation to MISRA rule 20.7")
va_start(args, nargs);
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_VA_ARGS_USAGE()
mcuxCsslParamIntegrity_Checksum_t recalculatedChecksum = mcuxCsslParamIntegrity_InternalProtect(nargs, args);
va_end(args);
MCUX_CSSL_FP_FUNCTION_EXIT(mcuxCsslParamIntegrity_Validate,
(recalculatedChecksum == chk) ? MCUXCSSLPARAMINTEGRITY_CHECK_VALID : MCUXCSSLPARAMINTEGRITY_CHECK_INVALID
);
}
MCUX_CSSL_ANALYSIS_STOP_SUPPRESS_STDARG_USAGE()
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