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Fix H5 OTA rollback

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This commit is contained in:
robert
2026-06-16 10:56:36 +03:00
parent 52b9de4189
commit d1ea094067
5 changed files with 18 additions and 10 deletions
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mongoose.c
+4 -2
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@@ -12048,9 +12048,11 @@ bool mg_ota_write(const void *buf, size_t len) {
}
bool mg_ota_end(void) {
mg_ota_flash_end(&s_mg_flash_stm32h5);
return false;
if (!mg_ota_flash_end(&s_mg_flash_stm32h5)) return false;
*(volatile uint32_t *) 0xe000ed0c = 0x5fa0004U; // NVIC_SystemReset()
return true;
}
struct mg_flash *mg_flash = &s_mg_flash_stm32h5;
#endif
mongoose.h
+3 -2
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@@ -240,10 +240,11 @@ extern "C" {
#endif
#if defined(TAMP)
#define MG_OTA_STATE_GET() (TAMP->BKP0R)
#define MG_OTA_STATE_GET() \
(RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, TAMP->BKP0R)
#define MG_OTA_STATE_SET(v) \
(RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, MG_OTA_DBP_ENABLE(), \
(TAMP->BKP0R = (uint32_t) (v)))
(TAMP->BKP0R = (uint32_t) (v)), TAMP->BKP0R)
#elif defined(RCC_APB4ENR_RTCAPBEN)
#define MG_OTA_STATE_GET() (RTC->BKP0R)
#define MG_OTA_STATE_SET(v) \
src/arch_cube.h
+3 -2
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@@ -108,10 +108,11 @@
#endif
#if defined(TAMP)
#define MG_OTA_STATE_GET() (TAMP->BKP0R)
#define MG_OTA_STATE_GET() \
(RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, TAMP->BKP0R)
#define MG_OTA_STATE_SET(v) \
(RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, MG_OTA_DBP_ENABLE(), \
(TAMP->BKP0R = (uint32_t) (v)))
(TAMP->BKP0R = (uint32_t) (v)), TAMP->BKP0R)
#elif defined(RCC_APB4ENR_RTCAPBEN)
#define MG_OTA_STATE_GET() (RTC->BKP0R)
#define MG_OTA_STATE_SET(v) \
src/ota_stm32h5.c
+4 -2
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@@ -159,8 +159,10 @@ bool mg_ota_write(const void *buf, size_t len) {
}
bool mg_ota_end(void) {
mg_ota_flash_end(&s_mg_flash_stm32h5);
return false;
if (!mg_ota_flash_end(&s_mg_flash_stm32h5)) return false;
*(volatile uint32_t *) 0xe000ed0c = 0x5fa0004U; // NVIC_SystemReset()
return true;
}
struct mg_flash *mg_flash = &s_mg_flash_stm32h5;
#endif
tutorials/stm32/nucleo-h563zi/minimal/mongoose/mongoose_config.h
+4 -2
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@@ -41,8 +41,10 @@
// OTA state in TAMP backup register 0 (survives all resets, clears on POR).
// Requires hal_backup_domain_init() (called from hal_clock_init) to have run.
#define MG_OTA_STATE_GET() (TAMP->BKP0R)
#define MG_OTA_STATE_SET(v) (TAMP->BKP0R = (uint32_t) (v))
#define MG_OTA_STATE_GET() (RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, TAMP->BKP0R)
#define MG_OTA_STATE_SET(v) \
(RCC->APB3ENR |= RCC_APB3ENR_RTCAPBEN, PWR->DBPCR |= PWR_DBPCR_DBP, \
(TAMP->BKP0R = (uint32_t) (v)), TAMP->BKP0R)
// #define MG_DRIVER_MDC_CR 4 // RMII MDC clock divider, from 0 to 4
// #define MG_TCPIP_PHY_ADDR 0 // PHY address