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assorted nit picks
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@@ -168,6 +168,10 @@ extern "C" {
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#endif
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#endif
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#ifndef MG_TLS
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#define MG_TLS MG_TLS_BUILTIN
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#endif
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#if !defined(MG_OTA) && defined(STM32F1) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7)
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#define MG_OTA MG_OTA_STM32F
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#elif !defined(MG_OTA) && defined(STM32H5)
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@@ -175,6 +179,8 @@ extern "C" {
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#elif !defined(MG_OTA) && defined(STM32H7)
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#define MG_OTA MG_OTA_STM32H7
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#endif
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// use HAL-defined execute-in-ram section
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#define MG_IRAM __attribute__((section(".RamFunc")))
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#ifndef STM32H5
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#define HAL_ICACHE_IsEnabled() 0
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@@ -3486,6 +3492,12 @@ struct mg_tcpip_driver_stm32f_data {
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#define MG_DRIVER_MDC_CR 4
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#endif
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#if MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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do { \
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static struct mg_tcpip_driver_stm32f_data driver_data_; \
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@@ -3498,8 +3510,8 @@ struct mg_tcpip_driver_stm32f_data {
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mif_.driver = &mg_tcpip_driver_stm32f; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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MG_NEIRQ; \
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mg_tcpip_init(mgr, &mif_); \
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NVIC_EnableIRQ(ETH_IRQn); \
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MG_INFO(("Driver: stm32f, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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@@ -3546,6 +3558,12 @@ struct mg_tcpip_driver_stm32h_data {
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#define MG_DRIVER_MDC_CR 4
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#endif
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#if MG_ENABLE_DRIVER_STM32H && MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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do { \
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static struct mg_tcpip_driver_stm32h_data driver_data_; \
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@@ -3560,7 +3578,7 @@ struct mg_tcpip_driver_stm32h_data {
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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mg_tcpip_init(mgr, &mif_); \
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NVIC_EnableIRQ(ETH_IRQn); \
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MG_NEIRQ; \
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MG_INFO(("Driver: stm32h, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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@@ -45,6 +45,10 @@
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#endif
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#endif
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#ifndef MG_TLS
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#define MG_TLS MG_TLS_BUILTIN
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#endif
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#if !defined(MG_OTA) && defined(STM32F1) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7)
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#define MG_OTA MG_OTA_STM32F
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#elif !defined(MG_OTA) && defined(STM32H5)
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@@ -52,6 +56,8 @@
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#elif !defined(MG_OTA) && defined(STM32H7)
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#define MG_OTA MG_OTA_STM32H7
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#endif
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// use HAL-defined execute-in-ram section
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#define MG_IRAM __attribute__((section(".RamFunc")))
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#ifndef STM32H5
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#define HAL_ICACHE_IsEnabled() 0
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@@ -28,6 +28,12 @@ struct mg_tcpip_driver_stm32f_data {
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#define MG_DRIVER_MDC_CR 4
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#endif
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#if MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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do { \
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static struct mg_tcpip_driver_stm32f_data driver_data_; \
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@@ -40,8 +46,8 @@ struct mg_tcpip_driver_stm32f_data {
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mif_.driver = &mg_tcpip_driver_stm32f; \
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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MG_NEIRQ; \
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mg_tcpip_init(mgr, &mif_); \
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NVIC_EnableIRQ(ETH_IRQn); \
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MG_INFO(("Driver: stm32f, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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@@ -40,6 +40,12 @@ struct mg_tcpip_driver_stm32h_data {
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#define MG_DRIVER_MDC_CR 4
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#endif
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#if MG_ENABLE_DRIVER_STM32H && MG_ARCH == MG_ARCH_CUBE
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#define MG_NEIRQ NVIC_EnableIRQ(ETH_IRQn)
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#else
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#define MG_NEIRQ
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#endif
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#define MG_TCPIP_DRIVER_INIT(mgr) \
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do { \
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static struct mg_tcpip_driver_stm32h_data driver_data_; \
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@@ -54,7 +60,7 @@ struct mg_tcpip_driver_stm32h_data {
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mif_.driver_data = &driver_data_; \
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MG_SET_MAC_ADDRESS(mif_.mac); \
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mg_tcpip_init(mgr, &mif_); \
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NVIC_EnableIRQ(ETH_IRQn); \
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MG_NEIRQ; \
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MG_INFO(("Driver: stm32h, MAC: %M", mg_print_mac, mif_.mac)); \
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} while (0)
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