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40 lines
2.0 KiB
Markdown
40 lines
2.0 KiB
Markdown
# Nucleo-N657X0-Q Mongoose Integration
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This guide explains how to bring up a production-grade Web UI dashboard on the
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STM32 Nucleo-N657X0-Q development board.
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A pre-configured, ready-to-run project zip is available for download at
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https://mongoose.ws.
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To integrate the Web UI dashboard into an existing CubeMX project, or to create a
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new project from scratch:
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1. Configure the peripherals (described below).
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2. Regenerate your project code and integrate Mongoose core by following
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https://mongoose.ws/docs/guides/stm32-tcpip-stack/.
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3. Add the Web UI dashboard by following
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https://mongoose.ws/docs/guides/web-dashboard-guide/.
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## Configure peripherals
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An `.ioc` file is included in this directory for your reference. It was created
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using the following steps:
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- Open CubeMX, File / New project, type "STM32N657X0H3Q" in the part number, select
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it from the list, click "Start project" on the top right, choose "Secure domain only"
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- Project Manager: Project name: "n657". Project location: path to this directory.
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Project strucure: "FSBL" only. Toolchain/IDE: pick ether Cmake or CubeIDE.
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- Clock configuration: Find SYSB, enter 400 MHz, Resolve clock issues
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- MCU pinout view: set PG0, PG8, PG10 to GPIO_Output mode
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- Pinout & Configuration / System Core: click on "GPIO", then click on each
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of the PG0, PG8, PG10 pins and select Pin Context Assignment / First Stage Boot Loader
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- Pinout & Configuration / Security: Enable RIF and RNG for FSBL, click on RNG, check Activate
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- Pinout & Configuration / Connectivity: enable USART1 for FSBL, mode asynchronous,
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configure pins PE5 and PE6 for USART1 function
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- Pinout & Configuration / Connectivity: enable ETH1 for FSBL, mode RMII,
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pins PF4, PF5, PF7, PF10, PF11, PF12, PF13, PF14, PF15, PG11 for Ethernet function
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- RIF:
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- Peripherals (RISUP), enable "Privilege" on ETH1
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- Domains (RIMU): for ETH1, enable SECURE and PRIVILEGE
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- Clock configuration: resolve clocks if required. Find "To ETH1" and make sure it has 100 MHz
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