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i2c-piix4: Drop the fix_hstcfg parameter (2.6 backport)
git-svn-id: http://lm-sensors.org/svn/lm-sensors/trunk@4051 7894878c-1315-0410-8ee3-d5d059ff63e0
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@@ -17,6 +17,7 @@ lm_sensors CHANGES file
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Add ICH8 support (2.6 backport)
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Module i2c-piix4: Add ServerWorks HT-1000 support (2.6 backport)
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Add ATI IXP200, IXP300, IXP400 support (2.6 backport)
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Drop the fix_hstcfg parameter (2.6 backport)
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Module i2c-viapro: Fix compilation with kernels < 2.4.21
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Module lm83: Add LM82 support (2.6 backport)
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Module w83781d: Use real-time alarm registers when possible (2.6 backport)
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+16
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@@ -25,8 +25,6 @@ Module Parameters
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Forcibly enable the PIIX4. DANGEROUS!
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* force_addr: int
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Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS!
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* fix_hstcfg: int
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Fix config register. Needed on some boards (Force CPCI735).
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Description
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@@ -71,7 +69,19 @@ driver on those mainboards.
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The ServerWorks Southbridges, the Intel 440MX,
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and the Victory766 are identical to the PIIX4 in I2C/SMBus support.
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A few OSB4 southbridges are known to be misconfigured by the BIOS. In this
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case, you have you use the fix_hstcfg module parameter. Do not use it
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unless you know you have to, because in some cases it also breaks
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configuration on southbridges that don't need it.
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If you own Force CPCI735 motherboard or other OSB4 based systems you may need
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to change the SMBus Interrupt Select register so the SMBus controller uses
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the SMI mode.
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1) Use lspci command and locate the PCI device with the SMBus controller:
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00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
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The line may vary for different chipsets. Please consult the driver source
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for all possible PCI ids (and lspci -n to match them). Lets assume the
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device is located at 00:0f.0.
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2) Now you just need to change the value in 0xD2 register. Get it first with
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command: lspci -xxx -s 00:0f.0
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If the value is 0x3 then you need to change it to 0x1
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setpci -s 00:0f.0 d2.b=1
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Please note that you don't need to do that in all cases, just when the SMBus is
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not working properly.
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@@ -103,11 +103,6 @@ MODULE_PARM_DESC(force_addr,
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"Forcibly enable the PIIX4 at the given address. "
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"EXTREMELY DANGEROUS!");
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static int fix_hstcfg = 0;
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MODULE_PARM(fix_hstcfg, "i");
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MODULE_PARM_DESC(fix_hstcfg,
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"Fix config register. Needed on some boards (Force CPCI735).");
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static int piix4_transaction(void);
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static unsigned short piix4_smba = 0;
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@@ -172,22 +167,6 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
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pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
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/* Some BIOS will set up the chipset incorrectly and leave a register
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in an undefined state (causing I2C to act very strangely). */
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if (temp & 0x02) {
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if (fix_hstcfg) {
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printk(KERN_INFO "i2c-piix4.o: Working around buggy "
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"BIOS (I2C)\n");
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temp &= 0xfd;
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pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp);
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} else {
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printk(KERN_INFO "i2c-piix4.o: Unusual config register "
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"value\n");
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printk(KERN_INFO "i2c-piix4.o: Try using fix_hstcfg=1 "
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"if you experience problems\n");
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}
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}
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/* If force_addr is set, we program the new address here. Just to make
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sure, we disable the PIIX4 first. */
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if (force_addr) {
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@@ -220,7 +199,7 @@ static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
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}
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#ifdef DEBUG
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if ((temp & 0x0E) == 8)
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if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
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printk(KERN_DEBUG "i2c-piix4.o: Using Interrupt 9 for "
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"SMBus.\n");
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else if ((temp & 0x0E) == 0)
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