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337 Commits
Author SHA1 Message Date
Sergio R. Caprile ccfe7e0724 update version 2025-05-21 09:46:14 -03:00
Sergio R. Caprile 8061a41b38 workaround 2025-05-19 09:22:59 -03:00
Sergio R. Caprile 39392b3690 Merge pull request #3139 from cesanta/freewill
free ifp on mgr_free
2025-05-15 18:04:42 -03:00
Sergio R. Caprile 54d4611eb6 call mg_tcpip_free from mg_mgr_free() 2025-05-15 17:37:40 -03:00
Sergio R. Caprile 34cdce750d Merge pull request #3138 from cesanta/pedantic
make clang happy
2025-05-15 17:11:22 -03:00
Sergio R. Caprile f3fafb6759 make clang happy 2025-05-15 17:09:29 -03:00
Sergio R. Caprile 0372c97ff5 add fuzz 2025-05-15 16:48:16 -03:00
Sergio R. Caprile b46136a0af Merge pull request #3137 from cesanta/testtls
add fuzz tests
2025-05-15 16:33:17 -03:00
Sergio R. Caprile ac3d41fb79 add fuzz tests 2025-05-15 16:32:42 -03:00
Sergio R. Caprile 14be42c868 INFO -> VERBOSE 2025-05-15 15:50:36 -03:00
robertc2000 f0ec14543a Merge pull request #3136 from cesanta/ra6-driver-init
RA6 driver init macro
2025-05-15 10:20:31 +03:00
robert f46c5b7214 RA6 driver init macro 2025-05-15 03:13:49 -04:00
Sergey Lyubka ccd6bcd95f Merge pull request #3132 from cesanta/tls
stronger bounds checking
2025-05-13 22:26:35 +01:00
Sergey Lyubka a3b63f3b0d Merge pull request #3130 from cesanta/longpost
fix broken TCP closure
2025-05-13 22:26:15 +01:00
Sergey Lyubka f2905a5e10 Merge pull request #3135 from cesanta/mss
Handle (specific) TCP options
2025-05-13 22:25:52 +01:00
Sergio R. Caprile 1ef6c6aeb5 Handle TCP options 2025-05-13 16:27:50 -03:00
robertc2000 bd53529b45 Merge pull request #3134 from cesanta/ota-rw612
OTA for FRDM-RW612
2025-05-13 10:33:41 +03:00
Sergio R. Caprile cc8ecc5a42 stronger bounds checking 2025-05-12 18:13:41 -03:00
robert 5a816a1d41 OTA for FRDM-RW612 2025-05-12 07:59:15 -04:00
robertc2000 9922286c67 Merge pull request #3131 from cesanta/ws-offset
Websocket offset validation enhancement
2025-05-09 13:05:20 +03:00
robert cdc439bc38 Websocket offset validation enhancement 2025-05-09 06:04:34 -04:00
Sergio R. Caprile ae8422e304 fix broken TCP closure 2025-05-08 13:40:02 -03:00
robert 539d080346 check null pointer 2025-05-07 08:40:07 -04:00
Sergey Lyubka 041ec6e1f8 Close if drained 2025-05-03 10:28:40 +01:00
Sergio R. Caprile f618fe125c Fix lwIP builds
fixes #3119

lwIP does not export ip_mreq by default, it requires enabling support for IGMP by setting LWIP_IGMP, with the associated extra stuff. Mongoose will print an error if mg_multicast_add() is called with no multicast support in lwIP.
2025-04-29 19:24:17 -03:00
Sergio R. Caprile 8ab514fabc make hexdump send CRLF 2025-04-28 12:33:31 -03:00
novlean 08ad2c3145 Merge pull request #3113 from cesanta/novlean-patch-2
Update README.md
2025-04-24 17:40:00 +01:00
novlean c64fd404d4 Update README.md
article
2025-04-24 17:39:51 +01:00
Sergio R. Caprile 143b0ac126 fix 2025-04-24 11:04:43 -03:00
Sergio R. Caprile c2e2432010 Merge pull request #3093 from cesanta/mdns-multicast
Added MDNS and driver support for multicast
2025-04-22 14:01:34 -03:00
Sergio R. Caprile 1d2a768184 refactor the rest of the drivers 2025-04-22 13:59:03 -03:00
novlean fb099641bc Merge pull request #3111 from cesanta/novlean-patch-2
Update README.md
2025-04-22 17:48:28 +01:00
novlean 6da9afbf29 Update README.md 2025-04-22 17:48:12 +01:00
Sergio R. Caprile dceb4beb09 Refactor MIP strategy and first driver (CMSIS) 2025-04-22 12:55:21 -03:00
robert 6f697db49d Added MDNS and driver support for multicast 2025-04-22 12:55:15 -03:00
Sergio R. Caprile b44193780e Merge pull request #3110 from cesanta/tlsfindata
Fix not reading last TLS small record with fast closure
2025-04-22 10:03:40 -03:00
Sergio R. Caprile 8e0212c3db Fix not reading last TLS small record with fast closure
Fixes #3104
MbedTLS API fairplay
2025-04-22 09:56:49 -03:00
Sergio R. Caprile 3861e2e1e7 Merge pull request #3097 from cesanta/builtdoze
fix missing weird types
2025-04-14 13:13:06 -03:00
Sergio R. Caprile 21eefa4b55 Merge pull request #3102 from cesanta/mipfin
Fix handling of FIN segments carrying data
2025-04-14 11:27:09 -03:00
Sergey Lyubka fb6c6aafeb Merge pull request #3100 from cesanta/timers
Fix #2768 - remove completed timers
2025-04-14 15:15:36 +01:00
Sergio R. Caprile df07426e78 Fix handling of FIN segments carrying data 2025-04-14 11:11:48 -03:00
Sergio R. Caprile 5cf1523a13 Merge pull request #3101 from cesanta/tlszero
workaround causing TLS libs to return zero
2025-04-14 10:40:36 -03:00
Sergio R. Caprile f2fe47e9f7 workaround causing TLS libs to return zero 2025-04-11 14:42:15 -03:00
Sergio R. Caprile 2557ab2e60 Merge pull request #3086 from cesanta/cywst
Add support for RM2 with STM32F (429, 746)
2025-04-11 09:28:25 -03:00
Sergio R. Caprile fbc1708000 Add support for RM2 with STM32F (429, 746) 2025-04-11 09:20:40 -03:00
Sergey Lyubka 0539cf1023 Fix #2768 - remove completed timers 2025-04-11 11:24:10 +01:00
Sergio R. Caprile 07b410447b fix missing weird types 2025-04-10 10:02:20 -03:00
Sergey Lyubka fb69016196 Merge pull request #3096 from cesanta/polldoze
allow other stack than WinSock in Windows
2025-04-10 07:21:29 +01:00
Sergio R. Caprile 169cbc044f Merge pull request #3095 from cesanta/noVLA
no VLA
2025-04-09 13:28:21 -03:00
Sergio R. Caprile 08091d02e5 allow other stack than WinSock in Windows 2025-04-09 12:05:01 -03:00
Sergio R. Caprile 6f2dcf92a7 no VLA 2025-04-09 10:55:54 -03:00
Sergio R. Caprile 578e52618d Merge pull request #3092 from cesanta/picofix
unbreak pico[2]W auto init
2025-04-07 16:00:33 -03:00
Sergio R. Caprile ec0fe66a17 unbreak pico[2]W auto init 2025-04-07 15:56:11 -03:00
novlean 8fee24291a Merge pull request #3091 from cesanta/novlean-patch-2
Update README.md
2025-04-07 17:53:34 +01:00
novlean 05bba2958d Update README.md
Articles
2025-04-07 17:53:22 +01:00
robert e656b1c792 Removed alloca call for ARM-CGT compatibility 2025-04-07 09:08:22 -04:00
Sergey Lyubka e0ccbadd25 Merge pull request #3083 from cesanta/cyw
Introducing CYW driver and Wi-Fi AP support
2025-03-30 11:27:56 +01:00
Sergey Lyubka 40a2a8822f Squash warning 2025-03-29 18:59:01 +00:00
Sergio R. Caprile e2ee356a87 Merge pull request #3084 from cesanta/2ap
Add support for AP in Pico 2 W (valid for Pico W)
2025-03-28 09:51:15 -03:00
Sergio R. Caprile 189bef61d3 Add support for AP in Pico 2 W (valid for Pico W) 2025-03-24 17:49:40 -03:00
Sergio R. Caprile 7d94f9f61b Add Pico + RM2 Wi-Fi example 2025-03-24 17:41:12 -03:00
Sergio R. Caprile e37a0b9056 Add CYW driver 2025-03-24 17:03:05 -03:00
Sergio R. Caprile 0b57b23951 Add support for Wi-Fi chip drivers 2025-03-24 17:02:50 -03:00
Sergey Lyubka c84826e84e Merge pull request #3081 from cesanta/dhcp
Allow user to set custom DHCP name
2025-03-24 08:01:43 +00:00
Sergey Lyubka 064fc6ff7b Allow user to set custom DHCP name 2025-03-22 16:30:02 +00:00
Sergio R. Caprile 042ea53478 Merge pull request #3076 from cesanta/mondirw
keep up with Wizard dir structure
2025-03-12 17:14:30 -03:00
Sergio R. Caprile 900b0acf7a keep up with Wizard dir structure 2025-03-12 17:08:36 -03:00
Sergio R. Caprile dc5f2e295a Merge pull request #3074 from cesanta/wait
fix IO_WAIT on send for builtin TLS and MbedTLS
2025-03-11 16:21:32 -03:00
Sergio R. Caprile c1849c2b19 fix IO_WAIT on send for builtin TLS and MbedTLS 2025-03-11 16:14:12 -03:00
Sergio R. Caprile 4eadf3699f unbreak C89 2025-03-11 16:00:42 -03:00
Sergio R. Caprile b30cf6587c Merge pull request #3072 from cesanta/rw612-wifi-xpresso
RW612 MCUXpresso WiFi example with FreeRTOS and LWIP
2025-03-08 14:56:29 -03:00
Sergio R. Caprile fbc231f33e Merge pull request #3070 from cesanta/hton
remove memcpy from htons/l and test load/save bigendian macros
2025-03-08 14:46:46 -03:00
Sergio R. Caprile bc8c839342 Merge pull request #3033 from cesanta/wifi
Change driver API: up(ifp) -> poll(ifp, 1second)
2025-03-08 11:40:39 -03:00
Sergio R. Caprile 90a23fe230 Add support for Wi-Fi chip drivers 2025-03-07 16:41:33 -03:00
Sergio R. Caprile 065027843e Change driver API: up(ifp) -> poll(ifp, 1second)
Add misc extras required by Wi-Fi drivers (in progress)
2025-03-07 14:14:16 -03:00
Sergio R. Caprile 8906b1ac0f Merge pull request #3025 from cesanta/ub
fix UB and possible exception trigger
2025-03-07 13:49:37 -03:00
robert 05f9e61a41 RW612 MCUXpresso WiFi example with FreeRTOS and LWIP 2025-03-07 11:12:30 -05:00
Sergio R. Caprile 782896b5d3 remove memcpy from htons/l 2025-03-05 17:20:35 -03:00
Sergio R. Caprile 4258f62560 Merge pull request #3069 from cesanta/beduino
add test for ESP32
2025-03-05 14:23:05 -03:00
Sergio R. Caprile 537ba64a54 add test for ESP32 2025-03-05 12:34:22 -03:00
Sergey Lyubka 25d20b7354 Add mg_tcpip_driver_w5100 to the header 2025-03-05 06:54:20 +00:00
Sergio R. Caprile 04d8362905 Merge pull request #3068 from cesanta/arduino
fix Arduino tests
2025-03-04 16:31:57 -03:00
Sergio R. Caprile 21266e9a45 fix Arduino tests 2025-03-04 16:20:18 -03:00
Sergio R. Caprile 7304e2171d Merge pull request #3065 from cesanta/reduino
Rename conflictive macros, add and refactor crypto tests
2025-03-04 12:11:45 -03:00
Sergio R. Caprile 61fc480850 Rename conflictive macros, refactor crypto tests 2025-03-04 11:55:57 -03:00
robertc2000 562e82f5ac Merge pull request #3059 from cesanta/ota-rt1050
OTA on RT1050
2025-03-03 10:09:27 +02:00
robert d7ff85bb48 OTA on RT1050 2025-03-03 03:03:28 -05:00
Sergio R. Caprile 55bc6105e1 Merge pull request #3058 from cesanta/move
move examples -> tutorials
2025-02-28 14:00:06 -03:00
Sergio R. Caprile 306c0b6096 move examples -> tutorials 2025-02-28 13:55:57 -03:00
Sergio R. Caprile 024078ae33 Merge pull request #3057 from cesanta/move
move vendors -> tutorials
2025-02-28 10:10:07 -03:00
Sergio R. Caprile b5a9ba8390 move vendors -> tutorials 2025-02-28 10:01:51 -03:00
Sergey Lyubka 93f36927ca Add .mjs mime type 2025-02-27 16:50:04 +00:00
Sergio R. Caprile 1db90cafd1 Merge pull request #3056 from cesanta/move
move Zephyr -> tutorials
2025-02-27 12:02:48 -03:00
Sergio R. Caprile bf23a0def7 move Zephyr -> tutorials 2025-02-27 10:57:08 -03:00
Sergio R. Caprile ea1cbeea9d Merge pull request #3054 from cesanta/move
move UART bridge -> tutorials
2025-02-26 15:11:27 -03:00
Sergio R. Caprile aeda7e5520 move UART bridge -> tutorials 2025-02-26 15:08:06 -03:00
Sergio R. Caprile a7899af8b8 Merge pull request #3053 from cesanta/move
move ESP32 device dashboard -> tutorials
2025-02-26 14:17:06 -03:00
Sergio R. Caprile b0385f47af move ESP32 device dashboard -> tutorials 2025-02-26 14:14:08 -03:00
Sergio R. Caprile 86c384657c Merge pull request #3052 from cesanta/move
integrate reference-projects into existing tutorials
2025-02-26 12:05:14 -03:00
Sergio R. Caprile 6e569110d2 integrate reference-projects intto existing tutorials 2025-02-26 12:00:46 -03:00
Sergio R. Caprile 3b1024b13c Merge pull request #3051 from cesanta/move
move MicroPython and dashboards -> tutorials
2025-02-26 11:43:14 -03:00
Sergio R. Caprile b3f5d11275 move MicroPython and dashboards -> tutorials 2025-02-26 11:31:01 -03:00
Sergio R. Caprile 1078ba0a92 Merge pull request #3050 from cesanta/move
move file-transfer -> tutorials
2025-02-25 16:54:25 -03:00
Sergio R. Caprile 005c8170d4 move file-transfer -> tutorials 2025-02-25 16:52:16 -03:00
Sergio R. Caprile b8d1d7a10b Merge pull request #3049 from cesanta/move
move ESP8266 -> tutorials
2025-02-25 16:11:30 -03:00
Sergio R. Caprile 76769fb4d5 move ESP8266 -> tutorials 2025-02-25 16:10:28 -03:00
Sergio R. Caprile 6ff6f0a4c6 Merge pull request #3048 from cesanta/move
move Arduino examples -> tutorials
2025-02-25 15:52:12 -03:00
Sergio R. Caprile 72a45d2f6a move Arduino examples -> tutorials 2025-02-25 15:48:09 -03:00
Sergio R. Caprile 2fe7c8a410 Merge pull request #3044 from cesanta/eth-drivers-rx
ETH driver: use the same scheme for RX
2025-02-19 14:12:49 -03:00
robert 5269eb9c39 ETH driver: use the same scheme for RX 2025-02-19 10:01:54 -05:00
Sergio R. Caprile 0a86bc0af2 update version 2025-02-19 10:21:27 -03:00
Sergio R. Caprile bc9f6ba0b0 Merge pull request #3043 from cesanta/loserst
add TLS support
2025-02-18 16:22:48 -03:00
Sergio R. Caprile 9e16a0ae42 add TLS support 2025-02-18 16:20:39 -03:00
Sergio R. Caprile 9ccbb49aef Merge pull request #3042 from cesanta/loserst
Fix Windows returning IO_RESET
2025-02-18 16:08:24 -03:00
Sergio R. Caprile d59f84fbbc Fix Windows returning IO_RESET 2025-02-18 16:04:13 -03:00
Sergio R. Caprile 4bbb5008b1 Merge pull request #3039 from cesanta/rw612-eth-driver
RW612 ETH driver
2025-02-18 09:28:16 -03:00
Sergio R. Caprile 49ce25511e Merge pull request #3041 from cesanta/atomillis
no LDRD in v6-M
2025-02-17 13:59:14 -03:00
Sergio R. Caprile 985276665d no LDRD in v6-M 2025-02-17 10:18:51 -03:00
robert 91f553c45f RW612 ETH driver 2025-02-17 03:47:41 -05:00
Sergey Lyubka 38ede8ec58 2024 -> 2025 2025-02-12 13:28:24 +00:00
Sergey Lyubka 997f6543ce Merge pull request #3037 from cesanta/tls2
TLS verification
2025-02-10 15:42:18 +00:00
Sergey Lyubka b50081a83b TLS verification 2025-02-10 15:36:29 +00:00
Sergio R. Caprile 34f512d244 Merge pull request #3034 from cesanta/picosdk
Fix Pico-SDK aggressive optimization breaking OTA
2025-02-06 10:31:09 -03:00
Sergio R. Caprile eb5752f41b Fix Pico-SDK aggressive optimization breaking OTA 2025-02-06 10:27:13 -03:00
Sergio R. Caprile ef8e7419fa ... 2025-02-02 19:41:54 -03:00
Sergio R. Caprile cfcdd15b89 ... 2025-02-02 19:28:54 -03:00
Sergio R. Caprile b26debaebc ... 2025-02-02 19:25:35 -03:00
Sergio R. Caprile 6deb061b12 ... 2025-02-02 19:20:30 -03:00
novlean 4c6745670c Merge pull request #3029 from cesanta/novlean-patch-1
Update LICENSE
2025-01-30 12:10:39 +00:00
novlean 01c662b7de Update LICENSE
2025
2025-01-30 12:10:26 +00:00
Sergio R. Caprile 179fe652c2 Merge pull request #3028 from cesanta/ota2350
Use BootROM reset for RP2350
2025-01-29 15:20:37 -03:00
Sergio R. Caprile 394bc3260d Use BootROM reset for RP2350 2025-01-29 15:17:04 -03:00
Sergio R. Caprile ce1a70e2dc fix error msg 2025-01-29 10:15:45 -03:00
Sergio R. Caprile 99022896f6 Merge pull request #3026 from cesanta/tst
misc fixes
2025-01-28 15:29:43 -03:00
Sergio R. Caprile 446b400667 misc fixes 2025-01-28 15:27:13 -03:00
Sergio R. Caprile a0d9b6a7e0 fix UB and possible HF trigger 2025-01-28 10:24:59 -03:00
Sergio R. Caprile 7d53c21efe fix for no TLS 2025-01-27 18:52:20 -03:00
Sergio R. Caprile b78efbac36 Merge pull request #3024 from cesanta/test
fix failing tests
2025-01-27 16:52:06 -03:00
Sergio R. Caprile 9be9dcec46 misc 2025-01-27 16:50:46 -03:00
Sergio R. Caprile 3766ab802b update SDK (no pico_rand) 2025-01-27 16:49:32 -03:00
Sergio R. Caprile b9141925a3 fix #2997 2025-01-27 16:15:03 -03:00
Sergio R. Caprile ed79fe86aa fix SDK 1.5 not building in recent gcc (update to SDK 2.1) 2025-01-27 14:26:11 -03:00
Sergey Lyubka 2f0b0955a9 Merge pull request #3023 from cesanta/smtp
fix built-in TLS not calling MG_EV_TLS_HS; uniformize mg_tls_init()
2025-01-27 14:44:51 +00:00
Sergio R. Caprile 2f8e15a900 fix qemu package name 2025-01-27 11:13:38 -03:00
Sergio R. Caprile b8b3a5c305 fix built-in TLS not calling MG_EV_TLS_HS; uniformize mg_tls_init() 2025-01-27 10:54:56 -03:00
Sergio R. Caprile e7ea421c54 fix outdated mongoose.h 2025-01-27 10:54:29 -03:00
Sergio R. Caprile 8de9699390 fix TLS multiple-record-per-frame handling in bare metal 2025-01-24 12:05:17 -03:00
Sergio R. Caprile bf592a22ae Fix TLS tests failing with small(lots of) records 2025-01-23 19:15:40 -03:00
Sergio R. Caprile 8d4a619a15 minimize elusive ARP lookup failure 2025-01-23 14:33:28 -03:00
Sergio R. Caprile 1a3588624d update mongoose.h 2025-01-21 16:50:14 -03:00
Sergio R. Caprile 74b3fd2efc Merge pull request #3009 from cesanta/fin
Close connection fast if both sides sent FIN
2025-01-17 20:07:35 -03:00
Sergio R. Caprile 091356ed59 give TLS a chance 2025-01-17 19:51:12 -03:00
Sergey Lyubka fc0e1ee311 Close connection fast if both sides sent FIN 2025-01-17 15:15:24 -03:00
Sergio R. Caprile 8dbfcbff58 Merge pull request #3014 from cesanta/test
improve TLS testing
2025-01-17 15:14:04 -03:00
Sergio R. Caprile 317591bc8a improve TLS testing 2025-01-17 14:07:49 -03:00
Sergio R. Caprile f71b3b91c0 Rollback 2025-01-16 21:04:12 -03:00
Sergio R. Caprile 9e255bcbce fix undefined behaviour 2025-01-16 20:42:43 -03:00
Sergio R. Caprile 8af319b953 Merge pull request #3011 from cesanta/to512
Change default MG_IO_SIZE 256 -> 512
2025-01-15 16:13:15 -03:00
Sergey Lyubka f90fd9cec4 Change default MG_IO_SIZE 256 -> 512 2025-01-15 19:10:10 +00:00
robert d386b1c12d XMC4 driver: added IDE compatibility 2025-01-13 03:34:25 -05:00
Sergey Lyubka 81551ec50d Quiet clone 2025-01-06 17:47:50 +00:00
Sergio R. Caprile 8fafcf6eaa Merge pull request #3001 from cesanta/towizard
move to Wizard
2025-01-03 11:54:36 -03:00
Sergio R. Caprile f0df6c61c9 move to Wizard 2025-01-03 11:53:11 -03:00
Sergey Lyubka 6cf36b5771 Add esp32-mqtt 2024-12-30 22:58:33 +00:00
Sergio R. Caprile 54799187e9 Merge pull request #2996 from cesanta/test
improve tests and debuggability
2024-12-30 13:41:02 -03:00
Sergio R. Caprile 6d0320be06 improve tests and debuggability 2024-12-30 12:25:27 -03:00
Sergey Lyubka 317a1527ad Add HTTPS 2024-12-29 14:03:39 +00:00
Sergey Lyubka 490eb0f57f Squash warning 2024-12-29 11:29:09 +00:00
Sergio R. Caprile f95283e341 Merge pull request #2995 from cesanta/update
misc fixes and updates
2024-12-27 11:21:50 -03:00
Sergio R. Caprile 837da0e458 misc fixes and updates 2024-12-27 11:16:10 -03:00
Sergio R. Caprile 8ce82a100e Merge pull request #2972 from cesanta/imxrt
move to Wizard
2024-12-27 09:17:43 -03:00
Sergio R. Caprile 9ece98c101 Merge pull request #2994 from cesanta/pico2w
Add Pico 2 W examples
2024-12-23 15:19:30 -03:00
Sergio R. Caprile 6a83147b33 Add Pico 2 W examples 2024-12-23 15:11:29 -03:00
Sergio R. Caprile 90e4228e1d keep TLS options as per the TLS tutorial. Default to built-in TLS while allowing to use other stacks, as tutorials show 2024-12-23 11:40:36 -03:00
Sergey Lyubka 553aeeef77 Add TLS support 2024-12-20 06:47:31 +00:00
Sergey Lyubka 6147e865f8 Update README 2024-12-19 12:38:20 +00:00
Sergey Lyubka 7b296fabb0 Merge pull request #2991 from cesanta/unpacked_crash
Fix mg_unpacked() crash
2024-12-18 11:07:27 +00:00
Sergey Lyubka 00c8f8acd0 Fix mg_unpacked() crash 2024-12-18 09:57:18 +00:00
Sergey Lyubka 1e1efa2c5e Merge pull request #2988 from cesanta/tlspoll
fix mg_tls_pending
2024-12-17 14:24:13 +00:00
robertc2000 b0b0dd9f0b Merge pull request #2990 from cesanta/w5100
Add W5100 driver
2024-12-17 15:34:54 +02:00
robert 30bb1c52d0 Add W5100 driver 2024-12-17 06:35:21 -05:00
Sergio R. Caprile 7fc96a61ad fix mg_tls_pending 2024-12-16 16:03:36 -03:00
Sergio R. Caprile 4a164c39b4 Merge pull request #2987 from cesanta/ifp
mgr::priv -> mgr::ifp, use explicit type
2024-12-16 11:36:36 -03:00
Sergey Lyubka b0e4069bb7 mgr::priv -> mgr::ifp, use explicit type 2024-12-16 14:22:13 +00:00
Sergey Lyubka 19cbb27b4c Fix TLS handling in net_builtin 2024-12-15 13:32:19 +00:00
Sergey Lyubka d44c864387 Add arduino/esp32-http example 2024-12-10 15:27:09 +00:00
Sergio R. Caprile 36e21e53e0 Merge pull request #2982 from cesanta/picowsdk
Add auto init for Pico-W driver
2024-12-05 14:59:21 -03:00
Sergio R. Caprile b7598cc354 Add auto init for Pico-W driver 2024-12-05 14:57:21 -03:00
Sergio R. Caprile 0a4f322d49 Merge pull request #2981 from cesanta/picowsdk
Add Pico-W driver in src/drivers
2024-12-05 12:21:41 -03:00
Sergio R. Caprile bf013fcdae Add Pico-W driver in src/drivedrivers 2024-12-05 12:11:14 -03:00
Sergey Lyubka fd52fccc15 Merge pull request #2976 from cesanta/http-invalid-versions
Validate HTTP version
2024-12-04 14:04:39 +00:00
robert c493d3a4ce Validate HTTP version 2024-12-04 06:34:24 -05:00
Sergio R. Caprile aeceb2b9e7 Merge pull request #2979 from cesanta/sdk2
update to Pico-SDK 2.0.0
2024-12-03 17:10:01 -03:00
Sergio R. Caprile cb5f833dd2 update to Pico-SDK 2.0.0 2024-12-02 14:19:49 -03:00
Sergio R. Caprile 0740ccd9f7 Merge pull request #2978 from cesanta/sdk2
update to Pico-SDK 2.0.0
2024-12-02 11:19:14 -03:00
Sergio R. Caprile 716c84c896 update to Pico-SDK 2.0.0 2024-12-02 11:15:33 -03:00
Sergey Lyubka c5fda07d1e Update Arduino sketches 2024-12-01 22:04:57 +00:00
Sergey Lyubka 7fffe0abaa Add simple RAM profiler 2024-11-28 13:11:04 +00:00
Sergey Lyubka 8a42325c23 Back to plain MQTT URL 2024-11-28 08:50:32 +00:00
Sergey Lyubka 78900304bf More PPP nitpicks 2024-11-28 08:46:32 +00:00
Sergey Lyubka fb6dfbcd3c PPP nitpicks 2024-11-28 08:31:43 +00:00
Sergey Lyubka 3dd4c7da2a Add PPP driver 2024-11-27 22:00:30 +00:00
Sergey Lyubka 03c955410c Update HTTP server Arduino example 2024-11-26 20:53:21 +00:00
Sergio R. Caprile 74f77c9ded Merge pull request #2975 from cesanta/ipsum
Fix IP csum calculation on 8-bit platforms
2024-11-26 17:36:43 -03:00
Sergey Lyubka 3caca03e8a Simplify MQTT example 2024-11-26 20:30:57 +00:00
Sergey Lyubka 49469840ab Fix IP csum calculation on 8-bit platforms 2024-11-26 20:23:12 +00:00
Sergio R. Caprile 85613ab02d Merge pull request #2974 from cesanta/noclash
avoid name clashing in OTA
2024-11-26 14:18:58 -03:00
Sergio R. Caprile 6e4ce85c87 avoid name clashing in OTA 2024-11-26 14:15:56 -03:00
Sergio R. Caprile 2a093dc183 remove is_io_err (unused) 2024-11-26 14:09:34 -03:00
Sergey Lyubka 01eeadbaf4 Merge pull request #2970 from kursataktas/mongoose-guru
Introducing Mongoose Guru on Gurubase.io
2024-11-23 08:22:57 +00:00
Sergio R. Caprile 851b3a7cfb move to Wizard 2024-11-22 17:38:26 -03:00
Sergio R. Caprile b6dc830bcb Merge pull request #2964 from cesanta/http-cookie
Use separate cookies for HTTP and HTTPS connections
2024-11-22 16:39:08 -03:00
Sergio R. Caprile 8ef02aae41 Merge pull request #2971 from cesanta/411
Fix issuing 411 responses as a client
2024-11-22 16:37:19 -03:00
Sergio R. Caprile 423dbd58a1 Merge pull request #2929 from cesanta/xmc7200
move to Wizard
2024-11-22 16:36:12 -03:00
Sergio R. Caprile 5582db615a Merge pull request #2923 from cesanta/1170
move to Wizard
2024-11-22 14:05:59 -03:00
Sergio R. Caprile 1479ebfb5d move to Wizard 2024-11-22 14:01:32 -03:00
Sergio R. Caprile 4389ef1e77 Merge pull request #2927 from cesanta/mcxn
move to Wizard
2024-11-22 12:21:36 -03:00
Sergio R. Caprile 5c305e7fa8 Fix issuing 411 responses as a client
15.5.12. 411 Length Required

The 411 (Length Required) status code indicates that the server refuses to accept the request without a defined Content-Length (Section 8.6). The client MAY repeat the request if it adds a valid Content-Length header field containing the length of the request content.

fixes #2969
2024-11-21 18:55:16 -03:00
Kursat Aktas 0427908eae Introducing Mongoose Guru on Gurubase.io
Signed-off-by: Kursat Aktas <kursat.ce@gmail.com>
2024-11-21 19:23:44 +03:00
Sergio R. Caprile 2df53c3d27 update version 2024-11-20 10:02:24 -03:00
Sergio R. Caprile 53ec9adb1b Merge pull request #2954 from cesanta/dbl
Fix dbl printing
2024-11-19 16:20:30 -03:00
Sergio R. Caprile 8b95a22e75 Merge pull request #2966 from cesanta/ota-h7-dual-core
H7 dual core OTA fix
2024-11-14 14:23:17 -03:00
robert 665298a04b H7 dual core OTA compatibility 2024-11-14 10:22:36 -05:00
Sergio R. Caprile 7e668df1fe default to built-in TLS without preventing other choices 2024-11-13 17:29:44 -03:00
Sergey Lyubka 85414cfec2 Add extra step 2024-11-12 08:55:53 +00:00
robert b973187960 Use separate cookies for HTTP and HTTPS connections 2024-11-12 03:46:11 -05:00
Sergio R. Caprile 991080e613 Merge pull request #2963 from cesanta/uaws
unbreak AWS example and associated tests
2024-11-11 17:30:22 -03:00
Sergio R. Caprile 72bf199577 unbreak AWS example and associated tests 2024-11-11 17:27:59 -03:00
Sergio R. Caprile 7bda43a6ec Merge pull request #2962 from cesanta/picosdk
Pico-SDK support fixes and cleanups
2024-11-11 15:08:06 -03:00
Sergio R. Caprile 2b8b0ebe95 Pico-SDK support fixes and cleanups 2024-11-11 14:52:28 -03:00
Sergey Lyubka 0aa61ce58f Update build, use EC certs 2024-11-10 08:45:34 +00:00
Sergey Lyubka 51a5dc78d7 zip only web_root files 2024-11-09 08:09:50 +00:00
Sergio R. Caprile 232bd9a22b Merge pull request #2959 from cesanta/picosdk
Move ARCH_RP2040 --> ARCH_PICOSDK
2024-11-08 14:38:56 -03:00
Sergio R. Caprile 58327a1753 Move ARCH_RP2040 --> ARCH_PICOSDK 2024-11-08 14:34:33 -03:00
Sergio R. Caprile 7844d84798 Merge pull request #2956 from cesanta/ota-rt1170
OTA RT1170
2024-11-07 13:45:28 -03:00
Sergio R. Caprile 7a30a42797 Merge pull request #2957 from cesanta/picornd
Use Pico-SDK RNG
2024-11-07 11:59:47 -03:00
Sergio R. Caprile 094202ff16 Use Pico-SDK RNG 2024-11-07 11:57:08 -03:00
robert 9c4523f4fa OTA RT1170 2024-11-07 08:39:28 -05:00
Sergio R. Caprile 69859c61e0 Merge pull request #2955 from cesanta/ota-rt10xx
IMXRT OTA: support included for 1024, 1040, 1064
2024-11-07 09:32:05 -03:00
robert 9878518e29 IMXRT OTA: support included for 1024, 1040, 1064 2024-11-07 03:11:57 -05:00
robert cde270728f Fixed tms570 driver definition not being added to net_builtin 2024-11-07 03:09:18 -05:00
Sergio R. Caprile 5559d0fa68 Merge pull request #2953 from cesanta/otapico
Add OTA for Pico-SDK (RP2040)
2024-11-06 16:36:14 -03:00
Sergio R. Caprile 8feff78526 add tests 2024-11-06 11:40:57 -03:00
Sergey Lyubka 226a3de55d Fix dbl printing 2024-11-06 06:14:38 +00:00
Sergio R. Caprile 67d0f5f4ae Add OTA for Pico-SDK (RP2040) 2024-11-05 17:17:22 -03:00
Sergio R. Caprile 192f5e563c Merge pull request #2952 from cesanta/rt1020-ota-fix
RT1020 OTA: removed unnecessary compiler optimisation
2024-11-05 09:27:20 -03:00
robert b6296e7a67 RT1020 OTA: removed unnecessary compiler optimisation 2024-11-05 03:48:26 -05:00
Sergio R. Caprile 67e17d3bc3 Merge pull request #2951 from cesanta/inline
MG_IRAM -> noinline
2024-11-01 16:26:05 -03:00
Sergio R. Caprile 64a6fef823 MG_IRAM -> noinline 2024-11-01 16:21:18 -03:00
robertc2000 e0c64cc4ff Merge pull request #2949 from cesanta/ota-f7
STM32F OTA support
2024-10-30 16:57:21 +02:00
robert 3e55478b3b STM32F OTA support 2024-10-30 10:55:05 -04:00
Sergey Lyubka 9aef821862 Merge pull request #2933 from cesanta/win_rng
Windows: added alternative to bcrypt lib
2024-10-29 15:44:05 +00:00
robert f394df840e Killed bcrypt, replaced with rand_s 2024-10-29 10:41:10 -04:00
Sergey Lyubka 7d33699173 Merge pull request #2935 from cesanta/tms570
TMS570 support
2024-10-26 11:14:26 +01:00
Sergey Lyubka d3ffe8c647 Merge pull request #2947 from cesanta/ota
Simplify OTA API
2024-10-25 10:40:32 +01:00
Sergio R. Caprile 9b99f62311 Refactor OTA API 2024-10-24 19:08:06 -03:00
Sergey Lyubka 3319ce78d3 Simplify OTA API 2024-10-22 01:25:19 +01:00
Sergey Lyubka 8eabf43525 Failing tests 2024-10-16 12:58:25 +01:00
Sergio R. Caprile adb12bb7be nits 2024-10-11 14:12:46 -03:00
Sergio R. Caprile 3c10b36651 Merge pull request #2938 from cesanta/isresp
Honor c->is_resp with Connection:close
2024-10-10 19:47:59 -03:00
Sergio R. Caprile d37c300d87 Honor c->is_resp with Connection:close 2024-10-10 19:44:09 -03:00
Sergio R. Caprile 9fc92e901e Merge pull request #2936 from cesanta/test
Add/fix Zephyr tests (again)
2024-10-10 15:53:17 -03:00
Sergio R. Caprile 5b52529295 Add/fix Zephyr tests (again) 2024-10-10 15:49:53 -03:00
Sergio R. Caprile f77a7ad623 Merge pull request #2926 from cesanta/arp
Fix gw ARP. Make ARP probe public. Add ARP event
2024-10-10 11:44:50 -03:00
Sergio R. Caprile 504ef9422e fix gw ARP on startup 2024-10-10 11:42:38 -03:00
robert cbbcec0895 TMS570 support 2024-10-10 03:23:51 -04:00
Sergio R. Caprile 32d90c38db tweaks 2024-10-09 11:33:14 -03:00
Sergey Lyubka e1f7f3d7bb Make ARP probe public. Add ARP event 2024-10-09 11:33:14 -03:00
Sergio R. Caprile 244536ea72 Merge pull request #2934 from cesanta/test
Add test Makefiles for more IDEs
2024-10-08 18:58:32 -03:00
Sergio R. Caprile fa24a3e09e Add test Makefiles for more IDEs
Expand Wizard test script
2024-10-08 18:55:32 -03:00
robert 5ec26a5015 Windows: added alternative to bcrypt lib 2024-10-08 09:21:13 -04:00
Sergey Lyubka 8a8ff2aef0 Merge pull request #2908 from cesanta/convenience
avoid trashing other projs thinking redefining types is convenient
2024-10-05 08:49:17 +01:00
Sergio R. Caprile 069254be6a Merge pull request #2932 from cesanta/test
Add test Makefiles for IDEs and Wizard test script
2024-10-04 17:37:19 -03:00
Sergio R. Caprile f3cd74cb46 Add test Makefiles for IDEs
Add Wizard test script
2024-10-04 17:35:02 -03:00
Sergio R. Caprile 4be8aa0f91 Merge pull request #2919 from cesanta/frag
Fix IP fragmentation checks for big-endian CPUs
2024-10-04 14:02:14 -03:00
Sergey Lyubka 93dd7a85f6 Fix IP fragmentation checks for big-endian CPUs 2024-10-04 16:18:33 +01:00
Sergio R. Caprile 062596e3fb move to Wizard 2024-10-04 11:55:24 -03:00
Sergio R. Caprile 5af2de635e Merge pull request #2931 from cesanta/revert-2930-tw
Revert "test prod Wizard"
2024-10-04 11:50:55 -03:00
Sergio R. Caprile a16df91fbb Revert "test prod Wizard" 2024-10-04 11:50:41 -03:00
Sergio R. Caprile 44178b9103 Merge pull request #2930 from cesanta/tw
test prod Wizard
2024-10-03 17:10:31 -03:00
Sergio R. Caprile b767f930ad test prod Wizard 2024-10-03 17:09:16 -03:00
Sergio R. Caprile ba61a6545a move to Wizard 2024-10-03 16:50:00 -03:00
Sergio R. Caprile 23ada5c7a5 try to get abort texts from GH 2024-10-03 13:46:50 -03:00
Sergio R. Caprile 97c37efffe fix removed linked files 2024-10-03 13:26:18 -03:00
Sergio R. Caprile 5db95be4fc fix test file 2024-10-03 12:05:44 -03:00
Sergio R. Caprile 5897422c70 Merge pull request #2928 from cesanta/newskeleton
move to Wizard
2024-10-03 12:00:47 -03:00
Sergio R. Caprile a7db0d3cc5 move to Wizard 2024-10-03 11:55:38 -03:00
Sergey Lyubka c49036a713 Merge pull request #2921 from cesanta/dp83848
DP83848 has no clock setup
2024-10-03 11:44:26 +01:00
Sergio R. Caprile 03246997fa Merge pull request #2922 from cesanta/newskeleton
move to Wizard
2024-10-02 14:51:57 -03:00
Sergio R. Caprile f4eac6e4fc move to Wizard 2024-10-02 13:42:14 -03:00
Sergio R. Caprile 48f695f3e6 DP83848 has no clock setup 2024-10-02 10:22:09 -03:00
Sergio R. Caprile 3525f044f5 Merge pull request #2890 from cesanta/tls
Fix multiple TLS records in buffer
2024-10-01 18:30:04 -03:00
Sergio R. Caprile b58f8b9d7c Fix multiple TLS records in buffer 2024-10-01 18:26:51 -03:00
Sergio R. Caprile c00962e881 Merge pull request #2914 from cesanta/tests
fixes and improvements for tests
2024-09-27 18:50:51 -03:00
Sergio R. Caprile 9bcf1d662b fix tests 2024-09-27 18:33:26 -03:00
Sergio R. Caprile 586e0721d8 Merge pull request #2911 from cesanta/testcube
add Wizard examples
2024-09-26 20:30:41 -03:00
Sergio R. Caprile 882dd1f3a7 add Wizard examples 2024-09-26 20:20:00 -03:00
Sergio R. Caprile 399291d783 Merge pull request #2910 from cesanta/newskeleton
move to Wizard
2024-09-26 17:14:24 -03:00
Sergio R. Caprile 46ac2e5252 move to Wizard 2024-09-26 17:11:57 -03:00
Sergio R. Caprile a81818b2db avoid trashing other projs thinking redefining types is convenient 2024-09-24 20:14:39 -03:00
Sergio R. Caprile 9b0d112176 Merge pull request #2907 from cesanta/armcgt
Add ARMCGT arch
2024-09-24 19:01:28 -03:00
Sergio R. Caprile ac17df0c65 Add ARMCGT arch 2024-09-24 18:58:54 -03:00
Sergio R. Caprile c4be4e7928 Merge pull request #2906 from cesanta/revert-2901-fpp
Revert "fix printf precision handling"
2024-09-24 18:02:49 -03:00
Sergio R. Caprile 877cbbd11d Revert "fix printf precision handling" 2024-09-24 18:01:07 -03:00
Sergio R. Caprile b2bb03310e Merge pull request #2905 from cesanta/arpudp
Fix ARP handling with UDP
2024-09-24 14:22:52 -03:00
Sergio R. Caprile 5c8885ee5f Fix ARP handling with UDP 2024-09-24 12:37:13 -03:00
Sergio R. Caprile 40ec6b263d Merge pull request #2901 from cesanta/fpp
fix printf precision handling
2024-09-20 20:51:20 -03:00
Sergio R. Caprile 3742da8770 fix printf precision handling 2024-09-20 20:40:54 -03:00
Sergio R. Caprile 19b06418c5 Merge pull request #2899 from cesanta/examples
move to Wizard
2024-09-19 16:30:14 -03:00
Sergio R. Caprile b7b8b9219d move to Wizard 2024-09-19 16:25:36 -03:00
Sergio R. Caprile 949966964f Merge pull request #2896 from cesanta/examplesh563
move to Wizard
2024-09-18 19:47:50 -03:00
Sergio R. Caprile c0a0f9c1df Merge pull request #2895 from cesanta/examples
move to Wizard
2024-09-18 19:43:19 -03:00
Sergio R. Caprile 7cff2fa8f1 Merge pull request #2897 from cesanta/detach
Detach HTTP handler if MG_EV_HTTP_HDRS changes c->recv
2024-09-18 09:44:15 -03:00
Sergey Lyubka c1b703a039 Detach HTTP handler if MG_EV_HTTP_HDRS changes c->recv 2024-09-18 13:30:27 +01:00
Sergio R. Caprile e0eff1d2bb update CodeQL 2024-09-17 13:14:52 -03:00
Sergio R. Caprile 037ef76ad8 move to Wizard 2024-09-16 17:03:44 -03:00
Sergio R. Caprile ae8025cd5c move to Wizard 2024-09-16 16:52:37 -03:00
Sergio R. Caprile 1804cc3a09 fix CIFuxx 2024-09-16 14:34:40 -03:00
Sergio R. Caprile 2d8e6b45ec fix CIFuxx 2024-09-16 14:31:26 -03:00
Sergio R. Caprile 3fa52d0d7d fix outdated example 2024-09-16 11:06:08 -03:00
Sergey Lyubka 6a7129d7af Merge pull request #2884 from cesanta/examples
pilot move to new skeleton in examples
2024-09-12 08:07:16 +01:00
Sergey Lyubka f0e113a532 Merge pull request #2893 from cesanta/picow
Add Pico-W example
2024-09-12 07:53:10 +01:00
Sergio R. Caprile 8b3e415201 Add Pico-W example 2024-09-11 10:56:52 -03:00
Sergio R. Caprile eb6a8afe8d Merge pull request #2891 from cesanta/cflags
default to built-in TLS without preventing other choices
2024-09-09 14:07:37 -03:00
Sergio R. Caprile a705a89e4a default to built-in TLS without preventing other choices 2024-09-09 14:05:39 -03:00
Sergio R. Caprile ea509c0a36 move to Wizard 2024-09-05 11:48:20 -03:00
Sergio R. Caprile 269600d875 pilot move 2024-09-04 17:13:19 -03:00
Sergio R. Caprile 95e3a8f3cc Merge pull request #2882 from cesanta/phy
Add MG_TCPIP_PHY_CONF
2024-09-03 11:26:43 -03:00
Sergey Lyubka ffeff3ab69 Add MG_TCPIP_PHY_CONF 2024-09-03 15:07:27 +01:00
Sergio R. Caprile bdc009eb65 Merge pull request #2880 from cesanta/rng
Make mg_random() fallible. Abort TLS on weak RNG
2024-09-02 11:12:27 -03:00
Sergey Lyubka 683f65f8ac Make mg_random() fallible. Abort TLS on weak RNG 2024-09-02 11:06:10 -03:00
Sergey Lyubka a737698372 Merge pull request #2881 from cesanta/mime
Fix #2871 - accept `*` in mg_http_serve_opts::mime_types
2024-09-02 08:57:13 +01:00
Sergey Lyubka eeecbbcff9 Fix #2871 - accept * in mg_http_serve_opts::mime_types 2024-09-02 06:12:02 +01:00
Sergio R. Caprile 44b3d60692 Merge pull request #2877 from cesanta/iosize
MG_IO_SIZE=256 on embedded platforms
2024-08-30 15:54:48 -03:00
Sergey Lyubka 641c7d1967 MG_IO_SIZE=256 on embedded platforms 2024-08-30 15:52:14 -03:00
Sergey Lyubka 7923d1e930 Merge pull request #2875 from cesanta/iface
add macro to access mif
2024-08-29 21:44:42 +01:00
Sergio R. Caprile 42e072a868 add macro to access mif 2024-08-29 17:11:25 -03:00
4188 changed files with 532273 additions and 1320649 deletions

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+1
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@@ -0,0 +1 @@
blank_issues_enabled: false
+21
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@@ -0,0 +1,21 @@
---
name: Issue template
about: Please fill this issue template for reporting Mongoose issues
#title:
#labels:
#assignees:
---
- My goal is: _describe_
- My actions were: _describe_
- My expectation was: _describe_
- The result I saw: _provide logs or description_
- My question is: _your question_
# Environment
- mongoose version: _X.Y_
- Compiler/IDE and SDK: ZZZ version _X.Y_
- Target hardware/board: _?_
- Connectivity chip/module: _?_
- Target RTOS/OS (if applicable): _?_
-13
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@@ -1,13 +0,0 @@
- My goal is: _describe_
- My actions were: _describe_
- My expectation was: _describe_
- The result I saw: _provide logs or description_
- My question is: _your question_
# Environment
- mongoose version: _X.Y_
- Compiler/IDE and SDK: ZZZ version _X.Y_
- Target hardware/board: _?_
- Connectivity chip/module: _?_
- Target RTOS/OS (if applicable): _?_
+1 -1
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@@ -29,7 +29,7 @@ jobs:
dry-run: false
language: c++
- name: Upload Crash
uses: actions/upload-artifact@v1
uses: actions/upload-artifact@v4
if: env.GO == 1 && failure() && steps.build.outcome == 'success'
with:
name: artifacts
+4 -4
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@@ -3,7 +3,7 @@ name: "CodeQL Scanning"
on:
schedule:
- cron: '30 2 * * *' # run at 2:30 AM UTC
- cron: '30 23 * * *' # run at 11:30 PM UTC
# Allow manual runs
workflow_dispatch:
@@ -17,11 +17,11 @@ jobs:
permissions:
security-events: write
steps:
- uses: actions/checkout@v3
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- name: Initialize CodeQL
uses: github/codeql-action/init@v2
uses: github/codeql-action/init@v3
with:
languages: cpp
- run: |
@@ -29,4 +29,4 @@ jobs:
./test/setup_ga_network.sh && make -C test mip_test CC=gcc ASAN= ASAN_OPTIONS=
- name: Perform CodeQL Analysis
uses: github/codeql-action/analyze@v2
uses: github/codeql-action/analyze@v3
+20
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@@ -0,0 +1,20 @@
name: Fuzz
on:
schedule:
- cron: '0 21 * * *' # run at 9 PM UTC
# Allow manual runs
workflow_dispatch:
env:
CC: clang
jobs:
fuzz:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
target: [fuzz, fuzz_tls]
name: ${{ matrix.target }}
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: make -C test ${{ matrix.target }}
+131 -193
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@@ -1,7 +1,7 @@
name: Full build and test
on:
schedule:
- cron: '0 1 * * *' # run at 1 AM UTC
- cron: '0 22 * * *' # run at 10 PM UTC
# Allow manual runs
workflow_dispatch:
env:
@@ -64,7 +64,7 @@ jobs:
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update ; sudo apt -y install qemu binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test s390 SSL=${{ matrix.ssl }}
- run: sudo apt -y update ; sudo apt -y install binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test s390 SSL=${{ matrix.ssl }}
armhf:
runs-on: ubuntu-latest
strategy:
@@ -75,7 +75,7 @@ jobs:
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update ; sudo apt -y install qemu binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test armhf SSL=${{ matrix.ssl }}
- run: sudo apt -y update ; sudo apt -y install binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test armhf SSL=${{ matrix.ssl }}
unamalgamated-mg_prefix:
runs-on: ubuntu-latest
strategy:
@@ -117,7 +117,7 @@ jobs:
name: macos SSL=${{ matrix.ssl }} TFLAGS=${{ matrix.select }}
env:
SSL: ${{ matrix.ssl }}
TFLAGS: ${{ matrix.select }} -DNO_SNTP_CHECK -Wno-sign-conversion # Workaround for MbedTLS 3.5.0
TFLAGS: ${{ matrix.select }} -Wno-sign-conversion # Workaround for MbedTLS 3.5.0
HOMEBREW_NO_AUTO_UPDATE: 1
steps:
- uses: actions/checkout@v4
@@ -165,97 +165,12 @@ jobs:
- uses: actions/checkout@v4
- run: make -C test riscv SSL=${{ matrix.ssl }}
examples:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: examples ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
- run: sudo apt -y install libpcap-dev
- run: make -C test examples CFLAGS_EXTRA="${{ matrix.ssl }}"
- run: make -C test clean_examples
examples_win:
runs-on: windows-latest
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: examples_win ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
# - uses: egor-tensin/setup-mingw@v2
# with:
# platform: x64
- name: test they build
run: make -C test examples_win CFLAGS_EXTRA="${{ matrix.ssl }}"
shell: cmd
- name: test they clean
run: make -C test clean_examples_win
shell: cmd
examples_mac:
runs-on: macos-latest
env: { HOMEBREW_NO_AUTO_UPDATE: 1 }
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: examples_mac ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
- run: make -C test examples_mac CFLAGS_EXTRA="${{ matrix.ssl }}"
- run: make -C test clean_examples_mac
refprojs:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: reference-projects ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
- run: make -C test refprojs CFLAGS_EXTRA="${{ matrix.ssl }}"
- run: make -C test clean_refprojs
refprojs_win:
runs-on: windows-latest
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: reference-projects_win ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
# - uses: egor-tensin/setup-mingw@v2
# with:
# platform: x64
- name: test they build
run: make -C test refprojs_win CFLAGS_EXTRA="${{ matrix.ssl }}"
shell: cmd
- name: test they clean
run: make -C test clean_refprojs_win
shell: cmd
refprojs_mac:
runs-on: macos-latest
env: { HOMEBREW_NO_AUTO_UPDATE: 1 }
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
name: reference-projects_mac ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
- run: make -C test refprojs CFLAGS_EXTRA="${{ matrix.ssl }}"
- run: make -C test clean_refprojs
tutorials:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
ssl: [-DMG_TLS=MG_TLS_NONE, -DMG_TLS=MG_TLS_BUILTIN]
name: tutorials ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
@@ -267,7 +182,7 @@ jobs:
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
ssl: [-DMG_TLS=MG_TLS_NONE, -DMG_TLS=MG_TLS_BUILTIN]
name: tutorials_win ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
@@ -286,7 +201,7 @@ jobs:
strategy:
fail-fast: false
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
ssl: [-DMG_TLS=MG_TLS_NONE, -DMG_TLS=MG_TLS_BUILTIN]
name: tutorials_mac ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
@@ -300,9 +215,67 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: echo # nothing specific to install or do
- run: make -C examples/arduino arduino-xiao
# - run: make -C examples/arduino arduino-nano
- run: make -C examples/arduino clean
- run: make -C test/arduino
- run: make -C test/arduino cleanall
# wizard_examples:
# runs-on: ubuntu-latest
# strategy:
# fail-fast: false
# matrix:
# example:
# - path: esp32/esp32-idf
# name: ${{ matrix.example.path }}
# env:
# GO: 0
# steps:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: echo # nothing specific to install or do
# fi
# - run: make -C tutorials/${{ matrix.example.path }} build
wizard_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: infineon/xmc47_relax-make-baremetal-builtin
- path: infineon/xmc_plt2go_4400-make-baremetal-builtin
- path: infineon/xmc72_evk-make-baremetal-builtin
- path: nxp/frdm-mcxn947-make-baremetal-builtin
- path: nxp/frdm-mcxn947-make-freertos-builtin
- path: nxp/rt1020-evk-make-baremetal-builtin
- path: nxp/rt1060-evk-make-baremetal-builtin
- path: nxp/rt1170-evk-make-baremetal-builtin
- path: pico-sdk/pico-w-picosdk-baremetal-builtin
- path: pico-sdk/pico-2-w-picosdk-baremetal-builtin
- path: pico-sdk/w5500-evb-pico-picosdk-baremetal-builtin
- path: pico-sdk/w5500-evb-pico2-picosdk-baremetal-builtin
- path: stm32/nucleo-f429zi-make-baremetal-builtin
- path: stm32/nucleo-f429zi-make-freertos-builtin
- path: stm32/nucleo-f746zg-make-baremetal-builtin
- path: stm32/nucleo-f746zg-make-freertos-builtin
- path: stm32/nucleo-h563zi-make-baremetal-builtin
- path: stm32/nucleo-h563zi-make-freertos-builtin
- path: stm32/nucleo-h723zg-make-baremetal-builtin
- path: stm32/nucleo-h723zg-make-freertos-builtin
- path: stm32/nucleo-h743zi-make-baremetal-builtin
- path: stm32/nucleo-h743zi-make-freertos-builtin
- path: stm32/stm32h573i-dk-make-baremetal-builtin
- path: stm32/stm32h573i-dk-make-freertos-builtin
- path: ti/ek-tm4c1294xl-make-baremetal-builtin
- path: ti/ek-tm4c1294xl-make-freertos-builtin
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C tutorials/${{ matrix.example.path }} build
generic_examples:
@@ -311,18 +284,17 @@ jobs:
fail-fast: false
matrix:
example:
- path: esp32/uart-bridge
- path: esp32/micropython
- path: esp8266/http-client-server
- path: micropython/esp32
- path: http/uart-bridge/esp32
- path: http/http-client/esp8266/http-client-server
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^src|^examples/${{ matrix.example.path }}'; then echo GO=1 >> $GITHUB_ENV ; fi
- run: echo # nothing specific to install or do
- run: make -C examples/${{ matrix.example.path }} build
- run: make -C tutorials/${{ matrix.example.path }} build
generic_examples_arm:
runs-on: ubuntu-latest
@@ -330,8 +302,7 @@ jobs:
fail-fast: false
matrix:
example:
- path: microchip/same54-xpro/mqtt-client
- path: infineon/infineon-xmc4700_4800-lwip-rtx-rtos
- path: mqtt/mqtt-client/microchip/same54-xpro
- path: nxp/nxp-mimxrt1020-azurertos
- path: nxp/nxp-frdmk66f-freertos
- path: nxp/nxp-lpcxpresso54s018m-freertos
@@ -351,7 +322,7 @@ jobs:
- path: nxp/nxp-lpcxpresso54628-lwip-freertos
- path: nxp/nxp-twrk65f180m-lwip-freertos
- path: nxp/nxp-twrkv58f220m-lwip-freertos
- path: rp2040/pico-rmii
- path: pico-sdk/pico-rmii
- path: stm32/nucleo-f429zi-make-baremetal-builtin-rndis
- path: stm32/nucleo-f746zg-make-baremetal-builtin-rndis
- path: stm32/nucleo-g031-make-baremetal-builtin
@@ -362,7 +333,7 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/${{ matrix.example.path }} build
- run: make -C tutorials/${{ matrix.example.path }} build
device_dashboard_examples:
runs-on: ubuntu-latest
@@ -370,13 +341,14 @@ jobs:
fail-fast: false
matrix:
example:
- path: esp32/device-dashboard
- path: esp32
name: ${{ matrix.example.path }}
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: echo # nothing specific to install or do
- run: make -C examples/${{ matrix.example.path }} build
- run: make -C tutorials/http/device-dashboard/${{ matrix.example.path }} build
device_dashboard_examples_arm:
runs-on: ubuntu-latest
@@ -385,41 +357,22 @@ jobs:
matrix:
ssl: ["", -DMG_TLS=MG_TLS_BUILTIN]
example:
- path: infineon/infineon-xmc7200
- path: microchip/same54-xpro/device-dashboard
- path: nxp/rt1020-evk-make-baremetal-builtin
- path: tutorials/http/device-dashboard/microchip/same54-xpro
- path: nxp/rt1020-evk-make-freertos-builtin
- path: nxp/frdm-mcxn947-make-baremetal-builtin
- path: nxp/frdm-mcxn947-make-freertos-builtin
- path: nxp/rt1060-evk-make-baremetal-builtin
- path: nxp/rt1060-evk-make-freertos-builtin
- path: nxp/rt1170-evk-make-baremetal-builtin
- path: nxp/rt1170-evk-make-freertos-builtin
- path: renesas/ek-ra6m4-make-baremetal-builtin
- path: rp2040/pico-rndis-dashboard
- path: rp2040/pico-w
- path: rp2040/pico-w5500
- path: stm32/nucleo-f429zi-make-baremetal-builtin
- path: stm32/nucleo-f429zi-make-freertos-builtin
- path: stm32/nucleo-f746zg-make-baremetal-builtin
- path: stm32/nucleo-f746zg-make-freertos-builtin
- path: pico-sdk/pico-rndis-dashboard
- path: pico-sdk/pico-w-picosdk-freertos-lwip
- path: pico-sdk/pico-2-w-picosdk-freertos-lwip
- path: stm32/nucleo-f746zg-make-freertos-tcp
- path: stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver
- path: stm32/nucleo-h563zi-make-baremetal-builtin
- path: stm32/nucleo-h563zi-make-freertos-builtin
- path: stm32/nucleo-h723zg-make-freertos-builtin
- path: stm32/nucleo-h743zi-make-baremetal-builtin
- path: stm32/nucleo-h743zi-make-freertos-builtin
- path: stm32/stm32h573i-dk-make-baremetal-builtin
- path: stm32/stm32h573i-dk-make-freertos-builtin
- path: ti/ek-tm4c1294xl-make-baremetal-builtin
- path: ti/ek-tm4c1294xl-make-freertos-builtin
name: ${{ matrix.example.path }} ${{ matrix.ssl }}
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/${{ matrix.example.path }} build CFLAGS_EXTRA="${{ matrix.ssl }}"
- run: make -C tutorials/${{ matrix.example.path }} build CFLAGS_EXTRA="${{ matrix.ssl }}"
# mqtt_dashboard_examples:
# runs-on: ubuntu-latest
@@ -433,7 +386,7 @@ jobs:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: echo # nothing specific to install or do
# - run: make -C examples/${{ matrix.example.path }} build
# - run: make -C tutorials/${{ matrix.example.path }} build
mqtt_dashboard_examples_arm:
runs-on: ubuntu-latest
@@ -441,13 +394,13 @@ jobs:
fail-fast: false
matrix:
example:
- path: rp2040/pico-rndis-device
- path: pico-sdk/pico-rndis-device
name: ${{ matrix.example.path }}
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/${{ matrix.example.path }} build
- run: make -C tutorials/${{ matrix.example.path }} build
# dual_examples:
# runs-on: ubuntu-latest
@@ -461,30 +414,15 @@ jobs:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: echo # nothing specific to install or do
# - run: make -C examples/${{ matrix.example.path }} device_dashboard
# - run: make -C examples/${{ matrix.example.path }} mqtt_dashboard
dual_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: stm32/nucleo-h723zg-make-baremetal-builtin
name: ${{ matrix.example.path }}
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/${{ matrix.example.path }} device_dashboard
- run: make -C examples/${{ matrix.example.path }} mqtt_dashboard
# - run: make -C tutorials/${{ matrix.example.path }} device_dashboard
# - run: make -C tutorials/${{ matrix.example.path }} mqtt_dashboard
cube_examples:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: echo # nothing specific to install or do
- run: sudo pip install yq
- run: cd test/cube && make
zephyr_examples:
@@ -493,17 +431,17 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/zephyr init
- run: make -C tutorials/zephyr init REPO=zephyrprojectrtos/ci:v0.26.14 # "no space left on device" with newers
- name: minify manifest
uses: mikefarah/yq@master
with:
cmd: yq -i eval '(.manifest.defaults, .manifest.remotes, .manifest.projects[] | select(.name == "cmsis" or .name == "hal_stm32" or .name == "mbedtls" or .name == "mcuboot" or .name == "picolibc" | del(.null) ), .manifest.self) as $i ireduce({};setpath($i | path; $i)) | del(.manifest.projects.[].null) | del(..|select(length==0))' examples/zephyr/zephyrproject/zephyr/west.yml
- run: make -C examples/zephyr update
- run: make -C examples/zephyr/device-dashboard build
- run: make -C examples/zephyr/http-client build
- run: make -C examples/zephyr/http-server build
- run: make -C examples/zephyr/mqtt-aws-client build
- run: make -C examples/zephyr/websocket-server build
cmd: yq -i eval '(.manifest.defaults, .manifest.remotes, .manifest.projects[] | select(.name == "cmsis" or .name == "hal_stm32" or .name == "mbedtls" or .name == "mcuboot" or .name == "picolibc" | del(.null) ), .manifest.self) as $i ireduce({};setpath($i | path; $i)) | del(.manifest.projects.[].null) | del(..|select(length==0))' tutorials/zephyr/zephyrproject/zephyr/west.yml
- run: make -C tutorials/zephyr update
- run: make -C tutorials/zephyr/device-dashboard build
- run: make -C tutorials/zephyr/http-client build
- run: make -C tutorials/zephyr/http-server build
- run: make -C tutorials/zephyr/mqtt-aws-client build
- run: make -C tutorials/zephyr/websocket-server build
test_f7:
runs-on: ubuntu-latest
@@ -512,14 +450,14 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/stm32/nucleo-f746zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-f746zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-f746zg-make-freertos-tcp test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-f746zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-f746zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-f746zg-make-freertos-tcp test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- name: Cube
run: echo # nothing specific to install or do
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
- run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
test_f4:
runs-on: ubuntu-latest
@@ -528,13 +466,13 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/stm32/nucleo-f429zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-f429zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-f429zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-f429zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- name: Cube
run: echo # nothing specific to install or do
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
- run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
test_h743:
runs-on: ubuntu-latest
@@ -543,12 +481,12 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/stm32/nucleo-h743zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-h743zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- name: Cube
run: echo # nothing specific to install or do
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-h743zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
- run: make -C test/cube test PROJECTS=../../examples/stm32/nucleo-h743zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
- run: make -C tutorials/stm32/nucleo-h743zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-h743zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
# - name: Cube
# run: echo # nothing specific to install or do
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-h743zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
# - run: make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-h743zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
test_h723:
runs-on: ubuntu-latest
@@ -557,8 +495,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/stm32/nucleo-h723zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-h723zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-h723zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-h723zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_h5:
runs-on: ubuntu-latest
@@ -567,8 +505,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/stm32/nucleo-h563zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/stm32/nucleo-h563zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-h563zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/stm32/nucleo-h563zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_rt1020:
runs-on: ubuntu-latest
@@ -577,8 +515,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/nxp/rt1020-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/nxp/rt1020-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1020-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1020-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_rt1060:
runs-on: ubuntu-latest
@@ -587,8 +525,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/nxp/rt1060-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/nxp/rt1060-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1060-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1060-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_rt1170:
runs-on: ubuntu-latest
@@ -597,8 +535,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/nxp/rt1170-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/nxp/rt1170-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1170-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/nxp/rt1170-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_ra6m4:
runs-on: ubuntu-latest
@@ -607,8 +545,8 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/renesas/ek-ra6m4-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
# - run: make -C examples/renesas/ek-ra6m4-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/renesas/ek-ra6m4-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
# - run: make -C tutorials/renesas/ek-ra6m4-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_tm4c:
runs-on: ubuntu-latest
@@ -617,8 +555,8 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/ti/ek-tm4c1294xl-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/ti/ek-tm4c1294xl-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/ti/ek-tm4c1294xl-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/ti/ek-tm4c1294xl-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_same54:
runs-on: ubuntu-latest
@@ -627,8 +565,8 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/microchip/same54-xpro/device-dashboard test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C examples/microchip/same54-xpro/mqtt-client test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/http/device-dashboard/microchip/same54-xpro test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/mqtt/mqtt-client/microchip/same54-xpro test VCON_API_KEY=${{secrets.VCON_API_KEY}}
test_pico_w5500:
runs-on: ubuntu-latest
@@ -637,5 +575,5 @@ jobs:
with: { fetch-depth: 2 }
- name: SDK
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- run: make -C examples/rp2040/pico-w5500 test VCON_API_KEY=${{secrets.VCON_API_KEY}}
- run: make -C tutorials/pico-sdk/w5500-evb-pico-picosdk-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
+235 -299
View File
@@ -33,7 +33,7 @@ jobs:
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^test|^src/.*.[ch]' ; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: sudo apt -y update ; sudo apt -y install qemu binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test s390
run: sudo apt -y update ; sudo apt -y install binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test s390
armhf:
runs-on: ubuntu-latest
steps:
@@ -41,7 +41,7 @@ jobs:
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^test|^src/.*.[ch]' ; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: sudo apt -y update ; sudo apt -y install qemu binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test armhf
run: sudo apt -y update ; sudo apt -y install binfmt-support qemu-user-static && docker run --rm --privileged multiarch/qemu-user-static --reset -p yes && make -C test armhf
unamalgamated-mg_prefix:
runs-on: ubuntu-latest
steps:
@@ -59,7 +59,7 @@ jobs:
name: macos SSL=${{ matrix.ssl }}
env:
SSL: ${{ matrix.ssl }}
TFLAGS: -DNO_SNTP_CHECK
#TFLAGS: -DNO_SNTP_CHECK
HOMEBREW_NO_AUTO_UPDATE: 1
steps:
- uses: actions/checkout@v4
@@ -91,60 +91,6 @@ jobs:
- uses: actions/checkout@v4
- run: make -C test riscv
examples:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- run: make -C test examples_essential
- run: make -C test clean_examples_essential
examples_win:
runs-on: windows-latest
steps:
- uses: actions/checkout@v4
# - uses: egor-tensin/setup-mingw@v2
# with:
# platform: x64
- name: test they build
run: make -C test examples_win
shell: cmd
- name: test they clean
run: make -C test clean_examples_win
shell: cmd
examples_mac:
runs-on: macos-latest
env: { HOMEBREW_NO_AUTO_UPDATE: 1 }
steps:
- uses: actions/checkout@v4
- run: make -C test examples_mac
- run: make -C test clean_examples_mac
refprojs:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- run: make -C test refprojs
- run: make -C test clean_refprojs
refprojs_win:
runs-on: windows-latest
steps:
- uses: actions/checkout@v4
# - uses: egor-tensin/setup-mingw@v2
# with:
# platform: x64
- name: test they build
run: make -C test refprojs_win
shell: cmd
- name: test they clean
run: make -C test clean_refprojs_win
shell: cmd
refprojs_mac:
runs-on: macos-latest
env: { HOMEBREW_NO_AUTO_UPDATE: 1 }
steps:
- uses: actions/checkout@v4
- run: make -C test refprojs
- run: make -C test clean_refprojs
tutorials:
runs-on: ubuntu-latest
steps:
@@ -173,96 +119,52 @@ jobs:
- run: make -C test clean_tutorials_mac
generic_examples:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: esp32/uart-bridge
- path: esp8266/http-client-server
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^src|^examples/${{ matrix.example.path }}'; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: |
# nothing specific to install or do
- if: ${{ env.GO == 1 }}
run: make -C examples/${{ matrix.example.path }} build
generic_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: infineon/infineon-xmc4700_4800-lwip-rtx-rtos
- path: stm32/nucleo-g031-make-baremetal-builtin
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^src|^examples/${{ matrix.example.path }}'; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- if: ${{ env.GO == 1 }}
run: make -C examples/${{ matrix.example.path }} build
# wizard_examples:
# runs-on: ubuntu-latest
# strategy:
# fail-fast: false
# matrix:
# example:
# - path: esp32/esp32-idf
# name: ${{ matrix.example.path }}
# env:
# GO: 0
# steps:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: |
# if ./test/match_changed_files.sh '^src'; then
# echo GO=1 >> $GITHUB_ENV
# # nothing specific to install or do
# fi
# - if: ${{ env.GO == 1 }}
# run: make -C tutorials/${{ matrix.example.path }} build
device_dashboard_examples:
wizard_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: esp32/device-dashboard
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
fi
- if: ${{ env.GO == 1 }}
run: make -C examples/${{ matrix.example.path }} build
device_dashboard_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: infineon/infineon-xmc7200
- path: microchip/same54-xpro/device-dashboard
- path: infineon/xmc47_relax-make-baremetal-builtin
- path: infineon/xmc_plt2go_4400-make-baremetal-builtin
- path: infineon/xmc72_evk-make-baremetal-builtin
- path: nxp/frdm-mcxn947-make-baremetal-builtin
- path: nxp/frdm-mcxn947-make-freertos-builtin
- path: nxp/rt1020-evk-make-baremetal-builtin
- path: nxp/rt1020-evk-make-freertos-builtin
- path: nxp/rt1060-evk-make-baremetal-builtin
- path: nxp/rt1060-evk-make-freertos-builtin
- path: nxp/rt1170-evk-make-baremetal-builtin
- path: nxp/rt1170-evk-make-freertos-builtin
- path: renesas/ek-ra6m4-make-baremetal-builtin
- path: rp2040/pico-rndis-dashboard
- path: rp2040/pico-w
- path: rp2040/pico-w5500
- path: pico-sdk/pico-w-picosdk-baremetal-builtin
- path: pico-sdk/pico-2-w-picosdk-baremetal-builtin
- path: pico-sdk/w5500-evb-pico-picosdk-baremetal-builtin
- path: pico-sdk/w5500-evb-pico2-picosdk-baremetal-builtin
- path: stm32/nucleo-f429zi-make-baremetal-builtin
- path: stm32/nucleo-f429zi-make-freertos-builtin
- path: stm32/nucleo-f746zg-make-baremetal-builtin
- path: stm32/nucleo-f746zg-make-freertos-builtin
- path: stm32/nucleo-f746zg-make-freertos-tcp
- path: stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver
- path: stm32/nucleo-h563zi-make-baremetal-builtin
- path: stm32/nucleo-h563zi-make-freertos-builtin
- path: stm32/nucleo-h723zg-make-baremetal-builtin
- path: stm32/nucleo-h723zg-make-freertos-builtin
- path: stm32/nucleo-h743zi-make-baremetal-builtin
- path: stm32/nucleo-h743zi-make-freertos-builtin
@@ -277,12 +179,104 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
if ./test/match_changed_files.sh '^src'; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: make -C examples/${{ matrix.example.path }} build
run: make -C tutorials/${{ matrix.example.path }} build
generic_examples:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: http/uart-bridge/esp32
- path: http/http-client/esp8266/http-client-server
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^src|^tutorials/http/uart-bridge|^tutorials/${{ matrix.example.path }}'; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: |
# nothing specific to install or do
- if: ${{ env.GO == 1 }}
run: make -C tutorials/${{ matrix.example.path }} build
generic_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: stm32/nucleo-g031-make-baremetal-builtin
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: if ./test/match_changed_files.sh '^src|^tutorials/${{ matrix.example.path }}'; then echo GO=1 >> $GITHUB_ENV ; fi
- if: ${{ env.GO == 1 }}
run: sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
- if: ${{ env.GO == 1 }}
run: make -C tutorials/${{ matrix.example.path }} build
device_dashboard_examples:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: esp32
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
fi
- if: ${{ env.GO == 1 }}
run: make -C tutorials/http/device-dashboard/${{ matrix.example.path }} build
device_dashboard_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: http/device-dashboard/microchip/same54-xpro
- path: nxp/rt1020-evk-make-freertos-builtin
- path: nxp/rt1060-evk-make-freertos-builtin
- path: nxp/rt1170-evk-make-freertos-builtin
- path: renesas/ek-ra6m4-make-baremetal-builtin
- path: pico-sdk/pico-rndis-dashboard
- path: pico-sdk/pico-w-picosdk-freertos-lwip
- path: pico-sdk/pico-2-w-picosdk-freertos-lwip
- path: stm32/nucleo-f746zg-make-freertos-tcp
- path: stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|^tutorials/${{ matrix.example.path }}'; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: make -C tutorials/${{ matrix.example.path }} build
# mqtt_dashboard_examples:
# runs-on: ubuntu-latest
@@ -298,12 +292,12 @@ jobs:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: |
# if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
# if ./test/match_changed_files.sh '^src|tutorials/mqtt/mqtt-dashboard/device|^tutorials/${{ matrix.example.path }}'; then
# echo GO=1 >> $GITHUB_ENV
# # nothing specific to install or do
# fi
# - if: ${{ env.GO == 1 }}
# run: make -C examples/${{ matrix.example.path }} build
# run: make -C tutorials/${{ matrix.example.path }} build
mqtt_dashboard_examples_arm:
runs-on: ubuntu-latest
@@ -311,7 +305,7 @@ jobs:
fail-fast: false
matrix:
example:
- path: rp2040/pico-rndis-device
- path: pico-sdk/pico-rndis-device
name: ${{ matrix.example.path }}
env:
GO: 0
@@ -319,71 +313,13 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
if ./test/match_changed_files.sh '^src|tutorials/mqtt/mqtt-dashboard/device|^tutorials/${{ matrix.example.path }}'; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: make -C examples/${{ matrix.example.path }} build
run: make -C tutorials/${{ matrix.example.path }} build
# dual_examples:
# runs-on: ubuntu-latest
# strategy:
# fail-fast: false
# matrix:
# example:
# - path:
# name: ${{ matrix.example.path }}
# env:
# GO: 0
# steps:
# - uses: actions/checkout@v4
# with: { fetch-depth: 2 }
# - run: |
# if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
# echo GO=1 >> $GITHUB_ENV
# # nothing specific to install or do
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
# make -C examples/${{ matrix.example.path }} device_dashboard
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
# make -C examples/${{ matrix.example.path }} mqtt_dashboard
# fi
dual_examples_arm:
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
example:
- path: stm32/nucleo-h723zg-make-baremetal-builtin
name: ${{ matrix.example.path }}
env:
GO: 0
steps:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|^examples/${{ matrix.example.path }}'; then
make -C examples/${{ matrix.example.path }} device_dashboard
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh '^src|examples/mqtt-dashboard/device|^examples/${{ matrix.example.path }}'; then
make -C examples/${{ matrix.example.path }} mqtt_dashboard
fi
cube_examples:
runs-on: ubuntu-latest
env:
@@ -392,9 +328,9 @@ jobs:
- uses: actions/checkout@v4
with: { fetch-depth: 2 }
- run: |
if ./test/match_changed_files.sh '^src|examples/stm32/nucleo-*-cube-*'; then
if ./test/match_changed_files.sh '^src|tutorials/stm32/nucleo-*-cube-*'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
sudo pip install yq
fi
- if: ${{ env.GO == 1 }}
run: cd test/cube && make
@@ -408,7 +344,7 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/stm32|examples/nxp|examples/ti|examples/microchip/same" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-f7.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
@@ -416,40 +352,40 @@ jobs:
- if: ${{ env.GO == 1 }}
continue-on-error: true # continue so next test has a chance to re-flash and exit from collisions and flash failures
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/stm32/nucleo-f746zg-make-baremetal-builtin'; then
make -C examples/stm32/nucleo-f746zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-f746zg-make-baremetal-builtin'; then
make -C tutorials/stm32/nucleo-f746zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f746zg-make-freertos-builtin'; then
make -C examples/stm32/nucleo-f746zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f746zg-make-freertos-builtin'; then
make -C tutorials/stm32/nucleo-f746zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f746zg-make-freertos-tcp'; then
make -C examples/stm32/nucleo-f746zg-make-freertos-tcp test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f746zg-make-freertos-tcp'; then
make -C tutorials/stm32/nucleo-f746zg-make-freertos-tcp test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- name: Cube
run: |
echo GO=0 >> $GITHUB_ENV
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f7.*-cube-'; then
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f7.*-cube-'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f746zg-cube-baremetal-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f746zg-cube-freertos-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
# fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f746zg-cube-baremetal-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f746zg-cube-freertos-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f746zg-cube-freertos-lwip'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f746zg-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f746zg-cube-freertos-lwip'; then
make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f746zg-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=5
fi
@@ -462,42 +398,42 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/stm32/nucleo-f4.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-f4.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/stm32/nucleo-f429zi-make-baremetal-builtin'; then
make -C examples/stm32/nucleo-f429zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-f429zi-make-baremetal-builtin'; then
make -C tutorials/stm32/nucleo-f429zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f429zi-make-freertos-builtin'; then
make -C examples/stm32/nucleo-f429zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f429zi-make-freertos-builtin'; then
make -C tutorials/stm32/nucleo-f429zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- name: Cube
run: |
echo GO=0 >> $GITHUB_ENV
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f4.*-cube-'; then
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f4.*-cube-'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f429zi-cube-baremetal-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f429zi-cube-freertos-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
# fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f429zi-cube-baremetal-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f429zi-cube-freertos-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-f429zi-cube-freertos-lwip'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-f429zi-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-f429zi-cube-freertos-lwip'; then
make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-f429zi-cube-freertos-lwip VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=2
fi
test_h743:
@@ -509,38 +445,38 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/stm32/nucleo-h74.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h74.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/stm32/nucleo-h743zi-make-baremetal-builtin'; then
make -C examples/stm32/nucleo-h743zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h743zi-make-baremetal-builtin'; then
make -C tutorials/stm32/nucleo-h743zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h743zi-make-freertos-builtin'; then
make -C examples/stm32/nucleo-h743zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- name: Cube
run: |
echo GO=0 >> $GITHUB_ENV
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h74.*-cube-'; then
echo GO=1 >> $GITHUB_ENV
# nothing specific to install or do
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h743zi-cube-baremetal-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-h743zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h743zi-cube-freertos-builtin'; then
make -C test/cube test PROJECTS=../../examples/stm32/nucleo-h743zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h743zi-make-freertos-builtin'; then
make -C tutorials/stm32/nucleo-h743zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
# - name: Cube
# run: |
# echo GO=0 >> $GITHUB_ENV
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h74.*-cube-'; then
# echo GO=1 >> $GITHUB_ENV
# # nothing specific to install or do
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h743zi-cube-baremetal-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-h743zi-cube-baremetal-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
# fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h743zi-cube-freertos-builtin'; then
# make -C test/cube test PROJECTS=../../tutorials/stm32/nucleo-h743zi-cube-freertos-builtin VCON_API_KEY=${{secrets.VCON_API_KEY}} DEVICE=6
# fi
test_h723:
runs-on: ubuntu-latest
@@ -551,20 +487,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/stm32/nucleo-h72.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h72.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/stm32/nucleo-h723zg-make-baremetal-builtin'; then
make -C examples/stm32/nucleo-h723zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h723zg-make-baremetal-builtin'; then
make -C tutorials/stm32/nucleo-h723zg-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h723zg-make-freertos-builtin'; then
make -C examples/stm32/nucleo-h723zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h723zg-make-freertos-builtin'; then
make -C tutorials/stm32/nucleo-h723zg-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_h5:
@@ -576,20 +512,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/stm32/nucleo-h5.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h5.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/stm32/nucleo-h563zi-make-baremetal-builtin'; then
make -C examples/stm32/nucleo-h563zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/stm32/nucleo-h563zi-make-baremetal-builtin'; then
make -C tutorials/stm32/nucleo-h563zi-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/stm32/nucleo-h563zi-make-freertos-builtin'; then
make -C examples/stm32/nucleo-h563zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/stm32/nucleo-h563zi-make-freertos-builtin'; then
make -C tutorials/stm32/nucleo-h563zi-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_rt1020:
@@ -601,20 +537,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/nxp/rt1020.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/nxp/rt1020.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/nxp/rt1020-evk-make-baremetal-builtin'; then
make -C examples/nxp/rt1020-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/nxp/rt1020-evk-make-baremetal-builtin'; then
make -C tutorials/nxp/rt1020-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/nxp/rt1020-evk-make-freertos-builtin'; then
make -C examples/nxp/rt1020-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/nxp/rt1020-evk-make-freertos-builtin'; then
make -C tutorials/nxp/rt1020-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_rt1060:
@@ -626,20 +562,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/nxp/rt1060.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/nxp/rt1060.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/nxp/rt1060-evk-make-baremetal-builtin'; then
make -C examples/nxp/rt1060-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/nxp/rt1060-evk-make-baremetal-builtin'; then
make -C tutorials/nxp/rt1060-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/nxp/rt1060-evk-make-freertos-builtin'; then
make -C examples/nxp/rt1060-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/nxp/rt1060-evk-make-freertos-builtin'; then
make -C tutorials/nxp/rt1060-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_rt1170:
@@ -651,20 +587,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/nxp/rt1170.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/nxp/rt1170.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/nxp/rt1170-evk-make-baremetal-builtin'; then
make -C examples/nxp/rt1170-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/nxp/rt1170-evk-make-baremetal-builtin'; then
make -C tutorials/nxp/rt1170-evk-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/nxp/rt1170-evk-make-freertos-builtin'; then
make -C examples/nxp/rt1170-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/nxp/rt1170-evk-make-freertos-builtin'; then
make -C tutorials/nxp/rt1170-evk-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_ra6m4:
@@ -676,20 +612,20 @@ jobs:
with: { fetch-depth: 3 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/renesas/ek-ra6m4.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/renesas/ek-ra6m4.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
continue-on-error: true
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/renesas/ek-ra6m4-make-baremetal-builtin'; then
make -C examples/renesas/ek-ra6m4-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/renesas/ek-ra6m4-make-baremetal-builtin'; then
make -C tutorials/renesas/ek-ra6m4-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
# - if: ${{ env.GO == 1 }}
# run: |
# if ./test/match_changed_files.sh 'examples/renesas/ek-ra6m4-make-freertos-builtin'; then
# make -C examples/renesas/ek-ra6m4-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
# if ./test/match_changed_files.sh 'tutorials/renesas/ek-ra6m4-make-freertos-builtin'; then
# make -C tutorials/renesas/ek-ra6m4-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
# fi
test_tm4c:
@@ -701,19 +637,19 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/ti/ek-tm4c.*-make-" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/ti/ek-tm4c.*-make-" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/ti/ek-tm4c1294xl-make-baremetal-builtin'; then
make -C examples/ti/ek-tm4c1294xl-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard|tutorials/ti/ek-tm4c1294xl-make-baremetal-builtin'; then
make -C tutorials/ti/ek-tm4c1294xl-make-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/ti/ek-tm4c1294xl-make-freertos-builtin'; then
make -C examples/ti/ek-tm4c1294xl-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh 'tutorials/ti/ek-tm4c1294xl-make-freertos-builtin'; then
make -C tutorials/ti/ek-tm4c1294xl-make-freertos-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_same54:
@@ -725,19 +661,19 @@ jobs:
with: { fetch-depth: 2 }
- name: baremetal
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/microchip/same54-xpro" ; then
if ./test/match_changed_files.sh "^src|tutorials/http/device-dashboard|tutorials/mqtt/mqtt-client" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh '^src|examples/device-dashboard|examples/microchip/same54-xpro/device-dashboard'; then
make -C examples/microchip/same54-xpro/device-dashboard test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/http/device-dashboard'; then
make -C tutorials/http/device-dashboard/microchip/same54-xpro test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
- if: ${{ env.GO == 1 }}
run: |
if ./test/match_changed_files.sh 'examples/microchip/same54-xpro/mqtt-client'; then
make -C examples/microchip/same54-xpro/mqtt-client test VCON_API_KEY=${{secrets.VCON_API_KEY}}
if ./test/match_changed_files.sh '^src|tutorials/mqtt/mqtt-client'; then
make -C tutorials/mqtt/mqtt-client/microchip/same54-xpro test VCON_API_KEY=${{secrets.VCON_API_KEY}}
fi
test_pico_w5500:
@@ -749,10 +685,10 @@ jobs:
with: { fetch-depth: 2 }
- name: SDK
run: |
if ./test/match_changed_files.sh "^src|examples/device-dashboard|examples/rp2040/pico-w5500" ; then
if ./test/match_changed_files.sh "^src" ; then
echo GO=1 >> $GITHUB_ENV
sudo apt -y update && sudo apt -y install gcc-arm-none-eabi
fi
- if: ${{ env.GO == 1 }}
run: make -C examples/rp2040/pico-w5500 test VCON_API_KEY=${{secrets.VCON_API_KEY}}
run: make -C tutorials/pico-sdk/w5500-evb-pico-picosdk-baremetal-builtin test VCON_API_KEY=${{secrets.VCON_API_KEY}}
+1 -1
View File
@@ -1,5 +1,5 @@
Copyright (c) 2004-2013 Sergey Lyubka
Copyright (c) 2013-2024 Cesanta Software Limited
Copyright (c) 2013-2025 Cesanta Software Limited
All rights reserved
This software is dual-licensed: you can redistribute it and/or modify
+11 -2
View File
@@ -4,6 +4,7 @@
[![Build Status]( https://github.com/cesanta/mongoose/workflows/build/badge.svg)](https://github.com/cesanta/mongoose/actions)
[![Code Coverage](https://codecov.io/gh/cesanta/mongoose/branch/master/graph/badge.svg)](https://codecov.io/gh/cesanta/mongoose)
[![Fuzzing Status](https://oss-fuzz-build-logs.storage.googleapis.com/badges/mongoose.svg)](https://bugs.chromium.org/p/oss-fuzz/issues/list?sort=-opened&can=1&q=proj:mongoose)
[![Gurubase](https://img.shields.io/badge/Gurubase-Ask%20Mongoose%20Guru-006BFF)](https://gurubase.io/g/mongoose)
Mongoose is a network library for C/C++. It provides event-driven non-blocking
APIs for TCP, UDP, HTTP, WebSocket, MQTT, and other protocols. It is designed
@@ -14,7 +15,7 @@ robust, and easy. Features include:
- Cross-platform:
- works on Linux/UNIX, MacOS, Windows, Android
- works on STM32, NXP, ESP32, NRF52, TI, Microchip, and other
- works on ST, NXP, ESP32, Nordic, TI, Microchip, Infineon, Renesas and other chips
- write code once - and it'll work everywhere
- ideal for the unification of the network infrastructure code across company
- Built-in protocols: plain TCP/UDP, SNTP, HTTP, MQTT, Websocket, and other
@@ -70,7 +71,7 @@ HTTP server implements a REST API that returns current time. JSON formatting:
static void ev_handler(struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_HTTP_MSG) {
struct mg_http_message *hm = (struct mg_http_message *) ev_data;
if (mg_http_match_uri(hm, "/api/time/get")) {
if (mg_match(hm->uri, mg_str("/api/time/get"), NULL)) {
mg_http_reply(c, 200, "", "{%m:%lu}\n", MG_ESC("time"), time(NULL));
} else {
mg_http_reply(c, 500, "", "{%m:%m}\n", MG_ESC("error"), MG_ESC("Unsupported URI"));
@@ -170,6 +171,14 @@ We take security seriously:
of which we get notified and in case of any issue, act similar to (3).
## Articles
Technical guides and deep dives into embedded web servers, WebUI integration and embedded networking technologies:
- [Embedded Web Server: A Comprehensive Guide for Modern Connected Devices](https://mongoose.ws/articles/embedded-web-server-a-comprehensive-guide-for-modern-connected-devices/)
- [Building Embedded Web Device Dashboards](https://mongoose.ws/articles/building-embedded-web-device-dashboard/)
- [ESP32 Device Dashboard: A Step-by-Step Guide for Developers](https://mongoose.ws/articles/esp32-device-dashboard/)
## Contributions
Contributions are welcome! Please follow the guidelines below:
-24
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@@ -1,24 +0,0 @@
# Mongoose Network Library Examples
In order to build and run any of the existing examples, please follow:
https://mongoose.ws/documentation/#how-to-build-and-run-examples
## Contributing
Rules for creating a new example:
- Makefile golden reference for desktop/server example: [http-server](http-server)
- Makefile golden reference for the embedded example:
[stm32/nucleo-f746zg-baremetal](stm32/nucleo-f746zg-baremetal)
- An example must build on Windows, Mac and Ubuntu Linux systems
- Assume that user installed tools according to https://mongoose.ws/tutorials/tools/
- Makefile must not include any other make files
- Use `CFLAGS` for system-specific compilation options
- Use `CFLAGS_MONGOOSE` for mongoose-specific compilation options
- Use `$(CFLAGS) $(CFLAGS_MONGOOSE) $(CFLAGS_EXTRA)` to compile
- If external repository is required, download it on demand using git
shallow clone. See embedded example golden reference
- Keep Makefile as short as possible, but verbose to understand it easily
- Symlink files when required, like `mongoose.c`, `ca.pem`, etc. Make no copies
- Example's README.md should contain only the title and the link to mongoose.ws
tutorial page
-28
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@@ -1,28 +0,0 @@
all:
example:
true
arduino: ENV = -v $(CWD):/root
arduino:
curl -sL http://downloads.arduino.cc/arduino-1.8.19-linux64.tar.xz | unxz | tar -xf -
mv arduino-* $@
arduino-xiao-board:
./arduino/arduino --pref "boardsmanager.additional.urls=https://files.seeedstudio.com/arduino/package_seeeduino_boards_index.json" --save-prefs
./arduino/arduino --pref "compiler.warning_level=all" --save-prefs
./arduino/arduino --install-boards Seeeduino:samd
arduino-xiao: arduino arduino-xiao-board
cd w5500-http && ../arduino/arduino --verbose --verify --board Seeeduino:samd:seeed_XIAO_m0 w5500-http.ino
cd w5500-mqtt && ../arduino/arduino --verbose --verify --board Seeeduino:samd:seeed_XIAO_m0 w5500-mqtt.ino
arduino-nano: arduino
cd w5500-http && ../arduino/arduino --pref compiler.cpp.extra_flags=-DMG_ENABLE_LOG=0 --verbose --verify --board arduino:avr:nano w5500-http.ino
cd w5500-mqtt && ../arduino/arduino --pref compiler.cpp.extra_flags=-DMG_ENABLE_LOG=0 --verbose --verify --board arduino:avr:nano w5500-mqtt.ino
clean:
rm -rf arduino
cleanall: clean #otherwise some parts of xiao-board installation will fail as already installed
rm -rf ~/.arduino15 ~/.oracle_jre_usage
@@ -1,17 +0,0 @@
#pragma once
#include "Arduino.h"
#include <errno.h>
#include <stdarg.h>
#include <stdio.h>
#include <time.h>
#define MG_ARCH MG_ARCH_CUSTOM
#define MG_ENABLE_SOCKET 0
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_DRIVER_W5500 1
#define MG_ENABLE_TCPIP_DRIVER_INIT 0
#define mkdir(a, b) (-1)
#define MG_IO_SIZE 128
//#define MG_ENABLE_LOG 0
@@ -1,49 +0,0 @@
#include <SPI.h>
#include "mongoose.h"
#define SS_PIN 3 // Slave select pin
struct mg_mgr mgr; // Mongoose event manager
struct mg_tcpip_spi spi = {
NULL, // SPI data
[](void *) { digitalWrite(SS_PIN, LOW); }, // begin transation
[](void *) { digitalWrite(SS_PIN, HIGH); }, // end transaction
[](void *, uint8_t c) { return SPI.transfer(c); }, // execute transaction
};
struct mg_tcpip_if mif = {.mac = {2, 0, 1, 2, 3, 5}}; // network interface
void setup() {
Serial.begin(115200);
pinMode(SS_PIN, OUTPUT);
SPI.begin();
// Set logging function to a serial print
mg_log_set_fn([](char ch, void *) { Serial.print(ch); }, NULL);
mg_mgr_init(&mgr);
delay(3000);
MG_INFO(("Starting TCP/IP stack..."));
mif.driver = &mg_tcpip_driver_w5500;
mif.driver_data = &spi;
mg_tcpip_init(&mgr, &mif);
// Start a 5 sec timer, print status message periodically
mg_timer_add(
&mgr, 5000, MG_TIMER_REPEAT,
[](void *) {
MG_INFO(("ethernet: %s", mg_tcpip_driver_w5500.up(&mif) ? "up" : "down"));
},
NULL);
// Setup HTTP listener. Respond "ok" on any HTTP request
mg_http_listen(
&mgr, "http://0.0.0.0",
[](struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_HTTP_MSG) mg_http_reply(c, 200, "", "ok\n");
},
&mgr);
}
void loop() {
mg_mgr_poll(&mgr, 1);
}
@@ -1,17 +0,0 @@
#pragma once
#include "Arduino.h"
#include <errno.h>
#include <stdarg.h>
#include <stdio.h>
#include <time.h>
#define MG_ARCH MG_ARCH_CUSTOM
#define MG_ENABLE_SOCKET 0
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_DRIVER_W5500 1
#define MG_ENABLE_TCPIP_DRIVER_INIT 0
#define mkdir(a, b) (-1)
#define MG_IO_SIZE 512
//#define MG_ENABLE_LOG 0
-58
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@@ -1,58 +0,0 @@
#include "net.h"
#define MQTT_SERVER "mqtt://broker.hivemq.com:1883"
struct mg_connection *mqtt_connection;
const char *mqtt_subscribe_topic = "mg/rx";
const char *mqtt_publish_topic = "mg/tx";
struct mg_mgr mgr; // Mongoose event manager
struct mg_tcpip_if mif = {.mac = {2, 0, 1, 2, 3, 5}}; // network interface
void mqtt_publish(const char *message) {
struct mg_mqtt_opts opts = {};
opts.topic = mg_str(mqtt_publish_topic);
opts.message = mg_str(message);
if (mqtt_connection) mg_mqtt_pub(mqtt_connection, &opts);
}
static void fn(struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_MQTT_OPEN) {
MG_INFO(("%lu CONNECTED to %s", c->id, MQTT_SERVER));
struct mg_mqtt_opts opts = {};
opts.topic = mg_str(mqtt_subscribe_topic);
mg_mqtt_sub(c, &opts);
MG_INFO(("%lu SUBSCRIBED to %s", c->id, mqtt_subscribe_topic));
} else if (ev == MG_EV_MQTT_MSG) {
// Received MQTT message
struct mg_mqtt_message *mm = (struct mg_mqtt_message *) ev_data;
MG_INFO(("%lu RECEIVED %.*s <- %.*s", c->id, (int) mm->data.len,
mm->data.buf, (int) mm->topic.len, mm->topic.buf));
exec_command(mm->data.buf, mm->data.len);
} else if (ev == MG_EV_CLOSE) {
MG_INFO(("%lu CLOSED", c->id));
mqtt_connection = NULL;
}
}
static void timer_fn(void *arg) {
struct mg_mgr *mgr = (struct mg_mgr *) arg;
struct mg_mqtt_opts opts;
memset(&opts, 0, sizeof(opts));
opts.clean = true;
if (mif.state == MG_TCPIP_STATE_READY && mqtt_connection == NULL) {
mqtt_connection = mg_mqtt_connect(mgr, MQTT_SERVER, &opts, fn, NULL);
}
// MG_INFO(("Eth: %d, MQTT: %p", mif.state, mqtt_connection));
}
void net_init(void) {
// Set Mongoose logging function to a serial print
mg_mgr_init(&mgr);
mif.driver = &mg_tcpip_driver_w5500;
mif.driver_data = &spi;
mg_tcpip_init(&mgr, &mif);
// Start a timer that keeps MQTT connection alive
mg_timer_add(&mgr, 3000, MG_TIMER_REPEAT, timer_fn, &mgr);
}
-16
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@@ -1,16 +0,0 @@
#pragma once
#include "mongoose.h"
#ifdef __cplusplus
extern "C" {
#endif
extern struct mg_tcpip_spi spi;
extern struct mg_mgr mgr;
void mqtt_publish(const char *message);
void net_init(void);
void exec_command(const char *req, size_t req_len);
#ifdef __cplusplus
}
#endif
@@ -1,51 +0,0 @@
#include <SPI.h>
#include "net.h"
#define SS_PIN 17 // Slave select pin
struct mg_tcpip_spi spi = {
NULL, // SPI data
[](void *) { digitalWrite(SS_PIN, LOW); }, // Begin transaction
[](void *) { digitalWrite(SS_PIN, HIGH); }, // End transaction
[](void *, uint8_t c) { return SPI.transfer(c); }, // Execute transaction
};
void exec_command(const char *req, size_t req_len) {
char res[100];
if (req_len == 2 && strncmp(req, "on", req_len) == 0) {
digitalWrite(LED_BUILTIN, true);
snprintf(res, sizeof(res), "LED on");
} else if (req_len == 3 && strncmp(req, "off", req_len) == 0) {
digitalWrite(LED_BUILTIN, false);
snprintf(res, sizeof(res), "LED off");
} else {
snprintf(res, sizeof(res), "Unknown command: [%.*s]", (int) req_len, req);
}
Serial.println(res);
mqtt_publish(res);
}
static void process_input(char c) {
static char buf[100];
static size_t len = 0;
char response[100];
if (c != '\n' && c != '\0') buf[len++] = c; // Append to the buffer
if (len >= sizeof(buf)) len = 0; // On overflow, reset
if (c == '\n' && len > 0) {
exec_command(buf, len);
len = 0;
}
}
void setup() {
Serial.begin(115200);
SPI.begin();
pinMode(SS_PIN, OUTPUT);
pinMode(LED_BUILTIN, OUTPUT);
mg_log_set_fn([](char ch, void *) { Serial.print(ch); }, NULL);
net_init();
}
void loop() {
if (Serial.available()) process_input(Serial.read());
mg_mgr_poll(&mgr, 1);
}
-56
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@@ -1,56 +0,0 @@
PROG ?= ./example # Program we are building
PACK ?= ./pack # Packing executable
DELETE = rm -rf # Command to remove files
GZIP ?= gzip # For compressing files in web_root/
OUT ?= -o $(PROG) # Compiler argument for output file
SOURCES = main.c mongoose.c net.c packed_fs.c # Source code files
CFLAGS = -W -Wall -Wextra -g -I. # Build options
NPX ?= npx
# Mongoose build options. See https://mongoose.ws/documentation/#build-options
CFLAGS_MONGOOSE += -DMG_ENABLE_PACKED_FS=1
ifeq ($(OS),Windows_NT) # Windows settings. Assume MinGW compiler. To use VC: make CC=cl CFLAGS=/MD OUT=/Feprog.exe
PROG = example.exe # Use .exe suffix for the binary
PACK = pack.exe # Packing executable
CC = gcc # Use MinGW gcc compiler
CFLAGS += -lws2_32 # Link against Winsock library
DELETE = cmd /C del /Q /F /S # Command prompt command to delete files
GZIP = echo # No gzip on Windows
endif
# Default target. Build and run program
all: $(PROG)
$(RUN) $(PROG) $(ARGS)
# Build program from sources
$(PROG): $(SOURCES)
$(CC) $(SOURCES) $(CFLAGS) $(CFLAGS_MONGOOSE) $(CFLAGS_EXTRA) $(OUT)
# Bundle JS libraries (preact, preact-router, ...) into a single file
web_root/bundle.js:
curl -s https://npm.reversehttp.com/preact,preact/hooks,htm/preact,preact-router -o $@
# Create optimised CSS. Prerequisite: npm -g i tailwindcss tailwindcss-font-inter
web_root/main.css: web_root/index.html $(wildcard web_root/*.js)
$(NPX) tailwindcss -o $@ --minify
# Generate packed filesystem for serving Web UI
packed_fs.c: $(wildcard web_root/*) $(wildcard certs/*) Makefile web_root/main.css web_root/bundle.js
$(GZIP) web_root/*
$(CC) ../../test/pack.c -o $(PACK)
$(PACK) web_root/* certs/* > $@
$(GZIP) -d web_root/*
mbedtls:
git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@
ifeq ($(TLS), mbedtls)
CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include
CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c
$(PROG): mbedtls
endif
# Cleanup. Delete built program and all build artifacts
clean:
$(DELETE) $(PROG) $(PACK) *.o *.obj *.exe *.dSYM mbedtls
-1
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@@ -1 +0,0 @@
../../mongoose.c
-1
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@@ -1 +0,0 @@
../../mongoose.h
-306
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@@ -1,306 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#include "net.h"
// Authenticated user.
// A user can be authenticated by:
// - a name:pass pair, passed in a header Authorization: Basic .....
// - an access_token, passed in a header Cookie: access_token=....
// When a user is shown a login screen, she enters a user:pass. If successful,
// a server responds with a http-only access_token cookie set.
struct user {
const char *name, *pass, *access_token;
};
// Settings
struct settings {
bool log_enabled;
int log_level;
long brightness;
char *device_name;
};
static struct settings s_settings = {true, 1, 57, NULL};
static const char *s_json_header =
"Content-Type: application/json\r\n"
"Cache-Control: no-cache\r\n";
int ui_event_next(int no, struct ui_event *e) {
if (no < 0 || no >= MAX_EVENTS_NO) return 0;
srand((unsigned) no);
e->type = (uint8_t) rand() % 4;
e->prio = (uint8_t) rand() % 3;
e->timestamp =
(unsigned long) ((int64_t) mg_now() - 86400 * 1000 /* one day back */ +
no * 300 * 1000 /* 5 mins between alerts */ +
1000 * (rand() % 300) /* randomize event time */) /
1000UL;
mg_snprintf(e->text, MAX_EVENT_TEXT_SIZE, "event#%d", no);
return no + 1;
}
static void timer_sntp_fn(void *param) { // SNTP timer function. Sync up time
mg_sntp_connect(param, "udp://time.google.com:123", NULL, NULL);
}
// Parse HTTP requests, return authenticated user or NULL
static struct user *authenticate(struct mg_http_message *hm) {
// In production, make passwords strong and tokens randomly generated
// In this example, user list is kept in RAM. In production, it can
// be backed by file, database, or some other method.
static struct user users[] = {
{"admin", "admin", "admin_token"},
{"user1", "user1", "user1_token"},
{"user2", "user2", "user2_token"},
{NULL, NULL, NULL},
};
char user[64], pass[64];
struct user *u, *result = NULL;
mg_http_creds(hm, user, sizeof(user), pass, sizeof(pass));
MG_VERBOSE(("user [%s] pass [%s]", user, pass));
if (user[0] != '\0' && pass[0] != '\0') {
// Both user and password is set, search by user/password
for (u = users; result == NULL && u->name != NULL; u++)
if (strcmp(user, u->name) == 0 && strcmp(pass, u->pass) == 0) result = u;
} else if (user[0] == '\0') {
// Only password is set, search by token
for (u = users; result == NULL && u->name != NULL; u++)
if (strcmp(pass, u->access_token) == 0) result = u;
}
return result;
}
static void handle_login(struct mg_connection *c, struct user *u) {
char cookie[256];
mg_snprintf(cookie, sizeof(cookie),
"Set-Cookie: access_token=%s; Path=/; "
"%sHttpOnly; SameSite=Lax; Max-Age=%d\r\n",
u->access_token, c->is_tls ? "Secure; " : "", 3600 * 24);
mg_http_reply(c, 200, cookie, "{%m:%m}", MG_ESC("user"), MG_ESC(u->name));
}
static void handle_logout(struct mg_connection *c) {
char cookie[256];
mg_snprintf(cookie, sizeof(cookie),
"Set-Cookie: access_token=; Path=/; "
"Expires=Thu, 01 Jan 1970 00:00:00 UTC; "
"%sHttpOnly; Max-Age=0; \r\n",
c->is_tls ? "Secure; " : "");
mg_http_reply(c, 200, cookie, "true\n");
}
static void handle_debug(struct mg_connection *c, struct mg_http_message *hm) {
int level = mg_json_get_long(hm->body, "$.level", MG_LL_DEBUG);
mg_log_set(level);
mg_http_reply(c, 200, "", "Debug level set to %d\n", level);
}
static size_t print_int_arr(void (*out)(char, void *), void *ptr, va_list *ap) {
size_t i, len = 0, num = va_arg(*ap, size_t); // Number of items in the array
int *arr = va_arg(*ap, int *); // Array ptr
for (i = 0; i < num; i++) {
len += mg_xprintf(out, ptr, "%s%d", i == 0 ? "" : ",", arr[i]);
}
return len;
}
static void handle_stats_get(struct mg_connection *c) {
int points[] = {21, 22, 22, 19, 18, 20, 23, 23, 22, 22, 22, 23, 22};
mg_http_reply(c, 200, s_json_header, "{%m:%d,%m:%d,%m:[%M]}\n",
MG_ESC("temperature"), 21, //
MG_ESC("humidity"), 67, //
MG_ESC("points"), print_int_arr,
sizeof(points) / sizeof(points[0]), points);
}
static size_t print_events(void (*out)(char, void *), void *ptr, va_list *ap) {
size_t len = 0;
struct ui_event ev;
int pageno = va_arg(*ap, int);
int no = (pageno - 1) * EVENTS_PER_PAGE;
int end = no + EVENTS_PER_PAGE;
while ((no = ui_event_next(no, &ev)) != 0 && no <= end) {
len += mg_xprintf(out, ptr, "%s{%m:%lu,%m:%d,%m:%d,%m:%m}\n", //
len == 0 ? "" : ",", //
MG_ESC("time"), ev.timestamp, //
MG_ESC("type"), ev.type, //
MG_ESC("prio"), ev.prio, //
MG_ESC("text"), MG_ESC(ev.text));
}
return len;
}
static void handle_events_get(struct mg_connection *c,
struct mg_http_message *hm) {
int pageno = mg_json_get_long(hm->body, "$.page", 1);
mg_http_reply(c, 200, s_json_header, "{%m:[%M], %m:%d}\n", MG_ESC("arr"),
print_events, pageno, MG_ESC("totalCount"), MAX_EVENTS_NO);
}
static void handle_settings_set(struct mg_connection *c, struct mg_str body) {
struct settings settings;
char *s = mg_json_get_str(body, "$.device_name");
bool ok = true;
memset(&settings, 0, sizeof(settings));
mg_json_get_bool(body, "$.log_enabled", &settings.log_enabled);
settings.log_level = mg_json_get_long(body, "$.log_level", 0);
settings.brightness = mg_json_get_long(body, "$.brightness", 0);
if (s && strlen(s) < MAX_DEVICE_NAME) {
free(settings.device_name);
settings.device_name = s;
} else {
free(s);
}
s_settings = settings; // Save to the device flash
mg_http_reply(c, 200, s_json_header,
"{%m:%s,%m:%m}", //
MG_ESC("status"), ok ? "true" : "false", //
MG_ESC("message"), MG_ESC(ok ? "Success" : "Failed"));
}
static void handle_settings_get(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header, "{%m:%s,%m:%hhu,%m:%hhu,%m:%m}\n", //
MG_ESC("log_enabled"),
s_settings.log_enabled ? "true" : "false", //
MG_ESC("log_level"), s_settings.log_level, //
MG_ESC("brightness"), s_settings.brightness, //
MG_ESC("device_name"), MG_ESC(s_settings.device_name));
}
static void handle_firmware_upload(struct mg_connection *c,
struct mg_http_message *hm) {
char name[64], offset[20], total[20];
struct mg_str data = hm->body;
long ofs = -1, tot = -1;
name[0] = offset[0] = '\0';
mg_http_get_var(&hm->query, "name", name, sizeof(name));
mg_http_get_var(&hm->query, "offset", offset, sizeof(offset));
mg_http_get_var(&hm->query, "total", total, sizeof(total));
MG_INFO(("File %s, offset %s, len %lu", name, offset, data.len));
if ((ofs = mg_json_get_long(mg_str(offset), "$", -1)) < 0 ||
(tot = mg_json_get_long(mg_str(total), "$", -1)) < 0) {
mg_http_reply(c, 500, "", "offset and total not set\n");
} else if (ofs == 0 && mg_ota_begin((size_t) tot) == false) {
mg_http_reply(c, 500, "", "mg_ota_begin(%ld) failed\n", tot);
} else if (data.len > 0 && mg_ota_write(data.buf, data.len) == false) {
mg_http_reply(c, 500, "", "mg_ota_write(%lu) @%ld failed\n", data.len, ofs);
mg_ota_end();
} else if (data.len == 0 && mg_ota_end() == false) {
mg_http_reply(c, 500, "", "mg_ota_end() failed\n", tot);
} else {
mg_http_reply(c, 200, s_json_header, "true\n");
if (data.len == 0) {
// Successful mg_ota_end() called, schedule device reboot
mg_timer_add(c->mgr, 500, 0, (void (*)(void *)) mg_device_reset, NULL);
}
}
}
static void handle_firmware_commit(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header, "%s\n",
mg_ota_commit() ? "true" : "false");
}
static void handle_firmware_rollback(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header, "%s\n",
mg_ota_rollback() ? "true" : "false");
}
static size_t print_status(void (*out)(char, void *), void *ptr, va_list *ap) {
int fw = va_arg(*ap, int);
return mg_xprintf(out, ptr, "{%m:%d,%m:%c%lx%c,%m:%u,%m:%u}\n",
MG_ESC("status"), mg_ota_status(fw), MG_ESC("crc32"), '"',
mg_ota_crc32(fw), '"', MG_ESC("size"), mg_ota_size(fw),
MG_ESC("timestamp"), mg_ota_timestamp(fw));
}
static void handle_firmware_status(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header, "[%M,%M]\n", print_status,
MG_FIRMWARE_CURRENT, print_status, MG_FIRMWARE_PREVIOUS);
}
static void handle_device_reset(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header, "true\n");
mg_timer_add(c->mgr, 500, 0, (void (*)(void *)) mg_device_reset, NULL);
}
static void handle_device_eraselast(struct mg_connection *c) {
size_t ss = mg_flash_sector_size(), size = mg_flash_size();
char *base = (char *) mg_flash_start(), *last = base + size - ss;
if (mg_flash_bank() == 2) last -= size / 2;
mg_flash_erase(last);
mg_http_reply(c, 200, s_json_header, "true\n");
}
// HTTP request handler function
static void fn(struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_ACCEPT) {
if (c->fn_data != NULL) { // TLS listener!
struct mg_tls_opts opts = {0};
opts.cert = mg_unpacked("/certs/server_cert.pem");
opts.key = mg_unpacked("/certs/server_key.pem");
mg_tls_init(c, &opts);
}
} else if (ev == MG_EV_HTTP_MSG) {
struct mg_http_message *hm = (struct mg_http_message *) ev_data;
struct user *u = authenticate(hm);
if (mg_match(hm->uri, mg_str("/api/#"), NULL) && u == NULL) {
mg_http_reply(c, 403, "", "Not Authorised\n");
} else if (mg_match(hm->uri, mg_str("/api/login"), NULL)) {
handle_login(c, u);
} else if (mg_match(hm->uri, mg_str("/api/logout"), NULL)) {
handle_logout(c);
} else if (mg_match(hm->uri, mg_str("/api/debug"), NULL)) {
handle_debug(c, hm);
} else if (mg_match(hm->uri, mg_str("/api/stats/get"), NULL)) {
handle_stats_get(c);
} else if (mg_match(hm->uri, mg_str("/api/events/get"), NULL)) {
handle_events_get(c, hm);
} else if (mg_match(hm->uri, mg_str("/api/settings/get"), NULL)) {
handle_settings_get(c);
} else if (mg_match(hm->uri, mg_str("/api/settings/set"), NULL)) {
handle_settings_set(c, hm->body);
} else if (mg_match(hm->uri, mg_str("/api/firmware/upload"), NULL)) {
handle_firmware_upload(c, hm);
} else if (mg_match(hm->uri, mg_str("/api/firmware/commit"), NULL)) {
handle_firmware_commit(c);
} else if (mg_match(hm->uri, mg_str("/api/firmware/rollback"), NULL)) {
handle_firmware_rollback(c);
} else if (mg_match(hm->uri, mg_str("/api/firmware/status"), NULL)) {
handle_firmware_status(c);
} else if (mg_match(hm->uri, mg_str("/api/device/reset"), NULL)) {
handle_device_reset(c);
} else if (mg_match(hm->uri, mg_str("/api/device/eraselast"), NULL)) {
handle_device_eraselast(c);
} else {
struct mg_http_serve_opts opts;
memset(&opts, 0, sizeof(opts));
#if MG_ARCH == MG_ARCH_UNIX || MG_ARCH == MG_ARCH_WIN32
opts.root_dir = "web_root"; // On workstations, use filesystem
#else
opts.root_dir = "/web_root"; // On embedded, use packed files
opts.fs = &mg_fs_packed;
#endif
mg_http_serve_dir(c, ev_data, &opts);
}
MG_DEBUG(("%lu %.*s %.*s -> %.*s", c->id, (int) hm->method.len,
hm->method.buf, (int) hm->uri.len, hm->uri.buf, (int) 3,
&c->send.buf[9]));
}
}
void web_init(struct mg_mgr *mgr) {
s_settings.device_name = strdup("My Device");
mg_http_listen(mgr, HTTP_URL, fn, NULL);
mg_http_listen(mgr, HTTPS_URL, fn, (void *) 1);
mg_timer_add(mgr, 3600 * 1000, MG_TIMER_RUN_NOW | MG_TIMER_REPEAT,
timer_sntp_fn, mgr);
}
File diff suppressed because it is too large. Load diff
@@ -1 +0,0 @@
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New,monospace;font-size:1em}small{font-size:80%}sub,sup{font-size:75%;line-height:0;position:relative;vertical-align:initial}sub{bottom:-.25em}sup{top:-.5em}table{text-indent:0;border-color:inherit;border-collapse:collapse}button,input,optgroup,select,textarea{font-family:inherit;font-size:100%;font-weight:inherit;line-height:inherit;color:inherit;margin:0;padding:0}button,select{text-transform:none}[type=button],[type=reset],[type=submit],button{-webkit-appearance:button;background-color:initial;background-image:none}:-moz-focusring{outline:auto}:-moz-ui-invalid{box-shadow:none}progress{vertical-align:initial}::-webkit-inner-spin-button,::-webkit-outer-spin-button{height:auto}[type=search]{-webkit-appearance:textfield;outline-offset:-2px}::-webkit-search-decoration{-webkit-appearance:none}::-webkit-file-upload-button{-webkit-appearance:button;font:inherit}summary{display:list-item}blockquote,dd,dl,figure,h1,h2,h3,h4,h5,h6,hr,p,pre{margin:0}fieldset{margin:0}fieldset,legend{padding:0}menu,ol,ul{list-style:none;margin:0;padding:0}textarea{resize:vertical}input::-moz-placeholder,textarea::-moz-placeholder{opacity:1;color:#9ca3af}input::placeholder,textarea::placeholder{opacity:1;color:#9ca3af}[role=button],button{cursor:pointer}:disabled{cursor:default}audio,canvas,embed,iframe,img,object,svg,video{display:block;vertical-align:middle}img,video{max-width:100%;height:auto}[hidden]{display:none}*,::backdrop,:after,:before{--tw-border-spacing-x:0;--tw-border-spacing-y:0;--tw-translate-x:0;--tw-translate-y:0;--tw-rotate:0;--tw-skew-x:0;--tw-skew-y:0;--tw-scale-x:1;--tw-scale-y:1;--tw-pan-x: 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}.sr-only{position:absolute;width:1px;height:1px;padding:0;margin:-1px;overflow:hidden;clip:rect(0,0,0,0);white-space:nowrap;border-width:0}.pointer-events-none{pointer-events:none}.pointer-events-auto{pointer-events:auto}.fixed{position:fixed}.absolute{position:absolute}.relative{position:relative}.sticky{position:sticky}.inset-0{inset:0}.bottom-0{bottom:0}.left-0{left:0}.right-auto{right:auto}.top-0{top:0}.isolate{isolation:isolate}.z-10{z-index:10}.z-\[48\]{z-index:48}.z-\[60\]{z-index:60}.col-span-2{grid-column:span 2/span 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1 0%}.flex-shrink-0{flex-shrink:0}.shrink{flex-shrink:1}.shrink-0{flex-shrink:0}.grow{flex-grow:1}.grow-0{flex-grow:0}.basis-\[30px\]{flex-basis:30px}.border-separate{border-collapse:initial}.border-spacing-0Line truncated
-38
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@@ -1,38 +0,0 @@
THISDIR = $(realpath $(CURDIR))
ROOTDIR = $(realpath $(CURDIR)/../../..)
DOCKER ?= docker run --rm $(DA) -v $(ROOTDIR):$(ROOTDIR) -w $(THISDIR) espressif/idf
CMD ?= idf.py build
PORT ?= /dev/ttyUSB0
all: example
example:
true
build: Makefile $(wildcard main/*)
$(DOCKER) $(CMD)
flash:
flash: CMD = idf.py flash
flash: DA = --device $(PORT)
flash: build
.PHONY: build
dashboard.hex: build
esputil mkhex \
0x8000 build/partition_table/partition-table.bin \
0x1000 build/bootloader/bootloader.bin \
0x100000 build/mongoose-esp32-example.bin > $@
flash2: dashboard.hex
esputil -p $(PORT) -b 921600 -fp 0x220 flash dashboard.hex
esputil -p $(PORT) monitor
ESPTOOL ?= esptool.py
flash3:
cd build && $(ESPTOOL) --chip esp32 -p $(PORT) -b 460800 --before=default_reset --after=hard_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 2MB 0x8000 partition_table/partition-table.bin 0x1000 bootloader/bootloader.bin 0x100000 mongoose-esp32-example.bin
clean:
test -d build && $(DOCKER) rm -rf build sdkconfig || true
-265
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@@ -1,265 +0,0 @@
// Copyright (c) 2020 Cesanta Software Limited
// All rights reserved
#include "mongoose.h"
#include "net.h"
#define WIFI_SSID "YOUR_WIFI_NETWORK_NAME" // SET THIS!
#define WIFI_PASS "YOUR_WIFI_PASSWORD" // SET THIS!
void app_main(void) {
// Setup wifi. This function is implemented in wifi.c
// It blocks until connected to the configured WiFi network
void wifi_init(const char *ssid, const char *pass);
wifi_init(WIFI_SSID, WIFI_PASS);
// Connected to WiFi, now start HTTP server
struct mg_mgr mgr;
mg_log_set(MG_LL_DEBUG); // Set log level
mg_mgr_init(&mgr);
MG_INFO(("Mongoose version : v%s", MG_VERSION));
MG_INFO(("Listening on : %s", HTTP_URL));
#if MG_ENABLE_MBEDTLS
MG_INFO(("Listening on : %s", HTTPS_URL));
#endif
web_init(&mgr);
for (;;) mg_mgr_poll(&mgr, 1000); // Infinite event loop
}
#if MG_DEVICE == MG_DEVICE_CUSTOM
void *mg_flash_start(void) {
return NULL;
}
size_t mg_flash_size(void) {
return 0;
}
size_t mg_flash_sector_size(void) {
return 0;
}
size_t mg_flash_write_align(void) {
return 0;
}
int mg_flash_bank(void) {
return 0;
}
bool mg_flash_erase(void *location) {
(void) location;
return false;
}
bool mg_flash_swap_bank(void) {
return true;
}
bool mg_flash_write(void *addr, const void *buf, size_t len) {
(void) addr, (void) buf, (void) len;
return false;
}
void mg_device_reset(void) {
esp_restart();
}
#endif
#if MG_OTA == MG_OTA_CUSTOM
#include "esp_app_format.h"
#include "esp_ota_ops.h"
static size_t s_size = 0; // Firmware size to flash. In-progress indicator
static bool rx_checked = false; // Whether firmware being received has been checked as valid
const esp_partition_t * update_partition = NULL; // The partition the update is being applied to
esp_ota_handle_t update_handle = 0; // Handle of the current update process
const esp_partition_t * get_partition_from_fw(int fw) {
if (MG_FIRMWARE_CURRENT == fw) {
return esp_ota_get_running_partition();
}
const esp_partition_t * p = esp_ota_get_last_invalid_partition();
if (NULL == p) {
p = esp_ota_get_next_update_partition(NULL);
}
return p;
}
// Returns true if the data buffer contains the header of a valid firmware
const size_t fw_size_required = sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t) + sizeof(esp_app_desc_t);
bool check_fw_header(const void* buf, size_t len) {
// Ensure we have received enough data to do the check
if (len < fw_size_required) {
MG_ERROR(("Insufficient data to check firmware header - %d bytes, require %d bytes", len, fw_size_required));
return false;
}
// Check the magic word of the received firmare
esp_app_desc_t* rx_app_info = (esp_app_desc_t*)(((char*)buf) + sizeof(esp_image_header_t) + sizeof(esp_image_segment_header_t));
if (ESP_APP_DESC_MAGIC_WORD != rx_app_info->magic_word) {
MG_ERROR(("Invalid app - invalid magic word"));
return false;
}
MG_INFO(("Received firmware: %s %s", rx_app_info->project_name, rx_app_info->version));
// Get the name/version of the running firmware
const esp_partition_t *current = esp_ota_get_running_partition();
esp_app_desc_t curr_app_info;
esp_err_t res = esp_ota_get_partition_description(current, &curr_app_info);
if (ESP_OK != res) {
MG_ERROR(("Unable to get name/version of running firmware"));
return false;
}
MG_INFO(("Running firmware: %s %s", curr_app_info.project_name, curr_app_info.version));
// Check the name of the new firmware is the same as the old firmware
if (memcmp(curr_app_info.project_name, rx_app_info->project_name, sizeof(curr_app_info.project_name)) != 0) {
MG_ERROR(("Firmware name is different. Wrong firmware uploaded! Current %s Uploaded %s", curr_app_info.project_name, rx_app_info->project_name));
return false;
}
// Check the version of the new firmware is different from the old firmware
if (memcmp(curr_app_info.version, rx_app_info->version, sizeof(curr_app_info.version)) == 0) {
MG_ERROR(("Firmware version is the same. Wrong firmware uploaded! Current %s, Uploaded %s", curr_app_info.version, rx_app_info->version));
//return false;
}
return true;
}
bool mg_ota_begin(size_t new_firmware_size) {
rx_checked = false;
if (s_size) {
MG_ERROR(("OTA already in progress. Call mg_ota_end()"));
return false;
}
int partition_size = mg_ota_size(MG_FIRMWARE_PREVIOUS);
if (new_firmware_size > partition_size) {
MG_ERROR(("Firmware %lu bytes, max %lu", new_firmware_size, partition_size));
return false;
}
update_partition = esp_ota_get_next_update_partition(NULL);
if (NULL == update_partition) {
MG_ERROR(("esp_ota_get_next_update_partition returned NULL"));
return false;
}
esp_err_t res = esp_ota_begin(update_partition, OTA_WITH_SEQUENTIAL_WRITES, &update_handle);
if (res != ESP_OK) {
esp_ota_abort(update_handle);
MG_ERROR(("esp_ota_begin failed (%s)", esp_err_to_name(res)));
return false;
}
s_size = new_firmware_size;
MG_INFO(("Starting OTA, firmware size %lu", s_size));
return true;
}
bool mg_ota_write(const void *buf, size_t len) {
if (s_size == 0) {
MG_ERROR(("OTA is not started, call mg_ota_begin()"));
return false;
}
if (!rx_checked) {
if (!check_fw_header(buf, len)) {
return false;
}
rx_checked = true;
}
esp_err_t res = esp_ota_write(update_handle, buf, len);
if (res != ESP_OK) {
esp_ota_abort(update_handle);
MG_ERROR(("esp_ota_write FAILED (%s)", esp_err_to_name(res)));
return false;
}
return true;
}
bool mg_ota_end(void) {
if (0 == s_size) {
MG_INFO(("Finishing OTA: fail"));
return false;
}
s_size = 0;
esp_err_t err = esp_ota_end(update_handle);
if (err != ESP_OK) {
MG_ERROR(("esp_ota_end failed (%s)!", esp_err_to_name(err)));
return false;
}
err = esp_ota_set_boot_partition(update_partition);
if (err != ESP_OK) {
MG_ERROR(("esp_ota_set_boot_partition failed (%s)!", esp_err_to_name(err)));
return false;
}
return true;
}
bool mg_ota_commit(void) {
esp_ota_mark_app_valid_cancel_rollback();
return true;
}
bool mg_ota_rollback(void) {
if(esp_ota_check_rollback_is_possible()) {
esp_ota_mark_app_invalid_rollback_and_reboot();
return true;
}
MG_ERROR(("Rollback NOT possible"));
return false;
}
int mg_ota_status(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
if (NULL == p) {
return 0;
}
int status = MG_OTA_UNAVAILABLE;
esp_ota_img_states_t img_state = ESP_OTA_IMG_UNDEFINED;
esp_err_t res = esp_ota_get_state_partition(p, &img_state);
if (ESP_OK == res) {
if (ESP_OTA_IMG_VALID == img_state) {
status = MG_OTA_COMMITTED;
} else if (ESP_OTA_IMG_UNDEFINED == img_state) {
status = MG_OTA_UNCOMMITTED;
} else if (ESP_OTA_IMG_INVALID == img_state) {
status = MG_OTA_UNAVAILABLE;
} else if (ESP_OTA_IMG_ABORTED == img_state) {
status = MG_OTA_UNAVAILABLE;
} else if (ESP_OTA_IMG_NEW == img_state) {
status = MG_OTA_FIRST_BOOT;
} else if (ESP_OTA_IMG_PENDING_VERIFY == img_state) {
status = MG_OTA_UNCOMMITTED;
}
}
return status;
}
uint32_t mg_ota_crc32(int fw) {
(void) fw;
return 0;
}
uint32_t mg_ota_timestamp(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
esp_app_desc_t app;
esp_err_t res = esp_ota_get_partition_description(p, &app);
if (ESP_OK != res)
{
return 0;
}
struct tm datetime = {};
if (NULL == strptime(app.date, "%b %d %Y", &datetime))
{
return 0;
}
if (NULL == strptime(app.time, "%H:%M:%S", &datetime))
{
return 0;
}
return mktime(&datetime);
}
size_t mg_ota_size(int fw) {
const esp_partition_t *p = get_partition_from_fw(fw);
if (NULL == p) {
return 0;
}
return p->size;
}
#endif
@@ -1,6 +0,0 @@
#define MG_ARCH MG_ARCH_ESP32
#define MG_ENABLE_PACKED_FS 1
#define MG_TLS MG_TLS_NONE // change to 'MG_TLS_MBED' to enable TLS
#define MG_OTA MG_OTA_CUSTOM
#define MG_DEVICE MG_DEVICE_CUSTOM
-23
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@@ -1,23 +0,0 @@
# Mongoose as a MicroPython user module on the ESP32
The most basic usage is:
```python
import network
import mongoose
sta_if = network.WLAN(network.STA_IF)
sta_if.active(True)
sta_if.connect("<SSID>", "<PASSWORD>")
while not sta_if.isconnected():
pass
mongoose.init()
while True:
mongoose.poll(1000)
```
Check [_thread](https://docs.micropython.org/en/latest/library/_thread.html) support for more advanced usage
https://docs.micropython.org/en/latest/develop/cmodules.html
@@ -1 +0,0 @@
../../../micropython/mongoose/micropython.cmake
@@ -1 +0,0 @@
../../../micropython/mongoose/micropython.mk
@@ -1 +0,0 @@
../../../micropython/mongoose/module.c
-32
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@@ -1,32 +0,0 @@
CWD = $(realpath $(CURDIR))
MNT = $(realpath $(CURDIR)/../../..)
PORT ?= /dev/ttyUSB0
CMD ?= build
all: example
example:
true
build: Makefile $(wildcard main/*)
docker run --rm $(DA) -v $(MNT):$(MNT) -w $(CWD) espressif/idf idf.py $(CMD)
flash:
flash: CMD = flash
flash: DA = --device $(PORT)
flash: build
.PHONY: build
bridge.hex: build
esputil mkhex \
0x8000 build/partition_table/partition-table.bin \
0x1000 build/bootloader/bootloader.bin \
0x100000 build/mongoose-esp32-example.bin > $@
flash2: bridge.hex
esputil -p $(PORT) -b 921600 -fp 0x220 flash bridge.hex
esputil -p $(PORT) monitor
clean:
rm -rf build
-1
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@@ -1 +0,0 @@
../../../uart-bridge/net.c
@@ -1 +0,0 @@
../../../uart-bridge/packed_fs.c
@@ -1,45 +0,0 @@
THISDIR = $(realpath $(CURDIR))
ROOTDIR = $(realpath $(CURDIR)/../../..)
DOCKER ?= docker run --rm $(DA) -v $(ROOTDIR):$(ROOTDIR) -w $(THISDIR) docker.io/mdashnet/8266
CMD ?= make -C src defconfig app
PORT ?= /dev/ttyUSB0
all: example
example:
true
build: Makefile $(wildcard src/main/*)
$(DOCKER) $(CMD)
flash:
flash: CMD = python /esp/components/esptool_py/esptool/esptool.py \
--chip esp8266 --port $(PORT) --baud 115200 --before default_reset \
--after hard_reset write_flash -z --flash_mode dio --flash_freq 40m \
--flash_size 2MB 0x10000 $(THISDIR)/src/build/mongoose-example.bin
flash: DA = --device $(PORT)
flash: build
buildall:
buildall: CMD = make -C src all
buildall: build
flashall:
flashall: CMD = python /esp/components/esptool_py/esptool/esptool.py \
--chip esp8266 --port $(PORT) --baud 115200 --before default_reset \
--after hard_reset write_flash -z --flash_mode dio --flash_freq 40m \
--flash_size 2MB 0x0 $(THISDIR)/src/build/bootloader/bootloader.bin \
0x10000 $(THISDIR)/src/build/mongoose-example.bin \
0x8000 $(THISDIR)/src/build/partitions_singleapp.bin
flashall: DA = --device $(PORT)
flashall: build
monitor:
monitor: CMD = /esp/tools/idf_monitor.py --port $(PORT) $(THISDIR)/src/build/mongoose-example.elf
monitor: build
.PHONY: build
clean:
test -d src/build && $(DOCKER) rm -rf src/build || true
-1
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@@ -1 +0,0 @@
../../mongoose.c
-1
View File
@@ -1 +0,0 @@
../../mongoose.h
@@ -1,9 +0,0 @@
NAME ?= $(notdir $(CURDIR))
build:
git clone --depth 1 https://github.com/mongoose-examples/$(NAME)
cp ./../../../mongoose.[ch] $(NAME)
make -C $(NAME) build
clean:
rm -rf $(NAME)
@@ -1,41 +0,0 @@
CFLAGS = -W -Wall -Werror -Wextra -Wundef -Wshadow -Wdouble-promotion
CFLAGS += -Wformat-truncation -fno-common # -Wconversion is not SDK-friendly
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_xmc7/devices/COMPONENT_CAT1C/include/
CFLAGS += -Icmsis_xmc7/devices/COMPONENT_CAT1C/include/ip/
CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 $(CFLAGS_EXTRA)
LDSCRIPT = link.ld
LDFLAGS ?= -T$(LDSCRIPT) -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
SOURCES = main.c hal.c startup.c
CFLAGS += -D__ATOLLIC__ -D__STARTUP_CLEAR_BSS # Make startup code work as expected
# Mongoose options are defined in mongoose_custom.h
SOURCES += mongoose.c net.c packed_fs.c
# Example specific build options. See README.md
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
ifeq ($(OS),Windows_NT)
RM = cmd /C del /Q /F /S
else
RM = rm -rf
endif
all build example: firmware.bin
firmware.bin: firmware.elf
arm-none-eabi-objcopy -O binary $< $@
firmware.elf: cmsis_core cmsis_xmc7 $(SOURCES) hal.h link.ld Makefile
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
arm-none-eabi-size $@
cmsis_core: # ARM CMSIS core headers
git clone -q --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
cmsis_xmc7:
git clone https://github.com/Infineon/mtb-pdl-cat1.git $@
echo "" > cmsis_xmc7/devices/COMPONENT_CAT1C/include/ip/system_cat1c.h
clean:
$(RM) firmware.* *.su cmsis_core cmsis_xmc7 *.zip
-146
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@@ -1,146 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
void mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
}
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
void hal_init(void) {
clock_init(); // Set system clock to SYS_FREQUENCY
SystemCoreClock = SYS_FREQUENCY; // Update SystemCoreClock global var
SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
rng_init(); // Initialise random number generator
uart_init(UART_DEBUG, 115200); // Initialise UART
gpio_output(LED1); // Initialise LED1
gpio_output(LED2); // Initialise LED2
gpio_output(LED3); // Initialise LED3
ethernet_init(); // Initialise Ethernet pins
}
#if defined(__ARMCC_VERSION)
// Keil specific - implement IO printf redirection
int fputc(int c, FILE *stream) {
if (stream == stdout || stream == stderr) uart_write_byte(UART_DEBUG, c);
return c;
}
#elif defined(__GNUC__)
// ARM GCC specific. ARM GCC is shipped with Newlib C library.
// Implement newlib syscalls:
// _sbrk() for malloc
// _write() for printf redirection
// the rest are just stubs
#include <sys/stat.h> // For _fstat()
uint32_t SystemCoreClock;
void SystemInit(void) { // Called automatically by startup code
}
int _fstat(int fd, struct stat *st) {
(void) fd, (void) st;
return -1;
}
extern unsigned char _end[]; // End of data section, start of heap. See link.ld
static unsigned char *s_current_heap_end = _end;
size_t hal_ram_used(void) {
return (size_t) (s_current_heap_end - _end);
}
size_t hal_ram_free(void) {
unsigned char endofstack;
return (size_t) (&endofstack - s_current_heap_end);
}
void *_sbrk(int incr) {
unsigned char *prev_heap;
unsigned char *heap_end = (unsigned char *) ((size_t) &heap_end - 256);
prev_heap = s_current_heap_end;
// Check how much space we got from the heap end to the stack end
if (s_current_heap_end + incr > heap_end) return (void *) -1;
s_current_heap_end += incr;
return prev_heap;
}
int _open(const char *path) {
(void) path;
return -1;
}
int _close(int fd) {
(void) fd;
return -1;
}
int _isatty(int fd) {
(void) fd;
return 1;
}
int _lseek(int fd, int ptr, int dir) {
(void) fd, (void) ptr, (void) dir;
return 0;
}
void _exit(int status) {
(void) status;
for (;;) asm volatile("BKPT #0");
}
void _kill(int pid, int sig) {
(void) pid, (void) sig;
}
int _getpid(void) {
return -1;
}
int _write(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
return -1;
}
int _read(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
return -1;
}
int _link(const char *a, const char *b) {
(void) a, (void) b;
return -1;
}
int _unlink(const char *a) {
(void) a;
return -1;
}
int _stat(const char *path, struct stat *st) {
(void) path, (void) st;
return -1;
}
int mkdir(const char *path, mode_t mode) {
(void) path, (void) mode;
return -1;
}
void _init(void) {
}
#endif // __GNUC__
-244
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@@ -1,244 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#pragma once
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#define LED1 PIN(16, 1)
#define LED2 PIN(16, 2)
#define LED3 PIN(16, 3)
#include "xmc7200d_e272k8384.h"
#define BIT(x) (1UL << (x))
#define CLRSET(reg, clear, set) ((reg) = ((reg) & ~(clear)) | (set))
#define PIN(bank, num) ((bank << 8) | (num))
#define PINNO(pin) (pin & 255)
#define PINBANK(pin) (pin >> 8)
void hal_init(void);
size_t hal_ram_free(void);
size_t hal_ram_used(void);
static inline void spin(volatile uint32_t count) {
while (count--) (void) 0;
}
extern uint32_t SystemCoreClock;
enum {PLL_FEEDBACK = 50, PLL_REF = 1, PLL_OUT = 4};
#define CLK_IMO 8000000UL
#define SYS_FREQUENCY ((CLK_IMO * PLL_FEEDBACK) / (PLL_REF * PLL_OUT))
#ifndef UART_DEBUG
#define UART_DEBUG SCB3
#endif
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
enum { GPIO_HIGHZ = 0, GPIO_PULLUP = 2, GPIO_PULLDOWN = 3, GPIO_OPENDRAIN_LOW = 4,
GPIO_OPENDRAIN_HIGH = 5, GPIO_STRONG = 6, GPIO_PULLUP_DOWN = 7};
enum { GPIO_SPEED_LOW = 3, GPIO_SPEED_MEDIUM = 2, GPIO_SPEED_HIGH = 0};
#undef GPIO
#define GPIO_TypeDef GPIO_PRT_Type
#define GPIO(N) ((GPIO_TypeDef *) (GPIO_BASE + 0x80 * (N)))
static GPIO_TypeDef *gpio_bank(uint16_t pin) { return GPIO(PINBANK(pin)); }
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
uint8_t speed, uint8_t pull, uint8_t af) {
(void) pin, (void) mode, (void) type, (void) speed, (void) pull, (void) af;
GPIO_TypeDef *gpio = gpio_bank(pin);
uint8_t pinno = PINNO(pin);
uint32_t msk, pos;
// configure input / output direction
if (mode == GPIO_MODE_INPUT) {
gpio->CFG |= 1 << (4 * pinno + 3); // enable input buffer (IN_ENx)
}
if (af || (mode == GPIO_MODE_AF && af)) {
// configure alternate function
HSIOM_PRT_Type* hsiom = ((HSIOM_PRT_Type*) HSIOM) + PINBANK(pin);
volatile uint32_t *port_sel = pinno < 4 ? &hsiom->PORT_SEL0 : &hsiom->PORT_SEL1;
pos = 8 * (pinno % 4), msk = 0x1f << pos;
*port_sel &= ~msk, *port_sel |= af << pos;
}
// configure driver mode
msk = 7, pos = 4 * pinno;
CLRSET(gpio->CFG, msk << pos, type << pos);
// configure speed
msk = 3, pos = 2 * pinno + 16;
CLRSET(gpio->CFG_OUT, msk << pos, speed << pos);
if (mode == GPIO_MODE_OUTPUT /*&& af == 0*/) {
gpio->OUT_SET = (1 << pinno);
}
}
static inline void gpio_input(uint16_t pin) {
gpio_init(pin, GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH,
0, 0);
}
static inline void gpio_output(uint16_t pin) {
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_MEDIUM,
0, 0);
}
static inline bool gpio_read(uint16_t pin) {
GPIO_TypeDef *gpio = gpio_bank(pin);
uint8_t pinno = PINNO(pin);
if (gpio->CFG & (1 << (4 * pinno + 3))) {
// pin mode is input, reading from GPIO_PRT_IN
return gpio->IN & (1 << pinno);
} else {
// pin mode is output, reading from GPIO_PRT_OUT
return gpio->OUT & (1 << pinno);
}
}
static inline void gpio_write(uint16_t pin, bool value) {
GPIO_TypeDef *gpio = gpio_bank(pin);
uint8_t pinno = PINNO(pin);
if (value) {
gpio->OUT_SET = 1 << pinno;
} else {
gpio->OUT_CLR = 1 << pinno;
}
}
static inline void gpio_toggle(uint16_t pin) {
gpio_write(pin, !gpio_read(pin));
}
static inline void uart_init(volatile CySCB_Type *uart, unsigned long baud) {
(void) uart, (void) baud;
uint16_t rx = 0, tx = 0;
if (uart == SCB3) {
rx = PIN(13, 0), tx = PIN(13, 1);
} else {
return; // unsupported uart
}
// set pins
gpio_init(rx, GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 17);
gpio_init(tx, GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 17);
// enable peripheral clock (18.6.2)
// compute divider first (we choose 24 bit divider 0)
unsigned long div = 0, frac = 0, ovs = 16;
div = SYS_FREQUENCY / (baud * ovs);
if (div == 0) div = 1;
frac = SYS_FREQUENCY % (baud * ovs);
frac = (frac * 100) / (baud * ovs);
PERI_PCLK->GR[1].DIV_CMD = (3 << PERI_PCLK_GR_DIV_CMD_TYPE_SEL_Pos) |
PERI_PCLK_GR_DIV_CMD_PA_DIV_SEL_Msk |
PERI_PCLK_GR_DIV_CMD_PA_TYPE_SEL_Msk;
PERI_PCLK->GR[1].DIV_CMD |= PERI_PCLK_GR_DIV_CMD_DISABLE_Msk; // disable divider
PERI_PCLK->GR[1].DIV_24_5_CTL[0] = (((uint8_t) (div - 1)) << PERI_PCLK_GR_DIV_24_5_CTL_INT24_DIV_Pos) |
(frac << PERI_PCLK_GR_DIV_24_5_CTL_FRAC5_DIV_Pos);
PERI_PCLK->GR[1].DIV_CMD = (3 << PERI_PCLK_GR_DIV_CMD_TYPE_SEL_Pos) |
PERI_PCLK_GR_DIV_CMD_PA_DIV_SEL_Msk |
PERI_PCLK_GR_DIV_CMD_PA_TYPE_SEL_Msk;;
PERI_PCLK->GR[1].DIV_CMD |= PERI_PCLK_GR_DIV_CMD_ENABLE_Msk; // enable divider
PERI_PCLK->GR[1].CLOCK_CTL[PCLK_SCB3_CLOCK & 0xff] = 3 << PERI_PCLK_GR_CLOCK_CTL_TYPE_SEL_Pos; // connect SCB3 to div_24_5_ctl[0]
// configure UART interface
uart->CTRL = ((ovs - 1) << SCB_CTRL_OVS_Pos) | (2 << SCB_CTRL_MODE_Pos);
uart->UART_CTRL = 0;
uart->UART_RX_CTRL = 1 << SCB_UART_RX_CTRL_STOP_BITS_Pos;
uart->RX_CTRL = 7 << SCB_RX_CTRL_DATA_WIDTH_Pos;
uart->UART_TX_CTRL = 1 << SCB_UART_TX_CTRL_STOP_BITS_Pos;
uart->TX_CTRL = 7 << SCB_TX_CTRL_DATA_WIDTH_Pos;
uart->TX_FIFO_CTRL = 1 << 16;
uart->TX_FIFO_CTRL = 0;
uart->CTRL |= 1 << SCB_CTRL_ENABLED_Pos;
}
static inline void uart_write_byte(volatile CySCB_Type *uart, uint8_t byte) {
(void) byte; (void) uart;
while((uart->INTR_TX & SCB_INTR_TX_EMPTY_Msk) == 0) spin(1);
uart->TX_FIFO_WR = byte;
uart->INTR_TX |= ~SCB_INTR_TX_EMPTY_Msk;
}
static inline void uart_write_buf(volatile CySCB_Type *uart, char *buf, size_t len) {
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
}
static inline void rng_init(void) {
}
static inline uint32_t rng_read(void) {
return 0;
}
static inline void ethernet_init(void) {
gpio_init(PIN(26, 0), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_REF_CLK
gpio_init(PIN(26, 1), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TX_CTL
gpio_init(PIN(26, 2), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TX_CLK
gpio_init(PIN(26, 3), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TXD_0
gpio_init(PIN(26, 4), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TXD_1
gpio_init(PIN(26, 5), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TXD_2
gpio_init(PIN(26, 6), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_HIGH, 0, 27); // ETH1_TXD_3
gpio_init(PIN(26, 7), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RXD_0
gpio_init(PIN(27, 0), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RXD_1
gpio_init(PIN(27, 1), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RXD_2
gpio_init(PIN(27, 2), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RXD_3
gpio_init(PIN(27, 3), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RX_CTL
gpio_init(PIN(27, 4), GPIO_MODE_INPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 27); // ETH1_RX_CLK
gpio_init(PIN(27, 5), GPIO_MODE_INPUT, GPIO_STRONG, GPIO_SPEED_LOW, 0, 27); // ETH1_MDIO
gpio_init(PIN(27, 6), GPIO_MODE_OUTPUT, GPIO_STRONG, GPIO_SPEED_LOW, 0, 27); // ETH1_MDC
//gpio_init(PIN(27, 7), GPIO_MODE_OUTPUT, GPIO_HIGHZ, GPIO_SPEED_HIGH, 0, 0); // ETH1_RST
CPUSS->CM7_0_SYSTEM_INT_CTL[eth_1_interrupt_eth_0_IRQn] = 0x80000003; // assign CPU interrupt #3
NVIC->ISER[0] = 1 << 3;
spin(10000000); // artificial delay to wait for PHY init
}
static inline void clock_init(void) {
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU
asm("DSB");
asm("ISB");
// configure PLL
CLRSET(SRSS->CLK_PLL400M[0].CONFIG, CLK_PLL400M_CONFIG_BYPASS_SEL_Msk, BIT(29)); // First bypass PLL
spin(10);
SRSS->CLK_PLL400M[0].CONFIG &= ~CLK_PLL400M_CONFIG_ENABLE_Msk; // disable the PLL itself
// IMO source generates a frequency of 8MHz. The final frequency will be
// calculated as (CLK_IMO * feedback) / (reference * output_div)
CLRSET(SRSS->CLK_PLL400M[0].CONFIG, CLK_PLL400M_CONFIG_FEEDBACK_DIV_Msk, PLL_FEEDBACK << CLK_PLL400M_CONFIG_FEEDBACK_DIV_Pos);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG, CLK_PLL400M_CONFIG_REFERENCE_DIV_Msk, PLL_REF << CLK_PLL400M_CONFIG_REFERENCE_DIV_Pos);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG, CLK_PLL400M_CONFIG_OUTPUT_DIV_Msk, PLL_OUT << CLK_PLL400M_CONFIG_OUTPUT_DIV_Pos);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG2, CLK_PLL400M_CONFIG2_FRAC_DIV_Msk, 0);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG2, CLK_PLL400M_CONFIG2_FRAC_DITHER_EN_Msk, 0);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG2, CLK_PLL400M_CONFIG2_FRAC_EN_Msk, 1 << CLK_PLL400M_CONFIG2_FRAC_EN_Pos);
CLRSET(SRSS->CLK_PLL400M[0].CONFIG, CLK_PLL400M_CONFIG_BYPASS_SEL_Msk, 0);
spin(10);
SRSS->CLK_PLL400M[0].CONFIG |= CLK_PLL400M_CONFIG_ENABLE_Msk; // enable the PLL
while (SRSS->CLK_PLL400M[0].CONFIG & 1) spin(1);
// configure PATH1 with source set to IMO
SRSS->CLK_PATH_SELECT[1] = 0;
// enable CLK_HFx
uint8_t clocks[] = {0, 1, 2, 3, 4, 5, 6};
for (size_t i = 0; i < sizeof(clocks) / sizeof(uint8_t); i++) {
CLRSET(SRSS->CLK_ROOT_SELECT[clocks[i]], SRSS_CLK_ROOT_SELECT_ROOT_MUX_Msk, 1); // choose PATH1
CLRSET(SRSS->CLK_ROOT_SELECT[clocks[i]], SRSS_CLK_ROOT_SELECT_DIRECT_MUX_Msk, 1 << SRSS_CLK_ROOT_SELECT_DIRECT_MUX_Pos);
if (clocks[i] != 0) // CLF_HF0 is already enabled
SRSS->CLK_ROOT_SELECT[clocks[i]] |= SRSS_CLK_ROOT_SELECT_ENABLE_Msk; // enable clock root
}
// set systick frequency
uint32_t tenms = SYS_FREQUENCY / 100 - 1; // number of cycles executed in 10ms
CPUSS->SYSTICK_CTL = tenms | (3 << CPUSS_SYSTICK_CTL_CLOCK_SOURCE_Pos); // select CLK_HF as source
}
@@ -1,31 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
MEMORY
{
flash(RX) : ORIGIN = 0x10080000, LENGTH = 0x80000
sram(!RX) : ORIGIN = 0x28000800, LENGTH = 510K
}
_estack = ORIGIN(sram) + LENGTH(sram);
SECTIONS
{
.vectors : { . = ALIGN(4); KEEP(*(.vectors)); . = ALIGN(4); } > flash
.text : { *(.text*) } > flash
.rodata : { *(.rodata*) } > flash
.data : {
_sdata = .;
*(.first_data)
*(.data SORT(.data.*))
_edata = .;
} > sram AT > flash
_sidata = LOADADDR(.data);
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
. = ALIGN(8);
_end = .;
}
-32
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@@ -1,32 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
#include "mongoose.h"
#include "net.h"
#define BLINK_PERIOD_MS 1000
static void timer_fn(void *arg) {
gpio_toggle(LED1); // Blink LED
(void) arg; // Unused
}
int main(void) {
struct mg_mgr mgr; // Mongoose event manager
hal_init(); // Cross-platform hardware init
mg_mgr_init(&mgr); // Initialise it
mg_log_set(MG_LL_DEBUG); // Set log level to debug
mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mgr);
MG_INFO(("Initialising application..."));
web_init(&mgr);
for (;;) {
mg_mgr_poll(&mgr, 0);
}
return 0;
}
@@ -1,26 +0,0 @@
#pragma once
// See https://mongoose.ws/documentation/#build-options
#define MG_ARCH MG_ARCH_NEWLIB
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_DRIVER_XMC7 1
#define MG_IO_SIZE 256
#define MG_ENABLE_CUSTOM_MILLIS 1
#define MG_ENABLE_CUSTOM_RANDOM 1
#define MG_ENABLE_PACKED_FS 1
// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
// By default, those are set to zero, meaning that DHCP is used
//
// #define MG_TCPIP_IP MG_IPV4(192, 168, 1, 10)
// #define MG_TCPIP_GW MG_IPV4(192, 168, 1, 1)
// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
// Set custom MAC address. By default, it is randomly generated
// Using a build-time constant:
// #define MG_SET_MAC_ADDRESS(mac) do { uint8_t buf_[6] = {2,3,4,5,6,7}; memmove(mac, buf_, sizeof(buf_)); } while (0)
//
// Using custom function:
// extern void my_function(unsigned char *mac);
// #define MG_SET_MAC_ADDRESS(mac) my_function(mac)
@@ -1,83 +0,0 @@
#include "xmc7200d_e272k8384.h"
void Reset_Handler(void); // Defined below
void Dummy_Handler(void); // Defined below
void SysTick_Handler(void); // Defined in main.c
void SystemInit(void); // Defined in main.c, called by reset handler
void _estack(void); // Defined in link.ld
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
WEAK_ALIAS void NMI_Handler(void);
WEAK_ALIAS void HardFault_Handler(void);
WEAK_ALIAS void SVCall_Handler(void);
WEAK_ALIAS void PendSV_Handler(void);
WEAK_ALIAS void SysTick_Handler(void);
WEAK_ALIAS void Default_Intr_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr0_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr1_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr2_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr4_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr5_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr6_Handler(void);
WEAK_ALIAS void CM0P_CpuIntr7_Handler(void);
WEAK_ALIAS void ETH_IRQHandler(void);
void CM0P_CpuIntr3_Handler(void) {
ETH_IRQHandler();
}
__attribute__((section(".vectors"))) void (*const tab[16 + 16])(void) = {
_estack,
Reset_Handler,
NMI_Handler,
HardFault_Handler,
0,
0,
0,
0,
0,
0,
0,
SVCall_Handler,
0,
0,
PendSV_Handler,
SysTick_Handler,
CM0P_CpuIntr0_Handler,
CM0P_CpuIntr1_Handler,
CM0P_CpuIntr2_Handler,
CM0P_CpuIntr3_Handler,
CM0P_CpuIntr4_Handler,
CM0P_CpuIntr5_Handler,
CM0P_CpuIntr6_Handler,
CM0P_CpuIntr7_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler,
Default_Intr_Handler
};
__attribute__((naked, noreturn)) void Reset_Handler(void) {
// Clear BSS section, and copy data section from flash to RAM
extern long _sbss, _ebss, _sdata, _edata, _sidata;
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
SCB->VTOR = (uint32_t) &tab;
SystemInit();
// Call main()
extern void main(void);
main();
for (;;) (void) 0; // Infinite loop
}
void Default_Handler(void) {
for (;;) (void) 0;
}
@@ -1,78 +0,0 @@
// SPDX-FileCopyrightText: 2022-2023 Cesanta Software Limited
// SPDX-License-Identifier: MIT
#include "hal.h"
#include "mongoose.h"
#include "net.h"
#define BLINK_PERIOD_MS 500 // LED blinking period in millis
#define LOG_PERIOD_MS 1000 // Info log period in millis
void SystemInit(void) { // Called automatically by startup code
clock_init();
rng_init();
}
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
void mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
}
static void timer_fn(void *arg) {
struct mg_tcpip_if *ifp = arg; // show network stats
const char *names[] = {"down", "up", "req", "ready"};
MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
ifp->ndrop, ifp->nerr));
}
int main(void) {
gpio_input(BUTTON_PIN);
gpio_output(LED_PIN);
uart_init(UART_DEBUG, 115200);
ethernet_init();
MG_INFO(("Starting, CPU freq %g MHz", (double) clock_sys_freq() / 1000000));
struct mg_mgr mgr; // Initialise
mg_mgr_init(&mgr); // Mongoose event manager
mg_log_set(MG_LL_DEBUG); // Set log level
// Initialise Mongoose network stack
struct mg_tcpip_driver_same54_data driver_data = {.mdc_cr = 5};
struct mg_tcpip_if mif = {.mac = GENERATE_LOCALLY_ADMINISTERED_MAC()/*{2, 3, 4, 5, 6, 7}*/,
// Uncomment below for static configuration:
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
.driver = &mg_tcpip_driver_same54,
.driver_data = &driver_data};
mg_tcpip_init(&mgr, &mif);
mg_timer_add(&mgr, LOG_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
while (mif.state != MG_TCPIP_STATE_READY) {
mg_mgr_poll(&mgr, 0);
}
MG_INFO(("Initialising application..."));
web_init(&mgr);
MG_INFO(("Starting event loop"));
for (;;) {
mg_mgr_poll(&mgr, 0);
}
return 0;
}
@@ -1,119 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#include "hal.h"
#include "mongoose.h"
static const char *s_url = "mqtt://broker.hivemq.com:1883";
static const char *s_sub_topic = "mg/+/test"; // Publish topic
static const char *s_pub_topic = "mg/clnt/test"; // Subscribe topic
static const uint8_t s_qos = 1; // MQTT QoS
static struct mg_connection *s_conn; // Client connection
void SystemInit(void) { // Called automatically by startup code
clock_init();
rng_init();
}
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
void mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
}
static void fn(struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_OPEN) {
MG_INFO(("%lu CREATED", c->id));
// c->is_hexdumping = 1;
} else if (ev == MG_EV_ERROR) {
// On error, log error message
MG_ERROR(("%lu ERROR %s", c->id, (char *) ev_data));
} else if (ev == MG_EV_MQTT_OPEN) {
// MQTT connect is successful
struct mg_str subt = mg_str(s_sub_topic);
struct mg_str pubt = mg_str(s_pub_topic), data = mg_str("hello");
MG_INFO(("%lu CONNECTED to %s", c->id, s_url));
struct mg_mqtt_opts sub_opts;
memset(&sub_opts, 0, sizeof(sub_opts));
sub_opts.topic = subt;
sub_opts.qos = s_qos;
mg_mqtt_sub(c, &sub_opts);
MG_INFO(("%lu SUBSCRIBED to %.*s", c->id, (int) subt.len, subt.buf));
struct mg_mqtt_opts pub_opts;
memset(&pub_opts, 0, sizeof(pub_opts));
pub_opts.topic = pubt;
pub_opts.message = data;
pub_opts.qos = s_qos, pub_opts.retain = false;
mg_mqtt_pub(c, &pub_opts);
MG_INFO(("%lu PUBLISHED %.*s -> %.*s", c->id, (int) data.len, data.buf,
(int) pubt.len, pubt.buf));
} else if (ev == MG_EV_MQTT_MSG) {
// When we get echo response, print it
struct mg_mqtt_message *mm = (struct mg_mqtt_message *) ev_data;
MG_INFO(("%lu RECEIVED %.*s <- %.*s", c->id, (int) mm->data.len,
mm->data.buf, (int) mm->topic.len, mm->topic.buf));
} else if (ev == MG_EV_CLOSE) {
MG_INFO(("%lu CLOSED", c->id));
s_conn = NULL; // Mark that we're closed
}
}
// Timer function - recreate client connection if it is closed
static void timer_fn(void *arg) {
struct mg_mgr *mgr = (struct mg_mgr *) arg;
struct mg_mqtt_opts opts = {.clean = true,
.qos = s_qos,
.topic = mg_str(s_pub_topic),
.version = 4,
.message = mg_str("bye")};
if (s_conn == NULL) s_conn = mg_mqtt_connect(mgr, s_url, &opts, fn, NULL);
}
int main(void) {
gpio_input(BUTTON_PIN);
gpio_output(LED_PIN);
uart_init(UART_DEBUG, 115200);
ethernet_init();
MG_INFO(("Starting, CPU freq %g MHz", (double) clock_sys_freq() / 1000000));
struct mg_mgr mgr; // Initialise
mg_mgr_init(&mgr); // Mongoose event manager
mg_log_set(MG_LL_DEBUG); // Set log level
// Initialise Mongoose network stack
struct mg_tcpip_driver_same54_data driver_data = {.mdc_cr = 5};
struct mg_tcpip_if mif = {
.mac = GENERATE_LOCALLY_ADMINISTERED_MAC() /*{2, 3, 4, 5, 6, 7}*/,
// Uncomment below for static configuration:
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
.driver = &mg_tcpip_driver_same54,
.driver_data = &driver_data};
mg_tcpip_init(&mgr, &mif);
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
while (mif.state != MG_TCPIP_STATE_READY) {
mg_mgr_poll(&mgr, 0);
}
MG_INFO(("Initialising application..."));
mg_timer_add(&mgr, 3000, MG_TIMER_REPEAT | MG_TIMER_RUN_NOW, timer_fn, &mgr);
MG_INFO(("Starting event loop"));
for (;;) {
mg_mgr_poll(&mgr, 0);
}
return 0;
}
@@ -1 +0,0 @@
../../../../mongoose.c
@@ -1 +0,0 @@
../../../../mongoose.h
-9
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@@ -1,9 +0,0 @@
# Mongoose as a MicroPython user module
The most basic usage is in `main.py`.
You'll have to configure Mongoose for your desired platform, this example runs on the `unix` port and Mongoose detects it as a known architecture and hence configures itself to use sockets and time base. For other platforms, you'll have to do your homework (there's plenty of Mongoose examples for several platforms); also check respective MicroPython build instructions.
Check [_thread](https://docs.micropython.org/en/latest/library/_thread.html) support for more advanced usage
https://docs.micropython.org/en/latest/develop/cmodules.html
-55
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@@ -1,55 +0,0 @@
PROG ?= ./example # Program we are building
PACK ?= ./pack # Packing executable
DELETE = rm -rf # Command to remove files
GZIP ?= gzip # For compressing files in web_root/
OUT ?= -o $(PROG) # Compiler argument for output file
SOURCES = main.c mongoose.c net.c packed_fs.c # Source code files
CFLAGS = -W -Wall -Wextra -g -I. # Build options
# Mongoose build options. See https://mongoose.ws/documentation/#build-options
CFLAGS_MONGOOSE += -DMG_ENABLE_PACKED_FS=1
ifeq ($(OS),Windows_NT) # Windows settings. Assume MinGW compiler. To use VC: make CC=cl CFLAGS=/MD OUT=/Feprog.exe
PROG = example.exe # Use .exe suffix for the binary
PACK = pack.exe # Packing executable
CC = gcc # Use MinGW gcc compiler
CFLAGS += -lws2_32 # Link against Winsock library
DELETE = cmd /C del /Q /F /S # Command prompt command to delete files
GZIP = echo # No gzip on Windows
endif
# Default target. Build and run program
all: $(PROG)
$(RUN) $(PROG) $(ARGS)
# Build program from sources
$(PROG): $(SOURCES)
$(CC) $(SOURCES) $(CFLAGS) $(CFLAGS_MONGOOSE) $(CFLAGS_EXTRA) $(OUT)
# Bundle JS libraries (preact, preact-router, ...) into a single file
web_root/bundle.js:
curl -s https://npm.reversehttp.com/preact,preact/hooks,htm/preact,preact-router -o $@
# Create optimised CSS. Prerequisite: npm -g i tailwindcss tailwindcss-font-inter
web_root/main.css: web_root/index.html $(wildcard web_root/*.js)
npx tailwindcss -o $@ --minify
# Generate packed filesystem for serving Web UI
packed_fs.c: $(wildcard web_root/*) $(wildcard certs/*) Makefile web_root/main.css web_root/bundle.js
$(GZIP) web_root/*
$(CC) ../../test/pack.c -o $(PACK)
$(PACK) web_root/* certs/* > $@
$(GZIP) -d web_root/*
mbedtls:
git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@
ifeq ($(TLS), mbedtls)
CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include
CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c
$(PROG): mbedtls
endif
# Cleanup. Delete built program and all build artifacts
clean:
$(DELETE) $(PROG) $(PACK) *.o *.obj *.exe *.bin *.dSYM mbedtls
-1
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@@ -1 +0,0 @@
../device-dashboard/certs
-1
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@@ -1 +0,0 @@
../../mongoose.c
-1
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@@ -1 +0,0 @@
../../mongoose.h
-283
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@@ -1,283 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#include "net.h"
// Device settings
struct device_settings {
uint32_t magic;
int log_level;
bool mqtt_enabled;
char mqtt_server_url[64];
char mqtt_topic_tx[16];
char mqtt_topic_rx[16];
};
struct conndata {
uint64_t expiration_time; // Modbus request timeout
unsigned long id; // Connection ID waiting for the Modbus response
};
static struct device_settings s_settings;
static const char *s_json_header =
"Content-Type: application/json\r\n"
"Cache-Control: no-cache\r\n";
static void set_default_settings(struct device_settings *s) {
s->magic = SETTINGS_MAGIC;
s->log_level = MG_LL_DEBUG;
mg_snprintf(s->mqtt_server_url, sizeof(s->mqtt_server_url), "%s",
"mqtt://broker.hivemq.com:1883");
mg_snprintf(s->mqtt_topic_tx, sizeof(s->mqtt_topic_tx), "%s", "modbus1/tx");
mg_snprintf(s->mqtt_topic_rx, sizeof(s->mqtt_topic_rx), "%s", "modbus1/rx");
}
// SNTP timer function. Sync up time
static void timer_sntp_fn(void *param) {
mg_sntp_connect(param, "udp://time.google.com:123", NULL, NULL);
}
static void setfromjson(struct mg_str json, const char *jsonpath, char *buf,
size_t len) {
char *val = mg_json_get_str(json, jsonpath);
if (val != NULL) mg_snprintf(buf, len, "%s", val);
free(val);
}
static void handle_settings_set(struct mg_connection *c, struct mg_str body) {
struct device_settings settings;
memset(&settings, 0, sizeof(settings));
set_default_settings(&settings);
mg_json_get_bool(body, "$.mqtt_enabled", &settings.mqtt_enabled);
settings.log_level = mg_json_get_long(body, "$.log_level", MG_LL_INFO);
setfromjson(body, "$.mqtt_server_url", settings.mqtt_server_url,
sizeof(settings.mqtt_server_url));
setfromjson(body, "$.mqtt_topic_rx", settings.mqtt_topic_rx,
sizeof(settings.mqtt_topic_rx));
setfromjson(body, "$.mqtt_topic_tx", settings.mqtt_topic_tx,
sizeof(settings.mqtt_topic_tx));
s_settings = settings;
bool ok = web_save_settings(&s_settings, sizeof(s_settings));
mg_http_reply(c, 200, s_json_header,
"{%m:%s,%m:%m}", //
MG_ESC("status"), ok ? "true" : "false", //
MG_ESC("message"), MG_ESC(ok ? "Success" : "Failed"));
}
static void handle_settings_get(struct mg_connection *c) {
mg_http_reply(c, 200, s_json_header,
"{%m:%s,%m:%d,%m:%m,%m:%m,%m:%m}\n", //
MG_ESC("mqtt_enabled"),
s_settings.mqtt_enabled ? "true" : "false", //
MG_ESC("log_level"), s_settings.log_level, //
MG_ESC("mqtt_server_url"), MG_ESC(s_settings.mqtt_server_url),
MG_ESC("mqtt_topic_rx"), MG_ESC(s_settings.mqtt_topic_rx),
MG_ESC("mqtt_topic_tx"), MG_ESC(s_settings.mqtt_topic_tx));
}
// Modbus handler function
static void mfn(struct mg_connection *c, int ev, void *ev_data) {
struct conndata *cd = (struct conndata *) c->data;
if (ev == MG_EV_READ) {
MG_INFO(("%lu RECEIVED %lu", c->id, c->recv.len));
if (c->recv.len < 8) return; // Less than minimum length, buffer more
uint16_t len = mg_ntohs(*(uint16_t *) &c->recv.buf[4]); // PDU length
if (c->recv.len < len + 4U) return; // Partial frame, buffer more
// Notify parent connection
for (struct mg_connection *t = c->mgr->conns; t != NULL; t = t->next) {
if (t->id == cd->id) mg_call(t, MG_EV_USER, &c->recv);
}
c->is_closing = 1;
} else if (MG_EV_POLL) {
// MG_INFO(("%lu closing tmout %llu", c->id, cd->expiration_time));
if (cd->expiration_time > 0 && cd->expiration_time < mg_millis()) {
c->is_closing = 1;
}
}
(void) ev_data;
}
static void send8(struct mg_connection *c, uint8_t val) {
mg_send(c, &val, sizeof(val));
}
static void send16(struct mg_connection *c, uint16_t val) {
send8(c, (uint8_t) (val >> 8) & 255);
send8(c, (uint8_t) (val & 255));
}
static struct mg_connection *start_modbus_request(struct mg_mgr *mgr,
struct mg_str json,
unsigned long cid) {
struct mg_connection *c = NULL;
char *url = mg_json_get_str(json, "$.url");
long timeout = mg_json_get_long(json, "$.timeout", 750);
uint8_t id = (uint8_t) mg_json_get_long(json, "$.id", 1);
uint16_t reg = (uint16_t) mg_json_get_long(json, "$.reg", 1);
uint8_t func = (uint8_t) mg_json_get_long(json, "$.func", 0);
uint16_t nregs = (uint16_t) mg_json_get_long(json, "$.nregs", 1);
MG_INFO(("%lu REQUEST: %.*s", cid, json.len, json.buf));
if (func == 0) {
MG_ERROR(("Set func to a valid modbus function code"));
} else if ((c = mg_connect(mgr, url, mfn, NULL)) == NULL) {
MG_ERROR(("Failed to start modbus connection at %M", MG_ESC(url)));
} else {
send16(c, 1); // TID. Use random?
send16(c, 0); // Protocol identifier: 0 (modbus)
uint16_t *lp = (uint16_t *) &c->send.buf[c->send.len];
send16(c, 0); // Length: to be set later
size_t len = c->send.len;
send8(c, id); // Client ID
send8(c, func); // Function
if (func == 3 || func == 4 || func == 6 || func == 16) {
send16(c, reg); // Start register
send16(c, nregs); // Number of registers
if (func == 16) { // Fill in register values to write
send8(c, (uint8_t) (nregs * 2)); // Send number of bytes
for (uint16_t i = 0; i < nregs; i++) {
char path[20];
mg_snprintf(path, sizeof(path), "$.values[%hu]", i);
uint16_t r = (uint16_t) mg_json_get_long(json, path, 0);
send16(c, r);
}
}
} else if (func == 43) {
send8(c, 14); // MEI
send8(c, 1); // Basic device ID: 1
send8(c, 0); // Object ID: 0 (vendor name)
}
*lp = mg_htons((uint16_t) (c->send.len - len)); // Set length field
mg_hexdump(c->send.buf, c->send.len);
MG_INFO(("%lu SENDING %lu", c->id, c->send.len));
struct conndata *cd = (struct conndata *) c->data;
cd->id = cid; // Store parent connection ID
cd->expiration_time = mg_millis() + timeout;
}
free(url);
return c;
}
static void handle_modbus_exec(struct mg_connection *c, struct mg_str body) {
struct mg_connection *mc = start_modbus_request(c->mgr, body, c->id);
if (mc == NULL) {
mg_http_reply(c, 200, s_json_header, "false\n");
} else {
struct conndata *cd = (struct conndata *) c->data;
cd->expiration_time = mg_millis() + 1500;
}
}
// Print modbus response
static size_t print_mb_resp(void (*out)(char, void *), void *ptr, va_list *ap) {
int func = va_arg(*ap, int);
size_t len = va_arg(*ap, size_t);
uint8_t *buf = va_arg(*ap, uint8_t *);
size_t n = 0;
if (func == 3 || func == 4) {
// For "multiple" read responses, print registers
n += mg_xprintf(out, ptr, "[");
for (size_t ofs = 1; ofs < len; ofs += 2) {
uint16_t reg = mg_ntohs(*(uint8_t *) &buf[ofs]);
n += mg_xprintf(out, ptr, "%s%hu", ofs == 1 ? "" : ",", reg);
}
n += mg_xprintf(out, ptr, "]");
} else if (func == 43) {
n += mg_xprintf(out, ptr, "{");
if (len >= 6) {
n += mg_xprintf(out, ptr, "%m:%d", MG_ESC("mei"), buf[0]);
n += mg_xprintf(out, ptr, ",%m:%d", MG_ESC("devid"), buf[1]);
n += mg_xprintf(out, ptr, ",%m:%d", MG_ESC("conformity"), buf[2]);
n += mg_xprintf(out, ptr, ",%m:%d", MG_ESC("more"), buf[3]);
n += mg_xprintf(out, ptr, ",%m:%d", MG_ESC("next"), buf[4]);
n += mg_xprintf(out, ptr, ",%m:[", MG_ESC("objects"));
size_t ofs = 6;
while (ofs < len) {
if (ofs > 6) n += mg_xprintf(out, ptr, ",");
n += mg_xprintf(out, ptr, "{");
n += mg_xprintf(out, ptr, "%m:%d", MG_ESC("id"), buf[ofs++]);
if (ofs < len) {
uint8_t olen = buf[ofs++];
if (olen > (uint8_t) (len - ofs)) olen = (uint8_t) (len - ofs);
n += mg_xprintf(out, ptr, ",%m:%m", MG_ESC("value"), mg_print_esc,
olen, &buf[ofs]);
ofs += olen;
}
n += mg_xprintf(out, ptr, "}");
}
n += mg_xprintf(out, ptr, "]");
}
n += mg_xprintf(out, ptr, "}");
} else {
n += mg_xprintf(out, ptr, "null");
}
return n;
}
// HTTP request handler function
static void fn(struct mg_connection *c, int ev, void *ev_data) {
struct conndata *cd = (struct conndata *) c->data;
if (ev == MG_EV_ACCEPT) {
if (c->fn_data != NULL) { // TLS listener!
struct mg_tls_opts opts = {0};
opts.cert = mg_unpacked("/certs/server_cert.pem");
opts.key = mg_unpacked("/certs/server_key.pem");
mg_tls_init(c, &opts);
}
} else if (ev == MG_EV_HTTP_MSG) {
struct mg_http_message *hm = (struct mg_http_message *) ev_data;
if (mg_match(hm->uri, mg_str("/api/settings/get"), NULL)) {
handle_settings_get(c);
} else if (mg_match(hm->uri, mg_str("/api/settings/set"), NULL)) {
handle_settings_set(c, hm->body);
} else if (mg_match(hm->uri, mg_str("/api/settings/set"), NULL)) {
handle_settings_set(c, hm->body);
} else if (mg_match(hm->uri, mg_str("/api/modbus/exec"), NULL)) {
handle_modbus_exec(c, hm->body);
} else if (mg_match(hm->uri, mg_str("/api/device/reset"), NULL)) {
mg_timer_add(c->mgr, 500, 0, (void (*)(void *)) mg_device_reset, NULL);
mg_http_reply(c, 200, s_json_header, "true\n");
} else {
struct mg_http_serve_opts opts;
memset(&opts, 0, sizeof(opts));
#if MG_ARCH == MG_ARCH_UNIX || MG_ARCH == MG_ARCH_WIN32
opts.root_dir = "web_root"; // On workstations, use filesystem
#else
opts.root_dir = "/web_root"; // On embedded, use packed files
opts.fs = &mg_fs_packed;
#endif
mg_http_serve_dir(c, ev_data, &opts);
}
MG_DEBUG(("%lu %.*s %.*s", c->id, (int) hm->method.len, hm->method.buf,
(int) hm->uri.len, hm->uri.buf));
} else if (ev == MG_EV_POLL) {
if (cd->expiration_time > 0 && cd->expiration_time < mg_millis()) {
cd->expiration_time = 0;
mg_http_reply(c, 200, s_json_header, "false\n");
}
} else if (ev == MG_EV_USER) {
cd->expiration_time = 0; // Cleanup timeout setting
struct mg_iobuf *io = ev_data;
uint8_t f = io->buf[7];
mg_http_reply(c, 200, s_json_header, "{%m:%s,%m:%m,%m:%M}\n", //
MG_ESC("success"), "true", //
MG_ESC("raw"), mg_print_hex, io->len - 7, io->buf + 7, //
MG_ESC("data"), print_mb_resp, f, io->len - 8, io->buf + 8);
}
}
void web_init(struct mg_mgr *mgr) {
set_default_settings(&s_settings);
web_load_settings(&s_settings, sizeof(s_settings));
mg_http_listen(mgr, HTTP_URL, fn, NULL);
mg_http_listen(mgr, HTTPS_URL, fn, (void *) 1);
mg_timer_add(mgr, 10 * 60 * 1000, MG_TIMER_RUN_NOW | MG_TIMER_REPEAT,
timer_sntp_fn, mgr);
}
@@ -1,14 +0,0 @@
all:
make -C ../../../tutorials/http/http-server ARGS="-d $(CURDIR)"
# Bundle JS libraries (preact, preact-router, ...) into a single file
bundle.js:
curl -s https://npm.reversehttp.com/preact,preact/hooks,htm/preact,preact-router -o $@
# Create optimised CSS. Prerequisite: npm -g i tailwindcss tailwindcss-font-inter
NPX ?= npx
main.css: index.html $(wildcard *.js)
$(NPX) tailwindcss -o $@ --minify
clean:
true
-314
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@@ -1,314 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#include "net.h"
char *g_mqtt_server_url = MQTT_SERVER_URL;
char *g_root_topic = MQTT_ROOT_TOPIC;
char *g_device_id;
static uint8_t s_qos = 1; // MQTT QoS
static struct mg_connection *s_conn; // MQTT Client connection
static struct mg_rpc *s_rpc = NULL; // List of registered RPC methods
#define MAX_PINS 20
struct device_config {
int log_level; // Device logging level, 0-4
int pin_count; // Number of pins to handle
uint16_t pin_map[MAX_PINS]; // Pins to handle
bool pin_state[MAX_PINS]; // State of the GPIO pins
};
static struct device_config s_device_config;
// Device ID generation function. Create an ID that is unique
// for a given device, and does not change between device restarts.
static void set_device_id(void) {
char buf[15] = "";
#ifdef _WIN32
unsigned long serial = 0;
if (GetVolumeInformationA("c:\\", NULL, 0, &serial, NULL, NULL, NULL, 0)) {
mg_snprintf(buf, sizeof(buf), "%lx", serial);
}
#elif defined(__APPLE__)
FILE *fp = popen(
"ioreg -l | grep IOPlatformSerialNumber | cut -d'\"' -f4 | tr -d $'\n'",
"r");
if (fp != NULL) {
fread(buf, 1, sizeof(buf), fp);
fclose(fp);
}
#elif defined(__linux__)
struct mg_str id = mg_file_read(&mg_fs_posix, "/etc/machine-id");
if (id.buf != NULL) {
mg_snprintf(buf, sizeof(buf), "%s", id.buf);
free((void *) id.buf);
}
#endif
if (buf[0] == '\0') mg_snprintf(buf, sizeof(buf), "%s", "MyDeviceID");
buf[sizeof(buf) - 1] = '\0';
g_device_id = strdup(buf);
}
static size_t print_fw_status(void (*out)(char, void *), void *ptr,
va_list *ap) {
int fw = va_arg(*ap, int);
return mg_xprintf(out, ptr, "{%m:%d,%m:%c%lx%c,%m:%u,%m:%u}",
MG_ESC("status"), mg_ota_status(fw), MG_ESC("crc32"), '"',
mg_ota_crc32(fw), '"', MG_ESC("size"), mg_ota_size(fw),
MG_ESC("timestamp"), mg_ota_timestamp(fw));
}
static size_t print_shorts(void (*out)(char, void *), void *ptr, va_list *ap) {
uint16_t *array = va_arg(*ap, uint16_t *);
int i, len = 0, num_elems = va_arg(*ap, int);
for (i = 0; i < num_elems; i++) {
len += mg_xprintf(out, ptr, "%s%hu", i ? "," : "", array[i]);
}
return len;
}
static size_t print_bools(void (*out)(char, void *), void *ptr, va_list *ap) {
bool *array = va_arg(*ap, bool *);
int i, len = 0, num_elems = va_arg(*ap, int);
for (i = 0; i < num_elems; i++) {
len += mg_xprintf(out, ptr, "%s%d", i ? "," : "", array[i]);
}
return len;
}
static void publish_status(struct mg_connection *c) {
char topic[100];
struct mg_mqtt_opts pub_opts;
struct mg_iobuf io = {0, 0, 0, 512};
// Print JSON notification into the io buffer
mg_xprintf(mg_pfn_iobuf, &io,
"{%m:%m,%m:{%m:%m,%m:%d,%m:%d,%m:[%M],%m:[%M],%m:%M,%m:%M}}", //
MG_ESC("method"), MG_ESC("status.notify"), MG_ESC("params"), //
MG_ESC("status"), MG_ESC("online"), //
MG_ESC(("log_level")), s_device_config.log_level, //
MG_ESC(("pin_count")), s_device_config.pin_count, //
MG_ESC(("pin_map")), print_shorts, s_device_config.pin_map,
s_device_config.pin_count, //
MG_ESC(("pin_state")), print_bools, s_device_config.pin_state,
s_device_config.pin_count, //
MG_ESC(("crnt_fw")), print_fw_status, MG_FIRMWARE_CURRENT, //
MG_ESC(("prev_fw")), print_fw_status, MG_FIRMWARE_PREVIOUS);
memset(&pub_opts, 0, sizeof(pub_opts));
mg_snprintf(topic, sizeof(topic), "%s/%s/status", g_root_topic, g_device_id);
pub_opts.topic = mg_str(topic);
pub_opts.message = mg_str_n((char *) io.buf, io.len);
pub_opts.qos = s_qos;
pub_opts.retain = true;
mg_mqtt_pub(c, &pub_opts);
mg_iobuf_free(&io);
}
static void publish_response(struct mg_connection *c, char *buf, size_t len) {
struct mg_mqtt_opts pub_opts;
char topic[100];
mg_snprintf(topic, sizeof(topic), "%s/%s/tx", g_root_topic, g_device_id);
memset(&pub_opts, 0, sizeof(pub_opts));
pub_opts.topic = mg_str(topic);
pub_opts.message = mg_str_n(buf, len);
pub_opts.qos = s_qos;
mg_mqtt_pub(c, &pub_opts);
}
static void subscribe(struct mg_connection *c) {
char *rx_topic = mg_mprintf("%s/%s/rx", g_root_topic, g_device_id);
struct mg_str subt = mg_str(rx_topic);
struct mg_mqtt_opts sub_opts;
memset(&sub_opts, 0, sizeof(sub_opts));
sub_opts.topic = subt;
sub_opts.qos = s_qos;
mg_mqtt_sub(c, &sub_opts);
MG_INFO(("%lu SUBSCRIBED to %.*s", c->id, (int) subt.len, subt.buf));
free(rx_topic);
}
static void rpc_config_set(struct mg_rpc_req *r) {
struct device_config dc = s_device_config;
dc.pin_count = (int) mg_json_get_long(r->frame, "$.params.pin_count", -1);
dc.log_level = (int) mg_json_get_long(r->frame, "$.params.log_level", -1);
if (dc.log_level < 0 || dc.log_level > MG_LL_VERBOSE) {
mg_rpc_err(r, -32602, "Log level must be from 0 to 4");
} else if (dc.pin_count <= 0 || dc.pin_count > MAX_PINS) {
mg_rpc_err(r, -32602, "Pin count must be from 1 to %d", MAX_PINS);
} else {
int i, val;
for (i = 0; i < dc.pin_count; i++) {
char path[50];
mg_snprintf(path, sizeof(path), "$.params.pin_map[%d]", i);
dc.pin_map[i] = (uint16_t) mg_json_get_long(r->frame, path, 0);
mg_snprintf(path, sizeof(path), "$.params.pin_state[%d]", i);
if ((val = (int) mg_json_get_long(r->frame, path, -1)) >= 0) {
gpio_write(dc.pin_map[i], val);
}
dc.pin_state[i] = gpio_read(dc.pin_map[i]);
// MG_INFO(("%d %d %d", i, dc.pin_map[i], dc.pin_state[i]));
}
mg_log_set(dc.log_level);
s_device_config = dc;
mg_rpc_ok(r, "true");
}
}
static void rpc_ota_commit(struct mg_rpc_req *r) {
if (mg_ota_commit()) {
mg_rpc_ok(r, "%m", MG_ESC("ok"));
} else {
mg_rpc_err(r, 1, "Failed to commit the firmware");
}
}
static void rpc_device_reset(struct mg_rpc_req *r) {
mg_rpc_ok(r, "%m", MG_ESC("ok"));
mg_timer_add(s_conn->mgr, 500, 0, (void (*)(void *)) mg_device_reset, NULL);
}
static void rpc_ota_rollback(struct mg_rpc_req *r) {
if (mg_ota_rollback()) {
mg_rpc_ok(r, "%m", MG_ESC("ok"));
} else {
mg_rpc_err(r, 1, "Failed to rollback to the previous firmware");
}
}
static void rpc_ota_upload(struct mg_rpc_req *r) {
long ofs = mg_json_get_long(r->frame, "$.params.offset", -1);
long tot = mg_json_get_long(r->frame, "$.params.total", -1);
int len = 0;
char *buf = mg_json_get_b64(r->frame, "$.params.chunk", &len);
if (buf == NULL) {
mg_rpc_err(r, 1, "Error processing the binary chunk.");
} else {
if (ofs < 0 || tot < 0) {
mg_rpc_err(r, 1, "offset and total not set");
} else if (ofs == 0 && mg_ota_begin((size_t) tot) == false) {
mg_rpc_err(r, 1, "mg_ota_begin(%ld) failed\n", tot);
} else if (len > 0 && mg_ota_write(buf, len) == false) {
mg_rpc_err(r, 1, "mg_ota_write(%lu) @%ld failed\n", len, ofs);
mg_ota_end();
} else if (len == 0 && mg_ota_end() == false) {
mg_rpc_err(r, 1, "mg_ota_end() failed\n", tot);
} else {
mg_rpc_ok(r, "%m", MG_ESC("ok"));
if (len == 0) { // Successful mg_ota_end() called, schedule device reboot
mg_timer_add(s_conn->mgr, 500, 0, (void (*)(void *)) mg_device_reset,
NULL);
}
}
free(buf);
}
}
static void fn(struct mg_connection *c, int ev, void *ev_data) {
if (ev == MG_EV_OPEN) {
MG_INFO(("%lu CREATED", c->id));
// c->is_hexdumping = 1;
} else if (ev == MG_EV_CONNECT) {
MG_INFO(("Device %s is connected", g_device_id));
} else if (ev == MG_EV_ERROR) {
// On error, log error message
MG_ERROR(("%lu ERROR %s", c->id, (char *) ev_data));
} else if (ev == MG_EV_MQTT_OPEN) {
// MQTT connect is successful
MG_INFO(("%lu CONNECTED to %s", c->id, g_mqtt_server_url));
subscribe(c);
publish_status(c);
} else if (ev == MG_EV_MQTT_MSG) {
// When we get echo response, print it
struct mg_mqtt_message *mm = (struct mg_mqtt_message *) ev_data;
struct mg_iobuf io = {0, 0, 0, 512};
struct mg_rpc_req r = {&s_rpc, NULL, mg_pfn_iobuf,
&io, NULL, {mm->data.buf, mm->data.len}};
size_t clipped_len = mm->data.len > 512 ? 512 : mm->data.len;
MG_INFO(("%lu RECEIVED %.*s <- %.*s", c->id, clipped_len, mm->data.buf,
mm->topic.len, mm->topic.buf));
mg_rpc_process(&r);
if (io.buf) {
publish_response(c, (char *) io.buf, io.len);
publish_status(c);
}
mg_iobuf_free(&io);
} else if (ev == MG_EV_CLOSE) {
MG_INFO(("%lu CLOSED", c->id));
s_conn = NULL; // Mark that we're closed
}
}
// Timer function - recreate client connection if it is closed
static void timer_reconnect(void *arg) {
struct mg_mgr *mgr = (struct mg_mgr *) arg;
if (s_conn == NULL) {
struct mg_mqtt_opts opts;
char topic[100], message[100];
mg_snprintf(topic, sizeof(topic), "%s/%s/status", g_root_topic,
g_device_id);
mg_snprintf(message, sizeof(message), "{%m:%m,%m:{%m:%m}}",
MG_ESC("method"), MG_ESC("status.notify"), MG_ESC("params"),
MG_ESC("status"), MG_ESC("offline"));
memset(&opts, 0, sizeof(opts));
opts.clean = true;
opts.qos = s_qos;
opts.topic = mg_str(topic);
opts.version = 4;
opts.keepalive = MQTT_KEEPALIVE_SEC;
opts.retain = true;
opts.message = mg_str(message);
s_conn = mg_mqtt_connect(mgr, g_mqtt_server_url, &opts, fn, NULL);
}
}
static void timer_ping(void *arg) {
mg_mqtt_send_header(s_conn, MQTT_CMD_PINGREQ, 0, 0);
(void) arg;
}
static void timer_sntp(void *param) { // SNTP timer function. Sync up time
static uint64_t hourly_timer = 0;
uint64_t t1 = mg_now(), t2 = mg_millis();
if (t1 < t2 + 3600 || mg_timer_expired(&hourly_timer, 3600000, t2)) {
mg_sntp_connect(param, "udp://time.google.com:123", NULL, NULL);
}
}
void web_init(struct mg_mgr *mgr) {
int i, ping_interval_ms = MQTT_KEEPALIVE_SEC * 1000 - 500;
set_device_id();
s_device_config.log_level = (int) mg_log_level;
s_device_config.pin_count = 5;
s_device_config.pin_map[0] = 10;
s_device_config.pin_map[1] = 11;
s_device_config.pin_map[2] = 12;
s_device_config.pin_map[3] = 13;
s_device_config.pin_map[4] = 25;
for (i = 0; i < s_device_config.pin_count; i++) {
s_device_config.pin_state[i] = gpio_read(s_device_config.pin_map[i]);
}
// Configure JSON-RPC functions we're going to handle
mg_rpc_add(&s_rpc, mg_str("config.set"), rpc_config_set, NULL);
mg_rpc_add(&s_rpc, mg_str("ota.commit"), rpc_ota_commit, NULL);
mg_rpc_add(&s_rpc, mg_str("ota.rollback"), rpc_ota_rollback, NULL);
mg_rpc_add(&s_rpc, mg_str("ota.upload"), rpc_ota_upload, NULL);
mg_rpc_add(&s_rpc, mg_str("device.reset"), rpc_device_reset, NULL);
mg_timer_add(mgr, 3000, MG_TIMER_REPEAT | MG_TIMER_RUN_NOW, timer_reconnect,
mgr);
mg_timer_add(mgr, ping_interval_ms, MG_TIMER_REPEAT, timer_ping, mgr);
mg_timer_add(mgr, 2000, MG_TIMER_REPEAT, timer_sntp, mgr);
}
void web_free(void) {
mg_rpc_del(&s_rpc, NULL); // Deallocate RPC handlers
free(g_device_id);
}
@@ -1,45 +0,0 @@
CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
CFLAGS += -Wformat-truncation -fno-common # -Wconversion is not SDK-friendly
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_mcu/devices/MCXN947/
CFLAGS += -Icmsis_mcu/devices/MCXN947/drivers
CFLAGS += -DCPU_MCXN947VDF -DCPU_MCXN947VDF_cm33 -DCPU_MCXN947VDF_cm33_core0
CFLAGS += -mcpu=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 $(CFLAGS_EXTRA)
CFLAGS += -Wno-old-style-declaration -Wno-unused-parameter # due to NXP FSL code
LDSCRIPT = link.ld
LDFLAGS ?= -T$(LDSCRIPT) -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
SOURCES = main.c hal.c
SOURCES += startup.c
SOURCES += cmsis_mcu/devices/MCXN947/drivers/fsl_clock.c cmsis_mcu/devices/MCXN947/drivers/fsl_spc.c cmsis_mcu/devices/MCXN947/drivers/fsl_common_arm.c # NXP support files
# Mongoose options are defined in mongoose_config.h
SOURCES += mongoose.c net.c packed_fs.c
# Example specific build options. See README.md
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
ifeq ($(OS),Windows_NT)
RM = cmd /C del /Q /F /S
else
RM = rm -rf
endif
all build example: firmware.bin
firmware.bin: firmware.elf
arm-none-eabi-objcopy -O binary $< $@
firmware.elf: cmsis_core cmsis_mcu $(SOURCES) hal.h link.ld Makefile
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
arm-none-eabi-size $@
cmsis_core: # ARM CMSIS core headers
git clone -q --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
cmsis_mcu:
wget -O $@.zip https://mcuxpresso.nxp.com/cmsis_pack/repo/NXP.MCXN947_DFP.17.0.0.pack
mkdir $@ && cd $@ && unzip -q ../$@.zip
clean:
$(RM) firmware.* *.su cmsis_core cmsis_mcu *.zip
@@ -1,186 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
#if 0
void mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
}
#endif
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
void hal_init(void) {
clock_init(); // Set system clock to SYS_FREQUENCY
SystemCoreClock = SYS_FREQUENCY; // Update SystemCoreClock global var
SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
// rng_init(); // TRNG is part of ELS and there is no info on that
uart_init(UART_DEBUG, 115200); // Initialise UART
gpio_output(LED1); // Initialise LED1
gpio_write(LED1, 1);
gpio_output(LED2); // Initialise LED2
gpio_write(LED2, 1);
gpio_output(LED3); // Initialise LED3
gpio_write(LED3, 1);
ethernet_init(); // Initialise Ethernet pins
}
#if defined(__ARMCC_VERSION)
// Keil specific - implement IO printf redirection
int fputc(int c, FILE *stream) {
if (stream == stdout || stream == stderr) uart_write_byte(UART_DEBUG, c);
return c;
}
#elif defined(__GNUC__)
// ARM GCC specific. ARM GCC is shipped with Newlib C library.
// Implement newlib syscalls:
// _sbrk() for malloc
// _write() for printf redirection
// the rest are just stubs
#include <sys/stat.h> // For _fstat()
#if !defined(__MCUXPRESSO)
uint32_t SystemCoreClock;
// evaluate your use of Secure/non-Secure and modify accordingly
void SystemInit(void) { // Called automatically by startup code
SCB->CPACR |=
#if 0
(3UL << 0 * 2) | (3UL << 1 * 2) | // Enable PowerQuad (CPO/CP1)
#endif
(3UL << 10 * 2) | (3UL << 11 * 2); // Enable FPU
__DSB();
__ISB();
SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK; // enable LPCAC
// Read TRM 36.1 and decide whether you really want to enable aGDET and dGDET
#if 1
// Disable aGDET and dGDET
ITRC0->OUT_SEL[4][0] =
(ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
ITRC0->OUT_SEL[4][1] =
(ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_GLITCH_DETECT_DISABLE_MASK;
SPC0->GLITCH_DETECT_SC &= ~SPC_GLITCH_DETECT_SC_LOCK_MASK;
SPC0->GLITCH_DETECT_SC = 0x3C;
SPC0->GLITCH_DETECT_SC |= SPC_GLITCH_DETECT_SC_LOCK_MASK;
ITRC0->OUT_SEL[4][0] =
(ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
ITRC0->OUT_SEL[4][1] =
(ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
GDET0->GDET_ENABLE1 = 0;
GDET1->GDET_ENABLE1 = 0;
#endif
}
#endif
int _fstat(int fd, struct stat *st) {
(void) fd, (void) st;
return -1;
}
#if !defined(__MCUXPRESSO)
extern unsigned char _end[]; // End of data section, start of heap. See link.ld
static unsigned char *s_current_heap_end = _end;
size_t hal_ram_used(void) {
return (size_t) (s_current_heap_end - _end);
}
size_t hal_ram_free(void) {
unsigned char endofstack;
return (size_t) (&endofstack - s_current_heap_end);
}
void *_sbrk(int incr) {
unsigned char *prev_heap;
unsigned char *heap_end = (unsigned char *) ((size_t) &heap_end - 256);
prev_heap = s_current_heap_end;
// Check how much space we got from the heap end to the stack end
if (s_current_heap_end + incr > heap_end) return (void *) -1;
s_current_heap_end += incr;
return prev_heap;
}
#endif
int _open(const char *path) {
(void) path;
return -1;
}
int _close(int fd) {
(void) fd;
return -1;
}
int _isatty(int fd) {
(void) fd;
return 1;
}
int _lseek(int fd, int ptr, int dir) {
(void) fd, (void) ptr, (void) dir;
return 0;
}
void _exit(int status) {
(void) status;
for (;;) asm volatile("BKPT #0");
}
void _kill(int pid, int sig) {
(void) pid, (void) sig;
}
int _getpid(void) {
return -1;
}
int _write(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
return -1;
}
int _read(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
return -1;
}
int _link(const char *a, const char *b) {
(void) a, (void) b;
return -1;
}
int _unlink(const char *a) {
(void) a;
return -1;
}
int _stat(const char *path, struct stat *st) {
(void) path, (void) st;
return -1;
}
int mkdir(const char *path, mode_t mode) {
(void) path, (void) mode;
return -1;
}
void _init(void) {
}
#endif // __GNUC__
@@ -1,223 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#pragma once
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#define LED1 PIN(0, 10)
#define LED2 PIN(0, 27)
#define LED3 PIN(1, 2)
#ifndef UART_DEBUG
#define UART_DEBUG LPUART4
#endif
#include "MCXN947_cm33_core0.h"
#define BIT(x) (1UL << (x))
#define CLRSET(reg, clear, set) ((reg) = ((reg) & ~(clear)) | (set))
#define PIN(bank, num) ((bank << 8) | (num))
#define PINNO(pin) (pin & 255)
#define PINBANK(pin) (pin >> 8)
void hal_init(void);
size_t hal_ram_free(void);
size_t hal_ram_used(void);
static inline void spin(volatile uint32_t count) {
while (count--) (void) 0;
}
#define SYS_FREQUENCY 150000000UL
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT };
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
enum { GPIO_SPEED_LOW, GPIO_SPEED_HIGH };
enum { GPIO_PULL_NONE, GPIO_PULL_DOWN, GPIO_PULL_UP };
static inline GPIO_Type *gpio_bank(uint16_t pin) {
static GPIO_Type *const g[] = GPIO_BASE_PTRS;
return g[PINBANK(pin)];
}
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
uint8_t speed, uint8_t pull, uint8_t af) {
static PORT_Type *const p[] = PORT_BASE_PTRS;
PORT_Type *port = p[PINBANK(pin)];
GPIO_Type *gpio = gpio_bank(pin);
uint32_t mask = (uint32_t) BIT(PINNO(pin));
bool dopull = pull > 0;
if (dopull) --pull;
if (gpio != GPIO5) {
SYSCON->AHBCLKCTRL0 |=
(1 << (SYSCON_AHBCLKCTRL0_GPIO0_SHIFT + PINBANK(pin))) |
(1 << (SYSCON_AHBCLKCTRL0_PORT0_SHIFT + PINBANK(pin)));
};
port->PCR[PINNO(pin)] = PORT_PCR_IBE(1) | PORT_PCR_MUX(af) | PORT_PCR_DSE(1) |
PORT_PCR_ODE(type) |
PORT_PCR_SRE(speed != GPIO_SPEED_HIGH) |
PORT_PCR_PE(dopull) | PORT_PCR_PS(pull);
gpio->ICR[PINNO(pin)] = GPIO_ICR_ISF_MASK;
if (mode == GPIO_MODE_INPUT) {
gpio->PDDR &= ~mask;
} else {
gpio->PDDR |= mask;
}
}
static inline void gpio_input(uint16_t pin) {
gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0);
}
static inline void gpio_output(uint16_t pin) {
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0);
}
static inline bool gpio_read(uint16_t pin) {
GPIO_Type *gpio = gpio_bank(pin);
return gpio->PDR[PINNO(pin)];
}
static inline void gpio_write(uint16_t pin, bool value) {
GPIO_Type *gpio = gpio_bank(pin);
if (value) {
gpio->PDR[PINNO(pin)] = 1;
} else {
gpio->PDR[PINNO(pin)] = 0;
}
}
static inline void gpio_toggle(uint16_t pin) {
GPIO_Type *gpio = gpio_bank(pin);
uint32_t mask = (uint32_t) BIT(PINNO(pin));
gpio->PTOR = mask;
}
// MCU-Link UART (P1_9/8; FC4_P1/0)
// Arduino J1_2/4 UART (P4_3/2; FC2_P3/2)
// 33.3.23 LP_FLEXCOMM clocking
// 66.2.4 LP_FLEXCOMM init
// 66.5 LPUART
static inline void uart_init(LPUART_Type *uart, unsigned long baud) {
static LP_FLEXCOMM_Type *const f[] = LP_FLEXCOMM_BASE_PTRS;
uint8_t af = 2, fc = 0; // Alternate function, FlexComm instance
uint16_t pr = 0, pt = 0; // pins
uint32_t freq = 12000000; // fro_12_m
if (uart == LPUART2) fc = 2, pt = PIN(4, 3), pr = PIN(4, 2);
if (uart == LPUART4) fc = 4, pt = PIN(1, 9), pr = PIN(1, 8);
SYSCON->AHBCLKCTRL1 |= (1 << (SYSCON_AHBCLKCTRL1_FC0_SHIFT + fc));
SYSCON->PRESETCTRL1 |= (1 << (SYSCON_PRESETCTRL1_FC0_RST_SHIFT + fc));
SYSCON->PRESETCTRL1 &= ~(1 << (SYSCON_PRESETCTRL1_FC0_RST_SHIFT + fc));
SYSCON->FCCLKSEL[fc] = SYSCON_FCCLKSEL_SEL(2); // clock from FRO_12M / 1
SYSCON->FLEXCOMMCLKDIV[fc] = SYSCON_FLEXCOMMXCLKDIV_FLEXCOMMCLKDIV_DIV(0);
LP_FLEXCOMM_Type *flexcomm = f[fc];
flexcomm->PSELID = LP_FLEXCOMM_PSELID_PERSEL(1); // configure as UART
gpio_init(pt, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_UP, af);
gpio_init(pr, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_UP, af);
uart->GLOBAL |= LPUART_GLOBAL_RST_MASK; // reset, CTRL = 0, defaults
uart->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
// use a weird oversample ratio of 26x to fit specs, standard 16x won't do
CLRSET(uart->BAUD,
LPUART_BAUD_OSR_MASK | LPUART_BAUD_SBR_MASK | LPUART_BAUD_SBNS_MASK,
LPUART_BAUD_OSR(26 - 1) | LPUART_BAUD_SBR(freq / (26 * baud)));
CLRSET(uart->CTRL,
LPUART_CTRL_PE_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL_ILT_MASK |
LPUART_CTRL_IDLECFG_MASK,
LPUART_CTRL_IDLECFG(1) | LPUART_CTRL_ILT(1) |
LPUART_BAUD_SBNS(0)); // no parity, idle 2 chars after 1 stop bit
uart->CTRL |= LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK;
}
static inline void uart_write_byte(LPUART_Type *uart, uint8_t byte) {
uart->DATA = byte;
while ((uart->STAT & LPUART_STAT_TDRE_MASK) == 0) spin(1);
}
static inline void uart_write_buf(LPUART_Type *uart, char *buf, size_t len) {
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
}
static inline void rng_init(void) {
}
static inline uint32_t rng_read(void) {
return 42;
}
// - PHY and MAC clocked via a 50MHz oscillator, P1_4 (ENET0_TXCLK)
// - 33.3.30 ENET clocking
// - SMI clocked from AHB module clock (CSR)
// - PHY RST connected to P5_8
// - PHY RXD0,1,DV = 1 on RST enable autonegotiation, no hw pull-ups
static inline void ethernet_init(void) {
// '0' in clk_rmii, set for RMII mode
SYSCON->ENETRMIICLKSEL = SYSCON_ENETRMIICLKSEL_SEL(0);
SYSCON->ENETRMIICLKDIV = SYSCON_ENETRMIICLKDIV_DIV(0);
SYSCON->AHBCLKCTRL2 |= SYSCON_AHBCLKCTRL2_ENET_MASK; // enable bus clk
SYSCON0->PRESETCTRL2 = SYSCON_PRESETCTRL2_ENET_RST_MASK; // reset MAC
SYSCON0->PRESETCTRL2 &= ~SYSCON_PRESETCTRL2_ENET_RST_MASK; // then set RMII
SYSCON0->ENET_PHY_INTF_SEL |= SYSCON_ENET_PHY_INTF_SEL_PHY_SEL_MASK;
gpio_init(PIN(5, 8), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0); // set P5_8 as GPIO (PHY \RST)
gpio_write(PIN(5, 8), 0); // reset PHY
gpio_init(PIN(1, 4), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_4 as ENET0_TXCLK
gpio_init(PIN(1, 5), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_5 as ENET0_TXEN
gpio_init(PIN(1, 6), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_6 as ENET0_TXD0
gpio_init(PIN(1, 7), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_7 as ENET0_TXD1
gpio_init(PIN(1, 13), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_13 as ENET0_RXDV
gpio_init(PIN(1, 14), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_14 as ENET0_RXD0
gpio_init(PIN(1, 15), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_15 as ENET0_RXD1
gpio_init(PIN(1, 20), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_20 as ENET0_MDC
gpio_init(PIN(1, 21), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_21 as ENET0_MDIO
spin(10000); // keep PHY RST low for a while
gpio_write(PIN(5, 8), 1); // deassert RST
NVIC_EnableIRQ(ETHERNET_IRQn); // Setup Ethernet IRQ handler
}
#include "fsl_clock.h"
#include "fsl_spc.h"
// 33.2 Figure 127 SCG main clock
static inline void clock_init(void) {
SYSCON->AHBCLKCTRL2 |= SYSCON_AHBCLKCTRL2_SCG_MASK; // enable SCG clk
CLRSET(SCG0->RCCR, SCG_CSR_SCS_MASK, SCG_CSR_SCS(2)); // clock main_clock
spc_active_mode_dcdc_option_t dcdc = {
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength};
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &dcdc); // Set DCDC to 1.2 V
spc_active_mode_core_ldo_option_t ldo = {
.CoreLDOVoltage = kSPC_CoreLDO_OverDriveVoltage,
.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength};
SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldo); // Set LDO_CORE to 1.2 V
CLRSET(FMU0->FCTRL, FMU_FCTRL_RWSC_MASK, FMU_FCTRL_RWSC(3)); // Set Flash WS
spc_sram_voltage_config_t sram = {.operateVoltage = kSPC_sramOperateAt1P2V,
.requestVoltageUpdate = true};
SPC_SetSRAMOperateVoltage(SPC0, &sram); // Set SRAM timing for 1.2V
CLOCK_SetupFROHFClocking(48000000U); // Enable FRO HF
const pll_setup_t pll0 = {.pllctrl = SCG_APLLCTRL_SOURCE(1U) |
SCG_APLLCTRL_SELI(27U) |
SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U};
CLOCK_SetPLL0Freq(&pll0); // Setup PLL0 (APLL),
CLOCK_SetPll0MonitorMode(0); // disable monitor mode
CLRSET(SCG0->RCCR, SCG_CSR_SCS_MASK, SCG_CSR_SCS(5)); // clock main_clock
SYSCON->AHBCLKDIV = SYSCON_AHBCLKDIV_DIV(0); // /1
}
@@ -1,30 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
MEMORY
{
flash(RX) : ORIGIN = 0x0, LENGTH = 0x100000
flash2(RX) : ORIGIN = 0x100000, LENGTH = 0x100000
sram(!RX) : ORIGIN = 0x20000000, LENGTH = 0x60000
}
_estack = ORIGIN(sram) + LENGTH(sram);
SECTIONS
{
.vectors : { FILL(256) KEEP(*(.isr_vector)) } > flash
.text : { *(.text*) } > flash
.data : {
_sdata = .;
*(.first_data)
*(.data SORT(.data.*))
_edata = .;
} > sram AT > flash
_sidata = LOADADDR(.data);
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
. = ALIGN(8);
_end = .;
}
@@ -1,32 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
#include "mongoose.h"
#include "net.h"
#define BLINK_PERIOD_MS 1000
static void timer_fn(void *arg) {
gpio_toggle(LED1); // Blink LED
(void) arg; // Unused
}
int main(void) {
struct mg_mgr mgr; // Mongoose event manager
hal_init(); // Cross-platform hardware init
mg_mgr_init(&mgr); // Initialise it
mg_log_set(MG_LL_DEBUG); // Set log level to debug
mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mgr);
MG_INFO(("Initialising application..."));
web_init(&mgr);
for (;;) {
mg_mgr_poll(&mgr, 0);
}
return 0;
}
@@ -1,25 +0,0 @@
#pragma once
// See https://mongoose.ws/documentation/#build-options
#define MG_ARCH MG_ARCH_NEWLIB
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_DRIVER_MCXN 1
#define MG_ENABLE_CUSTOM_MILLIS 1
//#define MG_ENABLE_CUSTOM_RANDOM 1
#define MG_ENABLE_PACKED_FS 1
// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
// By default, those are set to zero, meaning that DHCP is used
//
// #define MG_TCPIP_IP MG_IPV4(192, 168, 1, 10)
// #define MG_TCPIP_GW MG_IPV4(192, 168, 1, 1)
// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
// Set custom MAC address. By default, it is randomly generated
// Using a build-time constant:
// #define MG_SET_MAC_ADDRESS(mac) do { uint8_t buf_[6] = {2,3,4,5,6,7}; memmove(mac, buf_, sizeof(buf_)); } while (0)
//
// Using custom function:
// extern void my_function(unsigned char *mac);
// #define MG_SET_MAC_ADDRESS(mac) my_function(mac)
@@ -1,411 +0,0 @@
#include "MCXN947_cm33_core0.h"
void Reset_Handler(void); // Defined below
void Dummy_Handler(void); // Defined below
void SysTick_Handler(void); // Defined in main.c
void SystemInit(void); // Defined in main.c, called by reset handler
void _estack(void); // Defined in link.ld
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
WEAK_ALIAS void NMI_Handler(void);
WEAK_ALIAS void HardFault_Handler(void);
WEAK_ALIAS void MemManage_Handler(void);
WEAK_ALIAS void BusFault_Handler(void);
WEAK_ALIAS void UsageFault_Handler(void);
WEAK_ALIAS void SecureFault_Handler(void);
WEAK_ALIAS void DebugMon_Handler(void);
WEAK_ALIAS void SVC_Handler(void);
WEAK_ALIAS void PendSV_Handler(void);
WEAK_ALIAS void SysTick_Handler(void);
WEAK_ALIAS void OR_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH0_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH1_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH2_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH3_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH4_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH5_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH6_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH7_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH8_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH9_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH10_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH11_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH12_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH13_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH14_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH15_IRQHandler(void);
WEAK_ALIAS void GPIO00_IRQHandler(void);
WEAK_ALIAS void GPIO01_IRQHandler(void);
WEAK_ALIAS void GPIO10_IRQHandler(void);
WEAK_ALIAS void GPIO11_IRQHandler(void);
WEAK_ALIAS void GPIO20_IRQHandler(void);
WEAK_ALIAS void GPIO21_IRQHandler(void);
WEAK_ALIAS void GPIO30_IRQHandler(void);
WEAK_ALIAS void GPIO31_IRQHandler(void);
WEAK_ALIAS void GPIO40_IRQHandler(void);
WEAK_ALIAS void GPIO41_IRQHandler(void);
WEAK_ALIAS void GPIO50_IRQHandler(void);
WEAK_ALIAS void GPIO51_IRQHandler(void);
WEAK_ALIAS void UTICK0_IRQHandler(void);
WEAK_ALIAS void MRT0_IRQHandler(void);
WEAK_ALIAS void CTIMER0_IRQHandler(void);
WEAK_ALIAS void CTIMER1_IRQHandler(void);
WEAK_ALIAS void SCT0_IRQHandler(void);
WEAK_ALIAS void CTIMER2_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM0_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM1_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM2_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM3_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM4_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM5_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM6_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM7_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM8_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM9_IRQHandler(void);
WEAK_ALIAS void ADC0_IRQHandler(void);
WEAK_ALIAS void ADC1_IRQHandler(void);
WEAK_ALIAS void PINT0_IRQHandler(void);
WEAK_ALIAS void PDM_EVENT_IRQHandler(void);
WEAK_ALIAS void Reserved65_IRQHandler(void);
WEAK_ALIAS void USB0_FS_IRQHandler(void);
WEAK_ALIAS void USB0_DCD_IRQHandler(void);
WEAK_ALIAS void RTC_IRQHandler(void);
WEAK_ALIAS void SMARTDMA_IRQHandler(void);
WEAK_ALIAS void MAILBOX_IRQHandler(void);
WEAK_ALIAS void CTIMER3_IRQHandler(void);
WEAK_ALIAS void CTIMER4_IRQHandler(void);
WEAK_ALIAS void OS_EVENT_IRQHandler(void);
WEAK_ALIAS void FLEXSPI0_IRQHandler(void);
WEAK_ALIAS void SAI0_IRQHandler(void);
WEAK_ALIAS void SAI1_IRQHandler(void);
WEAK_ALIAS void USDHC0_IRQHandler(void);
WEAK_ALIAS void CAN0_IRQHandler(void);
WEAK_ALIAS void CAN1_IRQHandler(void);
WEAK_ALIAS void Reserved80_IRQHandler(void);
WEAK_ALIAS void Reserved81_IRQHandler(void);
WEAK_ALIAS void USB1_HS_PHY_IRQHandler(void);
WEAK_ALIAS void USB1_HS_IRQHandler(void);
WEAK_ALIAS void SEC_HYPERVISOR_CALL_IRQHandler(void);
WEAK_ALIAS void Reserved85_IRQHandler(void);
WEAK_ALIAS void PLU_IRQHandler(void);
WEAK_ALIAS void Freqme_IRQHandler(void);
WEAK_ALIAS void SEC_VIO_IRQHandler(void);
WEAK_ALIAS void ELS_IRQHandler(void);
WEAK_ALIAS void PKC_IRQHandler(void);
WEAK_ALIAS void PUF_IRQHandler(void);
WEAK_ALIAS void PQ_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH0_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH1_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH2_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH3_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH4_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH5_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH6_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH7_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH8_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH9_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH10_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH11_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH12_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH13_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH14_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH15_IRQHandler(void);
WEAK_ALIAS void CDOG0_IRQHandler(void);
WEAK_ALIAS void CDOG1_IRQHandler(void);
WEAK_ALIAS void I3C0_IRQHandler(void);
WEAK_ALIAS void I3C1_IRQHandler(void);
WEAK_ALIAS void NPU_IRQHandler(void);
WEAK_ALIAS void GDET_IRQHandler(void);
WEAK_ALIAS void VBAT0_IRQHandler(void);
WEAK_ALIAS void EWM0_IRQHandler(void);
WEAK_ALIAS void TSI_END_OF_SCAN_IRQHandler(void);
WEAK_ALIAS void TSI_OUT_OF_SCAN_IRQHandler(void);
WEAK_ALIAS void EMVSIM0_IRQHandler(void);
WEAK_ALIAS void EMVSIM1_IRQHandler(void);
WEAK_ALIAS void FLEXIO_IRQHandler(void);
WEAK_ALIAS void DAC0_IRQHandler(void);
WEAK_ALIAS void DAC1_IRQHandler(void);
WEAK_ALIAS void DAC2_IRQHandler(void);
WEAK_ALIAS void HSCMP0_IRQHandler(void);
WEAK_ALIAS void HSCMP1_IRQHandler(void);
WEAK_ALIAS void HSCMP2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_RELOAD_ERROR_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_FAULT_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE0_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE1_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE3_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_RELOAD_ERROR_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_FAULT_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE0_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE1_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE3_IRQHandler(void);
WEAK_ALIAS void ENC0_COMPARE_IRQHandler(void);
WEAK_ALIAS void ENC0_HOME_IRQHandler(void);
WEAK_ALIAS void ENC0_WDG_SAB_IRQHandler(void);
WEAK_ALIAS void ENC0_IDX_IRQHandler(void);
WEAK_ALIAS void ENC1_COMPARE_IRQHandler(void);
WEAK_ALIAS void ENC1_HOME_IRQHandler(void);
WEAK_ALIAS void ENC1_WDG_SAB_IRQHandler(void);
WEAK_ALIAS void ENC1_IDX_IRQHandler(void);
WEAK_ALIAS void ITRC0_IRQHandler(void);
WEAK_ALIAS void BSP32_IRQHandler(void);
WEAK_ALIAS void ELS_ERR_IRQHandler(void);
WEAK_ALIAS void PKC_ERR_IRQHandler(void);
WEAK_ALIAS void ERM_SINGLE_BIT_ERROR_IRQHandler(void);
WEAK_ALIAS void ERM_MULTI_BIT_ERROR_IRQHandler(void);
WEAK_ALIAS void FMU0_IRQHandler(void);
WEAK_ALIAS void ETHERNET_IRQHandler(void);
WEAK_ALIAS void ETHERNET_PMT_IRQHandler(void);
WEAK_ALIAS void ETHERNET_MACLP_IRQHandler(void);
WEAK_ALIAS void SINC_FILTER_IRQHandler(void);
WEAK_ALIAS void LPTMR0_IRQHandler(void);
WEAK_ALIAS void LPTMR1_IRQHandler(void);
WEAK_ALIAS void SCG_IRQHandler(void);
WEAK_ALIAS void SPC_IRQHandler(void);
WEAK_ALIAS void WUU_IRQHandler(void);
WEAK_ALIAS void PORT_EFT_IRQHandler(void);
WEAK_ALIAS void ETB0_IRQHandler(void);
WEAK_ALIAS void SM3_IRQHandler(void);
WEAK_ALIAS void TRNG0_IRQHandler(void);
WEAK_ALIAS void WWDT0_IRQHandler(void);
WEAK_ALIAS void WWDT1_IRQHandler(void);
WEAK_ALIAS void CMC0_IRQHandler(void);
WEAK_ALIAS void CTI0_IRQHandler(void);
__attribute__((section(".vectors"))) void (*const tab[16 + 156])(void) = {
_estack, Reset_Handler,
NMI_Handler, // NMI Handler
HardFault_Handler, // Hard Fault Handler
MemManage_Handler, // MPU Fault Handler
BusFault_Handler, // Bus Fault Handler
UsageFault_Handler, // Usage Fault Handler
SecureFault_Handler, // Secure Fault Handler
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall Handler
DebugMon_Handler, // Debug Monitor Handler
0, // Reserved
PendSV_Handler, // PendSV Handler
SysTick_Handler, // SysTick Handler
// Chip Level - MCXN947_cm33_core0
OR_IRQHandler, // 16 : OR IRQ
EDMA_0_CH0_IRQHandler, // 17 : eDMA_0_CH0 error or transfer complete
EDMA_0_CH1_IRQHandler, // 18 : eDMA_0_CH1 error or transfer complete
EDMA_0_CH2_IRQHandler, // 19 : eDMA_0_CH2 error or transfer complete
EDMA_0_CH3_IRQHandler, // 20 : eDMA_0_CH3 error or transfer complete
EDMA_0_CH4_IRQHandler, // 21 : eDMA_0_CH4 error or transfer complete
EDMA_0_CH5_IRQHandler, // 22 : eDMA_0_CH5 error or transfer complete
EDMA_0_CH6_IRQHandler, // 23 : eDMA_0_CH6 error or transfer complete
EDMA_0_CH7_IRQHandler, // 24 : eDMA_0_CH7 error or transfer complete
EDMA_0_CH8_IRQHandler, // 25 : eDMA_0_CH8 error or transfer complete
EDMA_0_CH9_IRQHandler, // 26 : eDMA_0_CH9 error or transfer complete
EDMA_0_CH10_IRQHandler, // 27 : eDMA_0_CH10 error or transfer complete
EDMA_0_CH11_IRQHandler, // 28 : eDMA_0_CH11 error or transfer complete
EDMA_0_CH12_IRQHandler, // 29 : eDMA_0_CH12 error or transfer complete
EDMA_0_CH13_IRQHandler, // 30 : eDMA_0_CH13 error or transfer complete
EDMA_0_CH14_IRQHandler, // 31 : eDMA_0_CH14 error or transfer complete
EDMA_0_CH15_IRQHandler, // 32 : eDMA_0_CH15 error or transfer complete
GPIO00_IRQHandler, // 33 : GPIO0 interrupt 0
GPIO01_IRQHandler, // 34 : GPIO0 interrupt 1
GPIO10_IRQHandler, // 35 : GPIO1 interrupt 0
GPIO11_IRQHandler, // 36 : GPIO1 interrupt 1
GPIO20_IRQHandler, // 37 : GPIO2 interrupt 0
GPIO21_IRQHandler, // 38 : GPIO2 interrupt 1
GPIO30_IRQHandler, // 39 : GPIO3 interrupt 0
GPIO31_IRQHandler, // 40 : GPIO3 interrupt 1
GPIO40_IRQHandler, // 41 : GPIO4 interrupt 0
GPIO41_IRQHandler, // 42 : GPIO4 interrupt 1
GPIO50_IRQHandler, // 43 : GPIO5 interrupt 0
GPIO51_IRQHandler, // 44 : GPIO5 interrupt 1
UTICK0_IRQHandler, // 45 : Micro-Tick Timer interrupt
MRT0_IRQHandler, // 46 : Multi-Rate Timer interrupt
CTIMER0_IRQHandler, // 47 : Standard counter/timer 0 interrupt
CTIMER1_IRQHandler, // 48 : Standard counter/timer 1 interrupt
SCT0_IRQHandler, // 49 : SCTimer/PWM interrupt
CTIMER2_IRQHandler, // 50 : Standard counter/timer 2 interrupt
LP_FLEXCOMM0_IRQHandler, // 51 : LP_FLEXCOMM0 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM1_IRQHandler, // 52 : LP_FLEXCOMM1 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM2_IRQHandler, // 53 : LP_FLEXCOMM2 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM3_IRQHandler, // 54 : LP_FLEXCOMM3 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM4_IRQHandler, // 55 : LP_FLEXCOMM4 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM5_IRQHandler, // 56 : LP_FLEXCOMM5 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM6_IRQHandler, // 57 : LP_FLEXCOMM6 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM7_IRQHandler, // 58 : LP_FLEXCOMM7 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM8_IRQHandler, // 59 : LP_FLEXCOMM8 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM9_IRQHandler, // 60 : LP_FLEXCOMM9 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
ADC0_IRQHandler, // 61 : Analog-to-Digital Converter 0 - General Purpose
// interrupt
ADC1_IRQHandler, // 62 : Analog-to-Digital Converter 1 - General Purpose
// interrupt
PINT0_IRQHandler, // 63 : Pin Interrupt Pattern Match Interrupt
PDM_EVENT_IRQHandler, // 64 : Microphone Interface interrupt
Reserved65_IRQHandler, // 65 : Reserved interrupt
USB0_FS_IRQHandler, // 66 : Universal Serial Bus - Full Speed interrupt
USB0_DCD_IRQHandler, // 67 : Universal Serial Bus - Device Charge Detect
// interrupt
RTC_IRQHandler, // 68 : RTC Subsystem interrupt (RTC interrupt or Wake
// timer interrupt)
SMARTDMA_IRQHandler, // 69 : SmartDMA_IRQ
MAILBOX_IRQHandler, // 70 : Inter-CPU Mailbox interrupt0 for CPU0 Inter-CPU
// Mailbox interrupt1 for CPU1
CTIMER3_IRQHandler, // 71 : Standard counter/timer 3 interrupt
CTIMER4_IRQHandler, // 72 : Standard counter/timer 4 interrupt
OS_EVENT_IRQHandler, // 73 : OS event timer interrupt
FLEXSPI0_IRQHandler, // 74 : Flexible Serial Peripheral Interface interrupt
SAI0_IRQHandler, // 75 : Serial Audio Interface 0 interrupt
SAI1_IRQHandler, // 76 : Serial Audio Interface 1 interrupt
USDHC0_IRQHandler, // 77 : Ultra Secured Digital Host Controller interrupt
CAN0_IRQHandler, // 78 : Controller Area Network 0 interrupt
CAN1_IRQHandler, // 79 : Controller Area Network 1 interrupt
Reserved80_IRQHandler, // 80 : Reserved interrupt
Reserved81_IRQHandler, // 81 : Reserved interrupt
USB1_HS_PHY_IRQHandler, // 82 : USBHS DCD or USBHS Phy interrupt
USB1_HS_IRQHandler, // 83 : USB High Speed OTG Controller interrupt
SEC_HYPERVISOR_CALL_IRQHandler, // 84 : AHB Secure Controller hypervisor
// call interrupt
Reserved85_IRQHandler, // 85 : Reserved interrupt
PLU_IRQHandler, // 86 : Programmable Logic Unit interrupt
Freqme_IRQHandler, // 87 : Frequency Measurement interrupt
SEC_VIO_IRQHandler, // 88 : Secure violation interrupt (Memory Block
// Checker interrupt or secure AHB matrix violation
// interrupt)
ELS_IRQHandler, // 89 : ELS interrupt
PKC_IRQHandler, // 90 : PKC interrupt
PUF_IRQHandler, // 91 : Physical Unclonable Function interrupt
PQ_IRQHandler, // 92 : Power Quad interrupt
EDMA_1_CH0_IRQHandler, // 93 : eDMA_1_CH0 error or transfer complete
EDMA_1_CH1_IRQHandler, // 94 : eDMA_1_CH1 error or transfer complete
EDMA_1_CH2_IRQHandler, // 95 : eDMA_1_CH2 error or transfer complete
EDMA_1_CH3_IRQHandler, // 96 : eDMA_1_CH3 error or transfer complete
EDMA_1_CH4_IRQHandler, // 97 : eDMA_1_CH4 error or transfer complete
EDMA_1_CH5_IRQHandler, // 98 : eDMA_1_CH5 error or transfer complete
EDMA_1_CH6_IRQHandler, // 99 : eDMA_1_CH6 error or transfer complete
EDMA_1_CH7_IRQHandler, // 100: eDMA_1_CH7 error or transfer complete
EDMA_1_CH8_IRQHandler, // 101: eDMA_1_CH8 error or transfer complete
EDMA_1_CH9_IRQHandler, // 102: eDMA_1_CH9 error or transfer complete
EDMA_1_CH10_IRQHandler, // 103: eDMA_1_CH10 error or transfer complete
EDMA_1_CH11_IRQHandler, // 104: eDMA_1_CH11 error or transfer complete
EDMA_1_CH12_IRQHandler, // 105: eDMA_1_CH12 error or transfer complete
EDMA_1_CH13_IRQHandler, // 106: eDMA_1_CH13 error or transfer complete
EDMA_1_CH14_IRQHandler, // 107: eDMA_1_CH14 error or transfer complete
EDMA_1_CH15_IRQHandler, // 108: eDMA_1_CH15 error or transfer complete
CDOG0_IRQHandler, // 109: Code Watchdog Timer 0 interrupt
CDOG1_IRQHandler, // 110: Code Watchdog Timer 1 interrupt
I3C0_IRQHandler, // 111: Improved Inter Integrated Circuit interrupt 0
I3C1_IRQHandler, // 112: Improved Inter Integrated Circuit interrupt 1
NPU_IRQHandler, // 113: NPU interrupt
GDET_IRQHandler, // 114: Digital Glitch Detect 0 interrupt or Digital
// Glitch Detect 1 interrupt
VBAT0_IRQHandler, // 115: VBAT interrupt( VBAT interrupt or digital tamper
// interrupt)
EWM0_IRQHandler, // 116: External Watchdog Monitor interrupt
TSI_END_OF_SCAN_IRQHandler, // 117: TSI End of Scan interrupt
TSI_OUT_OF_SCAN_IRQHandler, // 118: TSI Out of Scan interrupt
EMVSIM0_IRQHandler, // 119: EMVSIM0 interrupt
EMVSIM1_IRQHandler, // 120: EMVSIM1 interrupt
FLEXIO_IRQHandler, // 121: Flexible Input/Output interrupt
DAC0_IRQHandler, // 122: Digital-to-Analog Converter 0 - General Purpose
// interrupt
DAC1_IRQHandler, // 123: Digital-to-Analog Converter 1 - General Purpose
// interrupt
DAC2_IRQHandler, // 124: 14-bit Digital-to-Analog Converter interrupt
HSCMP0_IRQHandler, // 125: High-Speed comparator0 interrupt
HSCMP1_IRQHandler, // 126: High-Speed comparator1 interrupt
HSCMP2_IRQHandler, // 127: High-Speed comparator2 interrupt
FLEXPWM0_RELOAD_ERROR_IRQHandler, // 128: FlexPWM0_reload_error interrupt
FLEXPWM0_FAULT_IRQHandler, // 129: FlexPWM0_fault interrupt
FLEXPWM0_SUBMODULE0_IRQHandler, // 130: FlexPWM0 Submodule 0
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE1_IRQHandler, // 131: FlexPWM0 Submodule 1
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE2_IRQHandler, // 132: FlexPWM0 Submodule 2
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE3_IRQHandler, // 133: FlexPWM0 Submodule 3
// capture/compare/reload interrupt
FLEXPWM1_RELOAD_ERROR_IRQHandler, // 134: FlexPWM1_reload_error interrupt
FLEXPWM1_FAULT_IRQHandler, // 135: FlexPWM1_fault interrupt
FLEXPWM1_SUBMODULE0_IRQHandler, // 136: FlexPWM1 Submodule 0
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE1_IRQHandler, // 137: FlexPWM1 Submodule 1
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE2_IRQHandler, // 138: FlexPWM1 Submodule 2
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE3_IRQHandler, // 139: FlexPWM1 Submodule 3
// capture/compare/reload interrupt
ENC0_COMPARE_IRQHandler, // 140: ENC0_Compare interrupt
ENC0_HOME_IRQHandler, // 141: ENC0_Home interrupt
ENC0_WDG_SAB_IRQHandler, // 142: ENC0_WDG_IRQ/SAB interrupt
ENC0_IDX_IRQHandler, // 143: ENC0_IDX interrupt
ENC1_COMPARE_IRQHandler, // 144: ENC1_Compare interrupt
ENC1_HOME_IRQHandler, // 145: ENC1_Home interrupt
ENC1_WDG_SAB_IRQHandler, // 146: ENC1_WDG_IRQ/SAB interrupt
ENC1_IDX_IRQHandler, // 147: ENC1_IDX interrupt
ITRC0_IRQHandler, // 148: Intrusion and Tamper Response Controller
// interrupt
BSP32_IRQHandler, // 149: CoolFlux BSP32 interrupt
ELS_ERR_IRQHandler, // 150: ELS error interrupt
PKC_ERR_IRQHandler, // 151: PKC error interrupt
ERM_SINGLE_BIT_ERROR_IRQHandler, // 152: ERM Single Bit error interrupt
ERM_MULTI_BIT_ERROR_IRQHandler, // 153: ERM Multi Bit error interrupt
FMU0_IRQHandler, // 154: Flash Management Unit interrupt
ETHERNET_IRQHandler, // 155: Ethernet QoS interrupt
ETHERNET_PMT_IRQHandler, // 156: Ethernet QoS power management interrupt
ETHERNET_MACLP_IRQHandler, // 157: Ethernet QoS MAC interrupt
SINC_FILTER_IRQHandler, // 158: SINC Filter interrupt
LPTMR0_IRQHandler, // 159: Low Power Timer 0 interrupt
LPTMR1_IRQHandler, // 160: Low Power Timer 1 interrupt
SCG_IRQHandler, // 161: System Clock Generator interrupt
SPC_IRQHandler, // 162: System Power Controller interrupt
WUU_IRQHandler, // 163: Wake Up Unit interrupt
PORT_EFT_IRQHandler, // 164: PORT0~5 EFT interrupt
ETB0_IRQHandler, // 165: ETB counter expires interrupt
SM3_IRQHandler, // 166: Secure Generic Interface (SGI) SAFO interrupt
TRNG0_IRQHandler, // 167: True Random Number Generator interrupt
WWDT0_IRQHandler, // 168: Windowed Watchdog Timer 0 interrupt
WWDT1_IRQHandler, // 169: Windowed Watchdog Timer 1 interrupt
CMC0_IRQHandler, // 170: Core Mode Controller interrupt
CTI0_IRQHandler, // 171: Cross Trigger Interface interrupt
};
extern unsigned char _end[]; // End of data section, start of heap. See link.ld
__attribute__((naked, noreturn)) void Reset_Handler(void) {
__asm("cpsid i"); // Disable interrupts
// set SPLIM to somewhere, trick the linker
__asm volatile("MSR MSPLIM, %1 \n"
:
: "r"(tab), "r"(_end)
: "r0", "r1");
SYSCON->ECC_ENABLE_CTRL = 0; // disable RAM ECC, must do for this link.ld
// Clear BSS section, and copy data section from flash to RAM
extern long _sbss, _ebss, _sdata, _edata, _sidata;
for (long *dst = &_sbss; dst < &_ebss; dst++) *dst = 0;
for (long *dst = &_sdata, *src = &_sidata; dst < &_edata;) *dst++ = *src++;
SystemInit();
__asm("cpsie i"); // Reenable interrupts
// Call main()
extern void main(void);
main();
for (;;) (void) 0; // Infinite loop
}
void Default_Handler(void) {
for (;;) (void) 0;
}
@@ -1,44 +0,0 @@
#pragma once
#include "hal.h"
#define configUSE_PREEMPTION 1
#define configCPU_CLOCK_HZ SYS_FREQUENCY
#define configTICK_RATE_HZ 1000
#define configMAX_PRIORITIES 5
#define configUSE_16_BIT_TICKS 0
#define configUSE_TICK_HOOK 0
#define configUSE_IDLE_HOOK 0
#define configUSE_TIMERS 0
#define configUSE_CO_ROUTINES 0
#define configUSE_MALLOC_FAILED_HOOK 0
#define configMINIMAL_STACK_SIZE 128
#define configTOTAL_HEAP_SIZE (1024 * 128)
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1 // trying
#ifdef __NVIC_PRIO_BITS
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 3
#endif
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1U << (configPRIO_BITS)) - 1)
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 3
#define configKERNEL_INTERRUPT_PRIORITY \
(configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
#define configASSERT(expr) \
if (!(expr)) printf("FAILURE %s:%d: %s\n", __FILE__, __LINE__, #expr)
// https://www.freertos.org/2020/04/using-freertos-on-armv8-m-microcontrollers.html
#define configENABLE_FPU 1
#define configENABLE_MPU 0
#define configENABLE_TRUSTZONE 0
#define configRUN_FREERTOS_SECURE_ONLY 1
//#define vPortSVCHandler SVC_Handler
//#define xPortPendSVHandler PendSV_Handler
//#define xPortSysTickHandler SysTick_Handler
@@ -1,54 +0,0 @@
CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
CFLAGS += -Wformat-truncation -fno-common # -Wconversion is not SDK-friendly
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_mcu/devices/MCXN947/
CFLAGS += -Icmsis_mcu/devices/MCXN947/drivers
CFLAGS += -DCPU_MCXN947VDF -DCPU_MCXN947VDF_cm33 -DCPU_MCXN947VDF_cm33_core0
CFLAGS += -mcpu=cortex-m33 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 $(CFLAGS_EXTRA)
CFLAGS += -Wno-old-style-declaration -Wno-unused-parameter # due to NXP FSL code
LDSCRIPT = link.ld
LDFLAGS ?= -T$(LDSCRIPT) -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
SOURCES = main.c hal.c
SOURCES += startup.c
SOURCES += cmsis_mcu/devices/MCXN947/drivers/fsl_clock.c cmsis_mcu/devices/MCXN947/drivers/fsl_spc.c cmsis_mcu/devices/MCXN947/drivers/fsl_common_arm.c # NXP support files
# FreeRTOS. MCXN947 has a Cortex-M33 (ARMv8) core, the CM4F port can be used if TrustZone and the MPU are not to be used
SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c
SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
CFLAGS += -IFreeRTOS-Kernel/include
CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM33_NTZ/non_secure -Wno-conversion -Wno-unused-parameter
# Mongoose options are defined in mongoose_config.h
SOURCES += mongoose.c net.c packed_fs.c
# Example specific build options. See README.md
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\"
ifeq ($(OS),Windows_NT)
RM = cmd /C del /Q /F /S
else
RM = rm -rf
endif
all build example: firmware.bin
firmware.bin: firmware.elf
arm-none-eabi-objcopy -O binary $< $@
firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_mcu $(SOURCES) hal.h link.ld mongoose_config.h FreeRTOSConfig.h Makefile
arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@
arm-none-eabi-size $@
cmsis_core: # ARM CMSIS core headers
git clone -q --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
cmsis_mcu:
wget -O $@.zip https://mcuxpresso.nxp.com/cmsis_pack/repo/NXP.MCXN947_DFP.17.0.0.pack
mkdir $@ && cd $@ && unzip -q ../$@.zip
FreeRTOS-Kernel: # FreeRTOS sources
git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@
clean:
$(RM) firmware.* *.su cmsis_core cmsis_mcu *.zip FreeRTOS-Kernel
@@ -1,183 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
#if 0
static volatile uint64_t s_ticks; // Milliseconds since boot
void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
s_ticks++;
}
void mg_random(void *buf, size_t len) { // Use on-board RNG
for (size_t n = 0; n < len; n += sizeof(uint32_t)) {
uint32_t r = rng_read();
memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r));
}
}
uint64_t mg_millis(void) { // Let Mongoose use our uptime function
return s_ticks; // Return number of milliseconds since boot
}
#endif
void hal_init(void) {
clock_init(); // Set system clock to SYS_FREQUENCY
SystemCoreClock = SYS_FREQUENCY; // Update SystemCoreClock global var
// SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
// rng_init(); // TRNG is part of ELS and there is no info on that
uart_init(UART_DEBUG, 115200); // Initialise UART
gpio_output(LED1); // Initialise LED1
gpio_write(LED1, 1);
gpio_output(LED2); // Initialise LED2
gpio_write(LED2, 1);
gpio_output(LED3); // Initialise LED3
gpio_write(LED3, 1);
ethernet_init(); // Initialise Ethernet pins
}
#if defined(__ARMCC_VERSION)
// Keil specific - implement IO printf redirection
int fputc(int c, FILE *stream) {
if (stream == stdout || stream == stderr) uart_write_byte(UART_DEBUG, c);
return c;
}
#elif defined(__GNUC__)
// ARM GCC specific. ARM GCC is shipped with Newlib C library.
// Implement newlib syscalls:
// _sbrk() for malloc
// _write() for printf redirection
// the rest are just stubs
#include <sys/stat.h> // For _fstat()
#if !defined(__MCUXPRESSO)
uint32_t SystemCoreClock;
// evaluate your use of Secure/non-Secure and modify accordingly
void SystemInit(void) { // Called automatically by startup code
SCB->CPACR |=
#if 0
(3UL << 0 * 2) | (3UL << 1 * 2) | // Enable PowerQuad (CPO/CP1)
#endif
(3UL << 10 * 2) | (3UL << 11 * 2); // Enable FPU
__DSB();
__ISB();
SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK; // enable LPCAC
// Read TRM 36.1 and decide whether you really want to enable aGDET and dGDET
#if 1
// Disable aGDET and dGDET
ITRC0->OUT_SEL[4][0] =
(ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
ITRC0->OUT_SEL[4][1] =
(ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_GLITCH_DETECT_DISABLE_MASK;
SPC0->GLITCH_DETECT_SC &= ~SPC_GLITCH_DETECT_SC_LOCK_MASK;
SPC0->GLITCH_DETECT_SC = 0x3C;
SPC0->GLITCH_DETECT_SC |= SPC_GLITCH_DETECT_SC_LOCK_MASK;
ITRC0->OUT_SEL[4][0] =
(ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
ITRC0->OUT_SEL[4][1] =
(ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) |
(ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
GDET0->GDET_ENABLE1 = 0;
GDET1->GDET_ENABLE1 = 0;
#endif
}
#endif
int _fstat(int fd, struct stat *st) {
(void) fd, (void) st;
return -1;
}
#if !defined(__MCUXPRESSO)
extern unsigned char _end[]; // End of data section, start of heap. See link.ld
static unsigned char *s_current_heap_end = _end;
size_t hal_ram_used(void) {
return (size_t) (s_current_heap_end - _end);
}
size_t hal_ram_free(void) {
unsigned char endofstack;
return (size_t) (&endofstack - s_current_heap_end);
}
void *_sbrk(int incr) {
unsigned char *prev_heap;
prev_heap = s_current_heap_end;
s_current_heap_end += incr;
return prev_heap;
}
#endif
int _open(const char *path) {
(void) path;
return -1;
}
int _close(int fd) {
(void) fd;
return -1;
}
int _isatty(int fd) {
(void) fd;
return 1;
}
int _lseek(int fd, int ptr, int dir) {
(void) fd, (void) ptr, (void) dir;
return 0;
}
void _exit(int status) {
(void) status;
for (;;) asm volatile("BKPT #0");
}
void _kill(int pid, int sig) {
(void) pid, (void) sig;
}
int _getpid(void) {
return -1;
}
int _write(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
return -1;
}
int _read(int fd, char *ptr, int len) {
(void) fd, (void) ptr, (void) len;
return -1;
}
int _link(const char *a, const char *b) {
(void) a, (void) b;
return -1;
}
int _unlink(const char *a) {
(void) a;
return -1;
}
int _stat(const char *path, struct stat *st) {
(void) path, (void) st;
return -1;
}
int mkdir(const char *path, mode_t mode) {
(void) path, (void) mode;
return -1;
}
void _init(void) {
}
#endif // __GNUC__
@@ -1,223 +0,0 @@
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#pragma once
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#define LED1 PIN(0, 10)
#define LED2 PIN(0, 27)
#define LED3 PIN(1, 2)
#ifndef UART_DEBUG
#define UART_DEBUG LPUART4
#endif
#include "MCXN947_cm33_core0.h"
#define BIT(x) (1UL << (x))
#define CLRSET(reg, clear, set) ((reg) = ((reg) & ~(clear)) | (set))
#define PIN(bank, num) ((bank << 8) | (num))
#define PINNO(pin) (pin & 255)
#define PINBANK(pin) (pin >> 8)
void hal_init(void);
size_t hal_ram_free(void);
size_t hal_ram_used(void);
static inline void spin(volatile uint32_t count) {
while (count--) (void) 0;
}
#define SYS_FREQUENCY 150000000UL
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT };
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
enum { GPIO_SPEED_LOW, GPIO_SPEED_HIGH };
enum { GPIO_PULL_NONE, GPIO_PULL_DOWN, GPIO_PULL_UP };
static inline GPIO_Type *gpio_bank(uint16_t pin) {
static GPIO_Type *const g[] = GPIO_BASE_PTRS;
return g[PINBANK(pin)];
}
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
uint8_t speed, uint8_t pull, uint8_t af) {
static PORT_Type *const p[] = PORT_BASE_PTRS;
PORT_Type *port = p[PINBANK(pin)];
GPIO_Type *gpio = gpio_bank(pin);
uint32_t mask = (uint32_t) BIT(PINNO(pin));
bool dopull = pull > 0;
if (dopull) --pull;
if (gpio != GPIO5) {
SYSCON->AHBCLKCTRL0 |=
(1 << (SYSCON_AHBCLKCTRL0_GPIO0_SHIFT + PINBANK(pin))) |
(1 << (SYSCON_AHBCLKCTRL0_PORT0_SHIFT + PINBANK(pin)));
};
port->PCR[PINNO(pin)] = PORT_PCR_IBE(1) | PORT_PCR_MUX(af) | PORT_PCR_DSE(1) |
PORT_PCR_ODE(type) |
PORT_PCR_SRE(speed != GPIO_SPEED_HIGH) |
PORT_PCR_PE(dopull) | PORT_PCR_PS(pull);
gpio->ICR[PINNO(pin)] = GPIO_ICR_ISF_MASK;
if (mode == GPIO_MODE_INPUT) {
gpio->PDDR &= ~mask;
} else {
gpio->PDDR |= mask;
}
}
static inline void gpio_input(uint16_t pin) {
gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0);
}
static inline void gpio_output(uint16_t pin) {
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0);
}
static inline bool gpio_read(uint16_t pin) {
GPIO_Type *gpio = gpio_bank(pin);
return gpio->PDR[PINNO(pin)];
}
static inline void gpio_write(uint16_t pin, bool value) {
GPIO_Type *gpio = gpio_bank(pin);
if (value) {
gpio->PDR[PINNO(pin)] = 1;
} else {
gpio->PDR[PINNO(pin)] = 0;
}
}
static inline void gpio_toggle(uint16_t pin) {
GPIO_Type *gpio = gpio_bank(pin);
uint32_t mask = (uint32_t) BIT(PINNO(pin));
gpio->PTOR = mask;
}
// MCU-Link UART (P1_9/8; FC4_P1/0)
// Arduino J1_2/4 UART (P4_3/2; FC2_P3/2)
// 33.3.23 LP_FLEXCOMM clocking
// 66.2.4 LP_FLEXCOMM init
// 66.5 LPUART
static inline void uart_init(LPUART_Type *uart, unsigned long baud) {
static LP_FLEXCOMM_Type *const f[] = LP_FLEXCOMM_BASE_PTRS;
uint8_t af = 2, fc = 0; // Alternate function, FlexComm instance
uint16_t pr = 0, pt = 0; // pins
uint32_t freq = 12000000; // fro_12_m
if (uart == LPUART2) fc = 2, pt = PIN(4, 3), pr = PIN(4, 2);
if (uart == LPUART4) fc = 4, pt = PIN(1, 9), pr = PIN(1, 8);
SYSCON->AHBCLKCTRL1 |= (1 << (SYSCON_AHBCLKCTRL1_FC0_SHIFT + fc));
SYSCON->PRESETCTRL1 |= (1 << (SYSCON_PRESETCTRL1_FC0_RST_SHIFT + fc));
SYSCON->PRESETCTRL1 &= ~(1 << (SYSCON_PRESETCTRL1_FC0_RST_SHIFT + fc));
SYSCON->FCCLKSEL[fc] = SYSCON_FCCLKSEL_SEL(2); // clock from FRO_12M / 1
SYSCON->FLEXCOMMCLKDIV[fc] = SYSCON_FLEXCOMMXCLKDIV_FLEXCOMMCLKDIV_DIV(0);
LP_FLEXCOMM_Type *flexcomm = f[fc];
flexcomm->PSELID = LP_FLEXCOMM_PSELID_PERSEL(1); // configure as UART
gpio_init(pt, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_UP, af);
gpio_init(pr, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_UP, af);
uart->GLOBAL |= LPUART_GLOBAL_RST_MASK; // reset, CTRL = 0, defaults
uart->GLOBAL &= ~LPUART_GLOBAL_RST_MASK;
// use a weird oversample ratio of 26x to fit specs, standard 16x won't do
CLRSET(uart->BAUD,
LPUART_BAUD_OSR_MASK | LPUART_BAUD_SBR_MASK | LPUART_BAUD_SBNS_MASK,
LPUART_BAUD_OSR(26 - 1) | LPUART_BAUD_SBR(freq / (26 * baud)));
CLRSET(uart->CTRL,
LPUART_CTRL_PE_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL_ILT_MASK |
LPUART_CTRL_IDLECFG_MASK,
LPUART_CTRL_IDLECFG(1) | LPUART_CTRL_ILT(1) |
LPUART_BAUD_SBNS(0)); // no parity, idle 2 chars after 1 stop bit
uart->CTRL |= LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK;
}
static inline void uart_write_byte(LPUART_Type *uart, uint8_t byte) {
uart->DATA = byte;
while ((uart->STAT & LPUART_STAT_TDRE_MASK) == 0) spin(1);
}
static inline void uart_write_buf(LPUART_Type *uart, char *buf, size_t len) {
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
}
static inline void rng_init(void) {
}
static inline uint32_t rng_read(void) {
return 42;
}
// - PHY and MAC clocked via a 50MHz oscillator, P1_4 (ENET0_TXCLK)
// - 33.3.30 ENET clocking
// - SMI clocked from AHB module clock (CSR)
// - PHY RST connected to P5_8
// - PHY RXD0,1,DV = 1 on RST enable autonegotiation, no hw pull-ups
static inline void ethernet_init(void) {
// '0' in clk_rmii, set for RMII mode
SYSCON->ENETRMIICLKSEL = SYSCON_ENETRMIICLKSEL_SEL(0);
SYSCON->ENETRMIICLKDIV = SYSCON_ENETRMIICLKDIV_DIV(0);
SYSCON->AHBCLKCTRL2 |= SYSCON_AHBCLKCTRL2_ENET_MASK; // enable bus clk
SYSCON0->PRESETCTRL2 = SYSCON_PRESETCTRL2_ENET_RST_MASK; // reset MAC
SYSCON0->PRESETCTRL2 &= ~SYSCON_PRESETCTRL2_ENET_RST_MASK; // then set RMII
SYSCON0->ENET_PHY_INTF_SEL |= SYSCON_ENET_PHY_INTF_SEL_PHY_SEL_MASK;
gpio_init(PIN(5, 8), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_LOW,
GPIO_PULL_NONE, 0); // set P5_8 as GPIO (PHY \RST)
gpio_write(PIN(5, 8), 0); // reset PHY
gpio_init(PIN(1, 4), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_4 as ENET0_TXCLK
gpio_init(PIN(1, 5), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_5 as ENET0_TXEN
gpio_init(PIN(1, 6), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_6 as ENET0_TXD0
gpio_init(PIN(1, 7), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_7 as ENET0_TXD1
gpio_init(PIN(1, 13), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_13 as ENET0_RXDV
gpio_init(PIN(1, 14), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_14 as ENET0_RXD0
gpio_init(PIN(1, 15), GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_UP, 9); // set P1_15 as ENET0_RXD1
gpio_init(PIN(1, 20), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_20 as ENET0_MDC
gpio_init(PIN(1, 21), GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
GPIO_PULL_NONE, 9); // set P1_21 as ENET0_MDIO
spin(10000); // keep PHY RST low for a while
gpio_write(PIN(5, 8), 1); // deassert RST
NVIC_EnableIRQ(ETHERNET_IRQn); // Setup Ethernet IRQ handler
}
#include "fsl_clock.h"
#include "fsl_spc.h"
// 33.2 Figure 127 SCG main clock
static inline void clock_init(void) {
SYSCON->AHBCLKCTRL2 |= SYSCON_AHBCLKCTRL2_SCG_MASK; // enable SCG clk
CLRSET(SCG0->RCCR, SCG_CSR_SCS_MASK, SCG_CSR_SCS(2)); // clock main_clock
spc_active_mode_dcdc_option_t dcdc = {
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength};
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &dcdc); // Set DCDC to 1.2 V
spc_active_mode_core_ldo_option_t ldo = {
.CoreLDOVoltage = kSPC_CoreLDO_OverDriveVoltage,
.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength};
SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldo); // Set LDO_CORE to 1.2 V
CLRSET(FMU0->FCTRL, FMU_FCTRL_RWSC_MASK, FMU_FCTRL_RWSC(3)); // Set Flash WS
spc_sram_voltage_config_t sram = {.operateVoltage = kSPC_sramOperateAt1P2V,
.requestVoltageUpdate = true};
SPC_SetSRAMOperateVoltage(SPC0, &sram); // Set SRAM timing for 1.2V
CLOCK_SetupFROHFClocking(48000000U); // Enable FRO HF
const pll_setup_t pll0 = {.pllctrl = SCG_APLLCTRL_SOURCE(1U) |
SCG_APLLCTRL_SELI(27U) |
SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U};
CLOCK_SetPLL0Freq(&pll0); // Setup PLL0 (APLL),
CLOCK_SetPll0MonitorMode(0); // disable monitor mode
CLRSET(SCG0->RCCR, SCG_CSR_SCS_MASK, SCG_CSR_SCS(5)); // clock main_clock
SYSCON->AHBCLKDIV = SYSCON_AHBCLKDIV_DIV(0); // /1
}
@@ -1,30 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(Reset_Handler)
MEMORY
{
flash(RX) : ORIGIN = 0x0, LENGTH = 0x100000
flash2(RX) : ORIGIN = 0x100000, LENGTH = 0x100000
sram(!RX) : ORIGIN = 0x20000000, LENGTH = 0x60000
}
_estack = ORIGIN(sram) + LENGTH(sram);
SECTIONS
{
.vectors : { FILL(256) KEEP(*(.isr_vector)) } > flash
.text : { *(.text*) } > flash
.data : {
_sdata = .;
*(.first_data)
*(.data SORT(.data.*))
_edata = .;
} > sram AT > flash
_sidata = LOADADDR(.data);
.bss : { _sbss = .; *(.bss SORT(.bss.*) COMMON) _ebss = .; } > sram
. = ALIGN(8);
_end = .;
}
@@ -1,42 +0,0 @@
// Copyright (c) 2024 Cesanta Software Limited
// All rights reserved
#include "hal.h"
#include "mongoose.h"
#include "net.h"
#define BLINK_PERIOD_MS 1000 // LED blinking period in millis
static void server(void *args) {
struct mg_mgr mgr; // Initialise Mongoose event manager
mg_mgr_init(&mgr); // and attach it to the interface
mg_log_set(MG_LL_DEBUG); // Set log level
MG_INFO(("Initialising application..."));
web_init(&mgr);
MG_INFO(("Starting event loop"));
for (;;) mg_mgr_poll(&mgr, 1); // Infinite event loop
(void) args;
}
static void blinker(void *args) {
gpio_output(LED1);
for (;;) {
gpio_toggle(LED1);
vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS));
}
(void) args;
}
int main(void) {
hal_init(); // Cross-platform hardware init
// Start tasks. NOTE: stack sizes are in 32-bit words
xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL);
xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL);
vTaskStartScheduler(); // This blocks
return 0;
}
@@ -1,26 +0,0 @@
#pragma once
#include <errno.h> // we are not using lwIP
// See https://mongoose.ws/documentation/#build-options
#define MG_ARCH MG_ARCH_FREERTOS
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_DRIVER_MCXN 1
//#define MG_ENABLE_CUSTOM_RANDOM 1
#define MG_ENABLE_PACKED_FS 1
// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
// By default, those are set to zero, meaning that DHCP is used
//
// #define MG_TCPIP_IP MG_IPV4(192, 168, 1, 10)
// #define MG_TCPIP_GW MG_IPV4(192, 168, 1, 1)
// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)
// Set custom MAC address. By default, it is randomly generated
// Using a build-time constant:
// #define MG_SET_MAC_ADDRESS(mac) do { uint8_t buf_[6] = {2,3,4,5,6,7}; memmove(mac, buf_, sizeof(buf_)); } while (0)
//
// Using custom function:
// extern void my_function(unsigned char *mac);
// #define MG_SET_MAC_ADDRESS(mac) my_function(mac)
@@ -1,411 +0,0 @@
#include "MCXN947_cm33_core0.h"
void Reset_Handler(void); // Defined below
void Dummy_Handler(void); // Defined below
void SysTick_Handler(void); // Defined in main.c
void SystemInit(void); // Defined in main.c, called by reset handler
void _estack(void); // Defined in link.ld
#define WEAK_ALIAS __attribute__((weak, alias("Default_Handler")))
WEAK_ALIAS void NMI_Handler(void);
WEAK_ALIAS void HardFault_Handler(void);
WEAK_ALIAS void MemManage_Handler(void);
WEAK_ALIAS void BusFault_Handler(void);
WEAK_ALIAS void UsageFault_Handler(void);
WEAK_ALIAS void SecureFault_Handler(void);
WEAK_ALIAS void DebugMon_Handler(void);
WEAK_ALIAS void SVC_Handler(void);
WEAK_ALIAS void PendSV_Handler(void);
WEAK_ALIAS void SysTick_Handler(void);
WEAK_ALIAS void OR_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH0_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH1_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH2_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH3_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH4_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH5_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH6_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH7_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH8_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH9_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH10_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH11_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH12_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH13_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH14_IRQHandler(void);
WEAK_ALIAS void EDMA_0_CH15_IRQHandler(void);
WEAK_ALIAS void GPIO00_IRQHandler(void);
WEAK_ALIAS void GPIO01_IRQHandler(void);
WEAK_ALIAS void GPIO10_IRQHandler(void);
WEAK_ALIAS void GPIO11_IRQHandler(void);
WEAK_ALIAS void GPIO20_IRQHandler(void);
WEAK_ALIAS void GPIO21_IRQHandler(void);
WEAK_ALIAS void GPIO30_IRQHandler(void);
WEAK_ALIAS void GPIO31_IRQHandler(void);
WEAK_ALIAS void GPIO40_IRQHandler(void);
WEAK_ALIAS void GPIO41_IRQHandler(void);
WEAK_ALIAS void GPIO50_IRQHandler(void);
WEAK_ALIAS void GPIO51_IRQHandler(void);
WEAK_ALIAS void UTICK0_IRQHandler(void);
WEAK_ALIAS void MRT0_IRQHandler(void);
WEAK_ALIAS void CTIMER0_IRQHandler(void);
WEAK_ALIAS void CTIMER1_IRQHandler(void);
WEAK_ALIAS void SCT0_IRQHandler(void);
WEAK_ALIAS void CTIMER2_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM0_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM1_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM2_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM3_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM4_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM5_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM6_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM7_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM8_IRQHandler(void);
WEAK_ALIAS void LP_FLEXCOMM9_IRQHandler(void);
WEAK_ALIAS void ADC0_IRQHandler(void);
WEAK_ALIAS void ADC1_IRQHandler(void);
WEAK_ALIAS void PINT0_IRQHandler(void);
WEAK_ALIAS void PDM_EVENT_IRQHandler(void);
WEAK_ALIAS void Reserved65_IRQHandler(void);
WEAK_ALIAS void USB0_FS_IRQHandler(void);
WEAK_ALIAS void USB0_DCD_IRQHandler(void);
WEAK_ALIAS void RTC_IRQHandler(void);
WEAK_ALIAS void SMARTDMA_IRQHandler(void);
WEAK_ALIAS void MAILBOX_IRQHandler(void);
WEAK_ALIAS void CTIMER3_IRQHandler(void);
WEAK_ALIAS void CTIMER4_IRQHandler(void);
WEAK_ALIAS void OS_EVENT_IRQHandler(void);
WEAK_ALIAS void FLEXSPI0_IRQHandler(void);
WEAK_ALIAS void SAI0_IRQHandler(void);
WEAK_ALIAS void SAI1_IRQHandler(void);
WEAK_ALIAS void USDHC0_IRQHandler(void);
WEAK_ALIAS void CAN0_IRQHandler(void);
WEAK_ALIAS void CAN1_IRQHandler(void);
WEAK_ALIAS void Reserved80_IRQHandler(void);
WEAK_ALIAS void Reserved81_IRQHandler(void);
WEAK_ALIAS void USB1_HS_PHY_IRQHandler(void);
WEAK_ALIAS void USB1_HS_IRQHandler(void);
WEAK_ALIAS void SEC_HYPERVISOR_CALL_IRQHandler(void);
WEAK_ALIAS void Reserved85_IRQHandler(void);
WEAK_ALIAS void PLU_IRQHandler(void);
WEAK_ALIAS void Freqme_IRQHandler(void);
WEAK_ALIAS void SEC_VIO_IRQHandler(void);
WEAK_ALIAS void ELS_IRQHandler(void);
WEAK_ALIAS void PKC_IRQHandler(void);
WEAK_ALIAS void PUF_IRQHandler(void);
WEAK_ALIAS void PQ_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH0_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH1_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH2_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH3_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH4_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH5_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH6_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH7_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH8_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH9_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH10_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH11_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH12_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH13_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH14_IRQHandler(void);
WEAK_ALIAS void EDMA_1_CH15_IRQHandler(void);
WEAK_ALIAS void CDOG0_IRQHandler(void);
WEAK_ALIAS void CDOG1_IRQHandler(void);
WEAK_ALIAS void I3C0_IRQHandler(void);
WEAK_ALIAS void I3C1_IRQHandler(void);
WEAK_ALIAS void NPU_IRQHandler(void);
WEAK_ALIAS void GDET_IRQHandler(void);
WEAK_ALIAS void VBAT0_IRQHandler(void);
WEAK_ALIAS void EWM0_IRQHandler(void);
WEAK_ALIAS void TSI_END_OF_SCAN_IRQHandler(void);
WEAK_ALIAS void TSI_OUT_OF_SCAN_IRQHandler(void);
WEAK_ALIAS void EMVSIM0_IRQHandler(void);
WEAK_ALIAS void EMVSIM1_IRQHandler(void);
WEAK_ALIAS void FLEXIO_IRQHandler(void);
WEAK_ALIAS void DAC0_IRQHandler(void);
WEAK_ALIAS void DAC1_IRQHandler(void);
WEAK_ALIAS void DAC2_IRQHandler(void);
WEAK_ALIAS void HSCMP0_IRQHandler(void);
WEAK_ALIAS void HSCMP1_IRQHandler(void);
WEAK_ALIAS void HSCMP2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_RELOAD_ERROR_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_FAULT_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE0_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE1_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM0_SUBMODULE3_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_RELOAD_ERROR_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_FAULT_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE0_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE1_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE2_IRQHandler(void);
WEAK_ALIAS void FLEXPWM1_SUBMODULE3_IRQHandler(void);
WEAK_ALIAS void ENC0_COMPARE_IRQHandler(void);
WEAK_ALIAS void ENC0_HOME_IRQHandler(void);
WEAK_ALIAS void ENC0_WDG_SAB_IRQHandler(void);
WEAK_ALIAS void ENC0_IDX_IRQHandler(void);
WEAK_ALIAS void ENC1_COMPARE_IRQHandler(void);
WEAK_ALIAS void ENC1_HOME_IRQHandler(void);
WEAK_ALIAS void ENC1_WDG_SAB_IRQHandler(void);
WEAK_ALIAS void ENC1_IDX_IRQHandler(void);
WEAK_ALIAS void ITRC0_IRQHandler(void);
WEAK_ALIAS void BSP32_IRQHandler(void);
WEAK_ALIAS void ELS_ERR_IRQHandler(void);
WEAK_ALIAS void PKC_ERR_IRQHandler(void);
WEAK_ALIAS void ERM_SINGLE_BIT_ERROR_IRQHandler(void);
WEAK_ALIAS void ERM_MULTI_BIT_ERROR_IRQHandler(void);
WEAK_ALIAS void FMU0_IRQHandler(void);
WEAK_ALIAS void ETHERNET_IRQHandler(void);
WEAK_ALIAS void ETHERNET_PMT_IRQHandler(void);
WEAK_ALIAS void ETHERNET_MACLP_IRQHandler(void);
WEAK_ALIAS void SINC_FILTER_IRQHandler(void);
WEAK_ALIAS void LPTMR0_IRQHandler(void);
WEAK_ALIAS void LPTMR1_IRQHandler(void);
WEAK_ALIAS void SCG_IRQHandler(void);
WEAK_ALIAS void SPC_IRQHandler(void);
WEAK_ALIAS void WUU_IRQHandler(void);
WEAK_ALIAS void PORT_EFT_IRQHandler(void);
WEAK_ALIAS void ETB0_IRQHandler(void);
WEAK_ALIAS void SM3_IRQHandler(void);
WEAK_ALIAS void TRNG0_IRQHandler(void);
WEAK_ALIAS void WWDT0_IRQHandler(void);
WEAK_ALIAS void WWDT1_IRQHandler(void);
WEAK_ALIAS void CMC0_IRQHandler(void);
WEAK_ALIAS void CTI0_IRQHandler(void);
__attribute__((section(".vectors"))) void (*const tab[16 + 156])(void) = {
_estack, Reset_Handler,
NMI_Handler, // NMI Handler
HardFault_Handler, // Hard Fault Handler
MemManage_Handler, // MPU Fault Handler
BusFault_Handler, // Bus Fault Handler
UsageFault_Handler, // Usage Fault Handler
SecureFault_Handler, // Secure Fault Handler
0, // Reserved
0, // Reserved
0, // Reserved
SVC_Handler, // SVCall Handler
DebugMon_Handler, // Debug Monitor Handler
0, // Reserved
PendSV_Handler, // PendSV Handler
SysTick_Handler, // SysTick Handler
// Chip Level - MCXN947_cm33_core0
OR_IRQHandler, // 16 : OR IRQ
EDMA_0_CH0_IRQHandler, // 17 : eDMA_0_CH0 error or transfer complete
EDMA_0_CH1_IRQHandler, // 18 : eDMA_0_CH1 error or transfer complete
EDMA_0_CH2_IRQHandler, // 19 : eDMA_0_CH2 error or transfer complete
EDMA_0_CH3_IRQHandler, // 20 : eDMA_0_CH3 error or transfer complete
EDMA_0_CH4_IRQHandler, // 21 : eDMA_0_CH4 error or transfer complete
EDMA_0_CH5_IRQHandler, // 22 : eDMA_0_CH5 error or transfer complete
EDMA_0_CH6_IRQHandler, // 23 : eDMA_0_CH6 error or transfer complete
EDMA_0_CH7_IRQHandler, // 24 : eDMA_0_CH7 error or transfer complete
EDMA_0_CH8_IRQHandler, // 25 : eDMA_0_CH8 error or transfer complete
EDMA_0_CH9_IRQHandler, // 26 : eDMA_0_CH9 error or transfer complete
EDMA_0_CH10_IRQHandler, // 27 : eDMA_0_CH10 error or transfer complete
EDMA_0_CH11_IRQHandler, // 28 : eDMA_0_CH11 error or transfer complete
EDMA_0_CH12_IRQHandler, // 29 : eDMA_0_CH12 error or transfer complete
EDMA_0_CH13_IRQHandler, // 30 : eDMA_0_CH13 error or transfer complete
EDMA_0_CH14_IRQHandler, // 31 : eDMA_0_CH14 error or transfer complete
EDMA_0_CH15_IRQHandler, // 32 : eDMA_0_CH15 error or transfer complete
GPIO00_IRQHandler, // 33 : GPIO0 interrupt 0
GPIO01_IRQHandler, // 34 : GPIO0 interrupt 1
GPIO10_IRQHandler, // 35 : GPIO1 interrupt 0
GPIO11_IRQHandler, // 36 : GPIO1 interrupt 1
GPIO20_IRQHandler, // 37 : GPIO2 interrupt 0
GPIO21_IRQHandler, // 38 : GPIO2 interrupt 1
GPIO30_IRQHandler, // 39 : GPIO3 interrupt 0
GPIO31_IRQHandler, // 40 : GPIO3 interrupt 1
GPIO40_IRQHandler, // 41 : GPIO4 interrupt 0
GPIO41_IRQHandler, // 42 : GPIO4 interrupt 1
GPIO50_IRQHandler, // 43 : GPIO5 interrupt 0
GPIO51_IRQHandler, // 44 : GPIO5 interrupt 1
UTICK0_IRQHandler, // 45 : Micro-Tick Timer interrupt
MRT0_IRQHandler, // 46 : Multi-Rate Timer interrupt
CTIMER0_IRQHandler, // 47 : Standard counter/timer 0 interrupt
CTIMER1_IRQHandler, // 48 : Standard counter/timer 1 interrupt
SCT0_IRQHandler, // 49 : SCTimer/PWM interrupt
CTIMER2_IRQHandler, // 50 : Standard counter/timer 2 interrupt
LP_FLEXCOMM0_IRQHandler, // 51 : LP_FLEXCOMM0 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM1_IRQHandler, // 52 : LP_FLEXCOMM1 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM2_IRQHandler, // 53 : LP_FLEXCOMM2 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM3_IRQHandler, // 54 : LP_FLEXCOMM3 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM4_IRQHandler, // 55 : LP_FLEXCOMM4 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM5_IRQHandler, // 56 : LP_FLEXCOMM5 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM6_IRQHandler, // 57 : LP_FLEXCOMM6 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM7_IRQHandler, // 58 : LP_FLEXCOMM7 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM8_IRQHandler, // 59 : LP_FLEXCOMM8 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
LP_FLEXCOMM9_IRQHandler, // 60 : LP_FLEXCOMM9 (LPSPI interrupt or LPI2C
// interrupt or LPUART Receive/Transmit interrupt)
ADC0_IRQHandler, // 61 : Analog-to-Digital Converter 0 - General Purpose
// interrupt
ADC1_IRQHandler, // 62 : Analog-to-Digital Converter 1 - General Purpose
// interrupt
PINT0_IRQHandler, // 63 : Pin Interrupt Pattern Match Interrupt
PDM_EVENT_IRQHandler, // 64 : Microphone Interface interrupt
Reserved65_IRQHandler, // 65 : Reserved interrupt
USB0_FS_IRQHandler, // 66 : Universal Serial Bus - Full Speed interrupt
USB0_DCD_IRQHandler, // 67 : Universal Serial Bus - Device Charge Detect
// interrupt
RTC_IRQHandler, // 68 : RTC Subsystem interrupt (RTC interrupt or Wake
// timer interrupt)
SMARTDMA_IRQHandler, // 69 : SmartDMA_IRQ
MAILBOX_IRQHandler, // 70 : Inter-CPU Mailbox interrupt0 for CPU0 Inter-CPU
// Mailbox interrupt1 for CPU1
CTIMER3_IRQHandler, // 71 : Standard counter/timer 3 interrupt
CTIMER4_IRQHandler, // 72 : Standard counter/timer 4 interrupt
OS_EVENT_IRQHandler, // 73 : OS event timer interrupt
FLEXSPI0_IRQHandler, // 74 : Flexible Serial Peripheral Interface interrupt
SAI0_IRQHandler, // 75 : Serial Audio Interface 0 interrupt
SAI1_IRQHandler, // 76 : Serial Audio Interface 1 interrupt
USDHC0_IRQHandler, // 77 : Ultra Secured Digital Host Controller interrupt
CAN0_IRQHandler, // 78 : Controller Area Network 0 interrupt
CAN1_IRQHandler, // 79 : Controller Area Network 1 interrupt
Reserved80_IRQHandler, // 80 : Reserved interrupt
Reserved81_IRQHandler, // 81 : Reserved interrupt
USB1_HS_PHY_IRQHandler, // 82 : USBHS DCD or USBHS Phy interrupt
USB1_HS_IRQHandler, // 83 : USB High Speed OTG Controller interrupt
SEC_HYPERVISOR_CALL_IRQHandler, // 84 : AHB Secure Controller hypervisor
// call interrupt
Reserved85_IRQHandler, // 85 : Reserved interrupt
PLU_IRQHandler, // 86 : Programmable Logic Unit interrupt
Freqme_IRQHandler, // 87 : Frequency Measurement interrupt
SEC_VIO_IRQHandler, // 88 : Secure violation interrupt (Memory Block
// Checker interrupt or secure AHB matrix violation
// interrupt)
ELS_IRQHandler, // 89 : ELS interrupt
PKC_IRQHandler, // 90 : PKC interrupt
PUF_IRQHandler, // 91 : Physical Unclonable Function interrupt
PQ_IRQHandler, // 92 : Power Quad interrupt
EDMA_1_CH0_IRQHandler, // 93 : eDMA_1_CH0 error or transfer complete
EDMA_1_CH1_IRQHandler, // 94 : eDMA_1_CH1 error or transfer complete
EDMA_1_CH2_IRQHandler, // 95 : eDMA_1_CH2 error or transfer complete
EDMA_1_CH3_IRQHandler, // 96 : eDMA_1_CH3 error or transfer complete
EDMA_1_CH4_IRQHandler, // 97 : eDMA_1_CH4 error or transfer complete
EDMA_1_CH5_IRQHandler, // 98 : eDMA_1_CH5 error or transfer complete
EDMA_1_CH6_IRQHandler, // 99 : eDMA_1_CH6 error or transfer complete
EDMA_1_CH7_IRQHandler, // 100: eDMA_1_CH7 error or transfer complete
EDMA_1_CH8_IRQHandler, // 101: eDMA_1_CH8 error or transfer complete
EDMA_1_CH9_IRQHandler, // 102: eDMA_1_CH9 error or transfer complete
EDMA_1_CH10_IRQHandler, // 103: eDMA_1_CH10 error or transfer complete
EDMA_1_CH11_IRQHandler, // 104: eDMA_1_CH11 error or transfer complete
EDMA_1_CH12_IRQHandler, // 105: eDMA_1_CH12 error or transfer complete
EDMA_1_CH13_IRQHandler, // 106: eDMA_1_CH13 error or transfer complete
EDMA_1_CH14_IRQHandler, // 107: eDMA_1_CH14 error or transfer complete
EDMA_1_CH15_IRQHandler, // 108: eDMA_1_CH15 error or transfer complete
CDOG0_IRQHandler, // 109: Code Watchdog Timer 0 interrupt
CDOG1_IRQHandler, // 110: Code Watchdog Timer 1 interrupt
I3C0_IRQHandler, // 111: Improved Inter Integrated Circuit interrupt 0
I3C1_IRQHandler, // 112: Improved Inter Integrated Circuit interrupt 1
NPU_IRQHandler, // 113: NPU interrupt
GDET_IRQHandler, // 114: Digital Glitch Detect 0 interrupt or Digital
// Glitch Detect 1 interrupt
VBAT0_IRQHandler, // 115: VBAT interrupt( VBAT interrupt or digital tamper
// interrupt)
EWM0_IRQHandler, // 116: External Watchdog Monitor interrupt
TSI_END_OF_SCAN_IRQHandler, // 117: TSI End of Scan interrupt
TSI_OUT_OF_SCAN_IRQHandler, // 118: TSI Out of Scan interrupt
EMVSIM0_IRQHandler, // 119: EMVSIM0 interrupt
EMVSIM1_IRQHandler, // 120: EMVSIM1 interrupt
FLEXIO_IRQHandler, // 121: Flexible Input/Output interrupt
DAC0_IRQHandler, // 122: Digital-to-Analog Converter 0 - General Purpose
// interrupt
DAC1_IRQHandler, // 123: Digital-to-Analog Converter 1 - General Purpose
// interrupt
DAC2_IRQHandler, // 124: 14-bit Digital-to-Analog Converter interrupt
HSCMP0_IRQHandler, // 125: High-Speed comparator0 interrupt
HSCMP1_IRQHandler, // 126: High-Speed comparator1 interrupt
HSCMP2_IRQHandler, // 127: High-Speed comparator2 interrupt
FLEXPWM0_RELOAD_ERROR_IRQHandler, // 128: FlexPWM0_reload_error interrupt
FLEXPWM0_FAULT_IRQHandler, // 129: FlexPWM0_fault interrupt
FLEXPWM0_SUBMODULE0_IRQHandler, // 130: FlexPWM0 Submodule 0
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE1_IRQHandler, // 131: FlexPWM0 Submodule 1
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE2_IRQHandler, // 132: FlexPWM0 Submodule 2
// capture/compare/reload interrupt
FLEXPWM0_SUBMODULE3_IRQHandler, // 133: FlexPWM0 Submodule 3
// capture/compare/reload interrupt
FLEXPWM1_RELOAD_ERROR_IRQHandler, // 134: FlexPWM1_reload_error interrupt
FLEXPWM1_FAULT_IRQHandler, // 135: FlexPWM1_fault interrupt
FLEXPWM1_SUBMODULE0_IRQHandler, // 136: FlexPWM1 Submodule 0
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE1_IRQHandler, // 137: FlexPWM1 Submodule 1
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE2_IRQHandler, // 138: FlexPWM1 Submodule 2
// capture/compare/reload interrupt
FLEXPWM1_SUBMODULE3_IRQHandler, // 139: FlexPWM1 Submodule 3
// capture/compare/reload interrupt
ENC0_COMPARE_IRQHandler, // 140: ENC0_Compare interrupt
ENC0_HOME_IRQHandler, // 141: ENC0_Home interrupt
ENC0_WDG_SAB_IRQHandler, // 142: ENC0_WDG_IRQ/SAB interrupt
ENC0_IDX_IRQHandler, // 143: ENC0_IDX interrupt
ENC1_COMPARE_IRQHandler, // 144: ENC1_Compare interrupt
ENC1_HOME_IRQHandler, // 145: ENC1_Home interrupt
ENC1_WDG_SAB_IRQHandler, // 146: ENC1_WDG_IRQ/SAB interrupt
ENC1_IDX_IRQHandler, // 147: ENC1_IDX interrupt
ITRC0_IRQHandler, // 148: Intrusion and Tamper Response Controller
// interrupt
BSP32_IRQHandler, // 149: CoolFlux BSP32 interrupt
ELS_ERR_IRQHandler, // 150: ELS error interrupt
PKC_ERR_IRQHandler, // 151: PKC error interrupt
ERM_SINGLE_BIT_ERROR_IRQHandler, // 152: ERM Single Bit error interrupt
ERM_MULTI_BIT_ERROR_IRQHandler, // 153: ERM Multi Bit error interrupt
FMU0_IRQHandler, // 154: Flash Management Unit interrupt
ETHERNET_IRQHandler, // 155: Ethernet QoS interrupt
ETHERNET_PMT_IRQHandler, // 156: Ethernet QoS power management interrupt
ETHERNET_MACLP_IRQHandler, // 157: Ethernet QoS MAC interrupt
SINC_FILTER_IRQHandler, // 158: SINC Filter interrupt
LPTMR0_IRQHandler, // 159: Low Power Timer 0 interrupt
LPTMR1_IRQHandler, // 160: Low Power Timer 1 interrupt
SCG_IRQHandler, // 161: System Clock Generator interrupt
SPC_IRQHandler, // 162: System Power Controller interrupt
WUU_IRQHandler, // 163: Wake Up Unit interrupt
PORT_EFT_IRQHandler, // 164: PORT0~5 EFT interrupt
ETB0_IRQHandler, // 165: ETB counter expires interrupt
SM3_IRQHandler, // 166: Secure Generic Interface (SGI) SAFO interrupt
TRNG0_IRQHandler, // 167: True Random Number Generator interrupt
WWDT0_IRQHandler, // 168: Windowed Watchdog Timer 0 interrupt
WWDT1_IRQHandler, // 169: Windowed Watchdog Timer 1 interrupt
CMC0_IRQHandler, // 170: Core Mode Controller interrupt
CTI0_IRQHandler, // 171: Cross Trigger Interface interrupt
};
extern unsigned char _end[]; // End of data section, start of heap. See link.ld
__attribute__((naked, noreturn)) void Reset_Handler(void) {
__asm("cpsid i"); // Disable interrupts
// set SPLIM to somewhere, trick the linker
__asm volatile("MSR MSPLIM, %1 \n"
:
: "r"(tab), "r"(_end)
: "r0", "r1");
SYSCON->ECC_ENABLE_CTRL = 0; // disable RAM ECC, must do for this link.ld
// Clear BSS section, and copy data section from flash to RAM
extern long _sbss, _ebss, _sdata, _edata, _sidata;
for (long *dst = &_sbss; dst < &_ebss; dst++) *dst = 0;
for (long *dst = &_sdata, *src = &_sidata; dst < &_edata;) *dst++ = *src++;
SystemInit();
__asm("cpsie i"); // Reenable interrupts
// Call main()
extern void main(void);
main();
for (;;) (void) 0; // Infinite loop
}
void Default_Handler(void) {
for (;;) (void) 0;
}
@@ -1,727 +0,0 @@
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<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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<tool id="com.crt.advproject.tool.debug.release.972200988" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.release">
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<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="startup"/>
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<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="source"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="utilities"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="drivers"/>
<entry flags="LOCAL|VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name="device"/>
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<coreId>cm33_core0_MCXN947</coreId>
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<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;
&lt;TargetConfig&gt;
&lt;Properties property_3="NXP" property_4="MCXN947" property_count="5" version="100300"/&gt;
&lt;infoList vendor="NXP"&gt;
&lt;info chip="MCXN947" name="MCXN947"&gt;
&lt;chip&gt;
&lt;name&gt;MCXN947&lt;/name&gt;
&lt;family&gt;MCXN9XX&lt;/family&gt;
&lt;vendor&gt;NXP&lt;/vendor&gt;
&lt;memory can_program="true" id="Flash" is_ro="true" size="2048" type="Flash"/&gt;
&lt;memory id="RAM" size="512" type="RAM"/&gt;
&lt;memoryInstance derived_from="Flash" driver="MCXNxxx.cfx" edited="true" id="PROGRAM_FLASH0" location="0x0" size="0x100000"/&gt;
&lt;memoryInstance derived_from="Flash" driver="MCXNxxx.cfx" edited="true" id="PROGRAM_FLASH1" location="0x100000" size="0x100000"/&gt;
&lt;memoryInstance derived_from="RAM" edited="true" id="SRAM" location="0x20000000" size="0x60000"/&gt;
&lt;memoryInstance derived_from="RAM" edited="true" id="SRAMX" location="0x4000000" size="0x18000"/&gt;
&lt;memoryInstance derived_from="RAM" edited="true" id="SRAMH" location="0x20060000" size="0x8000"/&gt;
&lt;memoryInstance derived_from="RAM" edited="true" id="USB_RAM" location="0x400ba000" size="0x1000"/&gt;
&lt;/chip&gt;
&lt;processor&gt;
&lt;name gcc_name="cortex-m33"&gt;Cortex-M33&lt;/name&gt;
&lt;family&gt;Cortex-M&lt;/family&gt;
&lt;/processor&gt;
&lt;processor&gt;
&lt;name gcc_name="cortex-m33-nodsp"&gt;Cortex-M33 (No DSP)&lt;/name&gt;
&lt;family&gt;Cortex-M&lt;/family&gt;
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@@ -1,27 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
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<name>frdm-mcxn947-xpresso-baremetal-builtin</name>
<comment></comment>
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<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
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@@ -1,25 +0,0 @@
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<language-scope id="org.eclipse.cdt.core.gcc"/>
<language-scope id="org.eclipse.cdt.core.g++"/>
</provider>
<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
</extension>
</configuration>
</project>
File diff suppressed because it is too large. Load diff
@@ -1,352 +0,0 @@
/******************************************************************************
* @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.1.3
* @date 03. February 2021
******************************************************************************/
/*
* Copyright (c) 2017-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H
/** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for normal memory (outer and inner)
* \param NT Non-Transient: Set to 1 for non-transient data.
* \param WB Write-Back: Set to 1 to use write-back update policy.
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Memory Attribute
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U)
/** \brief Normal memory outer shareable */
#define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory inner shareable */
#define ARM_MPU_SH_INNER (3U)
/** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
(((BASE) & MPU_RBAR_BASE_Msk) | \
(((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
(((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
(((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
(((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
(((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
__DMB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#ifdef MPU_NS
/** Enable the Non-secure MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
__DMB();
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the Non-secure MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
#endif
/** Set the memory attribute encoding to the given MPU.
* \param mpu Pointer to the MPU to be configured.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
{
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
}
#ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
}
#endif
/** Clear and disable the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
mpu->RNR = rnr;
mpu->RLAR = 0U;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU, rnr);
}
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
mpu->RBAR = rbar;
mpu->RLAR = rlar;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
}
#ifdef MPU_NS
/** Configure the given Non-secure MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table to the given MPU.
* \param mpu Pointer to the MPU registers to be used.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
table += c;
cnt -= c;
rnrOffset = 0U;
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
/** Load the given number of MPU regions from a table.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif
@@ -1,245 +0,0 @@
/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <stdint.h>
#include "fsl_common.h"
#include "fsl_debug_console.h"
#include "board.h"
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
#include "fsl_lpi2c.h"
#endif /* SDK_I2C_BASED_COMPONENT_USED */
#if defined(LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER) && LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER
#include "fsl_lpflexcomm.h"
#endif /* LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER */
#include "fsl_spc.h"
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
/* Initialize debug console. */
void BOARD_InitDebugConsole(void)
{
/* attach 12 MHz clock to FLEXCOMM0 (debug console) */
CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST);
uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
#if defined(LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER) && LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER
LP_FLEXCOMM_Init(BOARD_DEBUG_UART_INSTANCE, LP_FLEXCOMM_PERIPH_LPUART);
#endif /* LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER */
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
}
void BOARD_InitDebugConsole_Core1(void)
{
/* attach 12 MHz clock to FLEXCOMM1 (debug console) */
// CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH_CORE1);
RESET_ClearPeripheralReset(BOARD_DEBUG_UART_RST_CORE1);
uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ_CORE1;
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE_CORE1, BOARD_DEBUG_UART_BAUDRATE_CORE1, BOARD_DEBUG_UART_TYPE_CORE1,
uartClkSrcFreq);
}
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz)
{
lpi2c_master_config_t lpi2cConfig = {0};
/*
* lpi2cConfig.debugEnable = false;
* lpi2cConfig.ignoreAck = false;
* lpi2cConfig.pinConfig = kLPI2C_2PinOpenDrain;
* lpi2cConfig.baudRate_Hz = 100000U;
* lpi2cConfig.busIdleTimeout_ns = 0;
* lpi2cConfig.pinLowTimeout_ns = 0;
* lpi2cConfig.sdaGlitchFilterWidth_ns = 0;
* lpi2cConfig.sclGlitchFilterWidth_ns = 0;
*/
LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
LPI2C_MasterInit(base, &lpi2cConfig, clkSrc_Hz);
}
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *txBuff,
uint8_t txBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Write;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = txBuff;
xfer.dataSize = txBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
}
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Read;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = rxBuff;
xfer.dataSize = rxBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
}
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *txBuff,
uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(base, deviceAddress, subAddress, subAddressSize, txBuff, txBuffSize);
}
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize)
{
status_t status;
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Write;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = NULL;
xfer.dataSize = 0;
status = LPI2C_MasterTransferBlocking(base, &xfer);
if (kStatus_Success == status)
{
xfer.subaddressSize = 0;
xfer.direction = kLPI2C_Read;
xfer.data = rxBuff;
xfer.dataSize = rxBuffSize;
status = LPI2C_MasterTransferBlocking(base, &xfer);
}
return status;
}
void BOARD_Accel_I2C_Init(void)
{
BOARD_LPI2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
}
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
{
uint8_t data = (uint8_t)txBuff;
return BOARD_LPI2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
}
status_t BOARD_Accel_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
}
void BOARD_Codec_I2C_Init(void)
{
BOARD_LPI2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
}
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
}
void BOARD_Camera_I2C_Init(void)
{
LP_FLEXCOMM_Init(BOARD_CAMERA_I2C_INSTANCE, LP_FLEXCOMM_PERIPH_LPI2C);
BOARD_LPI2C_Init(BOARD_CAMERA_I2C_BASEADDR, BOARD_CAMERA_I2C_CLOCK_FREQ);
}
status_t BOARD_Camera_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Camera_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
rxBuffSize);
}
status_t BOARD_Camera_I2C_SendSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_SendSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Camera_I2C_ReceiveSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_ReceiveSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
rxBuffSize);
}
#endif /* SDK_I2C_BASED_COMPONENT_USED */
/* Update Active mode voltage for OverDrive mode. */
void BOARD_PowerMode_OD(void)
{
spc_active_mode_dcdc_option_t opt = {
.DCDCVoltage = kSPC_DCDC_OverdriveVoltage,
.DCDCDriveStrength = kSPC_DCDC_NormalDriveStrength,
};
SPC_SetActiveModeDCDCRegulatorConfig(SPC0, &opt);
spc_sram_voltage_config_t cfg = {
.operateVoltage = kSPC_sramOperateAt1P2V,
.requestVoltageUpdate = true,
};
SPC_SetSRAMOperateVoltage(SPC0, &cfg);
}
@@ -1,261 +0,0 @@
/*
* Copyright 2022-2023 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "clock_config.h"
#include "fsl_gpio.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "FRDM-MCXN947"
/*! @brief The UART to use for debug messages. */
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART4
#define BOARD_DEBUG_UART_INSTANCE 4U
#define BOARD_DEBUG_UART_CLK_FREQ 12000000U
#define BOARD_DEBUG_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM4
#define BOARD_DEBUG_UART_RST kFC4_RST_SHIFT_RSTn
#define BOARD_DEBUG_UART_CLKSRC kCLOCK_FlexComm4
#define BOARD_UART_IRQ_HANDLER LP_FLEXCOMM4_IRQHandler
#define BOARD_UART_IRQ LP_FLEXCOMM4_IRQn
#define BOARD_DEBUG_UART_TYPE_CORE1 kSerialPort_Uart
#define BOARD_DEBUG_UART_BASEADDR_CORE1 (uint32_t) USART1
#define BOARD_DEBUG_UART_INSTANCE_CORE1 1U
#define BOARD_DEBUG_UART_CLK_FREQ_CORE1 12000000U
#define BOARD_DEBUG_UART_CLK_ATTACH_CORE1 kFRO12M_to_FLEXCOMM1
#define BOARD_DEBUG_UART_RST_CORE1 kFC1_RST_SHIFT_RSTn
#define BOARD_DEBUG_UART_CLKSRC_CORE1 kCLOCK_Flexcomm1
#define BOARD_UART_IRQ_HANDLER_CORE1 FLEXCOMM1_IRQHandler
#define BOARD_UART_IRQ_CORE1 FLEXCOMM1_IRQn
#ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE 115200U
#endif /* BOARD_DEBUG_UART_BAUDRATE */
#ifndef BOARD_DEBUG_UART_BAUDRATE_CORE1
#define BOARD_DEBUG_UART_BAUDRATE_CORE1 115200U
#endif /* BOARD_DEBUG_UART_BAUDRATE_CORE1 */
/*! @brief The UART to use for Bluetooth M.2 interface. */
#define BOARD_BT_UART_INSTANCE 2
#define BOARD_BT_UART_BAUDRATE 3000000
#define BOARD_BT_UART_CLK_FREQ 12000000U
#define BOARD_BT_UART_CLK_ATTACH kFRO12M_to_FLEXCOMM2
/*! @brief The ENET PHY address. */
#define BOARD_ENET0_PHY_ADDRESS (0x00U) /* Phy address of enet port 0. */
/*! @brief Memory ranges not usable by the ENET DMA. */
#ifndef BOARD_ENET_NON_DMA_MEMORY_ARRAY
#define BOARD_ENET_NON_DMA_MEMORY_ARRAY \
{ \
{0x00000000U, 0x0007FFFFU}, {0x10000000U, 0x17FFFFFFU}, {0x80000000U, 0xDFFFFFFFU}, \
{0x00000000U, 0x00000000U}, \
}
#endif /* BOARD_ENET_NON_DMA_MEMORY_ARRAY */
#define BOARD_ACCEL_I2C_BASEADDR LPI2C2
#define BOARD_ACCEL_I2C_CLOCK_FREQ 12000000
#define BOARD_CODEC_I2C_BASEADDR LPI2C2
#define BOARD_CODEC_I2C_CLOCK_FREQ 12000000
#define BOARD_CODEC_I2C_INSTANCE 2
/*! @brief Indexes of the TSI channels for on-board electrodes */
#ifndef BOARD_TSI_ELECTRODE_1
#define BOARD_TSI_ELECTRODE_1 3U
#endif
/*! @brief Indexes of the TSI mutual channels for FRDM-TOUCH board */
#define BOARD_TSI_MUTUAL_TX_ELECTRODE_1 0U
#define BOARD_TSI_MUTUAL_RX_ELECTRODE_1 14U
#ifndef BOARD_LED_RED_GPIO
#define BOARD_LED_RED_GPIO GPIO0
#endif
#ifndef BOARD_LED_RED_GPIO_PIN
#define BOARD_LED_RED_GPIO_PIN 10U
#endif
#ifndef BOARD_LED_BLUE_GPIO
#define BOARD_LED_BLUE_GPIO GPIO1
#endif
#ifndef BOARD_LED_BLUE_GPIO_PIN
#define BOARD_LED_BLUE_GPIO_PIN 2U
#endif
#ifndef BOARD_LED_GREEN_GPIO
#define BOARD_LED_GREEN_GPIO GPIO0
#endif
#ifndef BOARD_LED_GREEN_GPIO_PIN
#define BOARD_LED_GREEN_GPIO_PIN 27U
#endif
#ifndef BOARD_SW2_GPIO
#define BOARD_SW2_GPIO GPIO0
#endif
#ifndef BOARD_SW2_GPIO_PIN
#define BOARD_SW2_GPIO_PIN 23U
#endif
#define BOARD_SW2_NAME "SW2"
#define BOARD_SW2_IRQ GPIO00_IRQn
#define BOARD_SW2_IRQ_HANDLER GPIO00_IRQHandler
#ifndef BOARD_SW3_GPIO
#define BOARD_SW3_GPIO GPIO0
#endif
#ifndef BOARD_SW3_GPIO_PIN
#define BOARD_SW3_GPIO_PIN 6U
#endif
#define BOARD_SW3_NAME "SW3"
#define BOARD_SW3_IRQ GPIO00_IRQn
#define BOARD_SW3_IRQ_HANDLER GPIO00_IRQHandler
/* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x04U)
#define BOARD_USB_PHY_TXCAL45DP (0x07U)
#define BOARD_USB_PHY_TXCAL45DM (0x07U)
#define BOARD_HAS_NO_CTIMER_OUTPUT_PIN_CONNECTED_TO_LED (1)
/* Board led color mapping */
#define LOGIC_LED_ON 0U
#define LOGIC_LED_OFF 1U
#define LED_RED_INIT(output) \
GPIO_PinWrite(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PIN, output); \
BOARD_LED_RED_GPIO->PDDR |= (1U << BOARD_LED_RED_GPIO_PIN) /*!< Enable target LED_RED */
#define LED_RED_ON() GPIO_PortClear(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
#define LED_RED_OFF() GPIO_PortSet(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
#define LED_RED_TOGGLE() GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
#define LED_BLUE_INIT(output) \
GPIO_PinWrite(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output); \
BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */
#define LED_BLUE_ON() GPIO_PortClear(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
#define LED_BLUE_OFF() GPIO_PortSet(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
#define LED_BLUE_TOGGLE() GPIO_PortToggle(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
#define LED_GREEN_INIT(output) \
GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \
BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */
#define LED_GREEN_ON() GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
#define LED_GREEN_OFF() GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
#define LED_GREEN_TOGGLE() GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
/* Display. */
#define BOARD_LCD_DC_GPIO GPIO0
#define BOARD_LCD_DC_GPIO_PORT 0U
#define BOARD_LCD_DC_GPIO_PIN 10U
/* Camera */
#define BOARD_CAMERA_I2C_BASEADDR LPI2C7
#define BOARD_CAMERA_I2C_INSTANCE 7
#define BOARD_CAMERA_I2C_CLOCK_FREQ CLOCK_GetLPFlexCommClkFreq(BOARD_CAMERA_I2C_INSTANCE)
/* Serial MWM WIFI */
#define BOARD_SERIAL_MWM_PORT_CLK_FREQ CLOCK_GetFlexCommClkFreq(2)
#define BOARD_SERIAL_MWM_PORT USART2
#define BOARD_SERIAL_MWM_PORT_IRQn FLEXCOMM2_IRQn
#define BOARD_SERIAL_MWM_RST_WRITE(output)
/*! @brief The EMVSIM SMARTCARD PHY configuration. */
#define BOARD_SMARTCARD_MODULE (EMVSIM0) /*!< SMARTCARD communicational module instance */
#define BOARD_SMARTCARD_MODULE_IRQ (EMVSIM0_IRQn) /*!< SMARTCARD communicational module IRQ handler */
#define BOARD_SMARTCARD_CLOCK_MODULE_CLK_FREQ (CLOCK_GetEmvsimClkFreq(0U))
#define BOARD_SMARTCARD_CLOCK_VALUE (4000000U) /*!< SMARTCARD clock frequency */
/* ERPC LPSPI configuration */
#define ERPC_BOARD_LPSPI_SLAVE_READY_USE_GPIO (1)
#define ERPC_BOARD_LPSPI_BASEADDR LPSPI3
#define ERPC_BOARD_LPSPI_BAUDRATE 500000U
#define ERPC_BOARD_LPSPI_CLKSRC kCLOCK_Flexcomm3
#define ERPC_BOARD_LPSPI_CLK_FREQ 12000000 // CLOCK_GetFlexCommClkFreq(1)
#define ERPC_BOARD_LPSPI_INT_GPIO GPIO0
#define ERPC_BOARD_LPSPI_INT_PIN 16U
#define ERPC_BOARD_LPSPI_INT_PIN_IRQ PIN_INT0_IRQn
#define ERPC_BOARD_LPSPI_INT_PIN_IRQ_HANDLER PIN_INT0_IRQHandler
/* ERPC LPI2C configuration */
#define ERPC_BOARD_LPI2C_BASEADDR LPI2C0_BASE
#define ERPC_BOARD_LPI2C_BAUDRATE 100000U
#define ERPC_BOARD_LPI2C_CLKSRC kCLOCK_Flexcomm0
#define ERPC_BOARD_LPI2C_CLK_FREQ 12000000 // CLOCK_GetFlexCommClkFreq(2)
#define ERPC_BOARD_LPI2C_INT_GPIO GPIO1
#define ERPC_BOARD_LPI2C_INT_PIN 0U
#define ERPC_BOARD_LPI2C_INT_PIN_IRQ PIN_INT1_IRQn
#define ERPC_BOARD_LPI2C_INT_PIN_IRQ_HANDLER PIN_INT1_IRQHandler
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
void BOARD_InitDebugConsole(void);
void BOARD_InitDebugConsole_Core1(void);
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz);
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
void BOARD_Accel_I2C_Init(void);
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
status_t BOARD_Accel_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
void BOARD_Codec_I2C_Init(void);
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
void BOARD_Camera_I2C_Init(void);
status_t BOARD_Camera_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Camera_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
status_t BOARD_Camera_I2C_SendSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Camera_I2C_ReceiveSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
#endif /* SDK_I2C_BASED_COMPONENT_USED */
void BOARD_PowerMode_OD(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */
@@ -1,354 +0,0 @@
/*
* Copyright 2022-2023 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/*
* How to setup clock using clock driver functions:
*
* 1. Setup clock sources.
*
* 2. Set up wait states of the flash.
*
* 3. Set up all dividers.
*
* 4. Set up all selectors to provide selected clocks.
*
*/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v11.0
processor: MCXN947
package_id: MCXN947VDF
mcu_data: ksdk2_0
processor_version: 0.13.10
board: FRDM-MCXN947
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
#include "fsl_clock.h"
#include "clock_config.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/* System clock frequency. */
extern uint32_t SystemCoreClock;
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockPLL150M();
}
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFRO12M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: MAIN_clock.outFreq, value: 12 MHz}
- {id: Slow_clock.outFreq, value: 3 MHz}
- {id: System_clock.outFreq, value: 12 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: RunPowerMode, value: OD}
- {id: SCGMode, value: SIRC}
- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFRO12M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFRO12M configuration
******************************************************************************/
void BOARD_BootClockFRO12M(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
CLOCK_SetFLASHAccessCyclesForFreq(12000000U, kOD_Mode); /*!< Set the additional number of flash wait-states */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO12M */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF48M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 48 MHz}
- {id: Slow_clock.outFreq, value: 12 MHz}
- {id: System_clock.outFreq, value: 48 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: RunPowerMode, value: OD}
- {id: SYSCON.FLEXSPICLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF48M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF48M configuration
******************************************************************************/
void BOARD_BootClockFROHF48M(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
/* FRO OSC setup - begin, enable the FRO for safety switching */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */
CLOCK_SetFLASHAccessCyclesForFreq(48000000U, kOD_Mode); /*!< Set the additional number of flash wait-states */
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK;
}
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF144M ********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockFROHF144M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 144 MHz}
- {id: MAIN_clock.outFreq, value: 144 MHz}
- {id: Slow_clock.outFreq, value: 36 MHz}
- {id: System_clock.outFreq, value: 144 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: RunPowerMode, value: OD}
- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
- {id: SYSCON.FLEXSPICLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
sources:
- {id: SCG.FIRC.outFreq, value: 144 MHz}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockFROHF144M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockFROHF144M configuration
******************************************************************************/
void BOARD_BootClockFROHF144M(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
/* FRO OSC setup - begin, enable the FRO for safety switching */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */
CLOCK_SetFLASHAccessCyclesForFreq(144000000U, kOD_Mode); /*!< Set the additional number of flash wait-states */
CLOCK_SetupFROHFClocking(144000000U); /*!< Enable FRO HF(144MHz) output */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /*!< Switch MAIN_CLK to FRO_HF */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL150M
called_from_default_init: true
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: FRO_HF_clock.outFreq, value: 48 MHz}
- {id: MAIN_clock.outFreq, value: 150 MHz}
- {id: PLL0_CLK_clock.outFreq, value: 150 MHz}
- {id: Slow_clock.outFreq, value: 37.5 MHz}
- {id: System_clock.outFreq, value: 150 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: PLL0_Mode, value: Normal}
- {id: RunPowerMode, value: OD}
- {id: SCGMode, value: PLL0}
- {id: SCG.PLL0M_MULT.scale, value: '50', locked: true}
- {id: SCG.PLL0SRCSEL.sel, value: SCG.FIRC_48M}
- {id: SCG.PLL0_NDIV.scale, value: '8', locked: true}
- {id: SCG.SCSSEL.sel, value: SCG.PLL0_CLK}
- {id: SYSCON.FLEXSPICLKSEL.sel, value: NO_CLOCK}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL150M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL150M configuration
******************************************************************************/
void BOARD_BootClockPLL150M(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
/* FRO OSC setup - begin, enable the FRO for safety switching */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */
CLOCK_SetFLASHAccessCyclesForFreq(150000000U, kOD_Mode); /*!< Set the additional number of flash wait-states */
CLOCK_SetupFROHFClocking(48000000U); /*!< Enable FRO HF(48MHz) output */
/*!< Set up PLL0 */
const pll_setup_t pll0Setup = {
.pllctrl = SCG_APLLCTRL_SOURCE(1U) | SCG_APLLCTRL_SELI(27U) | SCG_APLLCTRL_SELP(13U),
.pllndiv = SCG_APLLNDIV_NDIV(8U),
.pllpdiv = SCG_APLLPDIV_PDIV(1U),
.pllmdiv = SCG_APLLMDIV_MDIV(50U),
.pllRate = 150000000U
};
CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
CLOCK_SetPll0MonitorMode(kSCG_Pll0MonitorDisable); /* Pll0 Monitor is disabled */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
}
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL100M *********************
******************************************************************************/
/* clang-format off */
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockPLL100M
outputs:
- {id: CLK_144M_clock.outFreq, value: 144 MHz}
- {id: CLK_48M_clock.outFreq, value: 48 MHz}
- {id: CLK_IN_clock.outFreq, value: 24 MHz}
- {id: FRO_12M_clock.outFreq, value: 12 MHz}
- {id: MAIN_clock.outFreq, value: 100 MHz}
- {id: PLL1_CLK_clock.outFreq, value: 100 MHz}
- {id: Slow_clock.outFreq, value: 25 MHz}
- {id: System_clock.outFreq, value: 100 MHz}
- {id: gdet_clock.outFreq, value: 48 MHz}
- {id: trng_clock.outFreq, value: 48 MHz}
settings:
- {id: PLL1_Mode, value: Normal}
- {id: RunPowerMode, value: OD}
- {id: SCGMode, value: PLL1}
- {id: SCG.PLL1M_MULT.scale, value: '100', locked: true}
- {id: SCG.PLL1_NDIV.scale, value: '6', locked: true}
- {id: SCG.PLL1_PDIV.scale, value: '4', locked: true}
- {id: SCG.SCSSEL.sel, value: SCG.PLL1_CLK}
- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
- {id: SYSCON.FREQMEREFCLKSEL.sel, value: SYSCON.evtg_out0a}
- {id: SYSCON.FREQMETARGETCLKSEL.sel, value: SYSCON.evtg_out0a}
sources:
- {id: SCG.SOSC.outFreq, value: 24 MHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* clang-format on */
/*******************************************************************************
* Variables for BOARD_BootClockPLL100M configuration
******************************************************************************/
/*******************************************************************************
* Code for BOARD_BootClockPLL100M configuration
******************************************************************************/
void BOARD_BootClockPLL100M(void)
{
CLOCK_EnableClock(kCLOCK_Scg); /*!< Enable SCG clock */
/* FRO OSC setup - begin, enable the FRO for safety switching */
CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12M first to ensure we can change the clock setting */
CLOCK_SetFLASHAccessCyclesForFreq(100000000U, kOD_Mode); /*!< Set the additional number of flash wait-states */
CLOCK_SetupExtClocking(24000000U);
CLOCK_SetSysOscMonitorMode(kSCG_SysOscMonitorDisable); /* System OSC Clock Monitor is disabled */
/*!< Set up PLL1 */
const pll_setup_t pll1Setup = {
.pllctrl = SCG_SPLLCTRL_SOURCE(0U) | SCG_SPLLCTRL_SELI(53U) | SCG_SPLLCTRL_SELP(26U),
.pllndiv = SCG_SPLLNDIV_NDIV(6U),
.pllpdiv = SCG_SPLLPDIV_PDIV(2U),
.pllmdiv = SCG_SPLLMDIV_MDIV(100U),
.pllRate = 100000000U
};
CLOCK_SetPLL1Freq(&pll1Setup); /*!< Configure PLL1 to the desired values */
CLOCK_SetPll1MonitorMode(kSCG_Pll1MonitorDisable); /* Pll1 Monitor is disabled */
/*!< Set up clock selectors - Attach clocks to the peripheries */
CLOCK_AttachClk(kPLL1_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL1 */
/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U); /*!< Set AHBCLKDIV divider to value 1 */
/* Set SystemCoreClock variable */
SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
}
@@ -1,177 +0,0 @@
/*
* Copyright 2022-2023 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockFRO12M **********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFRO12M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK 12000000U /*!< Core clock frequency: 12000000Hz */
#define BOARD_BOOTCLOCKFRO12M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFRO12M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFRO12M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF48M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF48M_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
#define BOARD_BOOTCLOCKFROHF48M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFROHF48M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF48M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockFROHF144M ********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockFROHF144M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKFROHF144M_CORE_CLOCK 144000000U /*!< Core clock frequency: 144000000Hz */
#define BOARD_BOOTCLOCKFROHF144M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockFROHF144M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockFROHF144M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL150M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL150M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
#define BOARD_BOOTCLOCKPLL150M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockPLL150M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL150M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************** Configuration BOARD_BootClockPLL100M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockPLL100M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK 100000000U /*!< Core clock frequency: 100000000Hz */
#define BOARD_BOOTCLOCKPLL100M_ROSC_CLOCK 0U /*!< ROSC clock frequency: 0Hz */
/*******************************************************************************
* API for BOARD_BootClockPLL100M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockPLL100M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */
@@ -1,23 +0,0 @@
/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Peripherals v1.0
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Included files
******************************************************************************/
#include "peripherals.h"
/*******************************************************************************
* BOARD_InitBootPeripherals function
******************************************************************************/
void BOARD_InitBootPeripherals(void)
{
}
@@ -1,23 +0,0 @@
/*
* Copyright 2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _PERIPHERALS_H_
#define _PERIPHERALS_H_
#if defined(__cplusplus)
extern "C" {
#endif /*_cplusplus. */
/*******************************************************************************
* BOARD_InitBootPeripherals function
******************************************************************************/
void BOARD_InitBootPeripherals(void);
#if defined(__cplusplus)
}
#endif /*_cplusplus. */
#endif /* _PERIPHERALS_H_ */
@@ -1,705 +0,0 @@
/*
* Copyright 2022-2023 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Pins v14.0
processor: MCXN947
package_id: MCXN947VDF
mcu_data: ksdk2_0
processor_version: 0.14.19
board: FRDM-MCXN947
expansion_headers:
- id: micro_bus
name: mikroBUS(TM)
connectors:
- id: C1
name: J6
pins:
- {id: 1, name: AN, pin_num: T2, pin_signal: ADC1_A0}
- {id: 2, name: RST, pin_num: B4, pin_signal: PIO1_3/WUU0_IN7/TRIG_OUT1/FC3_P3/CT1_MAT1/SCT0_IN7/FLEXIO0_D11/ENET0_MDIO/SAI1_RXD0/CAN0_RXD/TSI0_CH3/ADC0_A19/CMP0_IN1}
- {id: 3, name: CS, pin_num: M15, pin_signal: PIO3_23/FC6_P3/CT_INP11/PWM1_X3/FLEXIO0_D31/SAI1_TXD1}
- {id: 4, name: SCK, pin_num: L16, pin_signal: PIO3_21/TRIG_OUT1/FC8_P5/FC6_P1/CT2_MAT3/PWM1_B3/FLEXIO0_D29/SIM0_RST/SAI1_RXD0}
- {id: 5, name: MISO, pin_num: M16, pin_signal: PIO3_22/FC8_P6/FC6_P2/CT_INP10/PWM1_X2/FLEXIO0_D30/SIM0_VCCEN/SAI1_RXD1}
- {id: 6, name: MOSI, pin_num: M17, pin_signal: PIO3_20/WUU0_IN27/TRIG_OUT0/FC8_P4/FC6_P0/CT2_MAT2/PWM1_A3/FLEXIO0_D28/SIM0_PD/SAI1_TXD0}
- id: C2
name: J5
pins:
- {id: 1, name: PWM, pin_num: K17, pin_signal: PIO3_19/FC7_P6/CT2_MAT1/PWM1_X1/FLEXIO0_D27/SAI1_RX_FS}
- {id: 2, name: INT, pin_num: L13, pin_signal: PIO5_7/TRIG_IN11/TAMPER5/ADC1_B15}
- {id: 3, name: RX, pin_num: F6, pin_signal: PIO1_16/WUU0_IN14/FC5_P0/FC3_P4/CT_INP12/SCT0_OUT6/FLEXIO0_D24/PLU_OUT4/ENET0_RXD2/I3C1_SDA/ADC1_A16}
- {id: 4, name: TX, pin_num: F4, pin_signal: PIO1_17/FC5_P1/FC3_P5/CT_INP13/SCT0_OUT7/FLEXIO0_D25/PLU_OUT5/ENET0_RXD3/I3C1_SCL/ADC1_A17}
- {id: 5, name: SCL, pin_num: C5, pin_signal: PIO1_1/TRIG_IN1/FC3_P1/FC4_P5/CT_INP5/SCT0_OUT7/FLEXIO0_D9/SAI1_TX_FS/TSI0_CH1/ADC0_A17/CMP1_IN0}
- {id: 6, name: SDA, pin_num: C6, pin_signal: PIO1_0/WUU0_IN6/LPTMR0_ALT3/TRIG_IN0/FC3_P0/FC4_P4/CT_INP4/SCT0_OUT6/FLEXIO0_D8/SAI1_TX_BCLK/TSI0_CH0/ADC0_A16/CMP0_IN0}
- id: frdm_arduino
name: LPCXpresso V3 (Arduino compatible)
connectors:
- id: C1
name: J3
pins:
- {id: 1, pin_num: H2, pin_signal: PIO2_0/TRIG_IN5/FC9_P6/SDHC0_D5/SCT0_IN0/PWM1_A3/FLEXIO0_D8/FLEXSPI0_B_SS1_b/SAI0_RX_BCLK}
- {id: 2, pin_num: U2, pin_signal: DAC2_OUT/ADC0_A3/ADC1_A3}
- {id: 3, pin_num: L4, pin_signal: PIO1_22/TRIG_IN3/FC5_P6/FC4_P2/CT_INP14/SCT0_OUT4/FLEXIO0_D30/ADC1_A22}
- {id: 5, pin_num: J3, pin_signal: PIO2_3/FC9_P1/SDHC0_D0/SCT0_OUT1/PWM1_B2/FLEXIO0_D11/FLEXSPI0_B_SCLK/SINC0_MBIT0/SAI0_RXD0}
- {id: 6, pin_num: F3, pin_signal: RESET_B}
- {id: 7, pin_num: H3, pin_signal: PIO2_2/WUU0_IN16/CLKOUT/FC9_P3/SDHC0_D1/SCT0_OUT0/PWM1_A2/FLEXIO0_D10/FLEXSPI0_B_SS0_b/SINC0_MCLK0/SAI0_TXD0}
- {id: 9, pin_num: K1, pin_signal: PIO2_5/TRIG_OUT3/FC9_P2/SDHC0_CMD/SCT0_OUT3/PWM1_B1/FLEXIO0_D13/FLEXSPI0_B_DATA1/SINC0_MBIT1/SAI0_TXD1}
- {id: 11, pin_num: K3, pin_signal: PIO2_4/WUU0_IN17/FC9_P0/SDHC0_CLK/SCT0_OUT2/PWM1_A1/FLEXIO0_D12/FLEXSPI0_B_DATA0/SINC0_MCLK1/SAI0_RXD1}
- {id: 13, pin_num: L2, pin_signal: PIO2_7/TRIG_IN5/FC9_P5/SDHC0_D2/SCT0_OUT5/PWM1_B0/FLEXIO0_D15/FLEXSPI0_B_DATA3/SINC0_MBIT2/SAI0_TX_FS}
- {id: 15, pin_num: K2, pin_signal: PIO2_6/TRIG_IN4/FC9_P4/SDHC0_D3/SCT0_OUT4/PWM1_A0/FLEXIO0_D14/FLEXSPI0_B_DATA2/SINC0_MCLK2/SAI0_TX_BCLK}
- id: C2
name: J2
pins:
- {id: 1, pin_num: T3, pin_signal: ADC1_B0}
- {id: 2, pin_num: E8, pin_signal: PIO0_28/FC1_P4/FC0_P4/CT_INP0/ADC0_B20}
- {id: 3, pin_num: M10, pin_signal: PIO5_2/VBAT_WAKEUP_b/SPC_LPREQ/TAMPER0/ADC1_B10}
- {id: 4, pin_num: B12, pin_signal: PIO0_10/FC0_P6/CT0_MAT0/FLEXIO0_D2/ADC0_B10}
- {id: 5, pin_num: N11, pin_signal: PIO5_3/TRIG_IN11/RTC_CLKOUT/TAMPER1/ADC1_B11}
- {id: 6, pin_num: E10, pin_signal: PIO0_27/FC1_P3/CT0_MAT3/ADC0_B19}
- {id: 7, pin_num: M12, pin_signal: PIO5_4/TRIG_OUT7/SPC_LPREQ/TAMPER2/ADC1_B12}
- {id: 8, pin_num: B6, pin_signal: PIO0_24/FC1_P0/CT0_MAT0/ADC0_B16}
- {id: 9, pin_num: B15, pin_signal: PIO0_3/TDI/FC1_P3/CT0_MAT1/UTICK_CAP1/HSCMP0_OUT/CMP1_IN1}
- {id: 10, pin_num: F10, pin_signal: PIO0_26/FC1_P2/CT0_MAT2/ADC0_B18}
- {id: 11, pin_num: C10, pin_signal: PIO0_18/EWM0_IN/FC0_P2/CT0_MAT2/FLEXIO0_D2/HSCMP0_OUT/PDM0_DATA1/TSI0_CH13/ADC0_A10}
- {id: 12, pin_num: A6, pin_signal: PIO0_25/FC1_P1/CT0_MAT1/ADC0_B17}
- {id: 13, pin_num: C9, pin_signal: PIO0_19/WUU0_IN3/EWM0_OUT_b/FC0_P3/CT0_MAT3/FLEXIO0_D3/HSCMP1_OUT/TSI0_CH14/ADC0_A11}
- {id: 15, pin_num: C5, pin_signal: PIO1_1/TRIG_IN1/FC3_P1/FC4_P5/CT_INP5/SCT0_OUT7/FLEXIO0_D9/SAI1_TX_FS/TSI0_CH1/ADC0_A17/CMP1_IN0}
- {id: 17, pin_num: C6, pin_signal: PIO1_0/WUU0_IN6/LPTMR0_ALT3/TRIG_IN0/FC3_P0/FC4_P4/CT_INP4/SCT0_OUT6/FLEXIO0_D8/SAI1_TX_BCLK/TSI0_CH0/ADC0_A16/CMP0_IN0}
- {id: 18, pin_num: P1, pin_signal: PIO4_0/WUU0_IN18/TRIG_IN6/FC2_P0/CT_INP16/PLU_IN0/SINC0_MCLK3}
- {id: 20, pin_num: P2, pin_signal: PIO4_1/TRIG_IN7/FC2_P1/CT_INP17/PLU_IN1}
- id: C3
name: J1
pins:
- {id: 1, pin_num: J15, pin_signal: PIO3_16/FC8_P2/CT_INP8/PWM1_A2/FLEXIO0_D24/SIM0_CLK/SAI1_TX_BCLK}
- {id: 2, pin_num: U1, pin_signal: PIO4_3/WUU0_IN19/TRIG_IN7/FC2_P3/CT_INP13/PLU_IN3/DAC1_OUT/ADC0_B4/ADC1_B4/CMP0_IN5N/CMP1_IN5N/CMP2_IN5N}
- {id: 3, pin_num: T7, pin_signal: PIO4_13/TRIG_IN8/FC2_P1/USB1_ID/CT4_MAT1/FLEXIO0_D21/PLU_OUT1/SINC0_MBIT0/CAN0_TXD/OPAMP0_INP1/ADC0_B5/ADC1_B5}
- {id: 4, pin_num: T1, pin_signal: PIO4_2/TRIG_IN6/FC2_P2/CT_INP12/PLU_IN2/SINC0_MBIT3/DAC0_OUT/ADC0_A4/ADC1_A4/CMP0_IN4N/CMP1_IN4N/CMP2_IN4N}
- {id: 5, pin_num: M17, pin_signal: PIO3_20/WUU0_IN27/TRIG_OUT0/FC8_P4/FC6_P0/CT2_MAT2/PWM1_A3/FLEXIO0_D28/SIM0_PD/SAI1_TXD0}
- {id: 6, pin_num: F8, pin_signal: PIO0_29/FC1_P5/FC0_P5/CT_INP1/ADC0_B21}
- {id: 7, pin_num: L5, pin_signal: PIO1_21/TRIG_OUT2/FC5_P5/FC4_P1/CT3_MAT3/SCT0_OUT9/FLEXIO0_D29/PLU_OUT7/ENET0_MDIO/SAI1_MCLK/CAN1_RXD/ADC1_A21/CMP2_IN3}
- {id: 8, pin_num: M4, pin_signal: PIO1_23/FC4_P3/CT_INP15/SCT0_OUT5/FLEXIO0_D31/ADC1_A23}
- {id: 9, pin_num: K16, pin_signal: PIO3_18/FC6_P6/CT2_MAT0/PWM1_X0/FLEXIO0_D26/SAI1_RX_BCLK}
- {id: 10, pin_num: E7, pin_signal: PIO0_30/FC1_P6/FC0_P6/CT_INP2/ADC0_B22}
- {id: 11, pin_num: K15, pin_signal: PIO3_17/WUU0_IN26/FC8_P3/CT_INP9/PWM1_B2/FLEXIO0_D25/SIM0_IO/SAI1_TX_FS}
- {id: 12, pin_num: L5, pin_signal: PIO1_21/TRIG_OUT2/FC5_P5/FC4_P1/CT3_MAT3/SCT0_OUT9/FLEXIO0_D29/PLU_OUT7/ENET0_MDIO/SAI1_MCLK/CAN1_RXD/ADC1_A21/CMP2_IN3}
- {id: 13, pin_num: K17, pin_signal: PIO3_19/FC7_P6/CT2_MAT1/PWM1_X1/FLEXIO0_D27/SAI1_RX_FS}
- {id: 14, pin_num: C4, pin_signal: PIO1_2/TRIG_OUT0/FC3_P2/FC4_P6/CT1_MAT0/SCT0_IN6/FLEXIO0_D10/ENET0_MDC/SAI1_TXD0/CAN0_TXD/TSI0_CH2/ADC0_A18/CMP2_IN0}
- {id: 15, pin_num: L16, pin_signal: PIO3_21/TRIG_OUT1/FC8_P5/FC6_P1/CT2_MAT3/PWM1_B3/FLEXIO0_D29/SIM0_RST/SAI1_RXD0}
- {id: 16, pin_num: D7, pin_signal: PIO0_31/CT_INP3/ADC0_B23}
- id: C4
name: J4
pins:
- {id: 1, pin_num: T6, pin_signal: PIO4_12/WUU0_IN20/USB0_VBUS_DET/FC2_P0/CT4_MAT0/FLEXIO0_D20/PLU_OUT0/SINC0_MCLK0/CAN0_RXD/OPAMP0_INP0/ADC0_A5/ADC1_A5}
- {id: 2, pin_num: P3, pin_signal: ADC0_A0}
- {id: 3, pin_num: U6, pin_signal: OPAMP0_INN}
- {id: 4, pin_num: R3, pin_signal: ADC0_B0}
- {id: 5, pin_num: R8, pin_signal: PIO4_16/FC2_P2/USB1_OTG_PWR/CT3_MAT0/FLEXIO0_D24/PLU_OUT4/SINC0_MCLK1/CAN1_TXD/OPAMP1_INP0/ADC0_A6}
- {id: 6, pin_num: E11, pin_signal: PIO0_14/FC1_P6/FC0_P2/CT_INP2/UTICK_CAP0/FLEXIO0_D6/ADC0_B14}
- {id: 7, pin_num: U8, pin_signal: OPAMP1_INN}
- {id: 8, pin_num: B8, pin_signal: PIO0_22/EWM0_IN/FC0_P6/FC1_P2/CT_INP2/FLEXIO0_D6/I3C0_PUR/ADC0_A14/CMP1_IN2}
- {id: 9, pin_num: T10, pin_signal: PIO4_20/TRIG_IN8/FC2_P4/CT2_MAT0/FLEXIO0_D28/SINC0_MCLK2/OPAMP2_INP0/ADC1_A6}
- {id: 10, pin_num: G13, pin_signal: PIO0_15/FC0_P3/CT_INP3/UTICK_CAP1/FLEXIO0_D7/ADC0_B15}
- {id: 11, pin_num: U10, pin_signal: OPAMP2_INN}
- {id: 12, pin_num: B7, pin_signal: PIO0_23/WUU0_IN5/EWM0_OUT_b/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15/CMP2_IN2}
- {id: frdm_arduino, name: LPCXpressoV2/V3 Expansion Header}
- {id: micro_bus, name: mikroBUS Click Header}
external_user_signals: {}
pin_labels:
- {pin_num: A1, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8, label: 'P1_8/J9[32]',
identifier: DEBUG_UART_RX}
- {pin_num: B1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9, label: 'P1_9/J9[30]', identifier: DEBUG_UART_TX}
- {pin_num: D1, pin_signal: PIO1_13/TRIG_IN3/FC4_P5/FC3_P1/CT2_MAT3/SCT0_OUT5/FLEXIO0_D21/PLU_OUT3/ENET0_RXDV/CAN1_TXD/TSI0_CH22/ADC1_A13, label: 'P1_13/J9[27]'}
- {pin_num: F1, pin_signal: PIO1_30/TRIG_OUT3/CT_INP16/SCT0_OUT8/SAI0_MCLK/XTAL48M, label: 'P1_30/XTAL/Y1[1]'}
- {pin_num: H1, pin_signal: PIO2_1/TRACE_CLK/SDHC0_D4/SCT0_IN1/PWM1_B3/FLEXIO0_D9/FLEXSPI0_B_DQS/SINC0_MCLK_OUT0/SAI0_RX_FS, label: 'P2_1/TP27/J12[9]'}
- {pin_num: K1, pin_signal: PIO2_5/TRIG_OUT3/FC9_P2/SDHC0_CMD/SCT0_OUT3/PWM1_B1/FLEXIO0_D13/FLEXSPI0_B_DATA1/SINC0_MBIT1/SAI0_TXD1, label: 'P2_5/TP25/J12[3]/J3[9]/SJ6[3]'}
- {pin_num: M1, pin_signal: PIO2_9/TRACE_DATA1/SDHC0_D6/SCT0_IN3/PWM1_X1/FLEXIO0_D17/FLEXSPI0_B_DATA5/SINC0_MBIT3/SAI1_RXD0, label: 'P2_9/J8[14]'}
- {pin_num: P1, pin_signal: PIO4_0/WUU0_IN18/TRIG_IN6/FC2_P0/CT_INP16/PLU_IN0/SINC0_MCLK3, label: 'P4_0/J8[4]/SJ14[1]'}
- {pin_num: T1, pin_signal: PIO4_2/TRIG_IN6/FC2_P2/CT_INP12/PLU_IN2/SINC0_MBIT3/DAC0_OUT/ADC0_A4/ADC1_A4/CMP0_IN4N/CMP1_IN4N/CMP2_IN4N, label: 'P4_2/J1[4]'}
- {pin_num: U1, pin_signal: PIO4_3/WUU0_IN19/TRIG_IN7/FC2_P3/CT_INP13/PLU_IN3/DAC1_OUT/ADC0_B4/ADC1_B4/CMP0_IN5N/CMP1_IN5N/CMP2_IN5N, label: 'P4_3/J1[2]'}
- {pin_num: A2, pin_signal: PIO1_7/WUU0_IN9/TRIG_OUT2/FC5_P3/CT_INP7/SCT0_IN1/FLEXIO0_D15/PLU_CLK/ENET0_TXD1/SAI1_RX_FS/CAN1_RXD/TSI0_CH7/ADC0_A23, label: 'P1_7/J9[9]'}
- {pin_num: B2, pin_signal: PIO1_6/TRIG_IN2/FC3_P6/FC5_P2/CT_INP6/SCT0_IN0/FLEXIO0_D14/ENET0_TXD0/SAI1_RX_BCLK/CAN1_TXD/TSI0_CH6/ADC0_A22, label: 'P1_6/J9[10]'}
- {pin_num: D2, pin_signal: PIO1_12/WUU0_IN12/TRACE_CLK/FC4_P4/FC3_P0/CT2_MAT2/SCT0_OUT4/FLEXIO0_D20/PLU_OUT2/ENET0_RXER/CAN1_RXD/TSI0_CH21/ADC1_A12, label: 'P1_12/J2[11]/J9[28]'}
- {pin_num: F2, pin_signal: PIO1_31/TRIG_IN4/CT_INP17/SCT0_OUT9/EXTAL48M, label: 'P1_31/EXTAL/Y1[3]'}
- {pin_num: G2, pin_signal: VSS0, label: GND}
- {pin_num: H2, pin_signal: PIO2_0/TRIG_IN5/FC9_P6/SDHC0_D5/SCT0_IN0/PWM1_A3/FLEXIO0_D8/FLEXSPI0_B_SS1_b/SAI0_RX_BCLK, label: 'P2_0/J3[1]/SJ8[3]'}
- {pin_num: K2, pin_signal: PIO2_6/TRIG_IN4/FC9_P4/SDHC0_D3/SCT0_OUT4/PWM1_A0/FLEXIO0_D14/FLEXSPI0_B_DATA2/SINC0_MCLK2/SAI0_TX_BCLK, label: 'P2_6/TP24/J12[2]/J3[15]/SJ1[3]'}
- {pin_num: L2, pin_signal: PIO2_7/TRIG_IN5/FC9_P5/SDHC0_D2/SCT0_OUT5/PWM1_B0/FLEXIO0_D15/FLEXSPI0_B_DATA3/SINC0_MBIT2/SAI0_TX_FS, label: 'P2_7/TP23/J12[1]/J3[13]/SJ3[3]'}
- {pin_num: M2, pin_signal: PIO2_8/TRACE_DATA0/SDHC0_D7/SCT0_IN2/PWM1_X0/FLEXIO0_D16/FLEXSPI0_B_DATA4/SINC0_MCLK3/SAI1_TXD0, label: 'P2_8/J8[13]'}
- {pin_num: P2, pin_signal: PIO4_1/TRIG_IN7/FC2_P1/CT_INP17/PLU_IN1, label: 'P4_1/J8[3]/SJ15[1]'}
- {pin_num: T2, pin_signal: ADC1_A0, label: 'ANA_4/ADC1_A0/J6[1]'}
- {pin_num: U2, pin_signal: DAC2_OUT/ADC0_A3/ADC1_A3, label: 'ANA_6/ADC0_A3/J3[2]'}
- {pin_num: B3, pin_signal: PIO1_5/FREQME_CLK_IN1/FC3_P5/FC5_P1/CT1_MAT3/SCT0_OUT1/FLEXIO0_D13/ENET0_TXEN/SAI0_RXD1/TSI0_CH5/ADC0_A21/CMP0_IN3, label: 'P1_5/J9[7]'}
- {pin_num: C3, pin_signal: PIO1_10/TRACE_DATA2/FC4_P2/FC5_P6/CT2_MAT0/SCT0_IN2/FLEXIO0_D18/PLU_IN0/ENET0_TXER/CAN0_TXD/TSI0_CH19/ADC1_A10, label: 'P1_10/SJ20[3]/SJ16[2]'}
- {pin_num: D3, pin_signal: PIO1_11/WUU0_IN11/TRACE_DATA3/FC4_P3/CT2_MAT1/SCT0_IN3/FLEXIO0_D19/PLU_IN1/ENET0_RX_CLK/I3C1_PUR/CAN0_RXD/TSI0_CH20/ADC1_A11, label: 'P1_11/SJ26[2]'}
- {pin_num: F3, pin_signal: RESET_B, label: 'RESET_B/J23[10]/D16[1]/SW1[3]/SW1[4]/J3[6]', identifier: SW1}
- {pin_num: H3, pin_signal: PIO2_2/WUU0_IN16/CLKOUT/FC9_P3/SDHC0_D1/SCT0_OUT0/PWM1_A2/FLEXIO0_D10/FLEXSPI0_B_SS0_b/SINC0_MCLK0/SAI0_TXD0, label: 'P2_2/TP5/J12[8]/J3[7]/SJ7[3]'}
- {pin_num: J3, pin_signal: PIO2_3/FC9_P1/SDHC0_D0/SCT0_OUT1/PWM1_B2/FLEXIO0_D11/FLEXSPI0_B_SCLK/SINC0_MBIT0/SAI0_RXD0, label: 'P2_3/TP4/J12[7]/J3[5]/SJ4[3]'}
- {pin_num: K3, pin_signal: PIO2_4/WUU0_IN17/FC9_P0/SDHC0_CLK/SCT0_OUT2/PWM1_A1/FLEXIO0_D12/FLEXSPI0_B_DATA0/SINC0_MCLK1/SAI0_RXD1, label: 'P2_4/TP26/J12[5]/J3[11]/SJ5[3]'}
- {pin_num: M3, pin_signal: PIO2_10/TRACE_DATA2/SCT0_IN4/PWM1_X2/FLEXIO0_D18/FLEXSPI0_B_DATA6/SINC0_MCLK4/SAI1_RXD1, label: 'P2_10/J8[15]'}
- {pin_num: P3, pin_signal: ADC0_A0, label: 'ADC0_A0/ARD_A0/J4[2]'}
- {pin_num: R3, pin_signal: ADC0_B0, label: 'ADC0_B0/ARD_A1/J4[4]'}
- {pin_num: T3, pin_signal: ADC1_B0, label: 'ADC1_B0/MC_BEMF_A/J2[1]'}
- {pin_num: A4, pin_signal: PIO1_4/WUU0_IN8/FREQME_CLK_IN0/FC3_P4/FC5_P0/CT1_MAT2/SCT0_OUT0/FLEXIO0_D12/ENET0_TX_CLK/SAI0_TXD1/TSI0_CH4/ADC0_A20/CMP0_IN2, label: 'P1_4/SJ27[2]'}
- {pin_num: B4, pin_signal: PIO1_3/WUU0_IN7/TRIG_OUT1/FC3_P3/CT1_MAT1/SCT0_IN7/FLEXIO0_D11/ENET0_MDIO/SAI1_RXD0/CAN0_RXD/TSI0_CH3/ADC0_A19/CMP0_IN1, label: 'P1_3/J6[2]'}
- {pin_num: C4, pin_signal: PIO1_2/TRIG_OUT0/FC3_P2/FC4_P6/CT1_MAT0/SCT0_IN6/FLEXIO0_D10/ENET0_MDC/SAI1_TXD0/CAN0_TXD/TSI0_CH2/ADC0_A18/CMP2_IN0, label: 'P1_2/SJ4[1]',
identifier: LED_BLUE}
- {pin_num: D4, pin_signal: PIO1_14/FC4_P6/FC3_P2/CT_INP10/SCT0_IN4/FLEXIO0_D22/PLU_IN2/ENET0_RXD0/TSI0_CH23/ADC1_A14, label: 'P1_14/J9[2]'}
- {pin_num: E4, pin_signal: PIO1_15/WUU0_IN13/FC3_P3/CT_INP11/SCT0_IN5/FLEXIO0_D23/PLU_IN3/ENET0_RXD1/I3C1_PUR/TSI0_CH24/ADC1_A15, label: 'P1_15/J9[1]'}
- {pin_num: F4, pin_signal: PIO1_17/FC5_P1/FC3_P5/CT_INP13/SCT0_OUT7/FLEXIO0_D25/PLU_OUT5/ENET0_RXD3/I3C1_SCL/ADC1_A17, label: 'P1_17/SJ15[3]/J5[4]/J9[3]'}
- {pin_num: G4, pin_signal: PIO1_18/FREQME_CLK_IN0/FC5_P2/FC3_P6/CT3_MAT0/SCT0_IN6/FLEXIO0_D26/PLU_IN4/ENET0_COL/CAN0_TXD/ADC1_A18, label: 'P1_18/J9[6]'}
- {pin_num: J4, pin_signal: VSS1, label: GND}
- {pin_num: L4, pin_signal: PIO1_22/TRIG_IN3/FC5_P6/FC4_P2/CT_INP14/SCT0_OUT4/FLEXIO0_D30/ADC1_A22, label: 'P1_22/J9[24]/J3[3]/SJ9[3]'}
- {pin_num: M4, pin_signal: PIO1_23/FC4_P3/CT_INP15/SCT0_OUT5/FLEXIO0_D31/ADC1_A23, label: 'P1_23/J9[23]/SJ1[1]'}
- {pin_num: N4, pin_signal: PIO2_11/TRACE_DATA3/SCT0_IN5/PWM1_X3/FLEXIO0_D19/FLEXSPI0_B_DATA7/SINC0_MBIT4/SAI1_TXD1, label: 'P2_11/J8[16]'}
- {pin_num: P4, pin_signal: VDD_P40, label: VDD_P4}
- {pin_num: R4, pin_signal: VDD_ANA, label: 'VDD_ANA/J2[16]'}
- {pin_num: T4, pin_signal: PIO4_7/CT_INP19, label: 'P4_7/J8[7]'}
- {pin_num: U4, pin_signal: VREFO/ADC0_A7/ADC1_A7, label: VREFO/TP1}
- {pin_num: C5, pin_signal: PIO1_1/TRIG_IN1/FC3_P1/FC4_P5/CT_INP5/SCT0_OUT7/FLEXIO0_D9/SAI1_TX_FS/TSI0_CH1/ADC0_A17/CMP1_IN0, label: 'P1_1/J5[5]/J2[15]'}
- {pin_num: E5, pin_signal: VSS3, label: GND}
- {pin_num: G5, pin_signal: PIO1_19/WUU0_IN15/FREQME_CLK_IN1/FC5_P3/CT3_MAT1/SCT0_IN7/FLEXIO0_D27/PLU_IN5/ENET0_CRS/CAN0_RXD/ADC1_A19, label: 'P1_19/J9[5]'}
- {pin_num: H5, pin_signal: VSS2, label: GND}
- {pin_num: K5, pin_signal: PIO1_20/TRIG_IN2/FC5_P4/FC4_P0/CT3_MAT2/SCT0_OUT8/FLEXIO0_D28/PLU_OUT6/ENET0_MDC/CAN1_TXD/ADC1_A20/CMP1_IN3, label: P1_20}
- {pin_num: L5, pin_signal: PIO1_21/TRIG_OUT2/FC5_P5/FC4_P1/CT3_MAT3/SCT0_OUT9/FLEXIO0_D29/PLU_OUT7/ENET0_MDIO/SAI1_MCLK/CAN1_RXD/ADC1_A21/CMP2_IN3, label: 'P1_21/SJ3[1]/J1[7]'}
- {pin_num: N5, pin_signal: VDD_P41, label: VDD_P4}
- {pin_num: R5, pin_signal: VREFH, label: VREFH}
- {pin_num: A6, pin_signal: PIO0_25/FC1_P1/CT0_MAT1/ADC0_B17, label: 'P0_25/J2[12]'}
- {pin_num: B6, pin_signal: PIO0_24/FC1_P0/CT0_MAT0/ADC0_B16, label: 'P0_24/SJ7[1]'}
- {pin_num: C6, pin_signal: PIO1_0/WUU0_IN6/LPTMR0_ALT3/TRIG_IN0/FC3_P0/FC4_P4/CT_INP4/SCT0_OUT6/FLEXIO0_D8/SAI1_TX_BCLK/TSI0_CH0/ADC0_A16/CMP0_IN0, label: 'P1_0/J5[6]/J2[17]'}
- {pin_num: N13, pin_signal: VSS4, label: GND}
- {pin_num: F6, pin_signal: PIO1_16/WUU0_IN14/FC5_P0/FC3_P4/CT_INP12/SCT0_OUT6/FLEXIO0_D24/PLU_OUT4/ENET0_RXD2/I3C1_SDA/ADC1_A16, label: 'P1_16/SJ14[3]/J5[3]/J9[4]'}
- {pin_num: H6, pin_signal: VDD1, label: VDD_P0/1}
- {pin_num: K6, pin_signal: VDD_LDO_CORE, label: VDD_LDO_CORE_IN}
- {pin_num: M6, pin_signal: PIO4_4/FC2_P4/CT_INP14/PLU_IN4/SINC0_MCLK4, label: 'P4_4/J9[26]'}
- {pin_num: P6, pin_signal: VSS_P41, label: GND}
- {pin_num: R6, pin_signal: VREFL, label: AGND}
- {pin_num: T6, pin_signal: PIO4_12/WUU0_IN20/USB0_VBUS_DET/FC2_P0/CT4_MAT0/FLEXIO0_D20/PLU_OUT0/SINC0_MCLK0/CAN0_RXD/OPAMP0_INP0/ADC0_A5/ADC1_A5, label: 'P4_12/SJ25[1]/J8[17]'}
- {pin_num: U6, pin_signal: OPAMP0_INN, label: 'OPAMP0_INN/RSHUNT_CURA_N/SJ24[1]'}
- {pin_num: B7, pin_signal: PIO0_23/WUU0_IN5/EWM0_OUT_b/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15/CMP2_IN2, label: 'P0_23/SJ9[1]/SW2[3]/SW2[4]', identifier: SW2}
- {pin_num: D7, pin_signal: PIO0_31/CT_INP3/ADC0_B23, label: 'P0_31/J1[16]'}
- {pin_num: E7, pin_signal: PIO0_30/FC1_P6/FC0_P6/CT_INP2/ADC0_B22, label: 'P0_30/SJ2[1]'}
- {pin_num: G7, pin_signal: VDD0, label: VDD_P0/1}
- {pin_num: L7, pin_signal: VDD_P20, label: VDD_P2}
- {pin_num: N7, pin_signal: PIO4_6/TRIG_OUT4/FC2_P6/CT_INP18/PLU_CLK, label: 'P4_6/J8[5]'}
- {pin_num: P7, pin_signal: VSS_P42, label: GND}
- {pin_num: T7, pin_signal: PIO4_13/TRIG_IN8/FC2_P1/USB1_ID/CT4_MAT1/FLEXIO0_D21/PLU_OUT1/SINC0_MBIT0/CAN0_TXD/OPAMP0_INP1/ADC0_B5/ADC1_B5, label: 'P4_13/SJ10[1]/SJ2[3]/J8[18]'}
- {pin_num: A8, pin_signal: PIO0_21/FC0_P5/FC1_P1/CT_INP1/FLEXIO0_D5/I3C0_SCL/TSI0_CH16/ADC0_A13, label: 'P0_21/SJ25[3]'}
- {pin_num: B8, pin_signal: PIO0_22/EWM0_IN/FC0_P6/FC1_P2/CT_INP2/FLEXIO0_D6/I3C0_PUR/ADC0_A14/CMP1_IN2, label: 'P0_22/J4[8]/SJ18[3]'}
- {pin_num: C8, pin_signal: PIO0_20/WUU0_IN4/FC0_P4/FC1_P0/CT_INP0/FLEXIO0_D4/I3C0_SDA/TSI0_CH15/ADC0_A12, label: 'P0_20/SJ24[3]/J7[2]'}
- {pin_num: E8, pin_signal: PIO0_28/FC1_P4/FC0_P4/CT_INP0/ADC0_B20, label: 'P0_28/J2[2]'}
- {pin_num: F8, pin_signal: PIO0_29/FC1_P5/FC0_P5/CT_INP1/ADC0_B21, label: 'P0_29/J1[6]'}
- {pin_num: H8, pin_signal: VDD2, label: VDD_P0/1}
- {pin_num: H13, pin_signal: VSS10, label: GND}
- {pin_num: K8, pin_signal: VDD_P21, label: VDD_P2}
- {pin_num: M8, pin_signal: PIO4_5/FC2_P5/CT_INP15/PLU_IN5/SINC0_MBIT4, label: 'P4_5/SJ11[3]/J8[6]'}
- {pin_num: N8, pin_signal: PIO4_14/CT4_MAT2/FLEXIO0_D22/PLU_OUT2, label: 'P4_14/J8[19]'}
- {pin_num: R8, pin_signal: PIO4_16/FC2_P2/USB1_OTG_PWR/CT3_MAT0/FLEXIO0_D24/PLU_OUT4/SINC0_MCLK1/CAN1_TXD/OPAMP1_INP0/ADC0_A6, label: 'P4_16/SJ23[1]/J8[21]'}
- {pin_num: T8, pin_signal: PIO4_15/WUU0_IN21/TRIG_OUT4/USB1_VBUS_DIG/CT4_MAT3/FLEXIO0_D23/PLU_OUT3/SINC0_MCLK_OUT0/CAN1_RXD/OPAMP0_OUT/ADC0_A1/CMP0_IN4P, label: 'P4_15/J8[20]'}
- {pin_num: U8, pin_signal: OPAMP1_INN, label: 'OPAMP1_INN/RSHUNT_CURB_N/SJ22[1]'}
- {pin_num: C9, pin_signal: PIO0_19/WUU0_IN3/EWM0_OUT_b/FC0_P3/CT0_MAT3/FLEXIO0_D3/HSCMP1_OUT/TSI0_CH14/ADC0_A11, label: 'P0_19/J2[13]/J7[1]'}
- {pin_num: D6, pin_signal: VSS5, label: GND}
- {pin_num: E13, pin_signal: VSS8, label: GND}
- {pin_num: J14, pin_signal: VSS13, label: GND}
- {pin_num: P9, pin_signal: VSS_P40, label: GND}
- {pin_num: R9, pin_signal: PIO4_17/TRIG_IN9/FC2_P3/USB1_OTG_OC/CT3_MAT1/FLEXIO0_D25/PLU_OUT5/SINC0_MBIT1/OPAMP1_INP1/ADC0_B6, label: 'P4_17/J8[22]'}
- {pin_num: A10, pin_signal: PIO0_17/FC0_P1/CT0_MAT1/UTICK_CAP3/FLEXIO0_D1/PDM0_DATA0/I3C0_SCL/TSI0_CH12/ADC0_A9, label: 'P0_17/J7[7]'}
- {pin_num: B10, pin_signal: PIO0_16/WUU0_IN2/FC0_P0/CT0_MAT0/UTICK_CAP2/FLEXIO0_D0/PDM0_CLK/I3C0_SDA/TSI0_CH11/ADC0_A8, label: 'P0_16/J7[3]'}
- {pin_num: C10, pin_signal: PIO0_18/EWM0_IN/FC0_P2/CT0_MAT2/FLEXIO0_D2/HSCMP0_OUT/PDM0_DATA1/TSI0_CH13/ADC0_A10, label: 'P0_18/SJ23[3]/J7[5]'}
- {pin_num: E10, pin_signal: PIO0_27/FC1_P3/CT0_MAT3/ADC0_B19, label: 'P0_27/SJ6[1]', identifier: LED_GREEN}
- {pin_num: F10, pin_signal: PIO0_26/FC1_P2/CT0_MAT2/ADC0_B18, label: 'P0_26/J2[10]'}
- {pin_num: H10, pin_signal: VDD_P31, label: VDD_P3}
- {pin_num: J8, pin_signal: VSS11, label: GND}
- {pin_num: K10, pin_signal: VDD_CORE/VOUT_CORE, label: 'VDD_CORE/L2[2]'}
- {pin_num: M10, pin_signal: PIO5_2/VBAT_WAKEUP_b/SPC_LPREQ/TAMPER0/ADC1_B10, label: 'P5_2/SJ19[1]'}
- {pin_num: N10, pin_signal: PIO4_18/CT3_MAT2/FLEXIO0_D26/PLU_OUT6, label: 'P4_18/J8[23]'}
- {pin_num: R10, pin_signal: PIO4_19/TRIG_OUT5/CT3_MAT3/FLEXIO0_D27/PLU_OUT7/SINC0_MCLK_OUT1/OPAMP1_OUT/ADC0_B1/CMP1_IN4P, label: 'P4_19/J8[24]'}
- {pin_num: T10, pin_signal: PIO4_20/TRIG_IN8/FC2_P4/CT2_MAT0/FLEXIO0_D28/SINC0_MCLK2/OPAMP2_INP0/ADC1_A6, label: 'P4_20/SJ21[1]/J8[25]'}
- {pin_num: U10, pin_signal: OPAMP2_INN, label: 'OPAMP2_INN/RSHUNT_CURC_N/SJ20[1]'}
- {pin_num: B11, pin_signal: PIO0_11/CT0_MAT1/FLEXIO0_D3/HSCMP2_OUT/ADC0_B11, label: 'P0_11/J9[18]'}
- {pin_num: D11, pin_signal: PIO0_12/FC1_P4/FC0_P0/CT0_MAT2/FLEXIO0_D4/ADC0_B12, label: 'P0_12/J8[9]'}
- {pin_num: E11, pin_signal: PIO0_14/FC1_P6/FC0_P2/CT_INP2/UTICK_CAP0/FLEXIO0_D6/ADC0_B14, label: 'P0_14/J4[6]/SJ19[3]'}
- {pin_num: G11, pin_signal: VDD_P30, label: VDD_P3}
- {pin_num: L11, pin_signal: VDD_CORE, label: 'VDD_CORE/L2[2]'}
- {pin_num: N11, pin_signal: PIO5_3/TRIG_IN11/RTC_CLKOUT/TAMPER1/ADC1_B11, label: 'P5_3/SJ18[1]'}
- {pin_num: P11, pin_signal: USB1_ID, label: 'HS_USB_ID/Q1[2]'}
- {pin_num: T11, pin_signal: PIO4_21/TRIG_IN9/FC2_P5/CT2_MAT1/FLEXIO0_D29/SINC0_MBIT2/OPAMP2_INP1/ADC1_B6, label: 'P4_21/J8[26]'}
- {pin_num: A12, pin_signal: PIO0_9/FC0_P5/CT_INP1/FLEXIO0_D1/ADC0_B9, label: 'P0_9/J8[10]'}
- {pin_num: B12, pin_signal: PIO0_10/FC0_P6/CT0_MAT0/FLEXIO0_D2/ADC0_B10, label: 'P0_10/SJ5[1]', identifier: LED_RED}
- {pin_num: C12, pin_signal: PIO0_8/FC0_P4/CT_INP0/FLEXIO0_D0/ADC0_B8, label: 'P0_8/J8[11]'}
- {pin_num: D9, pin_signal: VSS6, label: GND}
- {pin_num: F12, pin_signal: PIO0_13/FC1_P5/FC0_P1/CT0_MAT3/FLEXIO0_D5/ADC0_B13, label: 'P0_13/J8[12]'}
- {pin_num: H12, pin_signal: VDD_P42, label: VDD_P3}
- {pin_num: K12, pin_signal: PIO5_5/TRIG_IN10/LPTMR0_ALT2/TAMPER3/ADC1_B13, label: 'P5_5/SJ17[3]'}
- {pin_num: M12, pin_signal: PIO5_4/TRIG_OUT7/SPC_LPREQ/TAMPER2/ADC1_B12, label: 'P5_4/J2[7]'}
- {pin_num: P14, pin_signal: VDD3, label: GND}
- {pin_num: R12, pin_signal: VDD_USB, label: VDD_USB}
- {pin_num: T12, pin_signal: PIO4_22/CT2_MAT2/FLEXIO0_D30, label: 'P4_22/J8[27]'}
- {pin_num: U12, pin_signal: PIO4_23/TRIG_OUT5/FC2_P6/CT2_MAT3/FLEXIO0_D31/SINC0_MCLK_OUT2/OPAMP2_OUT/ADC0_A2/ADC0_B2/ADC1_B3/CMP2_IN4P, label: 'P4_23/J8[28]'}
- {pin_num: C13, pin_signal: PIO0_7/WUU0_IN1/FC0_P3/CT_INP3/CMP2_IN1, label: 'P0_7/J8[8]'}
- {pin_num: D12, pin_signal: VSS7, label: GND}
- {pin_num: G13, pin_signal: PIO0_15/FC0_P3/CT_INP3/UTICK_CAP1/FLEXIO0_D7/ADC0_B15, label: 'P0_15/SJ8[1]'}
- {pin_num: H9, pin_signal: VSS9, label: GND}
- {pin_num: K13, pin_signal: PIO5_6/TRIG_OUT6/LPTMR1_ALT2/TAMPER4/ADC1_B14, label: 'P5_6/SJ13[1]'}
- {pin_num: L13, pin_signal: PIO5_7/TRIG_IN11/TAMPER5/ADC1_B15, label: 'P5_7/J5[2]'}
- {pin_num: R13, pin_signal: USB1_DP, label: 'MCX_USB1_DP/L13[3]'}
- {pin_num: A14, pin_signal: PIO0_5/EWM0_OUT_b/FC0_P1/FC1_P5/CT0_MAT3/UTICK_CAP3/PDM0_DATA0/TSI0_CH9, label: 'P0_5/SJ13[3]/J9[15]/SJ21[3]'}
- {pin_num: B14, pin_signal: PIO0_4/WUU0_IN0/EWM0_IN/FC0_P0/FC1_P4/CT0_MAT2/UTICK_CAP2/HSCMP1_OUT/PDM0_CLK/TSI0_CH8, label: 'P0_4/SJ12[3]/J9[17]/SJ22[3]'}
- {pin_num: C14, pin_signal: PIO0_6/ISPMODE_N/FC0_P2/FC1_P6/CT_INP2/HSCMP2_OUT/PDM0_DATA1/CLKOUT/TSI0_CH10, label: 'P0_6/J23[7]/SW3[3]/SW3[4]', identifier: SW3}
- {pin_num: D14, pin_signal: PIO3_7/FC6_P6/FC7_P1/CT4_MAT3/PWM0_B1/FLEXIO0_D15/FLEXSPI0_A_SCLK/SIM0_VCCEN/SAI0_MCLK, label: 'P3_7/TP18/U8[6]/U7[B2]'}
- {pin_num: E14, pin_signal: PIO3_8/WUU0_IN23/FC6_P4/FC7_P0/CT_INP4/PWM0_A2/FLEXIO0_D16/FLEXSPI0_A_DATA0/SIM0_PD/SAI0_TX_BCLK, label: 'P3_8/TP16/U8[5]/U7[D3]'}
- {pin_num: F14, pin_signal: PIO3_4/FC7_P2/CT_INP18/PWM0_X2/FLEXIO0_D12/SIM1_CLK, label: 'P3_4/J9[12]'}
- {pin_num: G14, pin_signal: PIO3_5/FC7_P3/CT_INP19/PWM0_X3/FLEXIO0_D13/SIM1_IO, label: 'P3_5/J9[11]'}
- {pin_num: J10, pin_signal: VSS12, label: GND}
- {pin_num: L14, pin_signal: PIO5_8/TRIG_OUT7/TAMPER6/ADC1_B16, label: 'P5_8/U9[19]/J9[31]'}
- {pin_num: M14, pin_signal: PIO5_9/TAMPER7/ADC1_B17, label: 'P5_9/J9[29]'}
- {pin_num: N14, pin_signal: VDD_SYS, label: VDD_SYS}
- {pin_num: T16, pin_signal: VDD4, label: GND}
- {pin_num: R14, pin_signal: USB1_DM, label: 'MCX_USB1_DM/L13[2]'}
- {pin_num: T14, pin_signal: USB0_DM/WUU0_IN28, label: TP2}
- {pin_num: U14, pin_signal: USB1_VBUS, label: MCX_USB1_VBUS}
- {pin_num: B15, pin_signal: PIO0_3/TDI/FC1_P3/CT0_MAT1/UTICK_CAP1/HSCMP0_OUT/CMP1_IN1, label: 'P0_3/J23[8]/D16[3]/SJ17[1]'}
- {pin_num: C15, pin_signal: PIO3_1/TRIG_IN1/FC6_P0/FC7_P6/CT_INP17/PWM0_B0/FLEXIO0_D9/FLEXSPI0_A_SS1_b/FREQME_CLK_OUT0, label: P3_1/TP31}
- {pin_num: D15, pin_signal: PIO3_2/FC7_P0/CT4_MAT0/PWM0_X0/FLEXIO0_D10/SIM1_PD, label: 'P3_2/J9[20]/J7[8]'}
- {pin_num: F15, pin_signal: PIO3_9/FC6_P5/FC7_P2/CT_INP5/PWM0_B2/FLEXIO0_D17/FLEXSPI0_A_DATA1/SIM0_RST/SAI0_TX_FS, label: 'P3_9/TP15/U8[2]/U7[D2]'}
- {pin_num: H15, pin_signal: PIO3_15/FC8_P1/CT_INP7/PWM1_B1/FLEXIO0_D23/FLEXSPI0_A_DATA7/SAI0_RX_FS, label: 'P3_15/TP9/U7[E1]'}
- {pin_num: J15, pin_signal: PIO3_16/FC8_P2/CT_INP8/PWM1_A2/FLEXIO0_D24/SIM0_CLK/SAI1_TX_BCLK, label: 'P3_16/SJ11[1]'}
- {pin_num: K15, pin_signal: PIO3_17/WUU0_IN26/FC8_P3/CT_INP9/PWM1_B2/FLEXIO0_D25/SIM0_IO/SAI1_TX_FS, label: 'P3_17/J1[11]/SJ10[3]'}
- {pin_num: M15, pin_signal: PIO3_23/FC6_P3/CT_INP11/PWM1_X3/FLEXIO0_D31/SAI1_TXD1, label: 'P3_23/J6[3]'}
- {pin_num: P15, pin_signal: VDD_LDO_SYS/VOUT_SYS, label: VDD_LDO_SYS_IN}
- {pin_num: R15, pin_signal: VDD_DCDC, label: VDD_DCDC}
- {pin_num: T15, pin_signal: USB0_DP/WUU0_IN29, label: TP3}
- {pin_num: A16, pin_signal: PIO0_1/TCLK/SWCLK/FC1_P1/CT_INP1, label: 'P0_1/SWCLK/J23[4]/D16[5]/J22[2]', identifier: DEBUG_SWD_SWDCLK}
- {pin_num: B16, pin_signal: PIO0_2/TDO/SWO/FC1_P2/CT0_MAT0/UTICK_CAP0/I3C0_PUR, label: 'P0_2/SWO/J23[6]/D16[4]', identifier: DEBUG_SWD_SWO}
- {pin_num: D16, pin_signal: PIO3_3/FC7_P1/CT4_MAT1/PWM0_X1/FLEXIO0_D11/SIM1_RST, label: 'P3_3/J9[19]/SJ12[1]'}
- {pin_num: F16, pin_signal: PIO3_11/WUU0_IN24/FC6_P3/FC7_P5/CT1_MAT1/PWM0_B3/FLEXIO0_D19/FLEXSPI0_A_DATA3/SIM0_IO/SAI0_RXD0, label: 'P3_11/TP14/U8[7]/U7[D4]'}
- {pin_num: G16, pin_signal: PIO3_12/FC7_P4/FC6_P4/CT1_MAT2/PWM1_A0/FLEXIO0_D20/FLEXSPI0_A_DATA4/SAI0_RXD1, label: 'P3_12/TP17/U7[D5]'}
- {pin_num: H16, pin_signal: PIO3_13/FC7_P5/FC6_P5/CT1_MAT3/PWM1_B0/FLEXIO0_D21/FLEXSPI0_A_DATA5/SAI0_TXD1, label: 'P3_13/TP11/U7[E3]'}
- {pin_num: K16, pin_signal: PIO3_18/FC6_P6/CT2_MAT0/PWM1_X0/FLEXIO0_D26/SAI1_RX_BCLK, label: 'P3_18/J1[9]'}
- {pin_num: L16, pin_signal: PIO3_21/TRIG_OUT1/FC8_P5/FC6_P1/CT2_MAT3/PWM1_B3/FLEXIO0_D29/SIM0_RST/SAI1_RXD0, label: 'P3_21/J6[4]/J1[15]'}
- {pin_num: M16, pin_signal: PIO3_22/FC8_P6/FC6_P2/CT_INP10/PWM1_X2/FLEXIO0_D30/SIM0_VCCEN/SAI1_RXD1, label: 'P3_22/J6[5]'}
- {pin_num: P16, pin_signal: VSS_DCDC, label: GND}
- {pin_num: U16, pin_signal: PIO5_0/TRIG_IN10/LPTMR0_ALT2/EXTAL32K/ADC1_B8, label: 'P5_0/EXTAL32K/Y2[2]'}
- {pin_num: A17, pin_signal: PIO0_0/TMS/SWDIO/FC1_P0/CT_INP0, label: 'P0_0/SWDIO/J23[2]/D16[6]', identifier: DEBUG_SWD_SWDIO}
- {pin_num: B17, pin_signal: PIO3_0/WUU0_IN22/TRIG_IN0/FC7_P3/CT_INP16/PWM0_A0/FLEXIO0_D8/FLEXSPI0_A_SS0_b, label: 'P3_0/TP12/U8[1]/U7[C2]/U7[A3]'}
- {pin_num: D17, pin_signal: PIO3_6/CLKOUT/FC6_P1/CT4_MAT2/PWM0_A1/FLEXIO0_D14/FLEXSPI0_A_DQS/SIM1_VCCEN/SAI1_MCLK/FREQME_CLK_OUT1, label: 'P3_6/TP8/U7[C3]'}
- {pin_num: F17, pin_signal: PIO3_10/FC6_P2/FC7_P4/CT1_MAT0/PWM0_A3/FLEXIO0_D18/FLEXSPI0_A_DATA2/SIM0_CLK/SAI0_TXD0, label: 'P3_10/TP13/U8[3]/U7[C4]'}
- {pin_num: H17, pin_signal: PIO3_14/WUU0_IN25/FC8_P0/CT_INP6/PWM1_A1/FLEXIO0_D22/FLEXSPI0_A_DATA6/SAI0_RX_BCLK, label: 'P3_14/TP10/U7[E2]'}
- {pin_num: K17, pin_signal: PIO3_19/FC7_P6/CT2_MAT1/PWM1_X1/FLEXIO0_D27/SAI1_RX_FS, label: 'P3_19/J5[1]/J1[13]'}
- {pin_num: M17, pin_signal: PIO3_20/WUU0_IN27/TRIG_OUT0/FC8_P4/FC6_P0/CT2_MAT2/PWM1_A3/FLEXIO0_D28/SIM0_PD/SAI1_TXD0, label: 'P3_20/J6[6]/J1[5]'}
- {pin_num: P17, pin_signal: DCDC_LX, label: DCDC_LX}
- {pin_num: T17, pin_signal: VDD_BAT, label: 'VDD_BAT/J27[2]'}
- {pin_num: U17, pin_signal: PIO5_1/TRIG_OUT6/LPTMR1_ALT2/XTAL32K/ADC1_B9, label: 'P5_1/XTAL32K/Y2[1]'}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
#include "fsl_common.h"
#include "fsl_port.h"
#include "fsl_gpio.h"
#include "pin_mux.h"
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBootPins
* Description : Calls initialization functions.
*
* END ****************************************************************************************************************/
void BOARD_InitBootPins(void)
{
BOARD_InitDEBUG_UARTPins();
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitDEBUG_UARTPins:
- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: A1, peripheral: LP_FLEXCOMM4, signal: LPFLEXCOMM_P0, pin_signal: PIO1_8/WUU0_IN10/LPTMR1_ALT3/TRACE_DATA0/FC4_P0/FC5_P4/CT_INP8/SCT0_OUT2/FLEXIO0_D16/PLU_OUT0/ENET0_TXD2/I3C1_SDA/TSI0_CH17/ADC1_A8,
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, pull_value: low, input_buffer: enable,
invert_input: normal}
- {pin_num: B1, peripheral: LP_FLEXCOMM4, signal: LPFLEXCOMM_P1, pin_signal: PIO1_9/TRACE_DATA1/FC4_P1/FC5_P5/CT_INP9/SCT0_OUT3/FLEXIO0_D17/PLU_OUT1/ENET0_TXD3/I3C1_SCL/TSI0_CH18/ADC1_A9,
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitDEBUG_UARTPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitDEBUG_UARTPins(void)
{
/* Enables the clock for PORT1: Enables clock */
CLOCK_EnableClock(kCLOCK_Port1);
const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as FC4_P0 */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT1_8 (pin A1) is configured as FC4_P0 */
PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as FC4_P1 */
kPORT_MuxAlt2,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT1_9 (pin B1) is configured as FC4_P1 */
PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitSWD_DEBUGPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: A16, peripheral: SWD, signal: SWCLK, pin_signal: PIO0_1/TCLK/SWCLK/FC1_P1/CT_INP1, slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down,
pull_enable: enable, input_buffer: enable, invert_input: normal}
- {pin_num: A17, peripheral: SWD, signal: SWDIO, pin_signal: PIO0_0/TMS/SWDIO/FC1_P0/CT_INP0, slew_rate: fast, open_drain: disable, drive_strength: high, pull_select: up,
pull_enable: enable, input_buffer: enable, invert_input: normal}
- {pin_num: B16, peripheral: SWD, signal: SWO, pin_signal: PIO0_2/TDO/SWO/FC1_P2/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable, drive_strength: high,
pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitSWD_DEBUGPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitSWD_DEBUGPins(void)
{
/* Enables the clock for PORT0 controller: Enables clock */
CLOCK_EnableClock(kCLOCK_Port0);
const port_pin_config_t DEBUG_SWD_SWDIO = {/* Internal pull-up resistor is enabled */
kPORT_PullUp,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* High drive strength is configured */
kPORT_HighDriveStrength,
/* Pin is configured as SWDIO */
kPORT_MuxAlt1,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_0 (pin A17) is configured as SWDIO */
PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, &DEBUG_SWD_SWDIO);
const port_pin_config_t DEBUG_SWD_SWDCLK = {/* Internal pull-down resistor is enabled */
kPORT_PullDown,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as SWCLK */
kPORT_MuxAlt1,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_1 (pin A16) is configured as SWCLK */
PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, &DEBUG_SWD_SWDCLK);
const port_pin_config_t DEBUG_SWD_SWO = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* High drive strength is configured */
kPORT_HighDriveStrength,
/* Pin is configured as SWO */
kPORT_MuxAlt1,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_2 (pin B16) is configured as SWO */
PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, &DEBUG_SWD_SWO);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitLEDsPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: C4, peripheral: GPIO1, signal: 'GPIO, 2', pin_signal: PIO1_2/TRIG_OUT0/FC3_P2/FC4_P6/CT1_MAT0/SCT0_IN6/FLEXIO0_D10/ENET0_MDC/SAI1_TXD0/CAN0_TXD/TSI0_CH2/ADC0_A18/CMP2_IN0,
direction: OUTPUT, slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
- {pin_num: B12, peripheral: GPIO0, signal: 'GPIO, 10', pin_signal: PIO0_10/FC0_P6/CT0_MAT0/FLEXIO0_D2/ADC0_B10, direction: OUTPUT, slew_rate: fast, open_drain: disable,
drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
- {pin_num: E10, peripheral: GPIO0, signal: 'GPIO, 27', pin_signal: PIO0_27/FC1_P3/CT0_MAT3/ADC0_B19, direction: OUTPUT, slew_rate: fast, open_drain: disable, drive_strength: low,
pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitLEDsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitLEDsPins(void)
{
/* Enables the clock for GPIO0: Enables clock */
CLOCK_EnableClock(kCLOCK_Gpio0);
/* Enables the clock for GPIO1: Enables clock */
CLOCK_EnableClock(kCLOCK_Gpio1);
/* Enables the clock for PORT0 controller: Enables clock */
CLOCK_EnableClock(kCLOCK_Port0);
/* Enables the clock for PORT1: Enables clock */
CLOCK_EnableClock(kCLOCK_Port1);
gpio_pin_config_t LED_RED_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_10 (pin B12) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
gpio_pin_config_t LED_GREEN_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_27 (pin E10) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
gpio_pin_config_t LED_BLUE_config = {
.pinDirection = kGPIO_DigitalOutput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO1_2 (pin C4) */
GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO0_10 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_10 (pin B12) is configured as PIO0_10 */
PORT_SetPinConfig(BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED);
const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO0_27 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_27 (pin E10) is configured as PIO0_27 */
PORT_SetPinConfig(BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN);
const port_pin_config_t LED_BLUE = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO1_2 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT1_2 (pin C4) is configured as PIO1_2 */
PORT_SetPinConfig(BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE);
}
/* clang-format off */
/*
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
BOARD_InitBUTTONsPins:
- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
- pin_list:
- {pin_num: C14, peripheral: GPIO0, signal: 'GPIO, 6', pin_signal: PIO0_6/ISPMODE_N/FC0_P2/FC1_P6/CT_INP2/HSCMP2_OUT/PDM0_DATA1/CLKOUT/TSI0_CH10, direction: INPUT,
slew_rate: fast, open_drain: disable, drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- {pin_num: B7, peripheral: GPIO0, signal: 'GPIO, 23', pin_signal: PIO0_23/WUU0_IN5/EWM0_OUT_b/FC1_P3/CT_INP3/FLEXIO0_D7/ADC0_A15/CMP2_IN2, direction: INPUT, slew_rate: fast,
open_drain: disable, drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
*/
/* clang-format on */
/* FUNCTION ************************************************************************************************************
*
* Function Name : BOARD_InitBUTTONsPins
* Description : Configures pin routing and optionally pin electrical features.
*
* END ****************************************************************************************************************/
void BOARD_InitBUTTONsPins(void)
{
/* Enables the clock for GPIO0: Enables clock */
CLOCK_EnableClock(kCLOCK_Gpio0);
/* Enables the clock for PORT0 controller: Enables clock */
CLOCK_EnableClock(kCLOCK_Port0);
gpio_pin_config_t SW3_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_6 (pin C14) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_SW3_GPIO, BOARD_INITBUTTONSPINS_SW3_PIN, &SW3_config);
gpio_pin_config_t SW2_config = {
.pinDirection = kGPIO_DigitalInput,
.outputLogic = 0U
};
/* Initialize GPIO functionality on pin PIO0_23 (pin B7) */
GPIO_PinInit(BOARD_INITBUTTONSPINS_SW2_GPIO, BOARD_INITBUTTONSPINS_SW2_PIN, &SW2_config);
const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */
kPORT_PullDisable,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO0_23 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_23 (pin B7) is configured as PIO0_23 */
PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW2_PORT, BOARD_INITBUTTONSPINS_SW2_PIN, &SW2);
const port_pin_config_t SW3 = {/* Internal pull-up resistor is enabled */
kPORT_PullUp,
/* Low internal pull resistor value is selected. */
kPORT_LowPullResistor,
/* Fast slew rate is configured */
kPORT_FastSlewRate,
/* Passive input filter is disabled */
kPORT_PassiveFilterDisable,
/* Open drain output is disabled */
kPORT_OpenDrainDisable,
/* Low drive strength is configured */
kPORT_LowDriveStrength,
/* Pin is configured as PIO0_6 */
kPORT_MuxAlt0,
/* Digital input enabled */
kPORT_InputBufferEnable,
/* Digital input is not inverted */
kPORT_InputNormal,
/* Pin Control Register fields [15:0] are not locked */
kPORT_UnlockRegister};
/* PORT0_6 (pin C14) is configured as PIO0_6 */
PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW3_PORT, BOARD_INITBUTTONSPINS_SW3_PIN, &SW3);
}
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/
@@ -1,184 +0,0 @@
/*
* Copyright 2022-2023 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_
/*!
* @addtogroup pin_mux
* @{
*/
/***********************************************************************************************************************
* API
**********************************************************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif
/*!
* @brief Calls initialization functions.
*
*/
void BOARD_InitBootPins(void);
/*! @name PORT1_8 (coord A1), P1_8/J9[32]
@{ */
/* Symbols to be used with PORT driver */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT PORT1 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 8U /*!<@brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 8U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT1_9 (coord B1), P1_9/J9[30]
@{ */
/* Symbols to be used with PORT driver */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT PORT1 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 9U /*!<@brief PORT pin number */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 9U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitDEBUG_UARTPins(void);
/*! @name PORT0_1 (coord A16), P0_1/SWCLK/J23[4]/D16[5]/J22[2]
@{ */
/* Symbols to be used with PORT driver */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 1U /*!<@brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT0_0 (coord A17), P0_0/SWDIO/J23[2]/D16[6]
@{ */
/* Symbols to be used with PORT driver */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 0U /*!<@brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT0_2 (coord B16), P0_2/SWO/J23[6]/D16[4]
@{ */
/* Symbols to be used with PORT driver */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 2U /*!<@brief PORT pin number */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitSWD_DEBUGPins(void);
/*! @name PORT1_2 (coord C4), P1_2/SJ4[1]
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO1 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 2U /*!<@brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 2U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITLEDSPINS_LED_BLUE_PORT PORT1 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN 2U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT0_10 (coord B12), P0_10/SJ5[1]
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO0 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 10U /*!<@brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 10U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITLEDSPINS_LED_RED_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_RED_PIN 10U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 10U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT0_27 (coord E10), P0_27/SJ6[1]
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO0 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 27U /*!<@brief GPIO pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 27U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITLEDSPINS_LED_GREEN_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN 27U /*!<@brief PORT pin number */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 27U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitLEDsPins(void);
/*! @name PORT0_6 (coord C14), P0_6/J23[7]/SW3[3]/SW3[4]
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITBUTTONSPINS_SW3_GPIO GPIO0 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN 6U /*!<@brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITBUTTONSPINS_SW3_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITBUTTONSPINS_SW3_PIN 6U /*!<@brief PORT pin number */
#define BOARD_INITBUTTONSPINS_SW3_PIN_MASK (1U << 6U) /*!<@brief PORT pin mask */
/* @} */
/*! @name PORT0_23 (coord B7), P0_23/SJ9[1]/SW2[3]/SW2[4]
@{ */
/* Symbols to be used with GPIO driver */
#define BOARD_INITBUTTONSPINS_SW2_GPIO GPIO0 /*!<@brief GPIO peripheral base pointer */
#define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN 23U /*!<@brief GPIO pin number */
#define BOARD_INITBUTTONSPINS_SW2_GPIO_PIN_MASK (1U << 23U) /*!<@brief GPIO pin mask */
/* Symbols to be used with PORT driver */
#define BOARD_INITBUTTONSPINS_SW2_PORT PORT0 /*!<@brief PORT peripheral base pointer */
#define BOARD_INITBUTTONSPINS_SW2_PIN 23U /*!<@brief PORT pin number */
#define BOARD_INITBUTTONSPINS_SW2_PIN_MASK (1U << 23U) /*!<@brief PORT pin mask */
/* @} */
/*!
* @brief Configures pin routing and optionally pin electrical features.
*
*/
void BOARD_InitBUTTONsPins(void);
#if defined(__cplusplus)
}
#endif
/*!
* @}
*/
#endif /* _PIN_MUX_H_ */
/***********************************************************************************************************************
* EOF
**********************************************************************************************************************/
@@ -1,499 +0,0 @@
/*
* Copyright 2018-2019, 2022 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*! *********************************************************************************
*************************************************************************************
* Include
*************************************************************************************
********************************************************************************** */
#include "fsl_component_generic_list.h"
#if defined(OSA_USED)
#include "fsl_os_abstraction.h"
#if (defined(USE_RTOS) && (USE_RTOS > 0U))
#define LIST_ENTER_CRITICAL() \
OSA_SR_ALLOC(); \
OSA_ENTER_CRITICAL()
#define LIST_EXIT_CRITICAL() OSA_EXIT_CRITICAL()
#else
#define LIST_ENTER_CRITICAL() uint32_t regPrimask = DisableGlobalIRQ();
#define LIST_EXIT_CRITICAL() EnableGlobalIRQ(regPrimask);
#endif
#else
#define LIST_ENTER_CRITICAL() uint32_t regPrimask = DisableGlobalIRQ();
#define LIST_EXIT_CRITICAL() EnableGlobalIRQ(regPrimask);
#endif
static list_status_t LIST_Error_Check(list_handle_t list, list_element_handle_t newElement)
{
list_status_t listStatus = kLIST_Ok;
#if (defined(GENERIC_LIST_DUPLICATED_CHECKING) && (GENERIC_LIST_DUPLICATED_CHECKING > 0U))
list_element_handle_t element = list->head;
#endif
if ((list->max != 0U) && (list->max == list->size))
{
listStatus = kLIST_Full; /*List is full*/
}
#if (defined(GENERIC_LIST_DUPLICATED_CHECKING) && (GENERIC_LIST_DUPLICATED_CHECKING > 0U))
else
{
while (element != NULL) /*Scan list*/
{
/* Determine if element is duplicated */
if (element == newElement)
{
listStatus = kLIST_DuplicateError;
break;
}
element = element->next;
}
}
#endif
return listStatus;
}
/*! *********************************************************************************
*************************************************************************************
* Public functions
*************************************************************************************
********************************************************************************** */
/*! *********************************************************************************
* \brief Initializes the list descriptor.
*
* \param[in] list - LIST_ handle to init.
* max - Maximum number of elements in list. 0 for unlimited.
*
* \return void.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
void LIST_Init(list_handle_t list, uint32_t max)
{
list->head = NULL;
list->tail = NULL;
list->max = max;
list->size = 0;
}
/*! *********************************************************************************
* \brief Gets the list that contains the given element.
*
* \param[in] element - Handle of the element.
*
* \return NULL if element is orphan.
* Handle of the list the element is inserted into.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_handle_t LIST_GetList(list_element_handle_t listElement)
{
return listElement->list;
}
/*! *********************************************************************************
* \brief Links element to the tail of the list.
*
* \param[in] list - ID of list to insert into.
* element - element to add
*
* \return kLIST_Full if list is full.
* kLIST_Ok if insertion was successful.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_status_t LIST_AddTail(list_handle_t list, list_element_handle_t listElement)
{
LIST_ENTER_CRITICAL();
list_status_t listStatus = kLIST_Ok;
listStatus = LIST_Error_Check(list, listElement);
if (listStatus == kLIST_Ok) /* Avoiding list status error */
{
if (list->size == 0U)
{
list->head = listElement;
}
else
{
list->tail->next = listElement;
}
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
#else
listElement->prev = list->tail;
#endif
listElement->list = list;
listElement->next = NULL;
list->tail = listElement;
list->size++;
}
LIST_EXIT_CRITICAL();
return listStatus;
}
/*! *********************************************************************************
* \brief Links element to the head of the list.
*
* \param[in] list - ID of list to insert into.
* element - element to add
*
* \return kLIST_Full if list is full.
* kLIST_Ok if insertion was successful.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_status_t LIST_AddHead(list_handle_t list, list_element_handle_t listElement)
{
LIST_ENTER_CRITICAL();
list_status_t listStatus = kLIST_Ok;
listStatus = LIST_Error_Check(list, listElement);
if (listStatus == kLIST_Ok) /* Avoiding list status error */
{
/* Links element to the head of the list */
if (list->size == 0U)
{
list->tail = listElement;
}
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
#else
else
{
list->head->prev = listElement;
}
listElement->prev = NULL;
#endif
listElement->list = list;
listElement->next = list->head;
list->head = listElement;
list->size++;
}
LIST_EXIT_CRITICAL();
return listStatus;
}
/*! *********************************************************************************
* \brief Unlinks element from the head of the list.
*
* \param[in] list - ID of list to remove from.
*
* \return NULL if list is empty.
* ID of removed element(pointer) if removal was successful.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_element_handle_t LIST_RemoveHead(list_handle_t list)
{
list_element_handle_t listElement;
LIST_ENTER_CRITICAL();
if ((NULL == list) || (list->size == 0U))
{
listElement = NULL; /*LIST_ is empty*/
}
else
{
listElement = list->head;
list->size--;
if (list->size == 0U)
{
list->tail = NULL;
}
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
#else
else
{
listElement->next->prev = NULL;
}
#endif
listElement->list = NULL;
list->head = listElement->next; /*Is NULL if element is head*/
}
LIST_EXIT_CRITICAL();
return listElement;
}
/*! *********************************************************************************
* \brief Gets head element ID.
*
* \param[in] list - ID of list.
*
* \return NULL if list is empty.
* ID of head element if list is not empty.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_element_handle_t LIST_GetHead(list_handle_t list)
{
return list->head;
}
/*! *********************************************************************************
* \brief Gets next element ID.
*
* \param[in] element - ID of the element.
*
* \return NULL if element is tail.
* ID of next element if exists.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_element_handle_t LIST_GetNext(list_element_handle_t listElement)
{
return listElement->next;
}
/*! *********************************************************************************
* \brief Gets previous element ID.
*
* \param[in] element - ID of the element.
*
* \return NULL if element is head.
* ID of previous element if exists.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_element_handle_t LIST_GetPrev(list_element_handle_t listElement)
{
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
return NULL;
#else
return listElement->prev;
#endif
}
/*! *********************************************************************************
* \brief Unlinks an element from its list.
*
* \param[in] element - ID of the element to remove.
*
* \return kLIST_OrphanElement if element is not part of any list.
* kLIST_Ok if removal was successful.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_status_t LIST_RemoveElement(list_element_handle_t listElement)
{
list_status_t listStatus = kLIST_Ok;
LIST_ENTER_CRITICAL();
if (listElement->list == NULL)
{
listStatus = kLIST_OrphanElement; /*Element was previusly removed or never added*/
}
else
{
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
list_element_handle_t element_list = listElement->list->head;
list_element_handle_t element_Prev = NULL;
while (NULL != element_list)
{
if (listElement->list->head == listElement)
{
listElement->list->head = element_list->next;
break;
}
if (element_list->next == listElement)
{
element_Prev = element_list;
element_list->next = listElement->next;
break;
}
element_list = element_list->next;
}
if (listElement->next == NULL)
{
listElement->list->tail = element_Prev;
}
#else
if (listElement->prev == NULL) /*Element is head or solo*/
{
listElement->list->head = listElement->next; /*is null if solo*/
}
if (listElement->next == NULL) /*Element is tail or solo*/
{
listElement->list->tail = listElement->prev; /*is null if solo*/
}
if (listElement->prev != NULL) /*Element is not head*/
{
listElement->prev->next = listElement->next;
}
if (listElement->next != NULL) /*Element is not tail*/
{
listElement->next->prev = listElement->prev;
}
#endif
listElement->list->size--;
listElement->list = NULL;
}
LIST_EXIT_CRITICAL();
return listStatus;
}
/*! *********************************************************************************
* \brief Links an element in the previous position relative to a given member
* of a list.
*
* \param[in] element - ID of a member of a list.
* newElement - new element to insert before the given member.
*
* \return kLIST_OrphanElement if element is not part of any list.
* kLIST_Full if list is full.
* kLIST_Ok if insertion was successful.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
list_status_t LIST_AddPrevElement(list_element_handle_t listElement, list_element_handle_t newElement)
{
list_status_t listStatus = kLIST_Ok;
LIST_ENTER_CRITICAL();
if (listElement->list == NULL)
{
listStatus = kLIST_OrphanElement; /*Element was previusly removed or never added*/
}
else
{
listStatus = LIST_Error_Check(listElement->list, newElement);
if (listStatus == kLIST_Ok)
{
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
list_element_handle_t element_list = listElement->list->head;
while (NULL != element_list)
{
if ((element_list->next == listElement) || (element_list == listElement))
{
if (element_list == listElement)
{
listElement->list->head = newElement;
}
else
{
element_list->next = newElement;
}
newElement->list = listElement->list;
newElement->next = listElement;
listElement->list->size++;
break;
}
element_list = element_list->next;
}
#else
if (listElement->prev == NULL) /*Element is list head*/
{
listElement->list->head = newElement;
}
else
{
listElement->prev->next = newElement;
}
newElement->list = listElement->list;
listElement->list->size++;
newElement->next = listElement;
newElement->prev = listElement->prev;
listElement->prev = newElement;
#endif
}
}
LIST_EXIT_CRITICAL();
return listStatus;
}
/*! *********************************************************************************
* \brief Gets the current size of a list.
*
* \param[in] list - ID of the list.
*
* \return Current size of the list.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
uint32_t LIST_GetSize(list_handle_t list)
{
return list->size;
}
/*! *********************************************************************************
* \brief Gets the number of free places in the list.
*
* \param[in] list - ID of the list.
*
* \return Available size of the list.
*
* \pre
*
* \post
*
* \remarks
*
********************************************************************************** */
uint32_t LIST_GetAvailableSize(list_handle_t list)
{
return (list->max - list->size); /*Gets the number of free places in the list*/
}
@@ -1,219 +0,0 @@
/*
* Copyright 2018-2020, 2022 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _GENERIC_LIST_H_
#define _GENERIC_LIST_H_
#ifndef SDK_COMPONENT_DEPENDENCY_FSL_COMMON
#define SDK_COMPONENT_DEPENDENCY_FSL_COMMON (1U)
#endif
#if (defined(SDK_COMPONENT_DEPENDENCY_FSL_COMMON) && (SDK_COMPONENT_DEPENDENCY_FSL_COMMON > 0U))
#include "fsl_common.h"
#else
#endif
/*!
* @addtogroup GenericList
* @{
*/
/**********************************************************************************
* Include
***********************************************************************************/
/**********************************************************************************
* Public macro definitions
***********************************************************************************/
/*! @brief Definition to determine whether use list light. */
#ifndef GENERIC_LIST_LIGHT
#define GENERIC_LIST_LIGHT (1)
#endif
/*! @brief Definition to determine whether enable list duplicated checking. */
#ifndef GENERIC_LIST_DUPLICATED_CHECKING
#define GENERIC_LIST_DUPLICATED_CHECKING (0)
#endif
/**********************************************************************************
* Public type definitions
***********************************************************************************/
/*! @brief The list status */
#if (defined(SDK_COMPONENT_DEPENDENCY_FSL_COMMON) && (SDK_COMPONENT_DEPENDENCY_FSL_COMMON > 0U))
typedef enum _list_status
{
kLIST_Ok = kStatus_Success, /*!< Success */
kLIST_DuplicateError = MAKE_STATUS(kStatusGroup_LIST, 1), /*!< Duplicate Error */
kLIST_Full = MAKE_STATUS(kStatusGroup_LIST, 2), /*!< FULL */
kLIST_Empty = MAKE_STATUS(kStatusGroup_LIST, 3), /*!< Empty */
kLIST_OrphanElement = MAKE_STATUS(kStatusGroup_LIST, 4), /*!< Orphan Element */
kLIST_NotSupport = MAKE_STATUS(kStatusGroup_LIST, 5), /*!< Not Support */
} list_status_t;
#else
typedef enum _list_status
{
kLIST_Ok = 0, /*!< Success */
kLIST_DuplicateError = 1, /*!< Duplicate Error */
kLIST_Full = 2, /*!< FULL */
kLIST_Empty = 3, /*!< Empty */
kLIST_OrphanElement = 4, /*!< Orphan Element */
kLIST_NotSupport = 5, /*!< Not Support */
} list_status_t;
#endif
/*! @brief The list structure*/
typedef struct list_label
{
struct list_element_tag *head; /*!< list head */
struct list_element_tag *tail; /*!< list tail */
uint32_t size; /*!< list size */
uint32_t max; /*!< list max number of elements */
} list_label_t, *list_handle_t;
#if (defined(GENERIC_LIST_LIGHT) && (GENERIC_LIST_LIGHT > 0U))
/*! @brief The list element*/
typedef struct list_element_tag
{
struct list_element_tag *next; /*!< next list element */
struct list_label *list; /*!< pointer to the list */
} list_element_t, *list_element_handle_t;
#else
/*! @brief The list element*/
typedef struct list_element_tag
{
struct list_element_tag *next; /*!< next list element */
struct list_element_tag *prev; /*!< previous list element */
struct list_label *list; /*!< pointer to the list */
} list_element_t, *list_element_handle_t;
#endif
/**********************************************************************************
* Public prototypes
***********************************************************************************/
/**********************************************************************************
* API
**********************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* _cplusplus */
/*!
* @brief Initialize the list.
*
* This function initialize the list.
*
* @param list - List handle to initialize.
* @param max - Maximum number of elements in list. 0 for unlimited.
*/
void LIST_Init(list_handle_t list, uint32_t max);
/*!
* @brief Gets the list that contains the given element.
*
*
* @param listElement - Handle of the element.
* @retval NULL if element is orphan, Handle of the list the element is inserted into.
*/
list_handle_t LIST_GetList(list_element_handle_t listElement);
/*!
* @brief Links element to the head of the list.
*
* @param list - Handle of the list.
* @param listElement - Handle of the element.
* @retval kLIST_Full if list is full, kLIST_Ok if insertion was successful.
*/
list_status_t LIST_AddHead(list_handle_t list, list_element_handle_t listElement);
/*!
* @brief Links element to the tail of the list.
*
* @param list - Handle of the list.
* @param listElement - Handle of the element.
* @retval kLIST_Full if list is full, kLIST_Ok if insertion was successful.
*/
list_status_t LIST_AddTail(list_handle_t list, list_element_handle_t listElement);
/*!
* @brief Unlinks element from the head of the list.
*
* @param list - Handle of the list.
*
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
*/
list_element_handle_t LIST_RemoveHead(list_handle_t list);
/*!
* @brief Gets head element handle.
*
* @param list - Handle of the list.
*
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
*/
list_element_handle_t LIST_GetHead(list_handle_t list);
/*!
* @brief Gets next element handle for given element handle.
*
* @param listElement - Handle of the element.
*
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
*/
list_element_handle_t LIST_GetNext(list_element_handle_t listElement);
/*!
* @brief Gets previous element handle for given element handle.
*
* @param listElement - Handle of the element.
*
* @retval NULL if list is empty, handle of removed element(pointer) if removal was successful.
*/
list_element_handle_t LIST_GetPrev(list_element_handle_t listElement);
/*!
* @brief Unlinks an element from its list.
*
* @param listElement - Handle of the element.
*
* @retval kLIST_OrphanElement if element is not part of any list.
* @retval kLIST_Ok if removal was successful.
*/
list_status_t LIST_RemoveElement(list_element_handle_t listElement);
/*!
* @brief Links an element in the previous position relative to a given member of a list.
*
* @param listElement - Handle of the element.
* @param newElement - New element to insert before the given member.
*
* @retval kLIST_OrphanElement if element is not part of any list.
* @retval kLIST_Ok if removal was successful.
*/
list_status_t LIST_AddPrevElement(list_element_handle_t listElement, list_element_handle_t newElement);
/*!
* @brief Gets the current size of a list.
*
* @param list - Handle of the list.
*
* @retval Current size of the list.
*/
uint32_t LIST_GetSize(list_handle_t list);
/*!
* @brief Gets the number of free places in the list.
*
* @param list - Handle of the list.
*
* @retval Available size of the list.
*/
uint32_t LIST_GetAvailableSize(list_handle_t list);
/* @} */
#if defined(__cplusplus)
}
#endif
/*! @}*/
#endif /*_GENERIC_LIST_H_*/
@@ -1,856 +0,0 @@
/*
* Copyright 2018-2023 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SERIAL_MANAGER_H__
#define __SERIAL_MANAGER_H__
#include "fsl_common.h"
/*!
* @addtogroup serialmanager
* @{
*/
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief Enable or disable serial manager non-blocking mode (1 - enable, 0 - disable) */
#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE == 0U))
#error When SERIAL_MANAGER_NON_BLOCKING_MODE=0, DEBUG_CONSOLE_TRANSFER_NON_BLOCKING can not be set.
#else
#define SERIAL_MANAGER_NON_BLOCKING_MODE (1U)
#endif
#else
#ifndef SERIAL_MANAGER_NON_BLOCKING_MODE
#define SERIAL_MANAGER_NON_BLOCKING_MODE (0U)
#endif
#endif
/*! @brief Enable or ring buffer flow control (1 - enable, 0 - disable) */
#ifndef SERIAL_MANAGER_RING_BUFFER_FLOWCONTROL
#define SERIAL_MANAGER_RING_BUFFER_FLOWCONTROL (0U)
#endif
/*! @brief Enable or disable uart port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_UART
#define SERIAL_PORT_TYPE_UART (0U)
#endif
/*! @brief Enable or disable uart dma port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_UART_DMA
#define SERIAL_PORT_TYPE_UART_DMA (0U)
#endif
/*! @brief Enable or disable USB CDC port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_USBCDC
#define SERIAL_PORT_TYPE_USBCDC (0U)
#endif
/*! @brief Enable or disable SWO port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_SWO
#define SERIAL_PORT_TYPE_SWO (0U)
#endif
/*! @brief Enable or disable USB CDC virtual port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_VIRTUAL
#define SERIAL_PORT_TYPE_VIRTUAL (0U)
#endif
/*! @brief Enable or disable rPMSG port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_RPMSG
#define SERIAL_PORT_TYPE_RPMSG (0U)
#endif
/*! @brief Enable or disable SPI Master port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_SPI_MASTER
#define SERIAL_PORT_TYPE_SPI_MASTER (0U)
#endif
/*! @brief Enable or disable SPI Slave port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_SPI_SLAVE
#define SERIAL_PORT_TYPE_SPI_SLAVE (0U)
#endif
/*! @brief Enable or disable BLE WU port (1 - enable, 0 - disable) */
#ifndef SERIAL_PORT_TYPE_BLE_WU
#define SERIAL_PORT_TYPE_BLE_WU (0U)
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_SLAVE) && (SERIAL_PORT_TYPE_SPI_SLAVE == 1U))
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE == 0U))
#warning When SERIAL_PORT_TYPE_SPI_SLAVE=1, SERIAL_MANAGER_NON_BLOCKING_MODE should be set.
#undef SERIAL_MANAGER_NON_BLOCKING_MODE
#define SERIAL_MANAGER_NON_BLOCKING_MODE (1U)
#endif
#endif
/*! @brief Set the default delay time in ms used by SerialManager_WriteTimeDelay(). */
#ifndef SERIAL_MANAGER_WRITE_TIME_DELAY_DEFAULT_VALUE
#define SERIAL_MANAGER_WRITE_TIME_DELAY_DEFAULT_VALUE (1U)
#endif
/*! @brief Set the default delay time in ms used by SerialManager_ReadTimeDelay(). */
#ifndef SERIAL_MANAGER_READ_TIME_DELAY_DEFAULT_VALUE
#define SERIAL_MANAGER_READ_TIME_DELAY_DEFAULT_VALUE (1U)
#endif
/*! @brief Enable or disable SerialManager_Task() handle RX data available notify */
#ifndef SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY
#define SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY (0U)
#endif
#if (defined(SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY) && (SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY > 0U))
#ifndef OSA_USED
#error When SERIAL_MANAGER_TASK_HANDLE_RX_AVAILABLE_NOTIFY=1, OSA_USED must be set.
#endif
#endif
/*! @brief Set serial manager write handle size */
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#define SERIAL_MANAGER_WRITE_HANDLE_SIZE (44U)
#define SERIAL_MANAGER_READ_HANDLE_SIZE (44U)
#define SERIAL_MANAGER_WRITE_BLOCK_HANDLE_SIZE (4U)
#define SERIAL_MANAGER_READ_BLOCK_HANDLE_SIZE (4U)
#else
#define SERIAL_MANAGER_WRITE_HANDLE_SIZE (4U)
#define SERIAL_MANAGER_READ_HANDLE_SIZE (4U)
#define SERIAL_MANAGER_WRITE_BLOCK_HANDLE_SIZE (4U)
#define SERIAL_MANAGER_READ_BLOCK_HANDLE_SIZE (4U)
#endif
#if (defined(SERIAL_PORT_TYPE_UART) && (SERIAL_PORT_TYPE_UART > 0U))
#include "fsl_component_serial_port_uart.h"
#endif
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
#include "fsl_component_serial_port_uart.h"
#endif
#if (defined(SERIAL_PORT_TYPE_RPMSG) && (SERIAL_PORT_TYPE_RPMSG > 0U))
#include "fsl_component_serial_port_rpmsg.h"
#endif
#if (defined(SERIAL_PORT_TYPE_USBCDC) && (SERIAL_PORT_TYPE_USBCDC > 0U))
#if !(defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#error The serial manager blocking mode cannot be supported for USB CDC.
#endif
#include "fsl_component_serial_port_usb.h"
#endif
#if (defined(SERIAL_PORT_TYPE_SWO) && (SERIAL_PORT_TYPE_SWO > 0U))
#include "fsl_component_serial_port_swo.h"
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_MASTER) && (SERIAL_PORT_TYPE_SPI_MASTER > 0U))
#include "fsl_component_serial_port_spi.h"
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_SLAVE) && (SERIAL_PORT_TYPE_SPI_SLAVE > 0U))
#include "fsl_component_serial_port_spi.h"
#endif
#if (defined(SERIAL_PORT_TYPE_VIRTUAL) && (SERIAL_PORT_TYPE_VIRTUAL > 0U))
#if !(defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#error The serial manager blocking mode cannot be supported for USB CDC.
#endif
#include "fsl_component_serial_port_virtual.h"
#endif
#if (defined(SERIAL_PORT_TYPE_BLE_WU) && (SERIAL_PORT_TYPE_BLE_WU > 0U))
#if !(defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#error The serial manager blocking mode cannot be supported for BLE WU.
#endif /* SERIAL_MANAGER_NON_BLOCKING_MODE */
#include "fsl_component_serial_port_ble_wu.h"
#endif /* SERIAL_PORT_TYPE_BLE_WU */
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP 0U
#if (defined(SERIAL_PORT_TYPE_UART) && (SERIAL_PORT_TYPE_UART > 0U))
#if (SERIAL_PORT_UART_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_UART_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
#if (SERIAL_PORT_UART_DMA_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_UART_DMA_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_USBCDC) && (SERIAL_PORT_TYPE_USBCDC > 0U))
#if (SERIAL_PORT_USB_CDC_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_USB_CDC_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_SWO) && (SERIAL_PORT_TYPE_SWO > 0U))
#if (SERIAL_PORT_SWO_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_SWO_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_MASTER) && (SERIAL_PORT_TYPE_SPI_MASTER > 0U))
#if (SERIAL_PORT_SPI_MASTER_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_SPI_MASTER_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_SLAVE) && (SERIAL_PORT_TYPE_SPI_SLAVE > 0U))
#if (SERIAL_PORT_SPI_SLAVE_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_SPI_SLAVE_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_VIRTUAL) && (SERIAL_PORT_TYPE_VIRTUAL > 0U))
#if (SERIAL_PORT_VIRTUAL_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_VIRTUAL_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_RPMSG) && (SERIAL_PORT_TYPE_RPMSG > 0U))
#if (SERIAL_PORT_RPMSG_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_RPMSG_HANDLE_SIZE
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_BLE_WU) && (SERIAL_PORT_TYPE_BLE_WU > 0U))
#if (SERIAL_PORT_BLE_WU_HANDLE_SIZE > SERIAL_MANAGER_HANDLE_SIZE_TEMP)
#undef SERIAL_MANAGER_HANDLE_SIZE_TEMP
#define SERIAL_MANAGER_HANDLE_SIZE_TEMP SERIAL_PORT_BLE_WU_HANDLE_SIZE
#endif
#endif
/*! @brief SERIAL_PORT_UART_HANDLE_SIZE/SERIAL_PORT_USB_CDC_HANDLE_SIZE + serial manager dedicated size */
#if ((defined(SERIAL_MANAGER_HANDLE_SIZE_TEMP) && (SERIAL_MANAGER_HANDLE_SIZE_TEMP > 0U)))
#else
#error SERIAL_PORT_TYPE_UART, SERIAL_PORT_TYPE_USBCDC, SERIAL_PORT_TYPE_SWO, SERIAL_PORT_TYPE_VIRTUAL, and SERIAL_PORT_TYPE_BLE_WU should not be cleared at same time.
#endif
/*! @brief Macro to determine whether use common task. */
#ifndef SERIAL_MANAGER_USE_COMMON_TASK
#define SERIAL_MANAGER_USE_COMMON_TASK (0U)
#endif
#if defined(OSA_USED)
#if (defined(SERIAL_MANAGER_USE_COMMON_TASK) && (SERIAL_MANAGER_USE_COMMON_TASK > 0U))
#include "fsl_component_common_task.h"
#endif
/*! @brief Enable or disable SerialManager_Task() handle TX to prevent recursive calling */
#ifndef SERIAL_MANAGER_TASK_HANDLE_TX
#define SERIAL_MANAGER_TASK_HANDLE_TX (1U)
#endif
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#if (defined(OSA_USED) && !(defined(SERIAL_MANAGER_USE_COMMON_TASK) && (SERIAL_MANAGER_USE_COMMON_TASK > 0U)))
#include "fsl_os_abstraction.h"
#endif
#endif
/*! @brief Definition of serial manager handle size. */
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#if (defined(OSA_USED) && !(defined(SERIAL_MANAGER_USE_COMMON_TASK) && (SERIAL_MANAGER_USE_COMMON_TASK > 0U)))
#define SERIAL_MANAGER_HANDLE_SIZE \
(SERIAL_MANAGER_HANDLE_SIZE_TEMP + 124U + OSA_TASK_HANDLE_SIZE + OSA_EVENT_HANDLE_SIZE)
#else /*defined(OSA_USED)*/
#define SERIAL_MANAGER_HANDLE_SIZE (SERIAL_MANAGER_HANDLE_SIZE_TEMP + 124U)
#endif /*defined(OSA_USED)*/
#define SERIAL_MANAGER_BLOCK_HANDLE_SIZE (SERIAL_MANAGER_HANDLE_SIZE_TEMP + 16U)
#else
#define SERIAL_MANAGER_HANDLE_SIZE (SERIAL_MANAGER_HANDLE_SIZE_TEMP + 12U)
#define SERIAL_MANAGER_BLOCK_HANDLE_SIZE (SERIAL_MANAGER_HANDLE_SIZE_TEMP + 12U)
#endif
/*!
* @brief Defines the serial manager handle
*
* This macro is used to define a 4 byte aligned serial manager handle.
* Then use "(serial_handle_t)name" to get the serial manager handle.
*
* The macro should be global and could be optional. You could also define serial manager handle by yourself.
*
* This is an example,
* @code
* SERIAL_MANAGER_HANDLE_DEFINE(serialManagerHandle);
* @endcode
*
* @param name The name string of the serial manager handle.
*/
#define SERIAL_MANAGER_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
#define SERIAL_MANAGER_BLOCK_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_BLOCK_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
/*!
* @brief Defines the serial manager write handle
*
* This macro is used to define a 4 byte aligned serial manager write handle.
* Then use "(serial_write_handle_t)name" to get the serial manager write handle.
*
* The macro should be global and could be optional. You could also define serial manager write handle by yourself.
*
* This is an example,
* @code
* SERIAL_MANAGER_WRITE_HANDLE_DEFINE(serialManagerwriteHandle);
* @endcode
*
* @param name The name string of the serial manager write handle.
*/
#define SERIAL_MANAGER_WRITE_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_WRITE_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
#define SERIAL_MANAGER_WRITE_BLOCK_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_WRITE_BLOCK_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
/*!
* @brief Defines the serial manager read handle
*
* This macro is used to define a 4 byte aligned serial manager read handle.
* Then use "(serial_read_handle_t)name" to get the serial manager read handle.
*
* The macro should be global and could be optional. You could also define serial manager read handle by yourself.
*
* This is an example,
* @code
* SERIAL_MANAGER_READ_HANDLE_DEFINE(serialManagerReadHandle);
* @endcode
*
* @param name The name string of the serial manager read handle.
*/
#define SERIAL_MANAGER_READ_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_READ_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
#define SERIAL_MANAGER_READ_BLOCK_HANDLE_DEFINE(name) \
uint32_t name[((SERIAL_MANAGER_READ_BLOCK_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
/*! @brief Macro to set serial manager task priority. */
#ifndef SERIAL_MANAGER_TASK_PRIORITY
#define SERIAL_MANAGER_TASK_PRIORITY (2U)
#endif
/*! @brief Macro to set serial manager task stack size. */
#ifndef SERIAL_MANAGER_TASK_STACK_SIZE
#define SERIAL_MANAGER_TASK_STACK_SIZE (1000U)
#endif
/*! @brief The handle of the serial manager module */
typedef void *serial_handle_t;
/*! @brief The write handle of the serial manager module */
typedef void *serial_write_handle_t;
/*! @brief The read handle of the serial manager module */
typedef void *serial_read_handle_t;
#ifndef _SERIAL_PORT_T_
#define _SERIAL_PORT_T_
/*! @brief serial port type*/
typedef enum _serial_port_type
{
kSerialPort_None = 0U, /*!< Serial port is none */
kSerialPort_Uart = 1U, /*!< Serial port UART */
kSerialPort_UsbCdc, /*!< Serial port USB CDC */
kSerialPort_Swo, /*!< Serial port SWO */
kSerialPort_Virtual, /*!< Serial port Virtual */
kSerialPort_Rpmsg, /*!< Serial port RPMSG */
kSerialPort_UartDma, /*!< Serial port UART DMA*/
kSerialPort_SpiMaster, /*!< Serial port SPIMASTER*/
kSerialPort_SpiSlave, /*!< Serial port SPISLAVE*/
kSerialPort_BleWu, /*!< Serial port BLE WU */
} serial_port_type_t;
#endif
/*! @brief serial manager type*/
typedef enum _serial_manager_type
{
kSerialManager_NonBlocking = 0x0U, /*!< None blocking handle*/
kSerialManager_Blocking = 0x8F41U, /*!< Blocking handle*/
} serial_manager_type_t;
/*! @brief serial manager config structure*/
typedef struct _serial_manager_config
{
#if defined(SERIAL_MANAGER_NON_BLOCKING_MODE)
uint8_t *ringBuffer; /*!< Ring buffer address, it is used to buffer data received by the hardware.
Besides, the memory space cannot be free during the lifetime of the serial
manager module. */
uint32_t ringBufferSize; /*!< The size of the ring buffer */
#endif
serial_port_type_t type; /*!< Serial port type */
serial_manager_type_t blockType; /*!< Serial manager port type */
void *portConfig; /*!< Serial port configuration */
} serial_manager_config_t;
/*! @brief serial manager error code*/
typedef enum _serial_manager_status
{
kStatus_SerialManager_Success = kStatus_Success, /*!< Success */
kStatus_SerialManager_Error = MAKE_STATUS(kStatusGroup_SERIALMANAGER, 1), /*!< Failed */
kStatus_SerialManager_Busy = MAKE_STATUS(kStatusGroup_SERIALMANAGER, 2), /*!< Busy */
kStatus_SerialManager_Notify = MAKE_STATUS(kStatusGroup_SERIALMANAGER, 3), /*!< Ring buffer is not empty */
kStatus_SerialManager_Canceled =
MAKE_STATUS(kStatusGroup_SERIALMANAGER, 4), /*!< the non-blocking request is canceled */
kStatus_SerialManager_HandleConflict = MAKE_STATUS(kStatusGroup_SERIALMANAGER, 5), /*!< The handle is opened */
kStatus_SerialManager_RingBufferOverflow =
MAKE_STATUS(kStatusGroup_SERIALMANAGER, 6), /*!< The ring buffer is overflowed */
kStatus_SerialManager_NotConnected = MAKE_STATUS(kStatusGroup_SERIALMANAGER, 7), /*!< The host is not connected */
} serial_manager_status_t;
/*! @brief Callback message structure */
typedef struct _serial_manager_callback_message
{
uint8_t *buffer; /*!< Transferred buffer */
uint32_t length; /*!< Transferred data length */
} serial_manager_callback_message_t;
/*! @brief serial manager callback function */
typedef void (*serial_manager_callback_t)(void *callbackParam,
serial_manager_callback_message_t *message,
serial_manager_status_t status);
/*! @brief serial manager Lowpower Critical callback function */
typedef int32_t (*serial_manager_lowpower_critical_callback_t)(int32_t power_mode);
typedef struct _serial_manager_lowpower_critical_CBs_t
{
serial_manager_lowpower_critical_callback_t serialEnterLowpowerCriticalFunc;
serial_manager_lowpower_critical_callback_t serialExitLowpowerCriticalFunc;
} serial_manager_lowpower_critical_CBs_t;
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* _cplusplus */
/*!
* @brief Initializes a serial manager module with the serial manager handle and the user configuration structure.
*
* This function configures the Serial Manager module with user-defined settings.
* The user can configure the configuration structure.
* The parameter serialHandle is a pointer to point to a memory space of size #SERIAL_MANAGER_HANDLE_SIZE
* allocated by the caller.
* The Serial Manager module supports three types of serial port, UART (includes UART, USART, LPSCI, LPUART, etc), USB
* CDC and swo.
* Please refer to #serial_port_type_t for serial port setting.
* These three types can be set by using #serial_manager_config_t.
*
* Example below shows how to use this API to configure the Serial Manager.
* For UART,
* @code
* #define SERIAL_MANAGER_RING_BUFFER_SIZE (256U)
* static SERIAL_MANAGER_HANDLE_DEFINE(s_serialHandle);
* static uint8_t s_ringBuffer[SERIAL_MANAGER_RING_BUFFER_SIZE];
*
* serial_manager_config_t config;
* serial_port_uart_config_t uartConfig;
* config.type = kSerialPort_Uart;
* config.ringBuffer = &s_ringBuffer[0];
* config.ringBufferSize = SERIAL_MANAGER_RING_BUFFER_SIZE;
* uartConfig.instance = 0;
* uartConfig.clockRate = 24000000;
* uartConfig.baudRate = 115200;
* uartConfig.parityMode = kSerialManager_UartParityDisabled;
* uartConfig.stopBitCount = kSerialManager_UartOneStopBit;
* uartConfig.enableRx = 1;
* uartConfig.enableTx = 1;
* uartConfig.enableRxRTS = 0;
* uartConfig.enableTxCTS = 0;
* config.portConfig = &uartConfig;
* SerialManager_Init((serial_handle_t)s_serialHandle, &config);
* @endcode
* For USB CDC,
* @code
* #define SERIAL_MANAGER_RING_BUFFER_SIZE (256U)
* static SERIAL_MANAGER_HANDLE_DEFINE(s_serialHandle);
* static uint8_t s_ringBuffer[SERIAL_MANAGER_RING_BUFFER_SIZE];
*
* serial_manager_config_t config;
* serial_port_usb_cdc_config_t usbCdcConfig;
* config.type = kSerialPort_UsbCdc;
* config.ringBuffer = &s_ringBuffer[0];
* config.ringBufferSize = SERIAL_MANAGER_RING_BUFFER_SIZE;
* usbCdcConfig.controllerIndex = kSerialManager_UsbControllerKhci0;
* config.portConfig = &usbCdcConfig;
* SerialManager_Init((serial_handle_t)s_serialHandle, &config);
* @endcode
*
* @param serialHandle Pointer to point to a memory space of size #SERIAL_MANAGER_HANDLE_SIZE allocated by the caller.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* You can define the handle in the following two ways:
* #SERIAL_MANAGER_HANDLE_DEFINE(serialHandle);
* or
* uint32_t serialHandle[((SERIAL_MANAGER_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
* @param serialConfig Pointer to user-defined configuration structure.
* @retval kStatus_SerialManager_Error An error occurred.
* @retval kStatus_SerialManager_Success The Serial Manager module initialization succeed.
*/
serial_manager_status_t SerialManager_Init(serial_handle_t serialHandle, const serial_manager_config_t *serialConfig);
/*!
* @brief De-initializes the serial manager module instance.
*
* This function de-initializes the serial manager module instance. If the opened writing or
* reading handle is not closed, the function will return kStatus_SerialManager_Busy.
*
* @param serialHandle The serial manager module handle pointer.
* @retval kStatus_SerialManager_Success The serial manager de-initialization succeed.
* @retval kStatus_SerialManager_Busy Opened reading or writing handle is not closed.
*/
serial_manager_status_t SerialManager_Deinit(serial_handle_t serialHandle);
/*!
* @brief Opens a writing handle for the serial manager module.
*
* This function Opens a writing handle for the serial manager module. If the serial manager needs to
* be used in different tasks, the task should open a dedicated write handle for itself by calling
* #SerialManager_OpenWriteHandle. Since there can only one buffer for transmission for the writing
* handle at the same time, multiple writing handles need to be opened when the multiple transmission
* is needed for a task.
*
* @param serialHandle The serial manager module handle pointer.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* @param writeHandle The serial manager module writing handle pointer.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* You can define the handle in the following two ways:
* #SERIAL_MANAGER_WRITE_HANDLE_DEFINE(writeHandle);
* or
* uint32_t writeHandle[((SERIAL_MANAGER_WRITE_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
* @retval kStatus_SerialManager_Error An error occurred.
* @retval kStatus_SerialManager_HandleConflict The writing handle was opened.
* @retval kStatus_SerialManager_Success The writing handle is opened.
*
* Example below shows how to use this API to write data.
* For task 1,
* @code
* static SERIAL_MANAGER_WRITE_HANDLE_DEFINE(s_serialWriteHandle1);
* static uint8_t s_nonBlockingWelcome1[] = "This is non-blocking writing log for task1!\r\n";
* SerialManager_OpenWriteHandle((serial_handle_t)serialHandle, (serial_write_handle_t)s_serialWriteHandle1);
* SerialManager_InstallTxCallback((serial_write_handle_t)s_serialWriteHandle1,
* Task1_SerialManagerTxCallback,
* s_serialWriteHandle1);
* SerialManager_WriteNonBlocking((serial_write_handle_t)s_serialWriteHandle1,
* s_nonBlockingWelcome1,
* sizeof(s_nonBlockingWelcome1) - 1U);
* @endcode
* For task 2,
* @code
* static SERIAL_MANAGER_WRITE_HANDLE_DEFINE(s_serialWriteHandle2);
* static uint8_t s_nonBlockingWelcome2[] = "This is non-blocking writing log for task2!\r\n";
* SerialManager_OpenWriteHandle((serial_handle_t)serialHandle, (serial_write_handle_t)s_serialWriteHandle2);
* SerialManager_InstallTxCallback((serial_write_handle_t)s_serialWriteHandle2,
* Task2_SerialManagerTxCallback,
* s_serialWriteHandle2);
* SerialManager_WriteNonBlocking((serial_write_handle_t)s_serialWriteHandle2,
* s_nonBlockingWelcome2,
* sizeof(s_nonBlockingWelcome2) - 1U);
* @endcode
*/
serial_manager_status_t SerialManager_OpenWriteHandle(serial_handle_t serialHandle, serial_write_handle_t writeHandle);
/*!
* @brief Closes a writing handle for the serial manager module.
*
* This function Closes a writing handle for the serial manager module.
*
* @param writeHandle The serial manager module writing handle pointer.
* @retval kStatus_SerialManager_Success The writing handle is closed.
*/
serial_manager_status_t SerialManager_CloseWriteHandle(serial_write_handle_t writeHandle);
/*!
* @brief Opens a reading handle for the serial manager module.
*
* This function Opens a reading handle for the serial manager module. The reading handle can not be
* opened multiple at the same time. The error code kStatus_SerialManager_Busy would be returned when
* the previous reading handle is not closed. And there can only be one buffer for receiving for the
* reading handle at the same time.
*
* @param serialHandle The serial manager module handle pointer.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* @param readHandle The serial manager module reading handle pointer.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* You can define the handle in the following two ways:
* #SERIAL_MANAGER_READ_HANDLE_DEFINE(readHandle);
* or
* uint32_t readHandle[((SERIAL_MANAGER_READ_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
* @retval kStatus_SerialManager_Error An error occurred.
* @retval kStatus_SerialManager_Success The reading handle is opened.
* @retval kStatus_SerialManager_Busy Previous reading handle is not closed.
*
* Example below shows how to use this API to read data.
* @code
* static SERIAL_MANAGER_READ_HANDLE_DEFINE(s_serialReadHandle);
* SerialManager_OpenReadHandle((serial_handle_t)serialHandle, (serial_read_handle_t)s_serialReadHandle);
* static uint8_t s_nonBlockingBuffer[64];
* SerialManager_InstallRxCallback((serial_read_handle_t)s_serialReadHandle,
* APP_SerialManagerRxCallback,
* s_serialReadHandle);
* SerialManager_ReadNonBlocking((serial_read_handle_t)s_serialReadHandle,
* s_nonBlockingBuffer,
* sizeof(s_nonBlockingBuffer));
* @endcode
*/
serial_manager_status_t SerialManager_OpenReadHandle(serial_handle_t serialHandle, serial_read_handle_t readHandle);
/*!
* @brief Closes a reading for the serial manager module.
*
* This function Closes a reading for the serial manager module.
*
* @param readHandle The serial manager module reading handle pointer.
* @retval kStatus_SerialManager_Success The reading handle is closed.
*/
serial_manager_status_t SerialManager_CloseReadHandle(serial_read_handle_t readHandle);
/*!
* @brief Transmits data with the blocking mode.
*
* This is a blocking function, which polls the sending queue, waits for the sending queue to be empty.
* This function sends data using an interrupt method. The interrupt of the hardware could not be disabled.
* And There can only one buffer for transmission for the writing handle at the same time.
*
* @note The function #SerialManager_WriteBlocking and the function SerialManager_WriteNonBlocking
* cannot be used at the same time.
* And, the function SerialManager_CancelWriting cannot be used to abort the transmission of this function.
*
* @param writeHandle The serial manager module handle pointer.
* @param buffer Start address of the data to write.
* @param length Length of the data to write.
* @retval kStatus_SerialManager_Success Successfully sent all data.
* @retval kStatus_SerialManager_Busy Previous transmission still not finished; data not all sent yet.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_WriteBlocking(serial_write_handle_t writeHandle,
uint8_t *buffer,
uint32_t length);
/*!
* @brief Reads data with the blocking mode.
*
* This is a blocking function, which polls the receiving buffer, waits for the receiving buffer to be full.
* This function receives data using an interrupt method. The interrupt of the hardware could not be disabled.
* And There can only one buffer for receiving for the reading handle at the same time.
*
* @note The function #SerialManager_ReadBlocking and the function SerialManager_ReadNonBlocking
* cannot be used at the same time.
* And, the function SerialManager_CancelReading cannot be used to abort the transmission of this function.
*
* @param readHandle The serial manager module handle pointer.
* @param buffer Start address of the data to store the received data.
* @param length The length of the data to be received.
* @retval kStatus_SerialManager_Success Successfully received all data.
* @retval kStatus_SerialManager_Busy Previous transmission still not finished; data not all received yet.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_ReadBlocking(serial_read_handle_t readHandle, uint8_t *buffer, uint32_t length);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
/*!
* @brief Transmits data with the non-blocking mode.
*
* This is a non-blocking function, which returns directly without waiting for all data to be sent.
* When all data is sent, the module notifies the upper layer through a TX callback function and passes
* the status parameter @ref kStatus_SerialManager_Success.
* This function sends data using an interrupt method. The interrupt of the hardware could not be disabled.
* And There can only one buffer for transmission for the writing handle at the same time.
*
* @note The function #SerialManager_WriteBlocking and the function #SerialManager_WriteNonBlocking
* cannot be used at the same time. And, the TX callback is mandatory before the function could be used.
*
* @param writeHandle The serial manager module handle pointer.
* @param buffer Start address of the data to write.
* @param length Length of the data to write.
* @retval kStatus_SerialManager_Success Successfully sent all data.
* @retval kStatus_SerialManager_Busy Previous transmission still not finished; data not all sent yet.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_WriteNonBlocking(serial_write_handle_t writeHandle,
uint8_t *buffer,
uint32_t length);
/*!
* @brief Reads data with the non-blocking mode.
*
* This is a non-blocking function, which returns directly without waiting for all data to be received.
* When all data is received, the module driver notifies the upper layer
* through a RX callback function and passes the status parameter @ref kStatus_SerialManager_Success.
* This function receives data using an interrupt method. The interrupt of the hardware could not be disabled.
* And There can only one buffer for receiving for the reading handle at the same time.
*
* @note The function #SerialManager_ReadBlocking and the function #SerialManager_ReadNonBlocking
* cannot be used at the same time. And, the RX callback is mandatory before the function could be used.
*
* @param readHandle The serial manager module handle pointer.
* @param buffer Start address of the data to store the received data.
* @param length The length of the data to be received.
* @retval kStatus_SerialManager_Success Successfully received all data.
* @retval kStatus_SerialManager_Busy Previous transmission still not finished; data not all received yet.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_ReadNonBlocking(serial_read_handle_t readHandle,
uint8_t *buffer,
uint32_t length);
/*!
* @brief Tries to read data.
*
* The function tries to read data from internal ring buffer. If the ring buffer is not empty, the data will be
* copied from ring buffer to up layer buffer. The copied length is the minimum of the ring buffer and up layer length.
* After the data is copied, the actual data length is passed by the parameter length.
* And There can only one buffer for receiving for the reading handle at the same time.
*
* @param readHandle The serial manager module handle pointer.
* @param buffer Start address of the data to store the received data.
* @param length The length of the data to be received.
* @param receivedLength Length received from the ring buffer directly.
* @retval kStatus_SerialManager_Success Successfully received all data.
* @retval kStatus_SerialManager_Busy Previous transmission still not finished; data not all received yet.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_TryRead(serial_read_handle_t readHandle,
uint8_t *buffer,
uint32_t length,
uint32_t *receivedLength);
/*!
* @brief Cancels unfinished send transmission.
*
* The function cancels unfinished send transmission. When the transfer is canceled, the module notifies the upper layer
* through a TX callback function and passes the status parameter @ref kStatus_SerialManager_Canceled.
*
* @note The function #SerialManager_CancelWriting cannot be used to abort the transmission of
* the function #SerialManager_WriteBlocking.
*
* @param writeHandle The serial manager module handle pointer.
* @retval kStatus_SerialManager_Success Get successfully abort the sending.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_CancelWriting(serial_write_handle_t writeHandle);
/*!
* @brief Cancels unfinished receive transmission.
*
* The function cancels unfinished receive transmission. When the transfer is canceled, the module notifies the upper
* layer
* through a RX callback function and passes the status parameter @ref kStatus_SerialManager_Canceled.
*
* @note The function #SerialManager_CancelReading cannot be used to abort the transmission of
* the function #SerialManager_ReadBlocking.
*
* @param readHandle The serial manager module handle pointer.
* @retval kStatus_SerialManager_Success Get successfully abort the receiving.
* @retval kStatus_SerialManager_Error An error occurred.
*/
serial_manager_status_t SerialManager_CancelReading(serial_read_handle_t readHandle);
/*!
* @brief Installs a TX callback and callback parameter.
*
* This function is used to install the TX callback and callback parameter for the serial manager module.
* When any status of TX transmission changed, the driver will notify the upper layer by the installed callback
* function. And the status is also passed as status parameter when the callback is called.
*
* @param writeHandle The serial manager module handle pointer.
* @param callback The callback function.
* @param callbackParam The parameter of the callback function.
* @retval kStatus_SerialManager_Success Successfully install the callback.
*/
serial_manager_status_t SerialManager_InstallTxCallback(serial_write_handle_t writeHandle,
serial_manager_callback_t callback,
void *callbackParam);
/*!
* @brief Installs a RX callback and callback parameter.
*
* This function is used to install the RX callback and callback parameter for the serial manager module.
* When any status of RX transmission changed, the driver will notify the upper layer by the installed callback
* function. And the status is also passed as status parameter when the callback is called.
*
* @param readHandle The serial manager module handle pointer.
* @param callback The callback function.
* @param callbackParam The parameter of the callback function.
* @retval kStatus_SerialManager_Success Successfully install the callback.
*/
serial_manager_status_t SerialManager_InstallRxCallback(serial_read_handle_t readHandle,
serial_manager_callback_t callback,
void *callbackParam);
/*!
* @brief Check if need polling ISR.
*
* This function is used to check if need polling ISR.
*
* @retval TRUE if need polling.
*/
static inline bool SerialManager_needPollingIsr(void)
{
#if (defined(__DSC__) && defined(__CW__))
return !(isIRQAllowed());
#elif defined(CPSR_M_Msk)
return (0x13 == (__get_CPSR() & CPSR_M_Msk));
#elif defined(DAIF_I_BIT)
return (__get_DAIF() & DAIF_I_BIT);
#elif defined(__XCC__)
return (xthal_get_interrupt() & xthal_get_intenable());
#else
return (0U != __get_IPSR());
#endif
}
#endif
/*!
* @brief Prepares to enter low power consumption.
*
* This function is used to prepare to enter low power consumption.
*
* @param serialHandle The serial manager module handle pointer.
* @retval kStatus_SerialManager_Success Successful operation.
*/
serial_manager_status_t SerialManager_EnterLowpower(serial_handle_t serialHandle);
/*!
* @brief Restores from low power consumption.
*
* This function is used to restore from low power consumption.
*
* @param serialHandle The serial manager module handle pointer.
* @retval kStatus_SerialManager_Success Successful operation.
*/
serial_manager_status_t SerialManager_ExitLowpower(serial_handle_t serialHandle);
/*!
* @brief This function performs initialization of the callbacks structure used to disable lowpower
* when serial manager is active.
*
*
* @param pfCallback Pointer to the function structure used to allow/disable lowpower.
*
*/
void SerialManager_SetLowpowerCriticalCb(const serial_manager_lowpower_critical_CBs_t *pfCallback);
#if defined(__cplusplus)
}
#endif
/*! @} */
#endif /* __SERIAL_MANAGER_H__ */
@@ -1,189 +0,0 @@
/*
* Copyright 2019-2020, 2023 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SERIAL_PORT_INTERNAL_H__
#define __SERIAL_PORT_INTERNAL_H__
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* _cplusplus */
#if (defined(SERIAL_PORT_TYPE_UART) && (SERIAL_PORT_TYPE_UART > 0U))
serial_manager_status_t Serial_UartInit(serial_handle_t serialHandle, void *serialConfig);
serial_manager_status_t Serial_UartDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_UartRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_UartInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_UartIsrFunction(serial_handle_t serialHandle);
#endif
serial_manager_status_t Serial_UartEnterLowpower(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartExitLowpower(serial_handle_t serialHandle);
#endif
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
serial_manager_status_t Serial_UartDmaInit(serial_handle_t serialHandle, void *serialConfig);
serial_manager_status_t Serial_UartDmaDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartDmaWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartDmaCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartDmaInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_UartDmaInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_UartDmaIsrFunction(serial_handle_t serialHandle);
#endif
serial_manager_status_t Serial_UartDmaEnterLowpower(serial_handle_t serialHandle);
serial_manager_status_t Serial_UartDmaExitLowpower(serial_handle_t serialHandle);
#endif
#if (defined(SERIAL_PORT_TYPE_RPMSG) && (SERIAL_PORT_TYPE_RPMSG > 0U))
serial_manager_status_t Serial_RpmsgInit(serial_handle_t serialHandle, void *serialConfig);
serial_manager_status_t Serial_RpmsgDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_RpmsgWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_RpmsgWriteBlocking(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if !(defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_RpmsgRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_RpmsgCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_RpmsgInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_RpmsgInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
#endif
serial_manager_status_t Serial_RpmsgEnterLowpower(serial_handle_t serialHandle);
serial_manager_status_t Serial_RpmsgExitLowpower(serial_handle_t serialHandle);
#endif
#if (defined(SERIAL_PORT_TYPE_USBCDC) && (SERIAL_PORT_TYPE_USBCDC > 0U))
serial_manager_status_t Serial_UsbCdcInit(serial_handle_t serialHandle, void *config);
serial_manager_status_t Serial_UsbCdcDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_UsbCdcWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_UsbCdcRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_UsbCdcCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_UsbCdcInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_UsbCdcInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_UsbCdcIsrFunction(serial_handle_t serialHandle);
#endif
#if (defined(SERIAL_PORT_TYPE_SWO) && (SERIAL_PORT_TYPE_SWO > 0U))
serial_manager_status_t Serial_SwoInit(serial_handle_t serialHandle, void *config);
serial_manager_status_t Serial_SwoDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_SwoWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if !(defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_SwoRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_SwoCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_SwoInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_SwoInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_SwoIsrFunction(serial_handle_t serialHandle);
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_VIRTUAL) && (SERIAL_PORT_TYPE_VIRTUAL > 0U))
serial_manager_status_t Serial_PortVirtualInit(serial_handle_t serialHandle, void *config);
serial_manager_status_t Serial_PortVirtualDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_PortVirtualWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_PortVirtualRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_PortVirtualCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_PortVirtualInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_PortVirtualInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_PortVirtualIsrFunction(serial_handle_t serialHandle);
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_MASTER) && SERIAL_PORT_TYPE_SPI_MASTER > 0U)
serial_manager_status_t Serial_SpiMasterInit(serial_handle_t serialHandle, void *serialConfig);
serial_manager_status_t Serial_SpiMasterDeinit(serial_handle_t serialHandle);
void Serial_SpiMasterTxCallback(hal_spi_master_handle_t handle, hal_spi_status_t status, void *callbackParam);
void Serial_SpiMasterRxCallback(hal_spi_master_handle_t handle, hal_spi_status_t status, void *callbackParam);
serial_manager_status_t Serial_SpiMasterWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_SpiMasterRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_SpiMasterInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_SpiMasterInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_SpiMasterCancelWrite(serial_handle_t serialHandle);
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_SPI_SLAVE) && (SERIAL_PORT_TYPE_SPI_SLAVE > 0U))
serial_manager_status_t Serial_SpiSlaveInit(serial_handle_t serialHandle, void *serialConfig);
serial_manager_status_t Serial_SpiSlaveDeinit(serial_handle_t serialHandle);
void Serial_SpiSlaveTxCallback(hal_spi_slave_handle_t handle, hal_spi_status_t status, void *callbackParam);
void Serial_SpiSlaveRxCallback(hal_spi_slave_handle_t handle, hal_spi_status_t status, void *callbackParam);
serial_manager_status_t Serial_SpiSlaveWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_SpiSlaveRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_SpiSlaveInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_SpiSlaveInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_SpiSlaveCancelWrite(serial_handle_t serialHandle);
#endif
#endif
#if (defined(SERIAL_PORT_TYPE_BLE_WU) && (SERIAL_PORT_TYPE_BLE_WU > 0U))
serial_manager_status_t Serial_PortBleWuInit(serial_handle_t serialHandle, void *config);
serial_manager_status_t Serial_PortBleWuDeinit(serial_handle_t serialHandle);
serial_manager_status_t Serial_PortBleWuWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_PortBleWuRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length);
serial_manager_status_t Serial_PortBleWuCancelWrite(serial_handle_t serialHandle);
serial_manager_status_t Serial_PortBleWuInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
serial_manager_status_t Serial_PortBleWuInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam);
void Serial_PortBleWuIsrFunction(serial_handle_t serialHandle);
#endif
#if defined(__cplusplus)
}
#endif
#endif /* __SERIAL_PORT_INTERNAL_H__ */
@@ -1,717 +0,0 @@
/*
* Copyright 2018 -2021 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_component_serial_manager.h"
#include "fsl_component_serial_port_internal.h"
#if (defined(SERIAL_PORT_TYPE_UART) && (SERIAL_PORT_TYPE_UART > 0U)) || \
(defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
#include "fsl_adapter_uart.h"
#include "fsl_component_serial_port_uart.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#ifndef NDEBUG
#if (defined(DEBUG_CONSOLE_ASSERT_DISABLE) && (DEBUG_CONSOLE_ASSERT_DISABLE > 0U))
#undef assert
#define assert(n)
#else
/* MISRA C-2012 Rule 17.2 */
#undef assert
#define assert(n) \
while (!(n)) \
{ \
; \
}
#endif
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#define SERIAL_PORT_UART_RECEIVE_DATA_LENGTH 1U
typedef struct _serial_uart_send_state
{
uint8_t *buffer;
uint32_t length;
serial_manager_callback_t callback;
void *callbackParam;
volatile uint8_t busy;
} serial_uart_send_state_t;
typedef struct _serial_uart_recv_state
{
serial_manager_callback_t callback;
void *callbackParam;
volatile uint8_t busy;
volatile uint8_t rxEnable;
uint8_t readBuffer[SERIAL_PORT_UART_RECEIVE_DATA_LENGTH];
} serial_uart_recv_state_t;
typedef struct _serial_uart_dma_recv_state
{
serial_manager_callback_t callback;
void *callbackParam;
volatile uint8_t busy;
volatile uint8_t rxEnable;
uint8_t readBuffer[SERIAL_PORT_UART_DMA_RECEIVE_DATA_LENGTH];
} serial_uart_dma_recv_state_t;
typedef struct _serial_uart_block_state
{
UART_HANDLE_DEFINE(usartHandleBuffer);
} serial_uart_block_state_t;
#endif
typedef struct _serial_uart_state
{
UART_HANDLE_DEFINE(usartHandleBuffer);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_uart_send_state_t tx;
serial_uart_recv_state_t rx;
#endif
} serial_uart_state_t;
#endif
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
typedef struct _serial_uart_dma_state
{
UART_HANDLE_DEFINE(usartHandleBuffer);
UART_DMA_HANDLE_DEFINE(uartDmaHandle);
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_uart_send_state_t tx;
serial_uart_dma_recv_state_t rx;
#endif
} serial_uart_dma_state_t;
#endif
#endif
/*******************************************************************************
* Prototypes
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
static serial_manager_status_t Serial_UartEnableReceiving(serial_uart_state_t *serialUartHandle)
{
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
hal_uart_transfer_t transfer;
#endif
if (1U == serialUartHandle->rx.rxEnable)
{
serialUartHandle->rx.busy = 1U;
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
transfer.data = &serialUartHandle->rx.readBuffer[0];
transfer.dataSize = sizeof(serialUartHandle->rx.readBuffer);
if (kStatus_HAL_UartSuccess !=
HAL_UartTransferReceiveNonBlocking(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), &transfer))
#else
if (kStatus_HAL_UartSuccess !=
HAL_UartReceiveNonBlocking(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
&serialUartHandle->rx.readBuffer[0], sizeof(serialUartHandle->rx.readBuffer)))
#endif
{
serialUartHandle->rx.busy = 0U;
return kStatus_SerialManager_Error;
}
}
return kStatus_SerialManager_Success;
}
/* UART user callback */
static void Serial_UartCallback(hal_uart_handle_t handle, hal_uart_status_t status, void *userData)
{
serial_uart_state_t *serialUartHandle;
serial_manager_callback_message_t serialMsg;
assert(userData);
serialUartHandle = (serial_uart_state_t *)userData;
if ((hal_uart_status_t)kStatus_HAL_UartRxIdle == status)
{
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
(void)HAL_UartTransferAbortReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#else
(void)HAL_UartAbortReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#endif
if ((NULL != serialUartHandle->rx.callback))
{
serialMsg.buffer = &serialUartHandle->rx.readBuffer[0];
serialMsg.length = sizeof(serialUartHandle->rx.readBuffer);
serialUartHandle->rx.callback(serialUartHandle->rx.callbackParam, &serialMsg,
kStatus_SerialManager_Success);
}
}
else if ((hal_uart_status_t)kStatus_HAL_UartTxIdle == status)
{
if (0U != serialUartHandle->tx.busy)
{
serialUartHandle->tx.busy = 0U;
if ((NULL != serialUartHandle->tx.callback))
{
serialMsg.buffer = serialUartHandle->tx.buffer;
serialMsg.length = serialUartHandle->tx.length;
serialUartHandle->tx.callback(serialUartHandle->tx.callbackParam, &serialMsg,
kStatus_SerialManager_Success);
}
}
}
else
{
}
}
#endif
serial_manager_status_t Serial_UartInit(serial_handle_t serialHandle, void *serialConfig)
{
serial_uart_state_t *serialUartHandle;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_port_uart_config_t *uartConfig = (serial_port_uart_config_t *)serialConfig;
#endif
serial_manager_status_t serialManagerStatus = kStatus_SerialManager_Success;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
#if 0 /* Not used below! */
hal_uart_transfer_t transfer;
#endif
#endif
#endif
assert(serialConfig);
assert(serialHandle);
assert(SERIAL_PORT_UART_HANDLE_SIZE >= sizeof(serial_uart_state_t));
serialUartHandle = (serial_uart_state_t *)serialHandle;
serialManagerStatus = (serial_manager_status_t)HAL_UartInit(
((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), (const hal_uart_config_t *)serialConfig);
assert(kStatus_SerialManager_Success == serialManagerStatus);
(void)serialManagerStatus;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serialUartHandle->rx.rxEnable = uartConfig->enableRx;
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
(void)HAL_UartTransferInstallCallback(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
Serial_UartCallback, serialUartHandle);
#else
(void)HAL_UartInstallCallback(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), Serial_UartCallback,
serialUartHandle);
#endif
#endif
return serialManagerStatus;
}
serial_manager_status_t Serial_UartDeinit(serial_handle_t serialHandle)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
(void)HAL_UartTransferAbortReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#else
(void)HAL_UartAbortReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#endif
#endif
(void)HAL_UartDeinit(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serialUartHandle->tx.busy = 0U;
serialUartHandle->rx.busy = 0U;
#endif
return kStatus_SerialManager_Success;
}
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length)
{
serial_uart_state_t *serialUartHandle;
hal_uart_status_t uartstatus;
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
hal_uart_transfer_t transfer;
#endif
assert(serialHandle);
assert(buffer);
assert(length);
serialUartHandle = (serial_uart_state_t *)serialHandle;
if (0U != serialUartHandle->tx.busy)
{
return kStatus_SerialManager_Busy;
}
serialUartHandle->tx.busy = 1U;
serialUartHandle->tx.buffer = buffer;
serialUartHandle->tx.length = length;
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
transfer.data = buffer;
transfer.dataSize = length;
uartstatus =
HAL_UartTransferSendNonBlocking(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), &transfer);
#else
uartstatus = HAL_UartSendNonBlocking(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), buffer, length);
#endif
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length)
{
assert(serialHandle);
(void)buffer;
(void)length;
return (serial_manager_status_t)Serial_UartEnableReceiving(serialHandle);
}
#else
serial_manager_status_t Serial_UartWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
assert(buffer);
assert(length);
serialUartHandle = (serial_uart_state_t *)serialHandle;
return (serial_manager_status_t)HAL_UartSendBlocking(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
buffer, length);
}
serial_manager_status_t Serial_UartRead(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
assert(buffer);
assert(length);
serialUartHandle = (serial_uart_state_t *)serialHandle;
return (serial_manager_status_t)HAL_UartReceiveBlocking(
((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), buffer, length);
}
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartCancelWrite(serial_handle_t serialHandle)
{
serial_uart_state_t *serialUartHandle;
serial_manager_callback_message_t serialMsg;
uint32_t primask;
uint8_t isBusy = 0U;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
primask = DisableGlobalIRQ();
isBusy = serialUartHandle->tx.busy;
serialUartHandle->tx.busy = 0U;
EnableGlobalIRQ(primask);
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
(void)HAL_UartTransferAbortSend(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#else
(void)HAL_UartAbortSend(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#endif
if (0U != isBusy)
{
if ((NULL != serialUartHandle->tx.callback))
{
serialMsg.buffer = serialUartHandle->tx.buffer;
serialMsg.length = serialUartHandle->tx.length;
serialUartHandle->tx.callback(serialUartHandle->tx.callbackParam, &serialMsg,
kStatus_SerialManager_Canceled);
}
}
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
serialUartHandle->tx.callback = callback;
serialUartHandle->tx.callbackParam = callbackParam;
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
serialUartHandle->rx.callback = callback;
serialUartHandle->rx.callbackParam = callbackParam;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
(void)Serial_UartEnableReceiving(serialUartHandle);
#endif
return kStatus_SerialManager_Success;
}
void Serial_UartIsrFunction(serial_handle_t serialHandle)
{
serial_uart_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
HAL_UartIsrFunction(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
}
#endif
serial_manager_status_t Serial_UartEnterLowpower(serial_handle_t serialHandle)
{
serial_uart_state_t *serialUartHandle;
hal_uart_status_t uartstatus;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
uartstatus = HAL_UartEnterLowpower(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartExitLowpower(serial_handle_t serialHandle)
{
serial_uart_state_t *serialUartHandle;
serial_manager_status_t status = kStatus_SerialManager_Success;
hal_uart_status_t uartstatus;
assert(serialHandle);
serialUartHandle = (serial_uart_state_t *)serialHandle;
uartstatus = HAL_UartExitLowpower(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
status = Serial_UartEnableReceiving(serialUartHandle);
#endif
return status;
}
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
static serial_manager_status_t Serial_UartDmaEnableReceiving(serial_uart_dma_state_t *serialUartHandle)
{
if (1U == serialUartHandle->rx.rxEnable)
{
serialUartHandle->rx.busy = 1U;
if (kStatus_HAL_UartDmaSuccess !=
HAL_UartDMATransferReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
&serialUartHandle->rx.readBuffer[0], sizeof(serialUartHandle->rx.readBuffer),
false))
{
serialUartHandle->rx.busy = 0U;
return kStatus_SerialManager_Error;
}
}
return kStatus_SerialManager_Success;
}
/* UART user callback */
static void Serial_UartDmaCallback(hal_uart_dma_handle_t handle, hal_dma_callback_msg_t *dmaMsg, void *callbackParam)
{
serial_uart_dma_state_t *serialUartHandle;
serial_manager_callback_message_t cb_msg;
assert(callbackParam);
serialUartHandle = (serial_uart_dma_state_t *)callbackParam;
if (((hal_uart_dma_status_t)kStatus_HAL_UartDmaRxIdle == dmaMsg->status) ||
(kStatus_HAL_UartDmaIdleline == dmaMsg->status))
{
if ((NULL != serialUartHandle->rx.callback))
{
cb_msg.buffer = dmaMsg->data;
cb_msg.length = dmaMsg->dataSize;
serialUartHandle->rx.callback(serialUartHandle->rx.callbackParam, &cb_msg, kStatus_SerialManager_Success);
}
if (kStatus_HAL_UartDmaSuccess ==
HAL_UartDMATransferReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
&serialUartHandle->rx.readBuffer[0], sizeof(serialUartHandle->rx.readBuffer),
false))
{
serialUartHandle->rx.busy = 1U;
}
}
else if (kStatus_HAL_UartDmaTxIdle == dmaMsg->status)
{
if (0U != serialUartHandle->tx.busy)
{
serialUartHandle->tx.busy = 0U;
if ((NULL != serialUartHandle->tx.callback))
{
cb_msg.buffer = dmaMsg->data;
cb_msg.length = dmaMsg->dataSize;
serialUartHandle->tx.callback(serialUartHandle->tx.callbackParam, &cb_msg,
kStatus_SerialManager_Success);
}
}
}
else
{
}
}
#endif
serial_manager_status_t Serial_UartDmaInit(serial_handle_t serialHandle, void *serialConfig)
{
serial_uart_dma_state_t *serialUartHandle;
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
serial_port_uart_dma_config_t *uartConfig = (serial_port_uart_dma_config_t *)serialConfig;
#endif
serial_manager_status_t serialManagerStatus = kStatus_SerialManager_Success;
assert(serialConfig);
assert(serialHandle);
assert(SERIAL_PORT_UART_DMA_HANDLE_SIZE >= sizeof(serial_uart_dma_state_t));
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
serialManagerStatus = (serial_manager_status_t)HAL_UartInit(
((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), (const hal_uart_config_t *)serialConfig);
assert(kStatus_SerialManager_Success == serialManagerStatus);
(void)serialManagerStatus;
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
hal_uart_dma_config_t dmaConfig;
dmaConfig.uart_instance = uartConfig->instance;
dmaConfig.dma_instance = uartConfig->dma_instance;
dmaConfig.rx_channel = uartConfig->rx_channel;
dmaConfig.tx_channel = uartConfig->tx_channel;
dmaConfig.dma_mux_configure = uartConfig->dma_mux_configure;
dmaConfig.dma_channel_mux_configure = uartConfig->dma_channel_mux_configure;
// Init uart dma
(void)HAL_UartDMAInit(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
(hal_uart_dma_handle_t *)serialUartHandle->uartDmaHandle, &dmaConfig);
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serialUartHandle->rx.rxEnable = uartConfig->enableRx;
(void)HAL_UartDMATransferInstallCallback(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]),
Serial_UartDmaCallback, serialUartHandle);
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serialManagerStatus = Serial_UartDmaEnableReceiving(serialUartHandle);
#endif
return serialManagerStatus;
}
serial_manager_status_t Serial_UartDmaDeinit(serial_handle_t serialHandle)
{
serial_uart_dma_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
(void)HAL_UartDMAAbortReceive(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
(void)HAL_UartDeinit(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
(void)HAL_UartDMADeinit(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serialUartHandle->tx.busy = 0U;
serialUartHandle->rx.busy = 0U;
#endif
return kStatus_SerialManager_Success;
}
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartDmaWrite(serial_handle_t serialHandle, uint8_t *buffer, uint32_t length)
{
serial_uart_dma_state_t *serialUartHandle;
hal_uart_status_t uartstatus;
assert(serialHandle);
assert(buffer);
assert(length);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
if (0U != serialUartHandle->tx.busy)
{
return kStatus_SerialManager_Busy;
}
serialUartHandle->tx.busy = 1U;
serialUartHandle->tx.buffer = buffer;
serialUartHandle->tx.length = length;
uartstatus = (hal_uart_status_t)HAL_UartDMATransferSend(
((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]), buffer, length);
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
return kStatus_SerialManager_Success;
}
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
serial_manager_status_t Serial_UartDmaCancelWrite(serial_handle_t serialHandle)
{
serial_uart_dma_state_t *serialUartHandle;
serial_manager_callback_message_t serialMsg;
uint32_t primask;
uint8_t isBusy = 0U;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
primask = DisableGlobalIRQ();
isBusy = serialUartHandle->tx.busy;
serialUartHandle->tx.busy = 0U;
EnableGlobalIRQ(primask);
(void)HAL_UartDMAAbortSend(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
if (0U != isBusy)
{
if ((NULL != serialUartHandle->tx.callback))
{
serialMsg.buffer = serialUartHandle->tx.buffer;
serialMsg.length = serialUartHandle->tx.length;
serialUartHandle->tx.callback(serialUartHandle->tx.callbackParam, &serialMsg,
kStatus_SerialManager_Canceled);
}
}
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartDmaInstallTxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam)
{
serial_uart_dma_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
serialUartHandle->tx.callback = callback;
serialUartHandle->tx.callbackParam = callbackParam;
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartDmaInstallRxCallback(serial_handle_t serialHandle,
serial_manager_callback_t callback,
void *callbackParam)
{
serial_uart_dma_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
serialUartHandle->rx.callback = callback;
serialUartHandle->rx.callbackParam = callbackParam;
return kStatus_SerialManager_Success;
}
void Serial_UartDmaIsrFunction(serial_handle_t serialHandle)
{
serial_uart_dma_state_t *serialUartHandle;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
HAL_UartIsrFunction(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
}
#endif
serial_manager_status_t Serial_UartDmaEnterLowpower(serial_handle_t serialHandle)
{
serial_uart_dma_state_t *serialUartHandle;
hal_uart_status_t uartstatus;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
uartstatus = HAL_UartEnterLowpower(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
return kStatus_SerialManager_Success;
}
serial_manager_status_t Serial_UartDmaExitLowpower(serial_handle_t serialHandle)
{
serial_uart_dma_state_t *serialUartHandle;
serial_manager_status_t status = kStatus_SerialManager_Success;
hal_uart_status_t uartstatus;
assert(serialHandle);
serialUartHandle = (serial_uart_dma_state_t *)serialHandle;
uartstatus = HAL_UartExitLowpower(((hal_uart_handle_t)&serialUartHandle->usartHandleBuffer[0]));
assert(kStatus_HAL_UartSuccess == uartstatus);
(void)uartstatus;
return status;
}
#endif
#endif
@@ -1,106 +0,0 @@
/*
* Copyright 2018 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SERIAL_PORT_UART_H__
#define __SERIAL_PORT_UART_H__
#include "fsl_adapter_uart.h"
/*!
* @addtogroup serial_port_uart
* @ingroup serialmanager
* @{
*/
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief serial port uart handle size*/
#ifndef SERIAL_PORT_UART_DMA_RECEIVE_DATA_LENGTH
#define SERIAL_PORT_UART_DMA_RECEIVE_DATA_LENGTH (64U)
#endif
#if (defined(SERIAL_MANAGER_NON_BLOCKING_MODE) && (SERIAL_MANAGER_NON_BLOCKING_MODE > 0U))
#define SERIAL_PORT_UART_HANDLE_SIZE (76U + HAL_UART_HANDLE_SIZE)
#define SERIAL_PORT_UART_BLOCK_HANDLE_SIZE (HAL_UART_BLOCK_HANDLE_SIZE)
#else
#define SERIAL_PORT_UART_HANDLE_SIZE (HAL_UART_HANDLE_SIZE)
#endif
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
#define SERIAL_PORT_UART_DMA_HANDLE_SIZE (76U + HAL_UART_DMA_HANDLE_SIZE + 132U)
#endif
#ifndef SERIAL_USE_CONFIGURE_STRUCTURE
#define SERIAL_USE_CONFIGURE_STRUCTURE (0U) /*!< Enable or disable the confgure structure pointer */
#endif
/*! @brief serial port uart parity mode*/
typedef enum _serial_port_uart_parity_mode
{
kSerialManager_UartParityDisabled = 0x0U, /*!< Parity disabled */
kSerialManager_UartParityEven = 0x2U, /*!< Parity even enabled */
kSerialManager_UartParityOdd = 0x3U, /*!< Parity odd enabled */
} serial_port_uart_parity_mode_t;
/*! @brief serial port uart stop bit count*/
typedef enum _serial_port_uart_stop_bit_count
{
kSerialManager_UartOneStopBit = 0U, /*!< One stop bit */
kSerialManager_UartTwoStopBit = 1U, /*!< Two stop bits */
} serial_port_uart_stop_bit_count_t;
typedef struct _serial_port_uart_config
{
uint32_t clockRate; /*!< clock rate */
uint32_t baudRate; /*!< baud rate */
serial_port_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
serial_port_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
uint8_t enableRx; /*!< Enable RX */
uint8_t enableTx; /*!< Enable TX */
uint8_t enableRxRTS; /*!< Enable RX RTS */
uint8_t enableTxCTS; /*!< Enable TX CTS */
uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information
please refer to the SOC corresponding RM. */
#if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u))
uint8_t txFifoWatermark;
uint8_t rxFifoWatermark;
#endif
} serial_port_uart_config_t;
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
typedef struct _serial_port_uart_dma_config
{
uint32_t clockRate; /*!< clock rate */
uint32_t baudRate; /*!< baud rate */
serial_port_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
serial_port_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
uint8_t enableRx; /*!< Enable RX */
uint8_t enableTx; /*!< Enable TX */
uint8_t enableRxRTS; /*!< Enable RX RTS */
uint8_t enableTxCTS; /*!< Enable TX CTS */
uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information
please refer to the SOC corresponding RM. */
#if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u))
uint8_t txFifoWatermark;
uint8_t rxFifoWatermark;
#endif
uint8_t dma_instance;
uint8_t rx_channel;
uint8_t tx_channel;
void *dma_mux_configure;
void *dma_channel_mux_configure;
} serial_port_uart_dma_config_t;
#endif
/*! @} */
#endif /* __SERIAL_PORT_UART_H__ */
@@ -1,829 +0,0 @@
/*
* Copyright 2018-2020 NXP
* All rights reserved.
*
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __HAL_UART_ADAPTER_H__
#define __HAL_UART_ADAPTER_H__
#include "fsl_common.h"
#if defined(SDK_OS_FREE_RTOS)
#include "FreeRTOS.h"
#endif
/*!
* @addtogroup UART_Adapter
* @{
*/
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief Enable or disable UART adapter non-blocking mode (1 - enable, 0 - disable) */
#ifdef DEBUG_CONSOLE_TRANSFER_NON_BLOCKING
#define UART_ADAPTER_NON_BLOCKING_MODE (1U)
#else
#ifndef SERIAL_MANAGER_NON_BLOCKING_MODE
#define UART_ADAPTER_NON_BLOCKING_MODE (0U)
#else
#define UART_ADAPTER_NON_BLOCKING_MODE SERIAL_MANAGER_NON_BLOCKING_MODE
#endif
#endif
#if defined(__GIC_PRIO_BITS)
#ifndef HAL_UART_ISR_PRIORITY
#define HAL_UART_ISR_PRIORITY (25U)
#endif
#else
#if defined(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
#ifndef HAL_UART_ISR_PRIORITY
#define HAL_UART_ISR_PRIORITY (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY)
#endif
#else
/* The default value 3 is used to support different ARM Core, such as CM0P, CM4, CM7, and CM33, etc.
* The minimum number of priority bits implemented in the NVIC is 2 on these SOCs. The value of mininum
* priority is 3 (2^2 - 1). So, the default value is 3.
*/
#ifndef HAL_UART_ISR_PRIORITY
#define HAL_UART_ISR_PRIORITY (3U)
#endif
#endif
#endif
#ifndef HAL_UART_ADAPTER_LOWPOWER
#define HAL_UART_ADAPTER_LOWPOWER (0U)
#endif /* HAL_UART_ADAPTER_LOWPOWER */
/*! @brief Enable or disable uart hardware FIFO mode (1 - enable, 0 - disable) */
#ifndef HAL_UART_ADAPTER_FIFO
#define HAL_UART_ADAPTER_FIFO (1U)
#endif /* HAL_UART_ADAPTER_FIFO */
#if (defined(SERIAL_PORT_TYPE_UART_DMA) && (SERIAL_PORT_TYPE_UART_DMA > 0U))
#ifndef HAL_UART_DMA_ENABLE
#define HAL_UART_DMA_ENABLE (1U)
#endif
#endif
#ifndef HAL_UART_DMA_ENABLE
#define HAL_UART_DMA_ENABLE (0U)
#endif /* HAL_UART_DMA_ENABLE */
/*! @brief Enable or disable uart DMA adapter int mode (1 - enable, 0 - disable) */
#ifndef HAL_UART_DMA_INIT_ENABLE
#define HAL_UART_DMA_INIT_ENABLE (1U)
#endif /* HAL_SPI_MASTER_DMA_INIT_ENABLE */
/*! @brief Definition of uart dma adapter software idleline detection timeout value in ms. */
#ifndef HAL_UART_DMA_IDLELINE_TIMEOUT
#define HAL_UART_DMA_IDLELINE_TIMEOUT (1U)
#endif /* HAL_UART_DMA_IDLELINE_TIMEOUT */
/*! @brief Definition of uart adapter handle size. */
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
#define HAL_UART_HANDLE_SIZE (92U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#define HAL_UART_BLOCK_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#else
#define HAL_UART_HANDLE_SIZE (8U + HAL_UART_ADAPTER_LOWPOWER * 16U + HAL_UART_DMA_ENABLE * 4U)
#endif
/*! @brief Definition of uart dma adapter handle size. */
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
#if (defined(FSL_FEATURE_SOC_DMA_COUNT) && (FSL_FEATURE_SOC_DMA_COUNT > 0U))
#define HAL_UART_DMA_HANDLE_SIZE (124U + HAL_UART_ADAPTER_LOWPOWER * 36U)
#elif (defined(FSL_FEATURE_SOC_EDMA_COUNT) && (FSL_FEATURE_SOC_EDMA_COUNT > 0U))
#define HAL_UART_DMA_HANDLE_SIZE (140U + HAL_UART_ADAPTER_LOWPOWER * 36U)
#else
#error This SOC does not have DMA or EDMA available!
#endif
#endif /* HAL_UART_DMA_ENABLE */
/*!
* @brief Defines the uart handle
*
* This macro is used to define a 4 byte aligned uart handle.
* Then use "(hal_uart_handle_t)name" to get the uart handle.
*
* The macro should be global and could be optional. You could also define uart handle by yourself.
*
* This is an example,
* @code
* UART_HANDLE_DEFINE(uartHandle);
* @endcode
*
* @param name The name string of the uart handle.
*/
#define UART_HANDLE_DEFINE(name) uint32_t name[((HAL_UART_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
#define UART_DMA_HANDLE_DEFINE(name) \
uint32_t name[((HAL_UART_DMA_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))]
#endif
/*! @brief Whether enable transactional function of the UART. (0 - disable, 1 - enable) */
#ifndef HAL_UART_TRANSFER_MODE
#define HAL_UART_TRANSFER_MODE (0U)
#endif
/*! @brief The handle of uart adapter. */
typedef void *hal_uart_handle_t;
/*! @brief The handle of uart dma adapter. */
typedef void *hal_uart_dma_handle_t;
/*! @brief UART status */
typedef enum _hal_uart_status
{
kStatus_HAL_UartSuccess = kStatus_Success, /*!< Successfully */
kStatus_HAL_UartTxBusy = MAKE_STATUS(kStatusGroup_HAL_UART, 1), /*!< TX busy */
kStatus_HAL_UartRxBusy = MAKE_STATUS(kStatusGroup_HAL_UART, 2), /*!< RX busy */
kStatus_HAL_UartTxIdle = MAKE_STATUS(kStatusGroup_HAL_UART, 3), /*!< HAL UART transmitter is idle. */
kStatus_HAL_UartRxIdle = MAKE_STATUS(kStatusGroup_HAL_UART, 4), /*!< HAL UART receiver is idle */
kStatus_HAL_UartBaudrateNotSupport =
MAKE_STATUS(kStatusGroup_HAL_UART, 5), /*!< Baudrate is not support in current clock source */
kStatus_HAL_UartProtocolError = MAKE_STATUS(
kStatusGroup_HAL_UART,
6), /*!< Error occurs for Noise, Framing, Parity, etc.
For transactional transfer, The up layer needs to abort the transfer and then starts again */
kStatus_HAL_UartError = MAKE_STATUS(kStatusGroup_HAL_UART, 7), /*!< Error occurs on HAL UART */
} hal_uart_status_t;
/*! @brief UART parity mode. */
typedef enum _hal_uart_parity_mode
{
kHAL_UartParityDisabled = 0x0U, /*!< Parity disabled */
kHAL_UartParityEven = 0x2U, /*!< Parity even enabled */
kHAL_UartParityOdd = 0x3U, /*!< Parity odd enabled */
} hal_uart_parity_mode_t;
/*! @brief UART stop bit count. */
typedef enum _hal_uart_stop_bit_count
{
kHAL_UartOneStopBit = 0U, /*!< One stop bit */
kHAL_UartTwoStopBit = 1U, /*!< Two stop bits */
} hal_uart_stop_bit_count_t;
/*! @brief UART configuration structure. */
typedef struct _hal_uart_config
{
uint32_t srcClock_Hz; /*!< Source clock */
uint32_t baudRate_Bps; /*!< Baud rate */
hal_uart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
hal_uart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
uint8_t enableRx; /*!< Enable RX */
uint8_t enableTx; /*!< Enable TX */
uint8_t enableRxRTS; /*!< Enable RX RTS */
uint8_t enableTxCTS; /*!< Enable TX CTS */
uint8_t instance; /*!< Instance (0 - UART0, 1 - UART1, ...), detail information please refer to the
SOC corresponding RM.
Invalid instance value will cause initialization failure. */
#if (defined(HAL_UART_ADAPTER_FIFO) && (HAL_UART_ADAPTER_FIFO > 0u))
uint8_t txFifoWatermark;
uint8_t rxFifoWatermark;
#endif
} hal_uart_config_t;
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
/*! @brief UART DMA status */
typedef enum _hal_uart_dma_status
{
kStatus_HAL_UartDmaSuccess = 0U,
kStatus_HAL_UartDmaRxIdle = (1U << 1U),
kStatus_HAL_UartDmaRxBusy = (1U << 2U),
kStatus_HAL_UartDmaTxIdle = (1U << 3U),
kStatus_HAL_UartDmaTxBusy = (1U << 4U),
kStatus_HAL_UartDmaIdleline = (1U << 5U),
kStatus_HAL_UartDmaError = (1U << 6U),
} hal_uart_dma_status_t;
typedef struct _dma_mux_configure_t
{
union
{
struct
{
uint8_t dma_mux_instance;
uint32_t rx_request;
uint32_t tx_request;
} dma_dmamux_configure;
};
} dma_mux_configure_t;
typedef struct _dma_channel_mux_configure_t
{
union
{
struct
{
uint32_t dma_rx_channel_mux;
uint32_t dma_tx_channel_mux;
} dma_dmamux_configure;
};
} dma_channel_mux_configure_t;
typedef struct _hal_uart_dma_config_t
{
uint8_t uart_instance;
uint8_t dma_instance;
uint8_t rx_channel;
uint8_t tx_channel;
void *dma_mux_configure;
void *dma_channel_mux_configure;
} hal_uart_dma_config_t;
#endif /* HAL_UART_DMA_ENABLE */
/*! @brief UART transfer callback function. */
typedef void (*hal_uart_transfer_callback_t)(hal_uart_handle_t handle, hal_uart_status_t status, void *callbackParam);
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
typedef struct _dma_callback_msg
{
hal_uart_dma_status_t status;
uint8_t *data;
uint32_t dataSize;
} hal_dma_callback_msg_t;
/*! @brief UART transfer callback function. */
typedef void (*hal_uart_dma_transfer_callback_t)(hal_uart_dma_handle_t handle,
hal_dma_callback_msg_t *msg,
void *callbackParam);
#endif /* HAL_UART_DMA_ENABLE */
/*! @brief UART transfer structure. */
typedef struct _hal_uart_transfer
{
uint8_t *data; /*!< The buffer of data to be transfer.*/
size_t dataSize; /*!< The byte count to be transfer. */
} hal_uart_transfer_t;
/*******************************************************************************
* API
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* _cplusplus */
/*!
* @name Initialization and deinitialization
* @{
*/
/*!
* @brief Initializes a UART instance with the UART handle and the user configuration structure.
*
* This function configures the UART module with user-defined settings. The user can configure the configuration
* structure. The parameter handle is a pointer to point to a memory space of size #HAL_UART_HANDLE_SIZE allocated by
* the caller. Example below shows how to use this API to configure the UART.
* @code
* UART_HANDLE_DEFINE(g_UartHandle);
* hal_uart_config_t config;
* config.srcClock_Hz = 48000000;
* config.baudRate_Bps = 115200U;
* config.parityMode = kHAL_UartParityDisabled;
* config.stopBitCount = kHAL_UartOneStopBit;
* config.enableRx = 1;
* config.enableTx = 1;
* config.enableRxRTS = 0;
* config.enableTxCTS = 0;
* config.instance = 0;
* HAL_UartInit((hal_uart_handle_t)g_UartHandle, &config);
* @endcode
*
* @param handle Pointer to point to a memory space of size #HAL_UART_HANDLE_SIZE allocated by the caller.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* You can define the handle in the following two ways:
* #UART_HANDLE_DEFINE(handle);
* or
* uint32_t handle[((HAL_UART_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
* @param uart_config Pointer to user-defined configuration structure.
* @retval kStatus_HAL_UartBaudrateNotSupport Baudrate is not support in current clock source.
* @retval kStatus_HAL_UartSuccess UART initialization succeed
*/
hal_uart_status_t HAL_UartInit(hal_uart_handle_t handle, const hal_uart_config_t *uart_config);
/*!
* @brief Deinitializes a UART instance.
*
* This function waits for TX complete, disables TX and RX, and disables the UART clock.
*
* @param handle UART handle pointer.
* @retval kStatus_HAL_UartSuccess UART de-initialization succeed
*/
hal_uart_status_t HAL_UartDeinit(hal_uart_handle_t handle);
/*! @}*/
/*!
* @name Blocking bus Operations
* @{
*/
/*!
* @brief Reads RX data register using a blocking method.
*
* This function polls the RX register, waits for the RX register to be full or for RX FIFO to
* have data, and reads data from the RX register.
*
* @note The function #HAL_UartReceiveBlocking and the function HAL_UartTransferReceiveNonBlocking
* cannot be used at the same time.
* And, the function HAL_UartTransferAbortReceive cannot be used to abort the transmission of this function.
*
* @param handle UART handle pointer.
* @param data Start address of the buffer to store the received data.
* @param length Size of the buffer.
* @retval kStatus_HAL_UartError An error occurred while receiving data.
* @retval kStatus_HAL_UartParityError A parity error occurred while receiving data.
* @retval kStatus_HAL_UartSuccess Successfully received all data.
*/
hal_uart_status_t HAL_UartReceiveBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
/*!
* @brief Writes to the TX register using a blocking method.
*
* This function polls the TX register, waits for the TX register to be empty or for the TX FIFO
* to have room and writes data to the TX buffer.
*
* @note The function #HAL_UartSendBlocking and the function HAL_UartTransferSendNonBlocking
* cannot be used at the same time.
* And, the function HAL_UartTransferAbortSend cannot be used to abort the transmission of this function.
*
* @param handle UART handle pointer.
* @param data Start address of the data to write.
* @param length Size of the data to write.
* @retval kStatus_HAL_UartSuccess Successfully sent all data.
*/
hal_uart_status_t HAL_UartSendBlocking(hal_uart_handle_t handle, const uint8_t *data, size_t length);
/*! @}*/
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
#if (defined(HAL_UART_TRANSFER_MODE) && (HAL_UART_TRANSFER_MODE > 0U))
/*!
* @name Transactional
* @note The transactional API and the functional API cannot be used at the same time. The macro
* #HAL_UART_TRANSFER_MODE is used to set which one will be used. If #HAL_UART_TRANSFER_MODE is zero, the
* functional API with non-blocking mode will be used. Otherwise, transactional API will be used.
* @{
*/
/*!
* @brief Installs a callback and callback parameter.
*
* This function is used to install the callback and callback parameter for UART module.
* When any status of the UART changed, the driver will notify the upper layer by the installed callback
* function. And the status is also passed as status parameter when the callback is called.
*
* @param handle UART handle pointer.
* @param callback The callback function.
* @param callbackParam The parameter of the callback function.
* @retval kStatus_HAL_UartSuccess Successfully install the callback.
*/
hal_uart_status_t HAL_UartTransferInstallCallback(hal_uart_handle_t handle,
hal_uart_transfer_callback_t callback,
void *callbackParam);
/*!
* @brief Receives a buffer of data using an interrupt method.
*
* This function receives data using an interrupt method. This is a non-blocking function, which
* returns directly without waiting for all data to be received.
* The receive request is saved by the UART driver.
* When the new data arrives, the receive request is serviced first.
* When all data is received, the UART driver notifies the upper layer
* through a callback function and passes the status parameter @ref kStatus_HAL_UartRxIdle.
*
* @note The function #HAL_UartReceiveBlocking and the function #HAL_UartTransferReceiveNonBlocking
* cannot be used at the same time.
*
* @param handle UART handle pointer.
* @param transfer UART transfer structure, see #hal_uart_transfer_t.
* @retval kStatus_HAL_UartSuccess Successfully queue the transfer into transmit queue.
* @retval kStatus_HAL_UartRxBusy Previous receive request is not finished.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartTransferReceiveNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer);
/*!
* @brief Transmits a buffer of data using the interrupt method.
*
* This function sends data using an interrupt method. This is a non-blocking function, which
* returns directly without waiting for all data to be written to the TX register. When
* all data is written to the TX register in the ISR, the UART driver calls the callback
* function and passes the @ref kStatus_HAL_UartTxIdle as status parameter.
*
* @note The function #HAL_UartSendBlocking and the function #HAL_UartTransferSendNonBlocking
* cannot be used at the same time.
*
* @param handle UART handle pointer.
* @param transfer UART transfer structure. See #hal_uart_transfer_t.
* @retval kStatus_HAL_UartSuccess Successfully start the data transmission.
* @retval kStatus_HAL_UartTxBusy Previous transmission still not finished; data not all written to TX register yet.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartTransferSendNonBlocking(hal_uart_handle_t handle, hal_uart_transfer_t *transfer);
/*!
* @brief Gets the number of bytes that have been received.
*
* This function gets the number of bytes that have been received.
*
* @param handle UART handle pointer.
* @param count Receive bytes count.
* @retval kStatus_HAL_UartError An error occurred.
* @retval kStatus_Success Get successfully through the parameter \p count.
*/
hal_uart_status_t HAL_UartTransferGetReceiveCount(hal_uart_handle_t handle, uint32_t *count);
/*!
* @brief Gets the number of bytes written to the UART TX register.
*
* This function gets the number of bytes written to the UART TX
* register by using the interrupt method.
*
* @param handle UART handle pointer.
* @param count Send bytes count.
* @retval kStatus_HAL_UartError An error occurred.
* @retval kStatus_Success Get successfully through the parameter \p count.
*/
hal_uart_status_t HAL_UartTransferGetSendCount(hal_uart_handle_t handle, uint32_t *count);
/*!
* @brief Aborts the interrupt-driven data receiving.
*
* This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know
* how many bytes are not received yet.
*
* @note The function #HAL_UartTransferAbortReceive cannot be used to abort the transmission of
* the function #HAL_UartReceiveBlocking.
*
* @param handle UART handle pointer.
* @retval kStatus_Success Get successfully abort the receiving.
*/
hal_uart_status_t HAL_UartTransferAbortReceive(hal_uart_handle_t handle);
/*!
* @brief Aborts the interrupt-driven data sending.
*
* This function aborts the interrupt-driven data sending. The user can get the remainBytes to find out
* how many bytes are not sent out.
*
* @note The function #HAL_UartTransferAbortSend cannot be used to abort the transmission of
* the function #HAL_UartSendBlocking.
*
* @param handle UART handle pointer.
* @retval kStatus_Success Get successfully abort the sending.
*/
hal_uart_status_t HAL_UartTransferAbortSend(hal_uart_handle_t handle);
/*! @}*/
#else
/*!
* @name Functional API with non-blocking mode.
* @note The functional API and the transactional API cannot be used at the same time. The macro
* #HAL_UART_TRANSFER_MODE is used to set which one will be used. If #HAL_UART_TRANSFER_MODE is zero, the
* functional API with non-blocking mode will be used. Otherwise, transactional API will be used.
* @{
*/
/*!
* @brief Installs a callback and callback parameter.
*
* This function is used to install the callback and callback parameter for UART module.
* When non-blocking sending or receiving finished, the adapter will notify the upper layer by the installed callback
* function. And the status is also passed as status parameter when the callback is called.
*
* @param handle UART handle pointer.
* @param callback The callback function.
* @param callbackParam The parameter of the callback function.
* @retval kStatus_HAL_UartSuccess Successfully install the callback.
*/
hal_uart_status_t HAL_UartInstallCallback(hal_uart_handle_t handle,
hal_uart_transfer_callback_t callback,
void *callbackParam);
/*!
* @brief Receives a buffer of data using an interrupt method.
*
* This function receives data using an interrupt method. This is a non-blocking function, which
* returns directly without waiting for all data to be received.
* The receive request is saved by the UART adapter.
* When the new data arrives, the receive request is serviced first.
* When all data is received, the UART adapter notifies the upper layer
* through a callback function and passes the status parameter @ref kStatus_HAL_UartRxIdle.
*
* @note The function #HAL_UartReceiveBlocking and the function #HAL_UartReceiveNonBlocking
* cannot be used at the same time.
*
* @param handle UART handle pointer.
* @param data Start address of the data to write.
* @param length Size of the data to write.
* @retval kStatus_HAL_UartSuccess Successfully queue the transfer into transmit queue.
* @retval kStatus_HAL_UartRxBusy Previous receive request is not finished.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartReceiveNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
/*!
* @brief Transmits a buffer of data using the interrupt method.
*
* This function sends data using an interrupt method. This is a non-blocking function, which
* returns directly without waiting for all data to be written to the TX register. When
* all data is written to the TX register in the ISR, the UART driver calls the callback
* function and passes the @ref kStatus_HAL_UartTxIdle as status parameter.
*
* @note The function #HAL_UartSendBlocking and the function #HAL_UartSendNonBlocking
* cannot be used at the same time.
*
* @param handle UART handle pointer.
* @param data Start address of the data to write.
* @param length Size of the data to write.
* @retval kStatus_HAL_UartSuccess Successfully start the data transmission.
* @retval kStatus_HAL_UartTxBusy Previous transmission still not finished; data not all written to TX register yet.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartSendNonBlocking(hal_uart_handle_t handle, uint8_t *data, size_t length);
/*!
* @brief Gets the number of bytes that have been received.
*
* This function gets the number of bytes that have been received.
*
* @param handle UART handle pointer.
* @param reCount Receive bytes count.
* @retval kStatus_HAL_UartError An error occurred.
* @retval kStatus_Success Get successfully through the parameter \p count.
*/
hal_uart_status_t HAL_UartGetReceiveCount(hal_uart_handle_t handle, uint32_t *reCount);
/*!
* @brief Gets the number of bytes written to the UART TX register.
*
* This function gets the number of bytes written to the UART TX
* register by using the interrupt method.
*
* @param handle UART handle pointer.
* @param seCount Send bytes count.
* @retval kStatus_HAL_UartError An error occurred.
* @retval kStatus_Success Get successfully through the parameter \p count.
*/
hal_uart_status_t HAL_UartGetSendCount(hal_uart_handle_t handle, uint32_t *seCount);
/*!
* @brief Aborts the interrupt-driven data receiving.
*
* This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know
* how many bytes are not received yet.
*
* @note The function #HAL_UartAbortReceive cannot be used to abort the transmission of
* the function #HAL_UartReceiveBlocking.
*
* @param handle UART handle pointer.
* @retval kStatus_Success Get successfully abort the receiving.
*/
hal_uart_status_t HAL_UartAbortReceive(hal_uart_handle_t handle);
/*!
* @brief Aborts the interrupt-driven data sending.
*
* This function aborts the interrupt-driven data sending. The user can get the remainBytes to find out
* how many bytes are not sent out.
*
* @note The function #HAL_UartAbortSend cannot be used to abort the transmission of
* the function #HAL_UartSendBlocking.
*
* @param handle UART handle pointer.
* @retval kStatus_Success Get successfully abort the sending.
*/
hal_uart_status_t HAL_UartAbortSend(hal_uart_handle_t handle);
/*! @}*/
#endif
#endif
#if (defined(HAL_UART_DMA_ENABLE) && (HAL_UART_DMA_ENABLE > 0U))
/*!
* @brief Initializes a UART dma instance with the UART dma handle and the user configuration structure.
*
* This function configures the UART dma module with user-defined settings. The user can configure the configuration
* structure. The parameter handle is a pointer to point to a memory space of size #HAL_UART_DMA_HANDLE_SIZE allocated
* by the caller. Example below shows how to use this API to configure the UART.
* @code
*
* Init TimerManager, only used in UART without Idleline interrupt
* timer_config_t timerConfig;
* timerConfig.srcClock_Hz = 16000000;
* timerConfig.instance = 0;
* TM_Init(&timerConfig);
*
* Init the DMA module
* DMA_Init(DMA0);
*
* Define a uart dma handle
* UART_HANDLE_DEFINE(g_uartHandle);
* UART_DMA_HANDLE_DEFINE(g_UartDmaHandle);
*
* Configure uart settings
* hal_uart_config_t uartConfig;
* uartConfig.srcClock_Hz = 48000000;
* uartConfig.baudRate_Bps = 115200;
* uartConfig.parityMode = kHAL_UartParityDisabled;
* uartConfig.stopBitCount = kHAL_UartOneStopBit;
* uartConfig.enableRx = 1;
* uartConfig.enableTx = 1;
* uartConfig.enableRxRTS = 0;
* uartConfig.enableTxCTS = 0;
* uartConfig.instance = 0;
*
* Init uart
* HAL_UartInit((hal_uart_handle_t *)g_uartHandle, &uartConfig);
*
* Configure uart dma settings
* hal_uart_dma_config_t dmaConfig;
* dmaConfig.uart_instance = 0;
* dmaConfig.dma_instance = 0;
* dmaConfig.rx_channel = 0;
* dmaConfig.tx_channel = 1;
*
* Init uart dma
* HAL_UartDMAInit((hal_uart_handle_t *)g_uartHandle, (hal_uart_dma_handle_t *)g_uartDmaHandle, &dmaConfig);
* @endcode
*
* @param handle UART handle pointer.
* @param dmaHandle Pointer to point to a memory space of size #HAL_UART_DMA_HANDLE_SIZE allocated by the caller.
* The handle should be 4 byte aligned, because unaligned access doesn't be supported on some devices.
* You can define the handle in the following two ways:
* #UART_DMA_HANDLE_DEFINE(handle);
* or
* uint32_t handle[((HAL_UART_DMA_HANDLE_SIZE + sizeof(uint32_t) - 1U) / sizeof(uint32_t))];
* @param dmaConfig Pointer to user-defined configuration structure.
* @retval kStatus_HAL_UartDmaError UART dma initialization failed.
* @retval kStatus_HAL_UartDmaSuccess UART dma initialization succeed.
*/
hal_uart_dma_status_t HAL_UartDMAInit(hal_uart_handle_t handle,
hal_uart_dma_handle_t dmaHandle,
hal_uart_dma_config_t *dmaConfig);
/*!
* @brief Deinitializes a UART DMA instance.
*
* This function will abort uart dma receive/send transfer and deinitialize UART.
*
* @param handle UART handle pointer.
* @retval kStatus_HAL_UartDmaSuccess UART DMA de-initialization succeed
*/
hal_uart_dma_status_t HAL_UartDMADeinit(hal_uart_handle_t handle);
/*!
* @brief Installs a callback and callback parameter.
*
* This function is used to install the callback and callback parameter for UART DMA module.
* When any status of the UART DMA changed, the driver will notify the upper layer by the installed callback
* function. And the status is also passed as status parameter when the callback is called.
*
* @param handle UART handle pointer.
* @param callback The callback function.
* @param callbackParam The parameter of the callback function.
* @retval kStatus_HAL_UartDmaSuccess Successfully install the callback.
*/
hal_uart_dma_status_t HAL_UartDMATransferInstallCallback(hal_uart_handle_t handle,
hal_uart_dma_transfer_callback_t callback,
void *callbackParam);
/*!
* @brief Receives a buffer of data using an dma method.
*
* This function receives data using an dma method. This is a non-blocking function, which
* returns directly without waiting for all data to be received.
* The receive request is saved by the UART DMA driver.
* When all data is received, the UART DMA adapter notifies the upper layer
* through a callback function and passes the status parameter @ref kStatus_HAL_UartDmaRxIdle.
*
* When an idleline is detected, the UART DMA adapter notifies the upper layer through a callback function,
* and passes the status parameter @ref kStatus_HAL_UartDmaIdleline. For the UARTs without hardware idleline
* interrupt(like usart), it will use a software idleline detection method with the help of TimerManager.
*
* When the soc support cache, uplayer should do cache maintain operations for transfer buffer before call this API.
*
* @param handle UART handle pointer.
* @param data data Start address of the buffer to store the received data.
* @param length Size of the buffer.
* @param receiveAll Idleline interrupt will not end transfer process if set true.
* @retval kStatus_HAL_UartDmaSuccess Successfully start the data receive.
* @retval kStatus_HAL_UartDmaRxBusy Previous receive request is not finished.
*/
hal_uart_dma_status_t HAL_UartDMATransferReceive(hal_uart_handle_t handle,
uint8_t *data,
size_t length,
bool receiveAll);
/*!
* @brief Transmits a buffer of data using an dma method.
*
* This function sends data using an dma method. This is a non-blocking function, which
* returns directly without waiting for all data to be written to the TX register. When
* all data is written to the TX register by DMA, the UART DMA driver calls the callback
* function and passes the @ref kStatus_HAL_UartDmaTxIdle as status parameter.
*
* When the soc support cache, uplayer should do cache maintain operations for transfer buffer before call this API.
*
* @param handle UART handle pointer.
* @param data data Start address of the data to write.
* @param length Size of the data to write.
* @retval kStatus_HAL_UartDmaSuccess Successfully start the data transmission.
* @retval kStatus_HAL_UartDmaTxBusy Previous send request is not finished.
*/
hal_uart_dma_status_t HAL_UartDMATransferSend(hal_uart_handle_t handle, uint8_t *data, size_t length);
/*!
* @brief Gets the number of bytes that have been received.
*
* This function gets the number of bytes that have been received.
*
* @param handle UART handle pointer.
* @param reCount Receive bytes count.
* @retval kStatus_HAL_UartDmaError An error occurred.
* @retval kStatus_HAL_UartDmaSuccess Get successfully through the parameter \p reCount.
*/
hal_uart_dma_status_t HAL_UartDMAGetReceiveCount(hal_uart_handle_t handle, uint32_t *reCount);
/*!
* @brief Gets the number of bytes written to the UART TX register.
*
* This function gets the number of bytes written to the UART TX
* register by using the DMA method.
*
* @param handle UART handle pointer.
* @param seCount Send bytes count.
* @retval kStatus_HAL_UartDmaError An error occurred.
* @retval kStatus_HAL_UartDmaSuccess Get successfully through the parameter \p seCount.
*/
hal_uart_dma_status_t HAL_UartDMAGetSendCount(hal_uart_handle_t handle, uint32_t *seCount);
/*!
* @brief Aborts the DMA-driven data receiving.
*
* This function aborts the DMA-driven data receiving.
*
* @param handle UART handle pointer.
* @retval kStatus_HAL_UartDmaSuccess Get successfully abort the receiving.
*/
hal_uart_dma_status_t HAL_UartDMAAbortReceive(hal_uart_handle_t handle);
/*!
* @brief Aborts the DMA-driven data sending.
*
* This function aborts the DMA-driven data sending.
*
* @param handle UART handle pointer.
* @retval kStatus_Success Get successfully abort the sending.
*/
hal_uart_dma_status_t HAL_UartDMAAbortSend(hal_uart_handle_t handle);
#endif /* HAL_UART_DMA_ENABLE */
/*!
* @brief Prepares to enter low power consumption.
*
* This function is used to prepare to enter low power consumption.
*
* @param handle UART handle pointer.
* @retval kStatus_HAL_UartSuccess Successful operation.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartEnterLowpower(hal_uart_handle_t handle);
/*!
* @brief Restores from low power consumption.
*
* This function is used to restore from low power consumption.
*
* @param handle UART handle pointer.
* @retval kStatus_HAL_UartSuccess Successful operation.
* @retval kStatus_HAL_UartError An error occurred.
*/
hal_uart_status_t HAL_UartExitLowpower(hal_uart_handle_t handle);
#if (defined(UART_ADAPTER_NON_BLOCKING_MODE) && (UART_ADAPTER_NON_BLOCKING_MODE > 0U))
/*!
* @brief UART IRQ handle function.
*
* This function handles the UART transmit and receive IRQ request.
*
* @param handle UART handle pointer.
*/
void HAL_UartIsrFunction(hal_uart_handle_t handle);
#endif
#if defined(__cplusplus)
}
#endif
/*! @}*/
#endif /* __HAL_UART_ADAPTER_H__ */
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@@ -1,42 +0,0 @@
/*
* Copyright 2014-2016 Freescale Semiconductor, Inc.
* Copyright 2016-2023 NXP
* SPDX-License-Identifier: BSD-3-Clause
*
*/
#ifndef __FSL_DEVICE_REGISTERS_H__
#define __FSL_DEVICE_REGISTERS_H__
/*
* Include the cpu specific register header files.
*
* The CPU macro should be declared in the project or makefile.
*/
#if (defined(CPU_MCXN947VDF_cm33_core0) || defined(CPU_MCXN947VNL_cm33_core0))
#define MCXN947_cm33_core0_SERIES
/* CMSIS-style register definitions */
#include "MCXN947_cm33_core0.h"
/* CPU specific feature definitions */
#include "MCXN947_cm33_core0_features.h"
#elif (defined(CPU_MCXN947VDF_cm33_core1) || defined(CPU_MCXN947VNL_cm33_core1))
#define MCXN947_cm33_core1_SERIES
/* CMSIS-style register definitions */
#include "MCXN947_cm33_core1.h"
/* CPU specific feature definitions */
#include "MCXN947_cm33_core1_features.h"
#else
#error "No valid CPU defined!"
#endif
#endif /* __FSL_DEVICE_REGISTERS_H__ */
/*******************************************************************************
* EOF
******************************************************************************/
@@ -1,130 +0,0 @@
/*
** ###################################################################
** Processors: MCXN947VDF_cm33_core0
** MCXN947VNL_cm33_core0
**
** Compilers: GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
** Keil ARM C/C++ Compiler
** MCUXpresso Compiler
**
** Reference manual: MCXNx4x Reference Manual
** Version: rev. 2.0, 2023-02-01
** Build: b231219
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2023 NXP
** SPDX-License-Identifier: BSD-3-Clause
**
** http: www.nxp.com
** mail: support@nxp.com
**
** Revisions:
** - rev. 1.0 (2022-10-01)
** Initial version
** - rev. 2.0 (2023-02-01)
** Initial version based on Rev. 2 Draft B
**
** ###################################################################
*/
/*!
* @file MCXN947_cm33_core0
* @version 2.0
* @date 2023-02-01
* @brief Device specific configuration file for MCXN947_cm33_core0
* (implementation file)
*
* Provides a system configuration function and a global variable that contains
* the system frequency. It configures the device and initializes the oscillator
* (PLL) that is part of the microcontroller device.
*/
#include <stdint.h>
#include "fsl_device_registers.h"
/* ----------------------------------------------------------------------------
-- Core clock
---------------------------------------------------------------------------- */
uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
/* ----------------------------------------------------------------------------
-- SystemInit()
---------------------------------------------------------------------------- */
__attribute__ ((weak)) void SystemInit (void) {
#if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Secure mode */
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Non-secure mode */
#endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
#endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */
#endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
SCB->NSACR |= ((3UL << 0) | (3UL << 10)); /* enable CP0, CP1, CP10, CP11 Non-secure Access */
SYSCON->ECC_ENABLE_CTRL = 0; /* disable RAM ECC to get max RAM size */
SYSCON->NVM_CTRL &= ~SYSCON_NVM_CTRL_DIS_MBECC_ERR_DATA_MASK; /* enables bus error on multi-bit ECC error for data */
#if defined(__MCUXPRESSO)
extern void(*const g_pfnVectors[]) (void);
SCB->VTOR = (uint32_t) &g_pfnVectors;
#else
extern void *__Vectors;
SCB->VTOR = (uint32_t) &__Vectors;
#endif
/* enable the flash cache LPCAC */
SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;
/* Disable aGDET trigger the CHIP_RESET */
ITRC0->OUT_SEL[4][0] = (ITRC0->OUT_SEL[4][0] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
ITRC0->OUT_SEL[4][1] = (ITRC0->OUT_SEL[4][1] & ~ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN9_SELn(0x2));
/* Disable aGDET interrupt and reset */
SPC0->ACTIVE_CFG |= SPC_ACTIVE_CFG_GLITCH_DETECT_DISABLE_MASK;
SPC0->GLITCH_DETECT_SC &= ~SPC_GLITCH_DETECT_SC_LOCK_MASK;
SPC0->GLITCH_DETECT_SC = 0x3C;
SPC0->GLITCH_DETECT_SC |= SPC_GLITCH_DETECT_SC_LOCK_MASK;
/* Disable dGDET trigger the CHIP_RESET */
ITRC0->OUT_SEL[4][0] = (ITRC0->OUT_SEL[4][0] & ~ ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
ITRC0->OUT_SEL[4][1] = (ITRC0->OUT_SEL[4][1] & ~ ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn_MASK) | (ITRC_OUTX_SEL_OUTX_SELY_OUT_SEL_IN0_SELn(0x2));
GDET0->GDET_ENABLE1 = 0;
GDET1->GDET_ENABLE1 = 0;
SystemInitHook();
}
/* ----------------------------------------------------------------------------
-- SystemCoreClockUpdate()
---------------------------------------------------------------------------- */
void SystemCoreClockUpdate (void) {
}
/* ----------------------------------------------------------------------------
-- SystemInitHook()
---------------------------------------------------------------------------- */
__attribute__ ((weak)) void SystemInitHook (void) {
/* Void implementation of the weak function. */
}
@@ -1,108 +0,0 @@
/*
** ###################################################################
** Processors: MCXN947VDF_cm33_core0
** MCXN947VNL_cm33_core0
**
** Compilers: GNU C Compiler
** IAR ANSI C/C++ Compiler for ARM
** Keil ARM C/C++ Compiler
** MCUXpresso Compiler
**
** Reference manual: MCXNx4x Reference Manual
** Version: rev. 2.0, 2023-02-01
** Build: b231219
**
** Abstract:
** Provides a system configuration function and a global variable that
** contains the system frequency. It configures the device and initializes
** the oscillator (PLL) that is part of the microcontroller device.
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2023 NXP
** SPDX-License-Identifier: BSD-3-Clause
**
** http: www.nxp.com
** mail: support@nxp.com
**
** Revisions:
** - rev. 1.0 (2022-10-01)
** Initial version
** - rev. 2.0 (2023-02-01)
** Initial version based on Rev. 2 Draft B
**
** ###################################################################
*/
/*!
* @file MCXN947_cm33_core0
* @version 2.0
* @date 2023-02-01
* @brief Device specific configuration file for MCXN947_cm33_core0 (header file)
*
* Provides a system configuration function and a global variable that contains
* the system frequency. It configures the device and initializes the oscillator
* (PLL) that is part of the microcontroller device.
*/
#ifndef _SYSTEM_MCXN947_cm33_core0_H_
#define _SYSTEM_MCXN947_cm33_core0_H_ /**< Symbol preventing repeated inclusion */
#ifdef __cplusplus
extern "C" {
#endif
#include <stdint.h>
#define DEFAULT_SYSTEM_CLOCK 48000000u /* Default System clock value */
#define CLK_FRO_12MHZ 12000000u /* FRO 12 MHz (fro_12m) */
#define CLK_FRO_144MHZ 144000000u /* FRO 144 MHz (fro_144m) */
/**
* @brief System clock frequency (core clock)
*
* The system clock frequency supplied to the SysTick timer and the processor
* core clock. This variable can be used by the user application to setup the
* SysTick timer or configure other parameters. It may also be used by debugger to
* query the frequency of the debug timer or configure the trace clock speed
* SystemCoreClock is initialized with a correct predefined value.
*/
extern uint32_t SystemCoreClock;
/**
* @brief Setup the microcontroller system.
*
* Typically this function configures the oscillator (PLL) that is part of the
* microcontroller device. For systems with variable clock speed it also updates
* the variable SystemCoreClock. SystemInit is called from startup_device file.
*/
void SystemInit (void);
/**
* @brief Updates the SystemCoreClock variable.
*
* It must be called whenever the core clock is changed during program
* execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
* the current core clock.
*/
void SystemCoreClockUpdate (void);
/**
* @brief SystemInit function hook.
*
* This weak function allows to call specific initialization code during the
* SystemInit() execution.This can be used when an application specific code needs
* to be called as close to the reset entry as possible (for example the Multicore
* Manager MCMGR_EarlyInit() function call).
* NOTE: No global r/w variables can be used in this hook function because the
* initialization of these variables happens after this function.
*/
void SystemInitHook (void);
#ifdef __cplusplus
}
#endif
#endif /* _SYSTEM_MCXN947_cm33_core0_H_ */
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